Add missing NSH configuration settings. Correct some conditional logic for STM32 FALSH pre-fetch settings. From Lorenz Meier
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@ -572,3 +572,5 @@
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clean .dSYM files in directories where .exe may be built (2013-5-30).
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* apps/examples/nrf35l01_term: Add an example application to demo the
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nRF24L01 driver. From Laurent Latil (2013-6-1).
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* apps/nshlib/Kconfig: Add some missing NSH configuration values.
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From Lorenz Meier (2013-6-2).
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@ -252,6 +252,13 @@ config NSH_LINELEN
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The maximum length of one command line and of one output line.
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Default: 80
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config NSH_MAXARGUMENTS
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int "Maximum number of command arguments"
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default 6
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---help---
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The maximum number of NSH command arguments.
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Default: 6
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config NSH_NESTDEPTH
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int "Maximum command nesting"
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default 3
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@ -354,6 +361,16 @@ config NSH_ROMFSSECTSIZE
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increased if the ROMFS volume were to be become large. Any value
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selected must be a power of 2.
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config NSH_ARCHROMFS
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bool "Architecture-specific ROMFS header"
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default n
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depends on NSH_ROMFSETC
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---help---
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Enable this option to provide an architecture-specific ROMFS
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header at <arch/board/nsh_romfsimg.h>. Note that this header
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will be copied from nuttx/configs/<boardname>/include and should
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be stored at this location.
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config NSH_FATDEVNO
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int "FAT block device minor number"
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default 0
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@ -4858,3 +4858,8 @@
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* arch/arm/src/sam3u: Renamed files to sam_* vs. sam3u_*.
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Eliminated sam3u_internal.h; instead uses individual header
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files for each SAM interface block (2013-6-2).
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* arch/arm/src/stm32/stm32f20xxx_rcc.c and stm32f40xxx_rcc.c, and
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configs/mikroe-stm32f4/src/up_clockconfig.c. Correct some bad
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conditional compilation (CONFIG_ missing from setting name). This
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affects some STM32 FLASH pre-fetch settings. From Lorenz Meier
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(2013-6-2).
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@ -631,7 +631,7 @@ static void stm32_stdclockconfig(void)
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/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
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#ifdef STM32_FLASH_PREFETCH
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#ifdef CONFIG_STM32_FLASH_PREFETCH
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
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#else
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
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@ -669,7 +669,7 @@ static void stm32_stdclockconfig(void)
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/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
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#ifdef STM32_FLASH_PREFETCH
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#ifdef CONFIG_STM32_FLASH_PREFETCH
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
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#else
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
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@ -128,7 +128,7 @@ void stm32_board_clockconfig(void)
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/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
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#ifdef STM32_FLASH_PREFETCH
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#ifdef CONFIG_STM32_FLASH_PREFETCH
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
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#else
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regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
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