From 0baf7136f9db7b14d5ed01cf753a86d0d38972b5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 2 Jun 2013 13:16:35 -0600 Subject: [PATCH] Add missing NSH configuration settings. Correct some conditional logic for STM32 FALSH pre-fetch settings. From Lorenz Meier --- apps/ChangeLog.txt | 2 ++ apps/nshlib/Kconfig | 17 +++++++++++++++++ nuttx/ChangeLog | 5 +++++ nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c | 2 +- nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c | 2 +- .../configs/mikroe-stm32f4/src/up_clockconfig.c | 2 +- 6 files changed, 27 insertions(+), 3 deletions(-) diff --git a/apps/ChangeLog.txt b/apps/ChangeLog.txt index f8ba10f72..71f7da62a 100644 --- a/apps/ChangeLog.txt +++ b/apps/ChangeLog.txt @@ -572,3 +572,5 @@ clean .dSYM files in directories where .exe may be built (2013-5-30). * apps/examples/nrf35l01_term: Add an example application to demo the nRF24L01 driver. From Laurent Latil (2013-6-1). + * apps/nshlib/Kconfig: Add some missing NSH configuration values. + From Lorenz Meier (2013-6-2). diff --git a/apps/nshlib/Kconfig b/apps/nshlib/Kconfig index 72041ec76..ded9f2e67 100644 --- a/apps/nshlib/Kconfig +++ b/apps/nshlib/Kconfig @@ -252,6 +252,13 @@ config NSH_LINELEN The maximum length of one command line and of one output line. Default: 80 +config NSH_MAXARGUMENTS + int "Maximum number of command arguments" + default 6 + ---help--- + The maximum number of NSH command arguments. + Default: 6 + config NSH_NESTDEPTH int "Maximum command nesting" default 3 @@ -354,6 +361,16 @@ config NSH_ROMFSSECTSIZE increased if the ROMFS volume were to be become large. Any value selected must be a power of 2. +config NSH_ARCHROMFS + bool "Architecture-specific ROMFS header" + default n + depends on NSH_ROMFSETC + ---help--- + Enable this option to provide an architecture-specific ROMFS + header at . Note that this header + will be copied from nuttx/configs//include and should + be stored at this location. + config NSH_FATDEVNO int "FAT block device minor number" default 0 diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index 3fdb1e415..248130c1b 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -4858,3 +4858,8 @@ * arch/arm/src/sam3u: Renamed files to sam_* vs. sam3u_*. Eliminated sam3u_internal.h; instead uses individual header files for each SAM interface block (2013-6-2). + * arch/arm/src/stm32/stm32f20xxx_rcc.c and stm32f40xxx_rcc.c, and + configs/mikroe-stm32f4/src/up_clockconfig.c. Correct some bad + conditional compilation (CONFIG_ missing from setting name). This + affects some STM32 FLASH pre-fetch settings. From Lorenz Meier + (2013-6-2). diff --git a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c index ac72fb60b..dd796f86c 100644 --- a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c @@ -631,7 +631,7 @@ static void stm32_stdclockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c index fc7fe1697..82757c43f 100644 --- a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c @@ -669,7 +669,7 @@ static void stm32_stdclockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); diff --git a/nuttx/configs/mikroe-stm32f4/src/up_clockconfig.c b/nuttx/configs/mikroe-stm32f4/src/up_clockconfig.c index 9618cf8dd..3c55bd950 100644 --- a/nuttx/configs/mikroe-stm32f4/src/up_clockconfig.c +++ b/nuttx/configs/mikroe-stm32f4/src/up_clockconfig.c @@ -128,7 +128,7 @@ void stm32_board_clockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);