NVMe: decode Set Fatures response (DWORD0) in CQE.
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Constantine Gavrilov
Wireshark GitLab Utility
parent
d5c1bd9d93
commit
e75998cded
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@ -449,6 +449,10 @@ static int hf_nvme_get_logpage_sanitize_rsvd = -1;
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/* NVMe CQE fields */
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static int hf_nvme_cqe_dword0 = -1;
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static int hf_nvme_cqe_dword0_sf_pm[4] = { NEG_LST_4 };
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static int hf_nvme_cqe_dword0_sf_lbart[3] = { NEG_LST_3 };
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static int hf_nvme_cqe_dword0_sf_nq[3] = { NEG_LST_3 };
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static int hf_nvme_cqe_dword0_sf_err = -1;
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static int hf_nvme_cqe_dword1 = -1;
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static int hf_nvme_cqe_sqhd = -1;
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static int hf_nvme_cqe_sqid = -1;
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@ -2939,6 +2943,10 @@ static const value_string sf_wps[] = {
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{ 0, NULL },
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};
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static void add_nvme_queues(gchar *result, guint32 val)
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{
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g_snprintf(result, ITEM_LABEL_LENGTH, "%x (%u)", val, val+1);
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}
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static void dissect_nvme_set_features_dword11(tvbuff_t *cmd_tvb, proto_tree *cmd_tree, guint fid)
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{
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@ -3188,9 +3196,45 @@ static const char *get_cqe_sc_string(guint sct, guint sc)
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}
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}
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void
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dissect_nvme_cqe(tvbuff_t *nvme_tvb, packet_info *pinfo, proto_tree *root_tree,
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struct nvme_cmd_ctx *cmd_ctx)
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static const value_string nvme_cqe_sc_sf_err_dword0_tbl[] = {
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{ 0xD, "Feature Identifier Not Saveable" },
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{ 0xE, "Feature Not Changeable" },
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{ 0xF, "Feature Not Namespace Specific" },
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{ 0x14, "Overlapping Range" },
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{ 0, NULL },
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};
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static void decode_dword0_cqe(tvbuff_t *nvme_tvb, proto_tree *cqe_tree, guint sc, struct nvme_cmd_ctx *cmd_ctx)
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{
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switch (cmd_ctx->opcode) {
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case NVME_AQ_OPC_SET_FEATURES:
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{
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if (sc) {
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_dword0_sf_err, nvme_tvb, 0, 4, ENC_LITTLE_ENDIAN);
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} else {
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switch (cmd_ctx->cmd_ctx.set_features.fid) {
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case F_POWER_MGMT:
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add_group_mask_entry(nvme_tvb, cqe_tree, 0, 4, ASPEC(hf_nvme_cqe_dword0_sf_pm));
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break;
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case F_LBA_RANGE_TYPE:
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add_group_mask_entry(nvme_tvb, cqe_tree, 0, 4, ASPEC(hf_nvme_cqe_dword0_sf_lbart));
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break;
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case F_NUM_OF_QUEUES:
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add_group_mask_entry(nvme_tvb, cqe_tree, 0, 4, ASPEC(hf_nvme_cqe_dword0_sf_nq));
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break;
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default:
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_dword0, nvme_tvb, 0, 4, ENC_LITTLE_ENDIAN);
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}
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}
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break;
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}
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default:
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_dword0, nvme_tvb, 0, 4, ENC_LITTLE_ENDIAN);
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break;
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}
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}
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void dissect_nvme_cqe(tvbuff_t *nvme_tvb, packet_info *pinfo, proto_tree *root_tree, struct nvme_cmd_ctx *cmd_ctx)
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{
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proto_tree *cqe_tree;
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proto_item *ti, *grp;
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@ -3206,14 +3250,14 @@ dissect_nvme_cqe(tvbuff_t *nvme_tvb, packet_info *pinfo, proto_tree *root_tree,
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nvme_publish_to_cmd_link(cqe_tree, nvme_tvb, hf_nvme_cmd_pkt, cmd_ctx);
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nvme_publish_cmd_latency(cqe_tree, cmd_ctx, hf_nvme_cmd_latency);
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_dword0, nvme_tvb, 0, 4, ENC_LITTLE_ENDIAN);
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val = tvb_get_guint16(nvme_tvb, 14, ENC_LITTLE_ENDIAN);
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decode_dword0_cqe(nvme_tvb, cqe_tree, ((val & 0x1fe) >> 9), cmd_ctx);
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_dword1, nvme_tvb, 4, 4, ENC_LITTLE_ENDIAN);
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_sqhd, nvme_tvb, 8, 2, ENC_LITTLE_ENDIAN);
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_sqid, nvme_tvb, 10, 2, ENC_LITTLE_ENDIAN);
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proto_tree_add_item(cqe_tree, hf_nvme_cqe_cid, nvme_tvb, 12, 2, ENC_LITTLE_ENDIAN);
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val = tvb_get_guint16(nvme_tvb, 14, ENC_LITTLE_ENDIAN);
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ti = proto_tree_add_item(root_tree, hf_nvme_cqe_status[0], nvme_tvb, 14, 2, ENC_LITTLE_ENDIAN);
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ti = proto_tree_add_item(cqe_tree, hf_nvme_cqe_status[0], nvme_tvb, 14, 2, ENC_LITTLE_ENDIAN);
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grp = proto_item_add_subtree(ti, ett_data);
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for (i = 1; i < array_length(hf_nvme_cqe_status); i++) {
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ti = proto_tree_add_item(grp, hf_nvme_cqe_status[i], nvme_tvb, 14, 2, ENC_LITTLE_ENDIAN);
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@ -3624,11 +3668,11 @@ proto_register_nvme(void)
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},
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{ &hf_nvme_cmd_set_features_dword11_nq[1],
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{ "Number of IO Submission Queues Requested", "nvme.cmd.set_features.dword11.nq.nsqr",
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FT_UINT32, BASE_DEC, NULL, 0xffff, NULL, HFILL}
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FT_UINT32, BASE_CUSTOM, CF_FUNC(add_nvme_queues), 0xffff, NULL, HFILL}
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},
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{ &hf_nvme_cmd_set_features_dword11_nq[2],
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{ "Number of IO Completion Queues Requested", "nvme.cmd.set_features.dword11.nq.ncqr",
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FT_UINT32, BASE_DEC, NULL, 0xffff0000, NULL, HFILL}
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FT_UINT32, BASE_CUSTOM, CF_FUNC(add_nvme_queues), 0xffff0000, NULL, HFILL}
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},
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{ &hf_nvme_cmd_set_features_dword11_irqc[0],
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{ "DWORD11", "nvme.cmd.set_features.dword11.irqc",
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@ -6077,6 +6121,50 @@ proto_register_nvme(void)
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{ "DWORD0", "nvme.cqe.dword0",
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FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_err,
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{ "Set Features Error Specific Code", "nvme.cqe.dword0.set_features.err",
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FT_UINT32, BASE_HEX, VALS(nvme_cqe_sc_sf_err_dword0_tbl), 0x0, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_pm[0],
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{ "DWORD0: Set Feature Power Management Result", "nvme.cqe.dword0.set_features.pm",
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FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_pm[1],
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{ "Power Sate", "nvme.cqe.dword0.set_features.pm.ps",
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FT_UINT32, BASE_HEX, NULL, 0x1f, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_pm[2],
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{ "Workload Hint", "nvme.cqe.dword0.set_features.pm.wh",
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FT_UINT32, BASE_HEX, NULL, 0xe0, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_pm[3],
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{ "Reserved", "nvme.cqe.dword0.set_features.pm.rsvd",
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FT_UINT32, BASE_HEX, NULL, 0xffffff00, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_lbart[0],
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{ "DWORD0: Set Feature LBA Range Type Result", "nvme.cqe.dword0.set_features.lbart",
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FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_lbart[1],
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{ "Number of LBA Ranges", "nvme.cqe.dword0.set_features.lbart.num",
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FT_UINT32, BASE_HEX, NULL, 0x3f, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_lbart[2],
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{ "Reserved", "nvme.cqe.dword0.set_features.lbart.rsvd",
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FT_UINT32, BASE_HEX, NULL, 0xffffffc0, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_nq[0],
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{ "DWORD0: Set Feature Number of Queues Result", "nvme.cqe.dword0.set_features.nq",
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FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_nq[1],
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{ "Number of IO Submission Queues Allocated", "nvme.cqe.dword0.set_features.nq.nsqa",
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FT_UINT32, BASE_CUSTOM, CF_FUNC(add_nvme_queues), 0xffff, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword0_sf_nq[2],
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{ "Number of IO Completion Queues Allocated", "nvme.cqe.dword0.set_features.ncqa",
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FT_UINT32, BASE_CUSTOM, CF_FUNC(add_nvme_queues), 0xffff0000, NULL, HFILL}
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},
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{ &hf_nvme_cqe_dword1,
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{ "DWORD1", "nvme.cqe.dword1",
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FT_UINT32, BASE_HEX, NULL, 0x0, NULL, HFILL}
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