mirror of https://gerrit.osmocom.org/libosmocore
271 lines
15 KiB
Plaintext
271 lines
15 KiB
Plaintext
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==== Running test_idle_ready()
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Allocated
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to IDLE_READY (no timeout)
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Initial status: 0x00000000
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circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
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circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
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circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
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osmo_v110_ta_frame_in(): all bits set to binary '1'
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D-bits: 111111111111111111111111111111111111111111111111
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E-bits: 1111111
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S-bits: 111111111
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X-bits: 11
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event RX_FRAME_IND
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v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111
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osmo_v110_ta_frame_in() returns 0
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osmo_v110_ta_frame_out(): expecting all bits set to binary '1'
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event TX_FRAME_RTS
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osmo_v110_ta_frame_out() returns 0
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D-bits: 111111111111111111111111111111111111111111111111
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E-bits: 1111111
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S-bits: 111111111
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X-bits: 11
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setting circuit 108/DTR (Data Terminal Ready) ON
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
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osmo_v110_ta_set_circuit() returns 0
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setting circuit 108/DTR (Data Terminal Ready) OFF
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DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: State change to IDLE_READY (no timeout)
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osmo_v110_ta_set_circuit() returns 0
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setting circuit 108/DTR (Data Terminal Ready) ON
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_idle_ready){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
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osmo_v110_ta_set_circuit() returns 0
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DLGLOBAL DEBUG V110-TA(test_idle_ready){CONNECT_TA_TO_LINE}: Deallocated
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==== Running test_conn_ta_line()
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: Allocated
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: State change to IDLE_READY (no timeout)
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setting circuit 108/DTR (Data Terminal Ready) ON
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
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osmo_v110_ta_set_circuit() returns 0
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osmo_v110_ta_frame_out(): S-/X-bits are expected to be 1 (OFF)
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osmo_v110_ta_frame_out(): D-/E-bits are all expected to be 1
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event TX_FRAME_RTS
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osmo_v110_ta_frame_out() returns 0
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D-bits: 111111111111111111111111111111111111111111111111
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E-bits: 1111111
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S-bits: 111111111
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X-bits: 11
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osmo_v110_ta_sync_ind(): the lower layer indicates sync event
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
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osmo_v110_ta_frame_out(): S-/X-bits are expected to be 0 (ON)
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osmo_v110_ta_frame_out(): D-/E-bits are all expected to be 1
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event TX_FRAME_RTS
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osmo_v110_ta_frame_out() returns 0
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D-bits: 111111111111111111111111111111111111111111111111
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E-bits: 1111111
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S-bits: 000000000
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X-bits: 00
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osmo_v110_ta_frame_in(): S-/X-bits are OFF, expect no state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 111111111
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X-bits: 11
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
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v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111
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osmo_v110_ta_frame_in() returns 0
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osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
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v110_ta_test_status_update_cb(status=0x0000001e)
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
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v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_in() returns 0
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DLGLOBAL DEBUG V110-TA(test_conn_ta_line){DATA_TRANSFER}: Deallocated
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==== Running test_data_transfer()
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DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: Allocated
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DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: State change to IDLE_READY (no timeout)
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setting circuit 108/DTR (Data Terminal Ready) ON
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DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_data_transfer){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
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osmo_v110_ta_set_circuit() returns 0
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osmo_v110_ta_sync_ind(): the lower layer indicates sync event
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DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
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osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
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v110_ta_test_status_update_cb(status=0x0000001e)
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DLGLOBAL DEBUG V110-TA(test_data_transfer){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
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v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_in() returns 0
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circuit 106/CTS (Clear to Send) is ON (expected to be ON)
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circuit 107/DSR (Data Set Ready) is ON (expected to be ON)
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circuit 109/DCD (Data Carrier Detect) is ON (expected to be ON)
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osmo_v110_ta_frame_out(): S-/X-bits are expected to be 0 (ON)
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osmo_v110_ta_frame_out(): E1..E3-bits are expected to be 011 (9600)
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osmo_v110_ta_frame_out(): we also expect the .tx_cb() to be called
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DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Received Event TX_FRAME_RTS
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v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_out() returns 0
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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osmo_v110_ta_frame_in(): feed that frame that we pulled out back into the TA
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DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Received Event RX_FRAME_IND
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v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_in() returns 0
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DLGLOBAL DEBUG V110-TA(test_data_transfer){DATA_TRANSFER}: Deallocated
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==== Running test_data_transfer_disc_local()
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Allocated
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: State change to IDLE_READY (no timeout)
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setting circuit 108/DTR (Data Terminal Ready) ON
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
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osmo_v110_ta_set_circuit() returns 0
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osmo_v110_ta_sync_ind(): the lower layer indicates sync event
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
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osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
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v110_ta_test_status_update_cb(status=0x0000001e)
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
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v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_in() returns 0
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local TE initiates disconnection
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setting circuit 108/DTR (Data Terminal Ready) OFF
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DATA_TRANSFER}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DATA_TRANSFER}: State change to DISCONNECTING (T2, 5s)
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v110_ta_test_status_update_cb(status=0x00000014)
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osmo_v110_ta_set_circuit() returns 0
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osmo_v110_ta_frame_out(): S-bits are expected to be 1 (OFF)
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osmo_v110_ta_frame_out(): X-bits are expected to be 0 (ON)
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osmo_v110_ta_frame_out(): D-bits are all expected to be 0
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event TX_FRAME_RTS
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osmo_v110_ta_frame_out() returns 0
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D-bits: 000000000000000000000000000000000000000000000000
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E-bits: 1111111
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S-bits: 111111111
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X-bits: 00
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circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
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circuit 107/DSR (Data Set Ready) is ON (expected to be ON)
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circuit 109/DCD (Data Carrier Detect) is ON (expected to be ON)
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osmo_v110_ta_frame_in(): S-/X-bits are ON, expect no state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event RX_FRAME_IND
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v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_in() returns 0
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osmo_v110_ta_frame_in(): S-bits are OFF, expect state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 111111111
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: Received Event RX_FRAME_IND
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){DISCONNECTING}: State change to IDLE_READY (no timeout)
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v110_ta_test_status_update_cb(status=0x00000000)
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v110_ta_test_rx_cb(buf_size=48): 111111111111111111111111111111111111111111111111
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osmo_v110_ta_frame_in() returns 0
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circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
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circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
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circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_local){IDLE_READY}: Deallocated
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==== Running test_data_transfer_disc_remote()
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Allocated
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: State change to IDLE_READY (no timeout)
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setting circuit 108/DTR (Data Terminal Ready) ON
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
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osmo_v110_ta_set_circuit() returns 0
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osmo_v110_ta_sync_ind(): the lower layer indicates sync event
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
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osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
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v110_ta_test_status_update_cb(status=0x0000001e)
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
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v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_in() returns 0
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remote TE initiates disconnection
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osmo_v110_ta_frame_in(): S-bits are OFF, X-bits are ON
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osmo_v110_ta_frame_in(): D-bits are all set to 0
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D-bits: 000000000000000000000000000000000000000000000000
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E-bits: 0111111
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S-bits: 111111111
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: Received Event RX_FRAME_IND
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v110_ta_test_status_update_cb(status=0x0000000a)
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osmo_v110_ta_frame_in() returns 0
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circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
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circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
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local TE confirms disconnection
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setting circuit 108/DTR (Data Terminal Ready) OFF
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DATA_TRANSFER}: State change to DISCONNECTING (T2, 5s)
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v110_ta_test_status_update_cb(status=0x00000000)
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osmo_v110_ta_set_circuit() returns 0
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DISCONNECTING}: Received Event DESYNC_IND
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){DISCONNECTING}: State change to IDLE_READY (no timeout)
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circuit 106/CTS (Clear to Send) is OFF (expected to be OFF)
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circuit 107/DSR (Data Set Ready) is OFF (expected to be OFF)
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circuit 109/DCD (Data Carrier Detect) is OFF (expected to be OFF)
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DLGLOBAL DEBUG V110-TA(test_data_transfer_disc_remote){IDLE_READY}: Deallocated
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==== Running test_syncing()
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DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: Allocated
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DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: State change to IDLE_READY (no timeout)
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setting circuit 108/DTR (Data Terminal Ready) ON
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DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: Received Event V24_STATUS_CHG
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DLGLOBAL DEBUG V110-TA(test_syncing){IDLE_READY}: State change to CONNECT_TA_TO_LINE (T1, 10s)
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osmo_v110_ta_set_circuit() returns 0
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osmo_v110_ta_sync_ind(): the lower layer indicates sync event
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DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: Received Event SYNC_IND
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osmo_v110_ta_frame_in(): S-/X-bits are ON, expect state change
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: Received Event RX_FRAME_IND
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v110_ta_test_status_update_cb(status=0x0000001e)
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DLGLOBAL DEBUG V110-TA(test_syncing){CONNECT_TA_TO_LINE}: State change to DATA_TRANSFER (no timeout)
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v110_ta_test_rx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_in() returns 0
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osmo_v110_ta_sync_ind(): the lower layer indicates out-of-sync event
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DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Received Event DESYNC_IND
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DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: State change to RESYNCING (X1, 3s)
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osmo_v110_ta_frame_out(): S-bits are expected to be 0 (ON)
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osmo_v110_ta_frame_out(): X-bits are expected to be 1 (OFF)
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osmo_v110_ta_frame_out(): D-bits are to be set by .tx_cb()
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DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: Received Event TX_FRAME_RTS
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v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_out() returns 0
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 11
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osmo_v110_ta_sync_ind(): the lower layer indicates sync event
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DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: Received Event SYNC_IND
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DLGLOBAL DEBUG V110-TA(test_syncing){RESYNCING}: State change to DATA_TRANSFER (no timeout)
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osmo_v110_ta_frame_out(): S-bits are expected to be 0 (ON)
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osmo_v110_ta_frame_out(): X-bits are expected to be 0 (ON)
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osmo_v110_ta_frame_out(): D-bits are to be set by .tx_cb()
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DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Received Event TX_FRAME_RTS
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v110_ta_test_tx_cb(buf_size=48): 010101010101010101010101010101010101010101010101
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osmo_v110_ta_frame_out() returns 0
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D-bits: 010101010101010101010101010101010101010101010101
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E-bits: 0111111
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S-bits: 000000000
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X-bits: 00
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DLGLOBAL DEBUG V110-TA(test_syncing){DATA_TRANSFER}: Deallocated
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