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185 Commits

Author SHA1 Message Date
Harald Welte dcb6614e6c RJ45 jumper box design 2020-08-15 12:44:00 +02:00
Harald Welte f19750a702 siu-clock-breakout: Add missing component values 2020-07-27 21:42:32 +02:00
Martin Schramm 2adf6db5b9 clk-gen: commit GPIO pinsheet for SAMD21E in clk-gen v2 (solves OS#4656) 
... in Gnumeric format
 2020-07-24 15:31:20 +02:00
Harald Welte 656e36143a add SIU clock breakout board design 
This board contains a 10P10C connector in the same pin-out as the
Ericsson SIU-02 together with some differential receivers/drivers to
convert the 1PPS from/to single-ended signals.
 2020-07-17 22:43:53 +02:00
Martin Schramm 6fd98dc7b1 clock-generator: create updated sch + brd views, purge old data 2020-07-07 18:13:00 +02:00
Martin Schramm c247aacba9 clock-generator: purge old v1 eBOM 2020-07-07 17:39:57 +02:00
Martin Schramm abdefdccdb clock-generator: upd ext'd BOM attributes and update v2 eBOM 2020-07-07 17:38:32 +02:00
Martin Schramm 5b9227d5c9 sfp-experimenter: update ext'd attribs and BOM 2020-06-10 17:57:14 +02:00
Martin Schramm b771e44e0e sfp-experimenter: update SFP cage part number 2020-06-10 15:33:56 +02:00
Martin Schramm b52be662da clock-generator: update schematics pdf 2020-06-08 16:29:17 +02:00
Martin Schramm 070141634a gtm900-bo: purge unused layers in schema + board 2020-06-04 17:17:55 +02:00
Martin Schramm 2fb8944e8d gtm900-bo: exchange main LDO's BOM attributes 
Although the correct name was given in the schematic (MCP1827T-ADJE/ET),
the BOM contained an LD1085, which is part of the same library...
Now the extended attributes also reflect the correct part.
 2020-06-04 17:12:19 +02:00
Martin Schramm f8c206a5be gtm900-bo: update parts to avail @Digikey, upd all ext'd attribs 
... in sch and brd too
 2020-06-01 17:42:47 +02:00
Martin Schramm 1cbeb51f4d gtm900-bo: add SMT spacer as mechanical BOM-only parts 2020-05-27 17:44:18 +02:00
Martin Schramm b5a341a70c gtm900-bo: complete v1 eBOM + export as gnumeric and xls format 2020-05-27 17:17:03 +02:00
Martin Schramm 86a2c70a67 gtm900-bo: add header for power source selection (DC in / USB) 2020-05-22 23:33:49 +02:00
Martin Schramm 7f920a3085 gtm900-bo: ease some part's distances, increase OSHW logo 2020-05-22 21:34:15 +02:00
Martin Schramm db7c7a1194 gtm900-bo: re-introduce serial 0R on UART_RI 
...not, that it was needed, but just in case...
 2020-05-19 14:31:44 +02:00
Martin Schramm b9df775569 gtm900-bo: ERC + DRC done + corrections 2020-05-18 20:57:23 +02:00
Martin Schramm 6e2422c979 gtm900-bo: routing done, no airwires left, mirrored FPC removed 2020-05-18 20:39:01 +02:00
Martin Schramm aba83c5ecc gtm900-bo: hopefully incorporating all we discussed last weeks 
see OS#4030
 2020-05-17 14:03:37 +02:00
Martin Schramm 9f860f796e gtm900: added CP2105 and 3.5mm TRRS audio jack, remv'd aux conn 
adds to OS#4030
 2020-04-27 19:16:49 +02:00
Martin Schramm 0730af45e2 initial commit for a GTM900 breakout PCBA 
An additional mirrored FPC header will still be maintained
as long as this PCBA is discussed/revised.

This is going to be a OSHW CC-BY-SA.
 2020-04-20 23:39:46 +02:00
Harald Welte 617288296f clock-generator: Fix VDD connection of TC2050 SWD connector 
Closes: OS#4431
 2020-03-01 19:42:20 +01:00
Martin Schramm 7d09b416a2 clock-gen: increase I2C PU's to 4k7 
Although the SI5153 datasheet mentions the I2C PUs as ">=1k", this
appears to be unusually strong for no obvious reason, and we don't
have high data rates there... changed them to more reasonable 4k7.
 2020-02-07 20:00:44 +01:00
Martin Schramm 44e584624a clock-gen: update ATSAMD21's BOM attributes (solves OS#4387) 2020-01-31 18:19:20 +01:00
Martin Schramm 895c6d3dde clock-generator: exchange mini-USB foorprint (solves OS#4386) 
... and purge unneeded layers
 2020-01-30 18:03:26 +01:00
Martin Schramm 76c5448d75 clock-generator: exchange silk screen position of R14 vs. C19 
fortunately, they have a different size (0603 vs 0402), so while placing
this be#came obvious.
 2020-01-28 18:22:25 +01:00
Martin Schramm f85755ceda Merge branch 'master' of ssh://git.osmocom.org/osmo-small-hardware 2020-01-09 16:55:39 +01:00
Martin Schramm 14c2642a1d ngff: add product links to all one- and two-row 2,54mm pin header 2020-01-09 16:54:12 +01:00
Harald Welte f2e12808de add PDF renderings of ngff-breakout 2019-12-14 14:41:24 +01:00
Martin Schramm 1fed947ff7 ngff-breakout: update BOM 2019-11-22 20:45:09 +01:00
Harald Welte beffe5c0c2 ngff-breakout: Add M.2 nut/stand-off data sheet 2019-11-15 11:03:20 +01:00
Harald Welte 9706e99ba0 clock-generator: Replace SAM D11 data sheet with D21 data sheet 2019-11-05 13:51:20 +01:00
Martin Schramm 4fdc3b8522 ngff: revert increased clearance for supply net class 
...and instead change class membership of an affected wire.
 2019-10-18 21:08:28 +02:00
Martin Schramm ef87dab295 ngff: PCB cosmetics and subsequent DRC; rearrange SMA + MHF4 conn 2019-10-18 20:54:07 +02:00
Martin Schramm bc7e4cec92 ngff: swap Rx and Tx (solves OS#4230) 2019-10-18 17:27:11 +02:00
Martin Schramm 1de1cd0da1 ngff: connect pin 4 @X2 to GND (solves OS#4216) 2019-10-17 18:33:06 +02:00
Martin Schramm 63389c1b99 ngff: add eBOM 2019-09-25 20:49:12 +02:00
Martin Schramm 593ab6798b ngff: add / refresh most ext'd attribs for eBOM 2019-09-25 20:46:22 +02:00
Martin Schramm 26425b8623 ngff: silk screen cosmetics 2019-09-24 18:43:49 +02:00
Martin Schramm 94d293bdb0 ngff: re-introduce and re-position OSHW logo and bott silk screen 2019-09-24 18:25:08 +02:00
Martin Schramm a2e0970835 ngff: repair one critical via for ERC passing 2019-09-24 16:51:50 +02:00
Martin Schramm 861afe9e60 ngff: 2/2 make room for 2x5 header and route SIM2 signals there 
...and run ERC/DRC

adresses OS#4211
 2019-09-24 16:42:42 +02:00
Martin Schramm b9a0f747cb ngff: make room for 2x5 header and route SIM2 signals there 
adresses OS#4211
 2019-09-20 22:04:52 +02:00
Martin Schramm dd62b6547e ngff: remove bogus packages names with '@1' by re-importing std lib 2019-09-19 19:20:35 +02:00
Martin Schramm 8dcf136de6 ngff: move PCIe header 3mm inwards (solves OS#4210) 
... and started OS#4211.
 2019-09-19 19:15:48 +02:00
Martin Schramm 3e103422c2 ngff: set R9 to 100k (solves OS#4209) 2019-09-17 17:44:02 +02:00
Martin Schramm aaaf260b1f ngff: route all four ANTCTLn signals on bottom layer (fixes OS#4187) 2019-09-17 15:01:11 +02:00
Martin Schramm deccb4f960 ngff: repair M.2/NGFF footprint (see SYS#4661) 2019-09-17 13:35:36 +02:00