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228 Commits

Author SHA1 Message Date
Martin Schramm 67af3486b8 ngff-cardem: add series 47R into SAM3S' RxD line (PA9) (solves SYS#5470) 2021-06-04 21:48:46 +02:00
Martin Schramm 4d4a4e69d8 ngff-cardem: bring /FLAG of IC1 to a GPIO (solves SYS#5477) 
GPIO is PA8 (former QMOD's 'SIMPRES2').

Note, that the OCP of the FPF2109 is 200mA; there is no 100mA version
in this series and w/ 1V8 lowest Vin.
 2021-06-04 19:20:04 +02:00
Martin Schramm 5753be38bc ngff-cardem: use 30k/47k voltage divider for UIM_PWR like in octsimtest 
solves SYS#5475
 2021-06-04 18:17:50 +02:00
Martin Schramm 121567a9ce ngff-cardem: add SIM Vcc switch logic 
... consisting of two FPF2109 and a Schottky diode. Needs two GPIOs,
PU and PD for default "modem gives SIM pwr".
 2021-06-04 04:32:12 +02:00
Martin Schramm ad4b9742db ngff-cardem: 1st BOM 2021-06-04 04:31:31 +02:00
Martin Schramm dec050fc7b ngff-cardem: add PRW_ON logic 
PU to V_MODEM, and a TUN inverter to GPIO (PA26), so get "default on,
but with ability for software to override should it ever be needed".
 2021-06-04 00:21:56 +02:00
Martin Schramm deeabdb253 ngff-cardem: reduce number of options jumper to 3 2021-06-03 20:50:19 +02:00
Martin Schramm 0659f2e353 add and route PCM header 
Pin assignment according to QMOD based on EC20, EC25 and ME909 mapping
 2021-06-03 00:04:13 +02:00
Martin Schramm 2e36f7ace0 ngff-cardem: exchange TPS22965 with TPS22958 due to availability 2021-05-29 23:21:52 +02:00
Martin Schramm 4d6271b61e ngff-cardem: state w/ changes as of 18th May 2021-05-19 18:32:29 +02:00
Martin Schramm 485f8fad22 ngff-cardem: commiting current state 
* 100 x 90 mm area
* no SIM-Vcc switching yet
* 47/measures used for principal dimensions and some details
 2021-05-16 23:01:20 +02:00
Martin Schramm ed8d98e78d ngff-cardem: remove SIM switch trio and connect straight to pivot 
This way the close-pivot OE is the only which needs a pull-down.
Seven FET switches remain for other uses, four of them in a now
usused seperate OE group.
 2021-04-26 19:15:26 +02:00
Martin Schramm 342dfa1954 ngff-cardem: add 2x octal FET sw, suggest switch matrix 2021-04-26 14:45:58 +02:00
Martin Schramm 72e7664937 ngff-cardem: better function groups' placement 2021-04-25 01:26:15 +02:00
Martin Schramm 32717dd196 ngff-cardem: add 12 MHz XTAL to ATSAM3S 
... or do we need a 18.432MHz type?
 2021-04-24 14:41:39 +02:00
Martin Schramm 9e9a7aa25a ngff-cardem: purge ST34 naming residue 2021-04-24 14:20:20 +02:00
Martin Schramm 1e24864f8d ngff-cardem: start design 2021-04-23 15:16:52 +02:00
Harald Welte 09d8d88f3a README: note that most designs are EAGLE 2021-04-20 18:56:53 +02:00
Joachim Steiger 362084a12c README.md remove link to wrong gerrit repo - no gerrit for this one yet 2021-03-30 18:26:09 +02:00
Joachim Steiger 1c9ced0ef8 README.md fix urls for cloning and cgit 2021-03-30 18:02:04 +02:00
Martin Schramm b0c7493b7b ngff: update schematic pdf and placement pdf to hw version 3 2021-03-23 19:29:35 +01:00
Martin Schramm df09e2a688 ngff: update schematic pdf and placement pdf to hw version 3 2021-03-23 19:25:38 +01:00
Harald Welte 3b7a553e40 add README.md on what this repository is all about 2021-03-21 23:26:08 +01:00
Martin Schramm 696a0f1c41 sfp-breakout: update BOM attribs for availability 
... for next production run
 2021-02-07 22:22:55 +01:00
Martin Schramm 06b095957c ngff-breakout: update sch, brd and BOM to current production run of v3 2021-02-07 20:47:17 +01:00
Martin Schramm 8cfaf0c0da ngff-breakout: improve GND around 4th MHF4-SMA section 2021-01-29 02:58:56 +01:00
Martin Schramm bdf8d0d0fd ngff-breakout: update eBoM towards v3 2021-01-11 21:34:14 +01:00
Martin Schramm f138bb61cb ngff-breakout: remove solder cream for SMT stand-off GND area 
...means screws from both sides, but enables changing to either
position for 3042 and 3052 cards
 2021-01-11 17:18:20 +01:00
Martin Schramm e0bcb0f223 ngff-breakout: add BOM attributes for 2.45mm stand-off and M.2 conn 2021-01-11 16:56:39 +01:00
Martin Schramm 863b150c3d ngff-breakout: commit a v3 candidate for 3042 and 3052 cards 
* PCBA now supports 3042 and 3052 M.2/NGFF cards
* PCBA is now 100 m taller
* fourth MHf4-SMA connector combination w/ TVS
 2020-11-09 15:22:04 +01:00
Harald Welte 9fd5dc295d initial design for DUS LMT breakout board 2020-11-01 20:42:33 +01:00
Harald Welte 1714155221 siu-clock-breakout: export PDF files 2020-10-17 19:08:52 +02:00
Harald Welte b5a44452ee clock-generator: Add 'export' version of frontpanel (mirrored) 2020-10-14 15:34:17 +02:00
Harald Welte f44a9a2915 add export DXF for production (mirrored) 2020-10-14 15:31:35 +02:00
Harald Welte 82b0c74a16 siu-clock-breakout-frontpanel: Fix layer association 2020-10-14 15:31:19 +02:00
Joachim Steiger 0a38895c94 clock-converter: add TFP 4 outline to frontpanel 2020-10-10 01:01:26 +02:00
Harald Welte 879b832e23 clock-generator-frontpanel: Fix spacing of panel mount cut-outs 
they must not be symmetric, but in multiple of 5.08mm
 2020-10-09 20:55:35 +02:00
Harald Welte 08d39013cf clock-generator: Add actual "TFP 7" outline 2020-10-09 20:39:38 +02:00
Harald Welte 21a92a3519 siu-clock-breakout: Add actual fischer TFP 4 outline 2020-10-09 20:28:11 +02:00
Joachim Steiger 2ab9260cd4 clock-converter/clock-generator frontpanels 
layout generated from eagle to dxf and transferring the measurements.
no outline yet (needs offset pcb border to frontpanel corner)
 2020-10-09 01:22:09 +02:00
Joachim Steiger 03daed7bb3 siu-clock-breakout frontpanel 
layout generated from eagle to dxf and measurements and datasheets
no outline yet. (offset frontpanel border to pcb-border)
 2020-10-08 00:17:08 +02:00
Harald Welte cdd8f3c4d4 mpcie-breakout: Remove GND via underneath U.FL connectors 2020-09-10 22:50:23 +02:00
Martin Schramm ba452d6f69 sfp-breakout: BOM: update L1, L2 type 2020-09-08 18:51:58 +02:00
Harald Welte dcb6614e6c RJ45 jumper box design 2020-08-15 12:44:00 +02:00
Harald Welte f19750a702 siu-clock-breakout: Add missing component values 2020-07-27 21:42:32 +02:00
Martin Schramm 2adf6db5b9 clk-gen: commit GPIO pinsheet for SAMD21E in clk-gen v2 (solves OS#4656) 
... in Gnumeric format
 2020-07-24 15:31:20 +02:00
Harald Welte 656e36143a add SIU clock breakout board design 
This board contains a 10P10C connector in the same pin-out as the
Ericsson SIU-02 together with some differential receivers/drivers to
convert the 1PPS from/to single-ended signals.
 2020-07-17 22:43:53 +02:00
Martin Schramm 6fd98dc7b1 clock-generator: create updated sch + brd views, purge old data 2020-07-07 18:13:00 +02:00
Martin Schramm c247aacba9 clock-generator: purge old v1 eBOM 2020-07-07 17:39:57 +02:00
Martin Schramm abdefdccdb clock-generator: upd ext'd BOM attributes and update v2 eBOM 2020-07-07 17:38:32 +02:00