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126 Commits

Author SHA1 Message Date
Harald Welte 31ae1be9c6 sc14cvm-evb: Add attributes 2019-08-16 17:58:49 +02:00
Harald Welte c5c776b7ce add SC14CVMDECT module breakout board 2019-08-07 20:22:28 +02:00
Harald Welte 8908096c70 v3 final with gerber output 2019-06-22 11:59:27 +02:00
Harald Welte d9df109853 final v3 as it goes in pcb production 
* smash components and move labels to where they can be read
* add indication of + / GND to X3/X4
* re-route some traces to ensure sufficient distance between them
* make all traces 0.508 mm wide, even signal traces.
 2019-06-22 11:59:27 +02:00
Harald Welte 69f4bae1a9 update OHM4 OCXO, preliminary v3 
* use new LDO (single LDO with range up to 12V input)
 * add U.FL clock input (instead of OCXO as source)
 * no parallel, but series resistors to trimmer
 * allow output of PLL to be fed through resistive divider
 2019-06-22 11:59:27 +02:00
Harald Welte ad725445da remove .pro file, not needed 2019-06-22 11:59:27 +02:00
Harald Welte 9ada13b2a2 update to version with PLL ic onboard 2019-06-22 11:59:27 +02:00
Harald Welte 72388ffc29 initial import of OHM4 OCXO board 2019-06-22 11:59:26 +02:00
Harald Welte 92713f418a add gerber output of osm-nvs-gps v3 2019-06-22 11:55:44 +02:00
Harald Welte aaf079d3b6 avoid short-circuit of power LED 2019-06-22 11:55:44 +02:00
Harald Welte 3c74775c93 update PDF schematics and placement to v2 2019-06-22 11:55:44 +02:00
Harald Welte b4e6e08fed add a power-indicator LED to the NVS board and tag it v2 2019-06-22 11:55:43 +02:00
Harald Welte afe1c2418e initial import of osmo-nvs-gps project 
This is a small eval board for the NVS GPS/GLONASS/GALILEO module,
exporting UARTs on headers.
 2019-06-22 11:55:43 +02:00
Harald Welte ca1c5f166f update gerbers... 2019-06-22 11:52:46 +02:00
Harald Welte 58aedf51bc don't put solder cream on SMA edge pads. 
The sma edge connectors are hand soldered after the SMT soldering
is already done.  We don't want to have solder paste on them...
 2019-06-22 11:52:46 +02:00
Harald Welte 5bb3b21f56 component placement PDFs bottom and top 2019-06-22 11:52:46 +02:00
Harald Welte f050f336f2 re-generate geber (fiducials, labels on soldermask) 2019-06-22 11:52:46 +02:00
Harald Welte 64f3000ff6 move fonts on bottom to soldermask layer (no silk screen rqd) 2019-06-22 11:52:46 +02:00
Harald Welte 84d28da2d1 add fiducials for automatic mounting of components 2019-06-22 11:52:46 +02:00
Harald Welte 5f08cd82e6 Specify LED series resistor as 100 Ohms 2019-06-22 11:52:46 +02:00
Harald Welte 59403fe0d5 mark R1 as 'DNP' (no stub to U.FL connector) 2019-06-22 11:52:46 +02:00
Harald Welte e52cc5d731 add placement files for top and bottom 2019-06-22 11:52:46 +02:00
Harald Welte d32100e71f import gerber output 2019-06-22 11:52:46 +02:00
Harald Welte db5e530345 add CAM file for generating gerber output 2019-06-22 11:52:46 +02:00
Harald Welte 0679fbf23e remove D45014F marking (seeedstudio) 2019-06-22 11:52:46 +02:00
Harald Welte 2b68fcacb8 update the _brd.pdf to include the LED and R13 and correspond with schemstics 2019-06-22 11:52:46 +02:00
Harald Welte 0cb278399a add updated PDF schematics 2019-06-22 11:52:46 +02:00
Harald Welte cee9a8682d approve various ERC changes 2019-06-22 11:52:46 +02:00
Harald Welte e008d9236b re-merge my previous changes manually into the project 2019-06-22 11:52:46 +02:00
Harald Welte b8752f45e0 sylvains branch (ignores some of harald's changes) 2019-06-22 11:52:46 +02:00
Harald Welte b324e5353c don't have two SERIAL_RXD labels but one RXD and one TXD 2019-06-22 11:52:46 +02:00
Harald Welte 2c45271d5d add ublox LEA6T evaluation board design, first version 2019-06-22 11:52:46 +02:00
Harald Welte 6748fe27c1 Merge branch 'laforge/clock-gen-v2' 2019-06-19 19:11:27 +02:00
Harald Welte accdfd63c6 clock-generator: Move GND via to avoid overlap with N$15 2019-06-19 19:10:51 +02:00
Martin Schramm e2cdc91a3a <osmo-clock-gen: add more TVS for exposed signals, clean up and finish 2019-06-19 19:10:50 +02:00
Martin Schramm 436048290a osmo-clock-gen: capacitive coupling for XA input needed - added 100n 
This was a remark by tnt, thanks.
 2019-06-19 19:10:50 +02:00
Martin Schramm c3f627affe clock-generator: compacting + place MTA100 header (solves OSM#4050) 2019-06-19 19:10:50 +02:00
Martin Schramm 425699d67a clock-generator: changes adressing OSM#4050 
A shouded UEXT would need much space; no room for an MTA100 yet... tbd
 2019-06-19 19:10:50 +02:00
Martin Schramm 4cd9ee1bd7 clock-generator: insert changes discussed so far for v2 
* selectable VDDIO{1..4} for PLL: either 3V3 or ADJ (VOUT/DAC)
* use SAMD21 instead of SAMD11
* bring some GPIO on pin header
* use GCLK_IO4 (PA10) to feed XA of PLL
 2019-06-19 19:10:50 +02:00
Martin Schramm e1714e7432 clock-generator: add tracking LDO, make PCB four layer 2019-06-19 19:10:50 +02:00
Harald Welte cdaf319147 WIP: click-generator: Replace U3 (so far SAMD11) with SAMD21 
Closes: OS#3856
 2019-06-19 19:10:50 +02:00
Martin Schramm 85fc4063bb sfp-*: add OSHW logo, fill ext'd attribs for BOM 2019-05-09 18:33:33 +02:00
Martin Schramm 89cbce6ffb sfp: update BOMs for both breakout and experimenter PCBs 2019-05-08 20:33:46 +02:00
Harald Welte f37aa06c2a clock-converter: Export BOM 2019-02-14 22:06:36 +01:00
Harald Welte 22ad1c0a54 clock-converter: Add attributes with digikey links 2019-02-14 22:06:22 +01:00
Harald Welte 6d4dd1bead Clock converter for low phase noise sine -> square conversion 2019-02-02 11:50:41 +01:00
Harald Welte bbbd83c9dd clock-gen: Add BOM information + PDF exports of schematics 2019-01-28 12:38:59 +01:00
Harald Welte 0240e5c8c9 clock-gen: Update gpio spreadsheet with all assignments 
The assignments have been chosen to be nearly identical to the
SAMD11-XPRO board.
 2019-01-27 19:17:06 +01:00
Harald Welte fcc91db897 Merge branch 'laforge/clock-gen' 2019-01-27 18:24:51 +01:00
Harald Welte ff2d7b03e0 clock-gen: Minor changes; final version as ordered 
* move DC jack to extend beyond PCB edge into front panel
* harmonize component variants (10n only 0402, 4.7u only 0805)
* add "sysmocom" as manufacturer name (WEEE requirement)
 2019-01-27 18:17:36 +01:00