Commit Graph

21 Commits

Author SHA1 Message Date
Harald Welte cdd8f3c4d4 mpcie-breakout: Remove GND via underneath U.FL connectors 2020-09-10 22:50:23 +02:00
Harald Welte 972c8a0cb8 mpcie-breakout: Change to vertical SMA jacks 2017-03-23 21:49:04 +01:00
Harald Welte eb08c68a3e mpcie-breakout: rounding of pads 2017-03-23 21:34:09 +01:00
Harald Welte 8d11394ffa mpcie-breakout: DRC changes 2017-03-23 21:18:35 +01:00
Harald Welte 5704c5bdc9 mpcie-breakout: disable tPlace layer 2017-03-23 21:16:26 +01:00
Harald Welte 724e3f879e mpcie-breakout: USB_VBUS second parallel via to reduce impedance 2017-03-23 21:04:14 +01:00
Harald Welte c7db59d408 mpcie-breakout: Digikey part numbers for U.FL and SMA 2017-03-23 20:51:53 +01:00
Harald Welte d86d7286d1 mcie-breakout: Align bLabels, more vias, cosmetics 2017-03-23 20:46:23 +01:00
Harald Welte b496b068aa mpcie-breakout: Add third U.FL-SMA group 2017-03-23 20:25:13 +01:00
Harald Welte 623924050d mpcie-breakout: Enlarge to 70x70mm, add SMA, U.FL and Mounting Holes 2017-03-23 17:24:01 +01:00
Harald Welte 9b5d540b1f mv-uart: Fix 'board doesn't enumerate if JP4 is closed" issue
Make sure the LDO is always powered up, so the CP2105 internal and
external !RESET pull-ups are towards an active VIO voltage, rather than
one that is switched off by !SUSPEND and thus keeps the CP2105 in reset.

Closes: #1870 (https://osmocom.org/issues/1870)
2016-12-05 19:42:27 +01:00
Harald Welte cf99c3f3cf mpcie-breakout: mark C4 as POPULATED=FALSE 2016-10-28 16:06:59 +02:00
Harald Welte c70006a70c mpcie-breakout: Change '1' marker of JP4 and avoid silk-screen overlap 2016-10-27 20:09:19 +02:00
Harald Welte 0427388990 mpcie-breakout: fix DRC violations (clearance) 2016-10-27 19:53:11 +02:00
Harald Welte 9eb09df373 mpcie-breakout: Add series LED for LED_WWAN 2016-10-27 19:49:06 +02:00
Harald Welte ab542cd1af mpcie-breakout: Fix R4 (0603, not 0201 part) 2016-10-27 19:41:37 +02:00
Harald Welte 7001d5fb4f mpcie-breakout: change 100uF caps from 1210 to 1206, reducing height
The current 100uF caps are too high at 2.9mm.  They touch the shielding
can of Quectel EC-20 modules, for exampel.  Let's use 1206 packaged
versions at 1.6mm instead.  Also, add two more, for safety.
2016-10-27 19:35:03 +02:00
Harald Welte 07cf79c97a mpci-breakout: Add BOM attributes + export BOM 2016-10-10 17:56:57 +02:00
Harald Welte 682f9edd08 mpcie-breakout: Add Digikey LINK for all major parts 2016-10-09 02:53:14 +02:00
Harald Welte a34810e73e mpcie-breakoud: Fix layer of JP4 label on silk-screen 2016-10-08 21:44:42 +02:00
Harald Welte bd7032d6a3 initial import of new mpcie breakout board project 2016-10-08 21:39:30 +02:00