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gtm900-bo: run DRC (JLCPCB rules) + repair

This commit is contained in:
Martin Schramm 2024-02-27 23:48:09 +01:00
parent 66e05822f1
commit f9f95055db
1 changed files with 101 additions and 83 deletions
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184
gtm900-breakout/GTM900-breakout.brd
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@ -36,7 +36,7 @@
<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>
<layer number="27" name="tValues" color="7" fill="1" visible="no" active="yes"/>
<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
<layer number="29" name="tStop" color="7" fill="3" visible="yes" active="yes"/>
<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>
<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>
<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>
<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>
@ -58,8 +58,8 @@
<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>
<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>
<layer number="50" name="dxf" color="7" fill="1" visible="no" active="no"/>
<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="yes"/>
<layer number="52" name="bDocu" color="7" fill="1" visible="yes" active="yes"/>
<layer number="51" name="tDocu" color="7" fill="1" visible="no" active="yes"/>
<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="yes"/>
<layer number="53" name="tGND_GNDA" color="7" fill="9" visible="no" active="no"/>
<layer number="54" name="bGND_GNDA" color="1" fill="9" visible="no" active="no"/>
<layer number="56" name="wert" color="7" fill="1" visible="no" active="no"/>
@ -3883,79 +3883,69 @@ new: Attribute TP_SIGNAL_NAME&lt;br&gt;
<clearance class="3" value="0.2032"/>
</class>
</classes>
<designrules name="SeeedStudio_2layer_DRU_no_angle_20140221 *">
<description language="de">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
&lt;p&gt;
Die Standard-Design-Rules sind so gewählt, dass sie für
die meisten Anwendungen passen. Sollte ihre Platine
besondere Anforderungen haben, treffen Sie die erforderlichen
Einstellungen hier und speichern die Design Rules unter
einem neuen Namen ab.</description>
<description language="en">&lt;b&gt;EAGLE Design Rules&lt;/b&gt;
&lt;p&gt;
The default Design Rules have been set to cover
a wide range of applications. Your particular design
may have different requirements, so please make the
necessary adjustments and save your customized
design rules under a new name.</description>
<description language="zh">&lt;b&gt;Seeed Studio EAGLE Design Rules&lt;/b&gt;
</description>
<designrules name="jlcpcb-2layers *">
<description language="en">&lt;b&gt;JLCPCB design rules (2 layers)&lt;/b&gt;
&lt;ul&gt;
&lt;li&gt;Board thickness: 1.6mm&lt;/li&gt;
&lt;li&gt;Copper weight: 1oz (35um)&lt;/li&gt;
&lt;li&gt;Note: annular ring aren't minimal&lt;/li&gt;
&lt;/ul&gt;</description>
<param name="layerSetup" value="(1*16)"/>
<param name="mtCopper" value="0.035mm 0.0175mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.0175mm 0.035mm"/>
<param name="mtIsolate" value="1.5mm 1.1mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
<param name="mdWireWire" value="6mil"/>
<param name="mdWirePad" value="6mil"/>
<param name="mdWireVia" value="6mil"/>
<param name="mdPadPad" value="6mil"/>
<param name="mdPadVia" value="6mil"/>
<param name="mdViaVia" value="6mil"/>
<param name="mdSmdPad" value="0mil"/>
<param name="mdSmdVia" value="0mil"/>
<param name="mdSmdSmd" value="0mil"/>
<param name="mdViaViaSameLayer" value="8mil"/>
<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/>
<param name="mtIsolate" value="1.6mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/>
<param name="mdWireWire" value="5mil"/>
<param name="mdWirePad" value="5mil"/>
<param name="mdWireVia" value="5mil"/>
<param name="mdPadPad" value="5mil"/>
<param name="mdPadVia" value="5mil"/>
<param name="mdViaVia" value="5mil"/>
<param name="mdSmdPad" value="5mil"/>
<param name="mdSmdVia" value="5mil"/>
<param name="mdSmdSmd" value="5mil"/>
<param name="mdViaViaSameLayer" value="6mil"/>
<param name="mnLayersViaInSmd" value="2"/>
<param name="mdCopperDimension" value="10mil"/>
<param name="mdDrill" value="10mil"/>
<param name="mdCopperDimension" value="0.2mm"/>
<param name="mdDrill" value="6mil"/>
<param name="mdSmdStop" value="0mil"/>
<param name="msWidth" value="6mil"/>
<param name="msWidth" value="5mil"/>
<param name="msDrill" value="0.3mm"/>
<param name="msMicroVia" value="12mil"/>
<param name="msMicroVia" value="0.3mm"/>
<param name="msBlindViaRatio" value="0.5"/>
<param name="rvPadTop" value="0.25"/>
<param name="rvPadInner" value="0.25"/>
<param name="rvPadBottom" value="0.25"/>
<param name="rvViaOuter" value="0.25"/>
<param name="rvViaInner" value="0.25"/>
<param name="rvMicroViaOuter" value="0.25"/>
<param name="rvMicroViaInner" value="0.25"/>
<param name="rvPadTop" value="0.4"/>
<param name="rvPadInner" value="0"/>
<param name="rvPadBottom" value="0.4"/>
<param name="rvViaOuter" value="0"/>
<param name="rvViaInner" value="0"/>
<param name="rvMicroViaOuter" value="0"/>
<param name="rvMicroViaInner" value="0"/>
<param name="rlMinPadTop" value="10mil"/>
<param name="rlMaxPadTop" value="20mil"/>
<param name="rlMaxPadTop" value="80mil"/>
<param name="rlMinPadInner" value="10mil"/>
<param name="rlMaxPadInner" value="20mil"/>
<param name="rlMinPadBottom" value="10mil"/>
<param name="rlMaxPadBottom" value="20mil"/>
<param name="rlMinViaOuter" value="6mil"/>
<param name="rlMaxPadBottom" value="80mil"/>
<param name="rlMinViaOuter" value="3mil"/>
<param name="rlMaxViaOuter" value="20mil"/>
<param name="rlMinViaInner" value="6mil"/>
<param name="rlMinViaInner" value="8mil"/>
<param name="rlMaxViaInner" value="20mil"/>
<param name="rlMinMicroViaOuter" value="4mil"/>
<param name="rlMinMicroViaOuter" value="3mil"/>
<param name="rlMaxMicroViaOuter" value="20mil"/>
<param name="rlMinMicroViaInner" value="4mil"/>
<param name="rlMaxMicroViaInner" value="20mil"/>
<param name="psTop" value="-1"/>
<param name="psBottom" value="-1"/>
<param name="psFirst" value="0"/>
<param name="psFirst" value="-1"/>
<param name="psElongationLong" value="100"/>
<param name="psElongationOffset" value="100"/>
<param name="mvStopFrame" value="1"/>
<param name="mvCreamFrame" value="0"/>
<param name="mlMinStopFrame" value="2mil"/>
<param name="mlMaxStopFrame" value="2mil"/>
<param name="mlMinStopFrame" value="4mil"/>
<param name="mlMaxStopFrame" value="4mil"/>
<param name="mlMinCreamFrame" value="0mil"/>
<param name="mlMaxCreamFrame" value="0mil"/>
<param name="mlViaStopLimit" value="100mil"/>
<param name="mlViaStopLimit" value="0mil"/>
<param name="srRoundness" value="0.3"/>
<param name="srMinRoundness" value="4mil"/>
<param name="srMinRoundness" value="2mil"/>
<param name="srMaxRoundness" value="8mil"/>
<param name="slThermalIsolate" value="10mil"/>
<param name="slThermalsForVias" value="0"/>
@ -3964,7 +3954,7 @@ design rules under a new name.</description>
<param name="checkGrid" value="0"/>
<param name="checkAngle" value="0"/>
<param name="checkFont" value="1"/>
<param name="checkRestrict" value="0"/>
<param name="checkRestrict" value="1"/>
<param name="useDiameter" value="13"/>
<param name="maxErrors" value="50"/>
</designrules>
@ -6961,8 +6951,10 @@ design rules under a new name.</description>
<wire x1="53.34" y1="36.83" x2="43.4975" y2="36.83" width="0.3048" layer="16"/>
<wire x1="43.4975" y1="36.83" x2="40.005" y2="40.3225" width="0.3048" layer="16"/>
<wire x1="40.005" y1="40.3225" x2="34.6075" y2="40.3225" width="0.3048" layer="16"/>
<wire x1="34.6075" y1="40.3225" x2="25.4" y2="49.53" width="0.3048" layer="16"/>
<wire x1="25.4" y1="49.53" x2="25.4" y2="63.5" width="0.3048" layer="16"/>
<wire x1="34.6075" y1="40.3225" x2="26.035" y2="48.895" width="0.3048" layer="16"/>
<wire x1="26.035" y1="48.895" x2="26.035" y2="51.7525" width="0.3048" layer="16"/>
<wire x1="26.035" y1="51.7525" x2="25.4" y2="52.3875" width="0.3048" layer="16"/>
<wire x1="25.4" y1="52.3875" x2="25.4" y2="63.5" width="0.3048" layer="16"/>
<wire x1="25.4" y1="63.5" x2="26.035" y2="64.135" width="0.3048" layer="16"/>
<via x="26.035" y="64.135" extent="1-16" drill="0.3"/>
<wire x1="26.7375" y1="66.7175" x2="26.7375" y2="64.8375" width="0.3048" layer="1"/>
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</board>
</drawing>