From f9f95055dbc7a152a1576813fb85635dbb183fdf Mon Sep 17 00:00:00 2001 From: msw Date: Tue, 27 Feb 2024 23:48:09 +0100 Subject: [PATCH] gtm900-bo: run DRC (JLCPCB rules) + repair --- gtm900-breakout/GTM900-breakout.brd | 184 +++++++++++++++------------- 1 file changed, 101 insertions(+), 83 deletions(-) diff --git a/gtm900-breakout/GTM900-breakout.brd b/gtm900-breakout/GTM900-breakout.brd index e767e04..573e631 100644 --- a/gtm900-breakout/GTM900-breakout.brd +++ b/gtm900-breakout/GTM900-breakout.brd @@ -36,7 +36,7 @@ - + @@ -58,8 +58,8 @@ - - + + @@ -3883,79 +3883,69 @@ new: Attribute TP_SIGNAL_NAME<br> - -<b>EAGLE Design Rules</b> -<p> -Die Standard-Design-Rules sind so gewählt, dass sie für -die meisten Anwendungen passen. Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab. -<b>EAGLE Design Rules</b> -<p> -The default Design Rules have been set to cover -a wide range of applications. Your particular design -may have different requirements, so please make the -necessary adjustments and save your customized -design rules under a new name. -<b>Seeed Studio EAGLE Design Rules</b> - + +<b>JLCPCB design rules (2 layers)</b> +<ul> +<li>Board thickness: 1.6mm</li> +<li>Copper weight: 1oz (35um)</li> +<li>Note: annular ring aren't minimal</li> +</ul> - - - - - - - - - - - - + + + + + + + + + + + + - - + + - + - + - - - - - - - + + + + + + + - + - - + + - + - + - + - - + + - + - + @@ -3964,7 +3954,7 @@ design rules under a new name. - + @@ -6961,8 +6951,10 @@ design rules under a new name. - - + + + + @@ -7636,13 +7628,37 @@ design rules under a new name. - - + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -7681,11 +7697,8 @@ design rules under a new name. - - - - - + + @@ -7695,41 +7708,46 @@ design rules under a new name. - - - + + + + + + + + + + + - - - - - - - + + - - - - - - - - - - + + + + + + + + + + + +