Commit Graph

1682 Commits

Author SHA1 Message Date
Karl Palsson 58d5de26f3 tests: gadget0: add stm32f103 target
There's no F1 discovery style board with usb device, so this is for a "generic"
device.  The USB portion should be safe, but there's a led used for bootup that
is board specific, and of course the clock source is board specific.

Related, the openocd config file is rather custom to my own setup, but shows
what you need to customize for your test environment.

Further, as the F1 usb core doesn't include support for soft disconnect, use
the very hacky method of dragging the pin low to force reenumeration on reset.
Very very useful for development purposes!
2015-10-03 01:18:17 +00:00
Karl Palsson 39c29b8fdf tests: rules.mk: kill rcs/sccs support
If you can read this, you're not using a version control system affected by
this change ;)

Before: make -d | wc -l ==> 992
After:  make -d | wc -l ==> 452
2015-10-03 00:59:26 +00:00
Karl Palsson 44f3fc98ea tests: rules.mk: scrap legacy suffix search
Instead of just adding elf/bin and friends, actively delete the original
suffixes and include only things we care about.

Before vs After:
make -d | wc -l ==> 4497
make -d | wc -l ==> 932

Now, if only I could turn off the RCS/SCCS support so easily.
2015-10-03 00:59:26 +00:00
Karl Palsson 34f00a7d5a tests: usb: gadget0 compatible interface (stm32f4)
This introduces the first firmware setup specifically for automated testing.
Based heavily on the linux kernel project's "USB Gadget Zero" idea, and in
theory, this should be testable with <kernelsrc>/tools/usb/testusb.c but...
not yet.  It's tricky to set that up and poorly documented, so we've got our
own tests instead. Instead, we include a set of python unit tests using pyusb.

These currently only test a basic core subset of functionality, but have already been
very helpful in finding latent bugs.

In this first stage, we support only the stm32f4 disco board, (MB997) and
FullSpeed USB devices.  A generic "rules.mk" is introduced to support multi
platform builds. (See below)

Some basic performance tests are included, but as they take some time to run,
you must manually enable them. See the README for more information

NOTE! Only the source/sink functional interface is supported, loopback will require
some comparision with a real gadget zero to check exactly how it's working.

FOOTNOTES 1:

This introduces a rules.mk file that is arguably substantially simpler[1] for
re-use, and then uses this rules.mk file to support multiple target outputs
from the same shared source tree. Less path requirements are imposed, and less
variables need to be defined in each project's makefile.  A separate bin
directory is created for each project.

All useful settings and configurations imported from the original library rules
file.

cxx support untested, but lifted from the original library rules file.

[1] Than the file in the libopencm3-examples repo it is loosely based on.
2015-10-03 00:58:43 +00:00
Karl Palsson f49cbee683 usb: otg-dev: disable and flush endpoints on reset
Only resetting the fifo memory pointers can result in corrupt data.

Tested on f4 disco board with the gadget0 test suite.
2015-09-22 22:28:02 +00:00
Karl Palsson 53c1d2c8d9 usb: get_configuration should return bConfigurationValue
Rather than the index of the config. This happens to be the same
thing if you have zero based sequential configurations.
2015-09-22 22:28:02 +00:00
Kuldeep Singh Dhaka 7cd7212577 usb: Validate and accept set_configuration properly
Setting the same configuration again should act as a lightweight reset, not be
ignored.  This resulted in data toggle bits not being reset and alternet
settings not being reset.

Further, completely invalid configurations were accepted, when they should have
result in a stall. (Section 9.4.7 of USB 2.0 spec)

fixes Github issue #302

Tested-by: Karl Palsson <karlp@tweak.net.au>
2015-09-22 22:28:02 +00:00
Karl Palsson eb18cc19cb stm32l1: Add eeprom to memory maps
By adding an "eep" memory section, and a NOLOAD step into the linker
scripts, you can now let gcc allocate variables in eeprom for you.
However, as fitting for eeprom, they cannot be initialized, and will not
be loaded at any time.  This simply lets you get place variables in the
eeprom space.

Example:

struct whatever __attribute__((section(".eeprom"))) blah;
struct another __attribute__((section(".eeprom"))) wop;
printf("%#x", &blah); // ==> 0x08080000
printf("%#x", &wop); // ==> 0x08080000 +  sizeof(blah)

You can read directly out of these variables, but need to use the
eeprom_ routines for writing to them.
2015-09-22 22:26:48 +00:00
Hanspeter Portner 15a6103f8e stm32f3: ld: stm32f3x3x[bc] have 32K/40K RAM only.
Correct memory sizes in ld/devices.data for:

* stm32f3[01]3?c from RAM=48K to RAM=40K.
* stm32f303?b from RAM=40K to RAM=32K.

Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2015-09-07 20:52:34 +00:00
Karl Palsson 7063e5cdc9 stm32f0: rcc: properly set USB clock source
Missing breaks in switch statement.

Fixes Github issue #524
2015-09-05 16:12:39 +00:00
Karl Palsson 4053bd6e14 stm32f1: add standard ldscripts for medium/high density
We haven't yet moved everything over to any autogenerated linker scripts, so
include more common templates instead of proliferating mountains of them in
every example.
2015-08-31 22:35:23 +00:00
Hanspeter Portner be56146407 stm32f3: fix ADC2/4 "slave" memory map.
Main memory map just lists the base address for the pairs, doesn't clarify the
offset for the slave devices.
2015-08-23 11:34:21 +00:00
Kuldeep Singh Dhaka 0d1f5fc036 usb: Added USB_FNR register defines
credit: @fenugrec
2015-08-18 00:38:48 +00:00
Kuldeep Singh Dhaka e7eb61fe33 usb: Move ti usb_lm4f.c from lm4f/ to usb/
Management of usb code is easier if everything is at one place
2015-08-17 19:07:30 +00:00
Kuldeep Singh Dhaka 5c73d60176 usb: Moved USB_PMA_BASE address definition to family-specific memorymap.h
credit: @fenugrec
2015-08-17 00:21:16 +00:00
Amir Hammad 6357630a90 stm32/usb: otg_fs and otg_hs register definitions
* USB host register definitions added.
* Extracted common register and bitfield definitions
	from 'otg_fs.h' and 'otg_hs.h'
	into new file 'otg_common.h'.
	Modified usb low-level drivers to adopt to new style of bitfields.
* Fixed typo OTG_GOTGIN -> OTG_GOTGINT (according to the datasheet)

Signed-off-by: Amir Hammad <amir.hammad@hotmail.com>
2015-08-16 22:13:53 +00:00
Karl Palsson f4d6da9554 cm3: MPU is optional on both v6m and v7m.
The MPU is an implementation option available for both ARMv6-M and ARMv7-M.
Remove poorly merged code that attempted to include this only for cortex m0+.

Added doxygen, updated the definitions of the RBAR register, (though if you're
really using this periperhal, you should be looking at the ref man for further
information)

Reported-by: forrestv on irc.
2015-08-16 13:35:35 +00:00
Forrest Voight 4a21730bb6 startup: Explicitly enable STKALIGN for all parts.
SCB.CCR.STKALIGN enables the automatic aligning of the stack pointer to 8 bytes
on interrupt entry.  Per ARM recommendations, and for AAPCS compliance, this
bit should be enabled at all times.  ARMv6M has this hardcoded to 1. Cortex M3
has this broken in rev 0, optional (default off) in rev 1, and optional
(default on) in rev 2 and later. M4(f) has optional (default on) for all
revisions, M7 has hardcoded to 1.

See Section 2.3.3 in ARM document IHI0046B:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0046b/IHI0046B_ABI_Advisory_1.pdf

To ensure that all parts behave correctly, we make sure that we hardcode the
feature on, for all parts.  While not _required_ for anything other than rev1
cm3, inserting it into the common reset handler ensures no-one gets any
surprises.

Fixes Github issue #516
2015-08-14 01:14:01 +00:00
Ken Sarkies 4d315288cf stm32: pwr: Use consistent include guards.
All STM32 family pwr.h must use LIBOPENCM3_PWR_H as include guard so that
pwr_common.h can detect that it has been referenced by pwr.h for
each family. F2 and F3 had the wrong include guard.

Fixes Github issue #513
2015-08-10 10:08:05 +00:00
FrancoisFinfe 7b29caed1a stm32l1:rcc: allow pll source to be HSE.
The existing rcc_clock_setup_pll only allowed HSI as the clock source, even
though the existing clock structure contains pll source variables.

Check this value, and switch to the corresponding clock source, rather than
blindly assuming that we are tryign to operate from HSI.
2015-07-31 05:21:52 +00:00
Karl Palsson a2af34d0e1 stm32f1:rtc: whitespace/style cleanup.
Improperly checked pulls before commiting.  Trivial whitespace only change.
2015-07-31 05:21:46 +00:00
Ken Sarkies 86f3e4a648 stm32:f1:RTC rtc_awake_from_off function originally reset the backup domain.
(probably because the Ref Manual erroneously required it).
This has a naughty side-effect in that unrelated user data in the BD would be wiped.
Replaced this call by clearing the RTC registers to their default values.

Tested with ET-STAMP-STM32 to verify RTC starts from power-on and reset with expected behaviour.
2015-07-31 04:51:07 +00:00
Ken Sarkies d316bbca39 stm32:f1:RTC: Replace direct register access with API calls
Some additional functions added to rcc to support the rtc.
2015-07-31 04:49:56 +00:00
Ken Sarkies 957c5233f4 stm32:f1:RTC: add documentation 2015-07-31 04:48:57 +00:00
Karl Palsson 40cde559a7 stm32: f24: doxygen updates for flash program width.
More doxygen, more better.
2015-07-31 03:51:32 +00:00
Karl Palsson ec15c1ca64 stm32: f24: flash: Make code match documentation
This removes the shift from the defines, and includes them in the helper
function, making the code match the documentation, and following how the
rest of the library commonly operates.

Code using the existing defines will continue to work.
2015-07-31 03:51:25 +00:00
Jorik Jonker 07ee71cf23 stm32f4: rcc: Add 84Mhz, max speed for f401
Basic helpers to at least support common configurations for the f401.

Original submission specified 5 wait states, but the reference manual and other
reviewers all believe that 2ws is sufficient for these modes.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2015-07-31 02:25:23 +00:00
Karl Palsson a28ba5cb65 docs: Update license and targets to be more current
Was rather odd describing a GPL project and linking everywhere to LGPL.  Carry
over from old codebase.  Updated the list of targets a bit while there.
2015-07-30 00:26:12 +00:00
Karl Palsson 07094ea418 usb: Fix typo in Battery Charge Detection defines
Correct register name for f0/l0 is USB_BCDR.
Correctly add the register descriptions that were missing in the
original commit.
2015-07-29 21:44:11 +00:00
Kuldeep Singh Dhaka afefa6888c stm32: usb: Rename USB_DADDR_ENABLE flag per ref manual
Use the standard REG_BIT name from the reference manuals, as specified
in HACKING  All the other bits have the correct naming.
2015-07-29 21:22:32 +00:00
Kuldeep Singh Dhaka 4b892724cf usb: provide typedefs for all the function callbacks.
This makes it easier to read for most people, and makes it substantially
easier to review changes in the function signatures themselves at a
later date.
2015-07-29 13:52:00 +00:00
Karl Palsson b1e495f51a stm32f3: adc: Add support for sequence completion flags
The f3 adc has separate bits for end of conversion and end of sequence.
Support those fully, with the regular enable/disable irq methods, and
the flag checking methods.

Discovered in github bug: #493
2015-07-29 13:28:18 +00:00
Karl Palsson e65140d0d3 stm32f3: adc: remove invalid eoc group methods.
This code was copied from the f4, and blindly modified to make it seem
to work.  The f3 has separate flags for EOC and EOS, it doesn't use a
second bit to configure what the EOC bit does.

Consequently, update the documentation to correctly indicate that the
EOC bits are only set per conversion.

Discovered in github bug: #493
2015-07-29 13:22:17 +00:00
Karl Palsson 42983e2790 stm32f3: adc: Overrun flag is cleared by writing 1
Unlike the ADC peripheral on most other stm32 parts, the bits in the
ADC_ISR register are r_w1, not rc_w0.

Fixes github bug: #493
2015-07-29 13:18:26 +00:00
Karl Palsson 9f8e0ac1ba stm32f3: adc: consistently return flags
No reason to explicitly check against 0.  We just return the flag
directly as a bool in many other places.
2015-07-29 12:57:55 +00:00
Karl Palsson e11b7d5d6d usb: fx07: correctly REBASE for both usb cores.
Regression from 0cc0134f21

When operating on registers in code that is common for both usb cores,
make sure to use the REBASE macros to operate on the correct peripheral.

Reported by: kuldeep
Fixes github issue: #495
2015-07-29 12:46:12 +00:00
Karl Palsson bc212bba45 usb: correctly document return type.
The three existing usb drivers have no possible path that doesn't return
the object here, so I've left that comment, but it is plausible that
future drivers might have some reason that allows failing to init.  We
should strive to avoid that though.

Fixes github issue: #494
2015-07-29 12:37:40 +00:00
Karl Palsson 9edde424f8 scripts: make genlinktest requires execute perms 2015-07-16 19:14:56 +00:00
Kuldeep Singh Dhaka 43e66927fc usb: Remove redundant stm32/usb_desc.h
This file is a renamed and restructured copy of /usb/usbstd.h.  The usbstd.h
file should be used instead, as it uses standard usb names.
2015-07-15 12:24:53 +00:00
Karl Palsson 1a398fd742 stm32f0: syscfg cfgr1 bit define updates
Use _FMP for the bit definitions as per the ref manual.
Add missing bits from newer ref manual (RM0091r6)
2015-07-15 12:19:39 +00:00
Karl Palsson e6e4f1388d usb_f103: fix typo in bad merge for SOF callback.
too many pulls :|
2015-07-15 12:07:45 +00:00
Frantisek Burian 0cc0134f21 usb: Only enable the SOF interrupt if user_callback_sof is given.
Otherwise we get 1 kHz of SOF interrupts even if we don't need them.

Originally reported by Uwe in https://github.com/libopencm3/libopencm3/pull/274
but BuFran provided a reworked implementation.
2015-07-15 00:22:18 +00:00
Frantisek Burian 13004f81ee usb_f103: Clear ISR bit as soon as possible, as for the other IRQs.
Reported by Uwe in https://github.com/libopencm3/libopencm3/pull/274 but
expanded and provided by BuFran finally.
2015-07-15 00:18:57 +00:00
Karl Palsson a4bb8f7e24 stm32f4: fix i2s_ext register addresses
Registers were swapped.

Fixes #465
2015-06-22 01:11:50 +00:00
Karl Palsson 3a106dbd10 stm32: spi: add more cross linking documentation 2015-05-25 13:03:23 +00:00
Kuldeep Singh Dhaka c28d7bc187 stm32: spi: Standard mode selection
Allow setting cpol/cpha via standard mode numbers, instead of separate calls
for each bit.
2015-05-25 13:03:20 +00:00
Chuck McManis fb1a365423 stm32: Disable SSOE if slave management is enabled
As called out by flixr, if you want slave select management then
you don't want SSOE active. This turns it off when enable_slave_management
is called.
2015-05-25 01:35:21 +00:00
Chuck McManis f80bff2133 stm32: Fix common case SPI handling
The common case for SPI ports in master mode is that they are not
also running as Slaves some times. For these chips the SSOE bit must
be set (or NSS tied high). Since it is common for people to use a separate
GPIO to select remote slaves and they expect the master to always be the master
this sets that up by default.
2015-05-25 01:34:57 +00:00
Karl Palsson 6d658c20b8 make: use shared DEBUG_FLAGS (-gdb3) by default
-ggdb3 make slightly bigger .elf files, but allows gdb to understand
macros, which libopenocm3 uses somewhat extensively.  Make this the
default, and pull it up to the common base makefile, so it can be easily
substituted.
2015-05-04 13:45:07 +00:00
Karl Palsson a21da3aebf lpc17xx: Optimize for size by default.
This single family had optimization disabled completely, unlike all
other families.  No reason for this.
2015-04-30 16:05:12 +00:00