rebase and fix
This commit is contained in:
Ken Sarkies
parent
4ab5c94b90
commit
e34ad9b3d2
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Files for each peripheral (examples given for STM32 GPIO)
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---------------------------------------------------------
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In include/libopencm3/stm32.
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A "dispatch" header to point to the subfamily header (gpio.h)
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In include/libopencm3/stm32/f*
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A file with defines that are specific to the subfamily, and an include of
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needed common header files (gpio.h).
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In include/libopencm3/stm32/common
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A file with defines common to all subfamilies. Includes the cm3 common header
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(gpio_common_all.h).
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In include/libopencm3/stm32/common
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May be one other file with defines common to a subgroup of devices.
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This includes the file common to all (gpio_common_f24.h).
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In lib/stm32/f*
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A file with functions specific to the subfamily. Includes the "dispatch" header
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and any common headers needed (gpio.c).
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In lib/stm32/common
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Has functions common to all subfamilies. Includes the "dispatch" header
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(gpio_common_all.c).
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In lib/stm32/common
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May be one other file with functions common to a group of subfamilies. Includes
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the "dispatch" header and the file common to all (gpio_common_f24.h).
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Makefiles in lib/stm32/f? have the common object files added and the
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common directory added to VPATH.
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NOTE: The common source files MUST have the "dispatch" header so that
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compilation will use the specific defines for the subfamily being compiled.
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These can differ between subfamilies.
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Documentation
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-------------
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In include/libopencm3/stm32/f*
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A file doc-stm32f*.h contains a definition of the particular family grouping.
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This grouping will appear in the main index of the resulting document with all
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documentation under it.
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All header files for a peripheral (common or otherwise) will subgroup under a
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name which is the same in all families (such as gpio_defines). The peripheral
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header file in include/libopencm3/stm32/f* will then include this group as a
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subgroup under the specific family group. Doxygen is run separately for each
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family so there is no danger of accidentally including the wrong stuff.
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Similarly for the source files for a peripheral which will subgroup under a
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same name (such as gpio_files). The peripheral source file in lib/stm32/f*
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will include this as a subgroup under the specific family group.
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DOXYFILE for a particular family will list the family specific and common files
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(headers and source) that are to be included. The result (in the long run) will
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be that all peripherals will appear under the same family grouping in the
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documentation, even if they are identical over a number of families. That is
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probably most useful to end users who only need to see the documentation for
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one family.
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/** @addtogroup gpio_defines */
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
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* Copyright (C) 2012 Ken Sarkies <ksarkies@internode.on.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA GPIO.H */
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#ifndef LIBOPENCM3_GPIO_COMMON_ALL_H
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#define LIBOPENCM3_GPIO_COMMON_ALL_H
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/**@{*/
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#include <libopencm3/cm3/common.h>
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/* --- Convenience macros -------------------------------------------------- */
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/* --- GPIO_LCKR values ---------------------------------------------------- */
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#define GPIO_LCKK (1 << 16)
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/* GPIO_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
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/* GPIO number definitions (for convenience) */
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/** @defgroup gpio_pin_id GPIO Pin Identifiers
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@ingroup gpio_defines
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@{*/
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#define GPIO0 (1 << 0)
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#define GPIO1 (1 << 1)
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#define GPIO2 (1 << 2)
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#define GPIO3 (1 << 3)
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#define GPIO4 (1 << 4)
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#define GPIO5 (1 << 5)
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#define GPIO6 (1 << 6)
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#define GPIO7 (1 << 7)
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#define GPIO8 (1 << 8)
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#define GPIO9 (1 << 9)
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#define GPIO10 (1 << 10)
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#define GPIO11 (1 << 11)
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#define GPIO12 (1 << 12)
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#define GPIO13 (1 << 13)
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#define GPIO14 (1 << 14)
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#define GPIO15 (1 << 15)
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#define GPIO_ALL 0xffff
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/**@}*/
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void gpio_set(u32 gpioport, u16 gpios);
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void gpio_clear(u32 gpioport, u16 gpios);
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u16 gpio_get(u32 gpioport, u16 gpios);
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void gpio_toggle(u32 gpioport, u16 gpios);
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u16 gpio_port_read(u32 gpioport);
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void gpio_port_write(u32 gpioport, u16 data);
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void gpio_port_config_lock(u32 gpioport, u16 gpios);
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/**@}*/
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#endif
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/** @addtogroup gpio_defines */
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
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* Copyright (C) 2012 Ken Sarkies <ksarkies@internode.on.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA GPIO.H */
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#ifndef LIBOPENCM3_GPIO_COMMON_F24_H
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#define LIBOPENCM3_GPIO_COMMON_F24_H
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/**@{*/
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#include <libopencm3/stm32/common/gpio_common_all.h>
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/* GPIO port base addresses (for convenience) */
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/** @defgroup gpio_port_id GPIO Port IDs
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@ingroup gpio_defines
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@{*/
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#define GPIOA GPIO_PORT_A_BASE
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#define GPIOB GPIO_PORT_B_BASE
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#define GPIOC GPIO_PORT_C_BASE
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#define GPIOD GPIO_PORT_D_BASE
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#define GPIOE GPIO_PORT_E_BASE
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#define GPIOF GPIO_PORT_F_BASE
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#define GPIOG GPIO_PORT_G_BASE
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#define GPIOH GPIO_PORT_H_BASE
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#define GPIOI GPIO_PORT_I_BASE
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/**@}*/
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/* --- GPIO registers for STM32F2 and STM32F4 --------------------------- */
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/* Port mode register (GPIOx_MODER) */
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#define GPIO_MODER(port) MMIO32(port + 0x00)
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#define GPIOA_MODER GPIO_MODER(GPIOA)
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#define GPIOB_MODER GPIO_MODER(GPIOB)
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#define GPIOC_MODER GPIO_MODER(GPIOC)
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#define GPIOD_MODER GPIO_MODER(GPIOD)
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#define GPIOE_MODER GPIO_MODER(GPIOE)
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#define GPIOF_MODER GPIO_MODER(GPIOF)
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#define GPIOG_MODER GPIO_MODER(GPIOG)
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#define GPIOH_MODER GPIO_MODER(GPIOH)
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#define GPIOI_MODER GPIO_MODER(GPIOI)
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/* Port output type register (GPIOx_OTYPER) */
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#define GPIO_OTYPER(port) MMIO32(port + 0x04)
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#define GPIOA_OTYPER GPIO_OTYPER(GPIOA)
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#define GPIOB_OTYPER GPIO_OTYPER(GPIOB)
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#define GPIOC_OTYPER GPIO_OTYPER(GPIOC)
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#define GPIOD_OTYPER GPIO_OTYPER(GPIOD)
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#define GPIOE_OTYPER GPIO_OTYPER(GPIOE)
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#define GPIOF_OTYPER GPIO_OTYPER(GPIOF)
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#define GPIOG_OTYPER GPIO_OTYPER(GPIOG)
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#define GPIOH_OTYPER GPIO_OTYPER(GPIOH)
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#define GPIOI_OTYPER GPIO_OTYPER(GPIOI)
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/* Port output speed register (GPIOx_OSPEEDR) */
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#define GPIO_OSPEEDR(port) MMIO32(port + 0x08)
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#define GPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)
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#define GPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB)
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#define GPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)
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#define GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD)
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#define GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)
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#define GPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF)
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#define GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)
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#define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)
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#define GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)
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/* Port pull-up/pull-down register (GPIOx_PUPDR) */
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#define GPIO_PUPDR(port) MMIO32(port + 0x0c)
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#define GPIOA_PUPDR GPIO_PUPDR(GPIOA)
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#define GPIOB_PUPDR GPIO_PUPDR(GPIOB)
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#define GPIOC_PUPDR GPIO_PUPDR(GPIOC)
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#define GPIOD_PUPDR GPIO_PUPDR(GPIOD)
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#define GPIOE_PUPDR GPIO_PUPDR(GPIOE)
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#define GPIOF_PUPDR GPIO_PUPDR(GPIOF)
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#define GPIOG_PUPDR GPIO_PUPDR(GPIOG)
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#define GPIOH_PUPDR GPIO_PUPDR(GPIOH)
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#define GPIOI_PUPDR GPIO_PUPDR(GPIOI)
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/* Port input data register (GPIOx_IDR) */
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#define GPIO_IDR(port) MMIO32(port + 0x10)
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#define GPIOA_IDR GPIO_IDR(GPIOA)
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#define GPIOB_IDR GPIO_IDR(GPIOB)
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#define GPIOC_IDR GPIO_IDR(GPIOC)
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#define GPIOD_IDR GPIO_IDR(GPIOD)
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#define GPIOE_IDR GPIO_IDR(GPIOE)
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#define GPIOF_IDR GPIO_IDR(GPIOF)
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#define GPIOG_IDR GPIO_IDR(GPIOG)
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#define GPIOH_IDR GPIO_IDR(GPIOH)
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#define GPIOI_IDR GPIO_IDR(GPIOI)
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/* Port output data register (GPIOx_ODR) */
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#define GPIO_ODR(port) MMIO32(port + 0x14)
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#define GPIOA_ODR GPIO_ODR(GPIOA)
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#define GPIOB_ODR GPIO_ODR(GPIOB)
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#define GPIOC_ODR GPIO_ODR(GPIOC)
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#define GPIOD_ODR GPIO_ODR(GPIOD)
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#define GPIOE_ODR GPIO_ODR(GPIOE)
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#define GPIOF_ODR GPIO_ODR(GPIOF)
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#define GPIOG_ODR GPIO_ODR(GPIOG)
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#define GPIOH_ODR GPIO_ODR(GPIOH)
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#define GPIOI_ODR GPIO_ODR(GPIOI)
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/* Port bit set/reset register (GPIOx_BSRR) */
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#define GPIO_BSRR(port) MMIO32(port + 0x18)
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#define GPIOA_BSRR GPIO_BSRR(GPIOA)
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#define GPIOB_BSRR GPIO_BSRR(GPIOB)
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#define GPIOC_BSRR GPIO_BSRR(GPIOC)
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#define GPIOD_BSRR GPIO_BSRR(GPIOD)
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#define GPIOE_BSRR GPIO_BSRR(GPIOE)
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#define GPIOF_BSRR GPIO_BSRR(GPIOF)
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#define GPIOG_BSRR GPIO_BSRR(GPIOG)
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#define GPIOH_BSRR GPIO_BSRR(GPIOH)
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#define GPIOI_BSRR GPIO_BSRR(GPIOI)
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/* Port configuration lock register (GPIOx_LCKR) */
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#define GPIO_LCKR(port) MMIO32(port + 0x1c)
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#define GPIOA_LCKR GPIO_LCKR(GPIOA)
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#define GPIOB_LCKR GPIO_LCKR(GPIOB)
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#define GPIOC_LCKR GPIO_LCKR(GPIOC)
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#define GPIOD_LCKR GPIO_LCKR(GPIOD)
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#define GPIOE_LCKR GPIO_LCKR(GPIOE)
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#define GPIOF_LCKR GPIO_LCKR(GPIOF)
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#define GPIOG_LCKR GPIO_LCKR(GPIOG)
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#define GPIOH_LCKR GPIO_LCKR(GPIOH)
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#define GPIOI_LCKR GPIO_LCKR(GPIOI)
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/* Alternate function low register (GPIOx_AFRL) */
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#define GPIO_AFRL(port) MMIO32(port + 0x20)
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#define GPIOA_AFRL GPIO_AFRL(GPIOA)
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#define GPIOB_AFRL GPIO_AFRL(GPIOB)
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#define GPIOC_AFRL GPIO_AFRL(GPIOC)
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#define GPIOD_AFRL GPIO_AFRL(GPIOD)
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#define GPIOE_AFRL GPIO_AFRL(GPIOE)
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#define GPIOF_AFRL GPIO_AFRL(GPIOF)
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#define GPIOG_AFRL GPIO_AFRL(GPIOG)
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#define GPIOH_AFRL GPIO_AFRL(GPIOH)
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#define GPIOI_AFRL GPIO_AFRL(GPIOI)
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/* Alternate function high register (GPIOx_AFRH) */
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#define GPIO_AFRH(port) MMIO32(port + 0x24)
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#define GPIOA_AFRH GPIO_AFRH(GPIOA)
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#define GPIOB_AFRH GPIO_AFRH(GPIOB)
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#define GPIOC_AFRH GPIO_AFRH(GPIOC)
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#define GPIOD_AFRH GPIO_AFRH(GPIOD)
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#define GPIOE_AFRH GPIO_AFRH(GPIOE)
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#define GPIOF_AFRH GPIO_AFRH(GPIOF)
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#define GPIOG_AFRH GPIO_AFRH(GPIOG)
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#define GPIOH_AFRH GPIO_AFRH(GPIOH)
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#define GPIOI_AFRH GPIO_AFRH(GPIOI)
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/* --- GPIOx_MODER values -------------------------------------------------- */
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#define GPIO_MODE(n, mode) (mode << (2 * (n)))
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#define GPIO_MODE_MASK(n) (0x3 << (2 * (n)))
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/** @defgroup gpio_mode GPIO Pin Direction and Analog/Digital Mode
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@ingroup gpio_defines
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@{*/
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#define GPIO_MODE_INPUT 0x0
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#define GPIO_MODE_OUTPUT 0x1
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#define GPIO_MODE_AF 0x2
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#define GPIO_MODE_ANALOG 0x3
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/**@}*/
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/* --- GPIOx_OTYPER values ------------------------------------------------- */
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/** @defgroup gpio_output_type GPIO Output Pin Driver Type
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@ingroup gpio_defines
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@list Push Pull
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@list Open Drain
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@{*/
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#define GPIO_OTYPE_PP 0x0
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#define GPIO_OTYPE_OD 0x1
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/**@}*/
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/* --- GPIOx_OSPEEDR values ------------------------------------------------ */
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#define GPIO_OSPEED(n, speed) (speed << (2 * (n)))
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#define GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))
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/** @defgroup gpio_speed GPIO Output Pin Speed
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@ingroup gpio_defines
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@{*/
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#define GPIO_OSPEED_2MHZ 0x0
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#define GPIO_OSPEED_25MHZ 0x1
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#define GPIO_OSPEED_50MHZ 0x2
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#define GPIO_OSPEED_100MHZ 0x3
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/**@}*/
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/* --- GPIOx_PUPDR values -------------------------------------------------- */
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#define GPIO_PUPD(n, pupd) (pupd << (2 * (n)))
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#define GPIO_PUPD_MASK(n) (0x3 << (2 * (n)))
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/** @defgroup gpio_pup GPIO Output Pin Pullup
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@ingroup gpio_defines
|
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@{*/
|
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#define GPIO_PUPD_NONE 0x0
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#define GPIO_PUPD_PULLUP 0x1
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#define GPIO_PUPD_PULLDOWN 0x2
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/**@}*/
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/* --- GPIOx_IDR values ---------------------------------------------------- */
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/* GPIOx_IDR[15:0]: IDRy[15:0]: Port input data (y = 0..15) */
|
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|
||||
/* --- GPIOx_ODR values ---------------------------------------------------- */
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/* GPIOx_ODR[15:0]: ODRy[15:0]: Port output data (y = 0..15) */
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/* --- GPIOx_BSRR values --------------------------------------------------- */
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/* GPIOx_BSRR[31:16]: BRy: Port x reset bit y (y = 0..15) */
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/* GPIOx_BSRR[15:0]: BSy: Port x set bit y (y = 0..15) */
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||||
|
||||
/* --- GPIOx_LCKR values --------------------------------------------------- */
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|
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#define GPIO_LCKK (1 << 16)
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/* GPIOx_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
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||||
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/* --- GPIOx_AFRL/H values ------------------------------------------------- */
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/* Note: AFRL is used for bits 0..7, AFRH is used for 8..15 */
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/* See Datasheet Table 6 (pg. 48) for alternate function mappings. */
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|
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#define GPIO_AFR(n, af) (af << ((n) * 4))
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#define GPIO_AFR_MASK(n) (0xf << ((n) * 4))
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/** @defgroup gpio_af_num Alternate Function Pin Selection
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@ingroup gpio_defines
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@{*/
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#define GPIO_AF0 0x0
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#define GPIO_AF1 0x1
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#define GPIO_AF2 0x2
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#define GPIO_AF3 0x3
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#define GPIO_AF4 0x4
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#define GPIO_AF5 0x5
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#define GPIO_AF6 0x6
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#define GPIO_AF7 0x7
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#define GPIO_AF8 0x8
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#define GPIO_AF9 0x9
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#define GPIO_AF10 0xa
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#define GPIO_AF11 0xb
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#define GPIO_AF12 0xc
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#define GPIO_AF13 0xd
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#define GPIO_AF14 0xe
|
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#define GPIO_AF15 0xf
|
||||
/**@}*/
|
||||
|
||||
/* Note: EXTI source selection is now in the SYSCFG peripheral. */
|
||||
|
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/* --- Function prototypes ------------------------------------------------- */
|
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|
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BEGIN_DECLS
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|
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/*
|
||||
* Note: The F2 and F4 series have a completely new GPIO peripheral with different
|
||||
* configuration options. Here we implement a different API partly to more
|
||||
* closely match the peripheral capabilities and also to deliberately break
|
||||
* compatibility with old F1 code so there is no confusion with similar
|
||||
* sounding functions that have very different functionality.
|
||||
*/
|
||||
|
||||
void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios);
|
||||
void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios);
|
||||
void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios);
|
||||
|
||||
END_DECLS
|
||||
/**@}*/
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
/* This provides unification of code over STM32F subfamilies */
|
||||
|
||||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#if defined(STM32F1)
|
||||
# include <libopencm3/stm32/f1/gpio.h>
|
||||
#elif defined(STM32F2)
|
||||
# include <libopencm3/stm32/f2/gpio.h>
|
||||
#elif defined(STM32F4)
|
||||
# include <libopencm3/stm32/f4/gpio.h>
|
||||
#else
|
||||
# error "stm32 family not defined."
|
||||
#endif
|
||||
|
||||
|
|
@ -0,0 +1,139 @@
|
|||
/** @addtogroup gpio_file */
|
||||
|
||||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
|
||||
#include <libopencm3/stm32/gpio.h>
|
||||
|
||||
/**@{*/
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Set a Group of Pins Atomic
|
||||
|
||||
Set one or more pins of the given GPIO port to 1 in an atomic operation.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be changed, use logical OR '|' to separate them.
|
||||
*/
|
||||
void gpio_set(u32 gpioport, u16 gpios)
|
||||
{
|
||||
GPIO_BSRR(gpioport) = gpios;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Clear a Group of Pins Atomic
|
||||
|
||||
Clear one or more pins of the given GPIO port to 0 in an atomic operation.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be changed, use logical OR '|' to separate them.
|
||||
*/
|
||||
void gpio_clear(u32 gpioport, u16 gpios)
|
||||
{
|
||||
GPIO_BSRR(gpioport) = (gpios << 16);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Read a Group of Pins.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be read, use logical OR '|' to separate them.
|
||||
@return Unsigned int16 value of the pin values. The bit position of the pin value
|
||||
returned corresponds to the pin number.
|
||||
*/
|
||||
u16 gpio_get(u32 gpioport, u16 gpios)
|
||||
{
|
||||
return gpio_port_read(gpioport) & gpios;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Toggle a Group of Pins
|
||||
|
||||
Toggle one or more pins of the given GPIO port. This is not an atomic operation.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be changed, use logical OR '|' to separate them.
|
||||
*/
|
||||
void gpio_toggle(u32 gpioport, u16 gpios)
|
||||
{
|
||||
GPIO_ODR(gpioport) ^= gpios;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Read from a Port
|
||||
|
||||
Read the current value of the given GPIO port. Only the lower 16 bits contain
|
||||
valid pin data.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@return Unsigned int16. The value held in the specified GPIO port.
|
||||
*/
|
||||
u16 gpio_port_read(u32 gpioport)
|
||||
{
|
||||
return (u16)GPIO_IDR(gpioport);
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Write to a Port
|
||||
|
||||
Write a value to the given GPIO port.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] data Unsigned int16. The value to be written to the GPIO port.
|
||||
*/
|
||||
void gpio_port_write(u32 gpioport, u16 data)
|
||||
{
|
||||
GPIO_ODR(gpioport) = data;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Lock the Configuration of a Group of Pins
|
||||
|
||||
The configuration of one or more pins of the given GPIO port is locked. There is
|
||||
no mechanism to unlock these via software. Unlocking occurs at the next reset.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be locked, use logical OR '|' to separate them.
|
||||
*/
|
||||
void gpio_port_config_lock(u32 gpioport, u16 gpios)
|
||||
{
|
||||
u32 reg32;
|
||||
|
||||
/* Special "Lock Key Writing Sequence", see datasheet. */
|
||||
GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
|
||||
GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */
|
||||
GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
|
||||
reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */
|
||||
reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */
|
||||
|
||||
/* Tell the compiler the variable is actually used. It will get optimized out anyways. */
|
||||
reg32 = reg32;
|
||||
|
||||
/* If (reg32 & GPIO_LCKK) is true, the lock is now active. */
|
||||
}
|
||||
|
||||
/**@}*/
|
||||
|
||||
|
|
@ -0,0 +1,195 @@
|
|||
/** @addtogroup gpio_file
|
||||
|
||||
@version 1.0.0
|
||||
|
||||
@author @htmlonly © @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
|
||||
@author @htmlonly © @endhtmlonly 2012 Ken Sarkies <ksarkies@internode.on.net>
|
||||
|
||||
@date 18 August 2012
|
||||
|
||||
Each I/O port has 16 individually configurable bits. Many I/O pins share GPIO
|
||||
functionality with a number of alternate functions and must be configured to the
|
||||
alternate function mode if these are to be accessed. A feature is available to
|
||||
remap alternative functions to a limited set of alternative pins in the event
|
||||
of a clash of requirements.
|
||||
|
||||
The data registers associated with each port for input and output are 32 bit with
|
||||
the upper 16 bits unused. The output buffer must be written as a 32 bit word, but
|
||||
individual bits may be set or reset separately in atomic operations to avoid race
|
||||
conditions during interrupts. Bits may also be individually locked to prevent
|
||||
accidental configuration changes. Once locked the configuration cannot be changed
|
||||
until after the next reset.
|
||||
|
||||
Each port bit can be configured as analog or digital input, the latter can be
|
||||
floating or pulled up or down. As outputs they can be configured as either
|
||||
push-pull or open drain, digital I/O or alternate function, and with maximum
|
||||
output speeds of 2MHz, 10MHz, or 50MHz.
|
||||
|
||||
On reset all ports are configured as digital floating input.
|
||||
|
||||
@section gpio_api_ex Basic GPIO Handling API.
|
||||
|
||||
Example 1: Push-pull digital output actions on ports C2 and C9
|
||||
|
||||
@code
|
||||
gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT,
|
||||
GPIO_PUPD_PULLUP, GPIO2 | GPIO9);
|
||||
gpio_output_options((GPIOC, GPIO_OTYPE_PP,
|
||||
GPIO_OSPEED_25MHZ, GPIO2 | GPIO9);
|
||||
gpio_set(GPIOC, GPIO2 | GPIO9);
|
||||
gpio_clear(GPIOC, GPIO2);
|
||||
gpio_toggle(GPIOC, GPIO2 | GPIO9);
|
||||
gpio_port_write(GPIOC, 0x204);
|
||||
@endcode
|
||||
|
||||
Example 1: Digital input on port C12
|
||||
|
||||
@code
|
||||
gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT,
|
||||
GPIO_PUPD_PULLUP, GPIO12);
|
||||
reg16 = gpio_port_read(GPIOC);
|
||||
@endcode
|
||||
|
||||
LGPL License Terms @ref lgpl_license
|
||||
*/
|
||||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**@{*/
|
||||
|
||||
#include <libopencm3/stm32/common/gpio_common_all.h>
|
||||
#include <libopencm3/stm32/gpio.h>
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Set GPIO Pin Mode
|
||||
|
||||
Sets the Pin Direction and Analog/Digital Mode, and Output Pin Pullup,
|
||||
for a set of GPIO pins on a given GPIO port.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] mode Unsigned int8. Pin mode @ref gpio_mode
|
||||
@param[in] pull_up_down Unsigned int8. Pin pullup/pulldown configuration @ref gpio_pup
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be set, use logical OR '|' to separate them.
|
||||
*/
|
||||
void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios)
|
||||
{
|
||||
u16 i;
|
||||
u32 moder, pupd;
|
||||
|
||||
/*
|
||||
* We want to set the config only for the pins mentioned in gpios,
|
||||
* but keeping the others, so read out the actual config first.
|
||||
*/
|
||||
moder = GPIO_MODER(gpioport);
|
||||
pupd = GPIO_PUPDR(gpioport);
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
if (!((1 << i) & gpios))
|
||||
continue;
|
||||
|
||||
moder &= ~GPIO_MODE_MASK(i);
|
||||
moder |= GPIO_MODE(i, mode);
|
||||
pupd &= ~GPIO_PUPD_MASK(i);
|
||||
pupd |= GPIO_PUPD(i, pull_up_down);
|
||||
}
|
||||
|
||||
/* Set mode and pull up/down control registers. */
|
||||
GPIO_MODER(gpioport) = moder;
|
||||
GPIO_PUPDR(gpioport) = pupd;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Set GPIO Output Options
|
||||
|
||||
When the pin is set to output mode, this sets the configuration (analog/digital and
|
||||
open drain/push pull) and speed, for a set of GPIO pins on a given GPIO port.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] otype Unsigned int8. Pin output type @ref gpio_output_type
|
||||
@param[in] speed Unsigned int8. Pin speed @ref gpio_speed
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be set, use logical OR '|' to separate them.
|
||||
*/
|
||||
void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios)
|
||||
{
|
||||
u16 i;
|
||||
u32 ospeedr;
|
||||
|
||||
if (otype == 0x1)
|
||||
GPIO_OTYPER(gpioport) |= gpios;
|
||||
else
|
||||
GPIO_OTYPER(gpioport) &= ~gpios;
|
||||
|
||||
ospeedr = GPIO_OSPEEDR(gpioport);
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
if (!((1 << i) & gpios))
|
||||
continue;
|
||||
ospeedr &= ~GPIO_OSPEED_MASK(i);
|
||||
ospeedr |= GPIO_OSPEED(i, speed);
|
||||
}
|
||||
|
||||
GPIO_OSPEEDR(gpioport) = ospeedr;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/** @brief Set GPIO Alternate Function Selection
|
||||
|
||||
Set the alternate function mapping number for each pin. Most pins have alternate
|
||||
functions associated with them. When set to AF mode, a pin may be used for one of
|
||||
its allocated alternate functions selected by the number given here. To determine
|
||||
the number to be used for the desired function refer to the individual datasheet
|
||||
for the particular device. A table is given under the Pin Selection chapter.
|
||||
|
||||
Note that a number of pins may be set but only with a single AF number. In practice
|
||||
this would rarely be useful as each pin is likely to require a different number.
|
||||
|
||||
@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
|
||||
@param[in] alt_func_num Unsigned int8. Pin alternate function number @ref gpio_af_num
|
||||
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||
If multiple pins are to be set, use logical OR '|' to separate them.
|
||||
*/
|
||||
void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios)
|
||||
{
|
||||
u16 i;
|
||||
u32 afrl, afrh;
|
||||
|
||||
afrl = GPIO_AFRL(gpioport);
|
||||
afrh = GPIO_AFRH(gpioport);
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (!((1 << i) & gpios))
|
||||
continue;
|
||||
afrl &= ~GPIO_AFR_MASK(i);
|
||||
afrl |= GPIO_AFR(i, alt_func_num);
|
||||
}
|
||||
|
||||
for (i = 8; i < 16; i++) {
|
||||
if (!((1 << i) & gpios))
|
||||
continue;
|
||||
afrl &= ~GPIO_AFR_MASK(i - 8);
|
||||
afrh |= GPIO_AFR(i - 8, alt_func_num);
|
||||
}
|
||||
|
||||
GPIO_AFRL(gpioport) = afrl;
|
||||
GPIO_AFRH(gpioport) = afrh;
|
||||
}
|
||||
/**@}*/
|
||||
|
||||
Loading…
Reference in New Issue