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stm32f4: rcc: support PLL_SAI and PLL_I2S 

Adds the missing enums for the extra clocks on stm32f4x9 parts.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
This commit is contained in:
Chuck McManis 2016-08-15 17:19:55 +00:00 committed by Karl Palsson
parent 2614577e5a
commit b802bd07b2
2 changed files with 45 additions and 13 deletions
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2
include/libopencm3/stm32/f4/rcc.h
View File

@ -665,6 +665,8 @@ extern const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END];
enum rcc_osc {
RCC_PLL,
RCC_PLLSAI,
RCC_PLLI2S,
RCC_HSE,
RCC_HSI,
RCC_LSE,

56
lib/stm32/f4/rcc.c
View File

@ -311,6 +311,12 @@ void rcc_osc_ready_int_clear(enum rcc_osc osc)
case RCC_LSI:
RCC_CIR |= RCC_CIR_LSIRDYC;
break;
case RCC_PLLSAI:
RCC_CIR |= RCC_CIR_PLLSAIRDYC;
break;
case RCC_PLLI2S:
RCC_CIR |= RCC_CIR_PLLI2SRDYC;
break;
}
}
@ -332,6 +338,12 @@ void rcc_osc_ready_int_enable(enum rcc_osc osc)
case RCC_LSI:
RCC_CIR |= RCC_CIR_LSIRDYIE;
break;
case RCC_PLLSAI:
RCC_CIR |= RCC_CIR_PLLSAIRDYIE;
break;
case RCC_PLLI2S:
RCC_CIR |= RCC_CIR_PLLI2SRDYIE;
break;
}
}
@ -353,6 +365,12 @@ void rcc_osc_ready_int_disable(enum rcc_osc osc)
case RCC_LSI:
RCC_CIR &= ~RCC_CIR_LSIRDYIE;
break;
case RCC_PLLSAI:
RCC_CIR &= ~RCC_CIR_PLLSAIRDYIE;
break;
case RCC_PLLI2S:
RCC_CIR &= ~RCC_CIR_PLLI2SRDYIE;
break;
}
}
@ -361,22 +379,20 @@ int rcc_osc_ready_int_flag(enum rcc_osc osc)
switch (osc) {
case RCC_PLL:
return ((RCC_CIR & RCC_CIR_PLLRDYF) != 0);
break;
case RCC_HSE:
return ((RCC_CIR & RCC_CIR_HSERDYF) != 0);
break;
case RCC_HSI:
return ((RCC_CIR & RCC_CIR_HSIRDYF) != 0);
break;
case RCC_LSE:
return ((RCC_CIR & RCC_CIR_LSERDYF) != 0);
break;
case RCC_LSI:
return ((RCC_CIR & RCC_CIR_LSIRDYF) != 0);
break;
case RCC_PLLSAI:
return ((RCC_CIR & RCC_CIR_PLLSAIRDYF) != 0);
case RCC_PLLI2S:
return ((RCC_CIR & RCC_CIR_PLLI2SRDYF) != 0);
}
cm3_assert_not_reached();
return 0;
}
void rcc_css_int_clear(void)
@ -407,6 +423,12 @@ void rcc_wait_for_osc_ready(enum rcc_osc osc)
case RCC_LSI:
while ((RCC_CSR & RCC_CSR_LSIRDY) == 0);
break;
case RCC_PLLSAI:
while ((RCC_CR & RCC_CR_PLLSAIRDY) == 0);
break;
case RCC_PLLI2S:
while ((RCC_CR & RCC_CR_PLLI2SRDY) == 0);
break;
}
}
@ -449,6 +471,12 @@ void rcc_osc_on(enum rcc_osc osc)
case RCC_LSI:
RCC_CSR |= RCC_CSR_LSION;
break;
case RCC_PLLSAI:
RCC_CR |= RCC_CR_PLLSAION;
break;
case RCC_PLLI2S:
RCC_CR |= RCC_CR_PLLI2SON;
break;
}
}
@ -470,6 +498,12 @@ void rcc_osc_off(enum rcc_osc osc)
case RCC_LSI:
RCC_CSR &= ~RCC_CSR_LSION;
break;
case RCC_PLLSAI:
RCC_CR &= ~RCC_CR_PLLSAION;
break;
case RCC_PLLI2S:
RCC_CR &= ~RCC_CR_PLLI2SON;
break;
}
}
@ -492,9 +526,7 @@ void rcc_osc_bypass_enable(enum rcc_osc osc)
case RCC_LSE:
RCC_BDCR |= RCC_BDCR_LSEBYP;
break;
case RCC_PLL:
case RCC_HSI:
case RCC_LSI:
default:
/* Do nothing, only HSE/LSE allowed here. */
break;
}
@ -509,9 +541,7 @@ void rcc_osc_bypass_disable(enum rcc_osc osc)
case RCC_LSE:
RCC_BDCR &= ~RCC_BDCR_LSEBYP;
break;
case RCC_PLL:
case RCC_HSI:
case RCC_LSI:
default:
/* Do nothing, only HSE/LSE allowed here. */
break;
}