swm050: new MCU family
SWM050 is a series of MCU made by Foshan Synwit Tech. It contains a Cortex-M0 CPU core, 8KiB of Flash and 1KiB of SRAM. The only peripherals are GPIO, Timer and WDT. There's only two parts in this series, with either TSSOP-8 or SSOP-16 packages. This commit introduces the interrupt vector and GPIO support for them. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
This commit is contained in:
parent
a652856533
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3
Makefile
3
Makefile
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@ -37,7 +37,8 @@ TARGETS ?= stm32/f0 stm32/f1 stm32/f2 stm32/f3 stm32/f4 stm32/f7 \
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efm32/ezr32wg \
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efm32/ezr32wg \
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sam/3a sam/3n sam/3s sam/3u sam/3x sam/4l \
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sam/3a sam/3n sam/3s sam/3u sam/3x sam/4l \
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sam/d \
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sam/d \
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vf6xx
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vf6xx \
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swm050
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# Be silent per default, but 'make V=1' will show all compiler calls.
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# Be silent per default, but 'make V=1' will show all compiler calls.
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ifneq ($(V),1)
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ifneq ($(V),1)
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@ -75,6 +75,9 @@
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#elif defined(VF6XX)
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#elif defined(VF6XX)
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# include <libopencm3/vf6xx/nvic.h>
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# include <libopencm3/vf6xx/nvic.h>
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#elif defined(SWM050)
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# include <libopencm3/swm050/nvic.h>
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#else
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#else
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# warning"no interrupts defined for chipset; NVIC_IRQ_COUNT = 0"
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# warning"no interrupts defined for chipset; NVIC_IRQ_COUNT = 0"
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@ -0,0 +1,86 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_GPIO_H
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#define LIBOPENCM3_GPIO_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/swm050/memorymap.h>
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/* GPIO number definitions (for convenience) */
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/** @defgroup gpio_pin_id GPIO Pin Identifiers
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@ingroup gpio_defines
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@{*/
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#define GPIO0 (1 << 0)
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#define GPIO1 (1 << 1)
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#define GPIO2 (1 << 2)
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#define GPIO3 (1 << 3)
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#define GPIO4 (1 << 4)
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#define GPIO5 (1 << 5)
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#define GPIO6 (1 << 6)
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#define GPIO7 (1 << 7)
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#define GPIO8 (1 << 8)
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#define GPIO9 (1 << 9)
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#define GPIO_ALL 0x3ff
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/**@}*/
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/* GPIO direction definitions */
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/** @defgroup gpio_dir GPIO Pin Direction
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@ingroup gpio_defines
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@{*/
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#define GPIO_INPUT 0x0
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#define GPIO_OUTPUT 0x1
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/**@}*/
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#define GPIO_DATA MMIO32(GPIO_BASE + 0x0)
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#define GPIO_DIR MMIO32(GPIO_BASE + 0x4)
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#define GPIO_EXT MMIO32(GPIO_BASE + 0x4c)
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#define GPIO_INTEN MMIO32(GPIO_BASE + 0x30)
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#define GPIO_INTMASK MMIO32(GPIO_BASE + 0x34)
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#define GPIO_INTLEVEL MMIO32(GPIO_BASE + 0x38)
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#define GPIO_INTPOLARITY MMIO32(GPIO_BASE + 0x3c)
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#define GPIO_INTSTATUS MMIO32(GPIO_BASE + 0x40)
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#define GPIO_INTRAWSTATUS MMIO32(GPIO_BASE + 0x44)
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#define GPIO_INTEOI MMIO32(GPIO_BASE + 0x48)
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#define SWD_SEL MMIO32(SYSTEM_CON_BASE + 0x30)
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#define GPIO_SEL MMIO32(SYSTEM_CON_BASE + 0x80)
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#define GPIO_PULLUP MMIO32(SYSTEM_CON_BASE + 0x90)
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#define GPIO_INEN MMIO32(SYSTEM_CON_BASE + 0xe0)
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BEGIN_DECLS
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void gpio_set(uint16_t gpios);
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void gpio_clear(uint16_t gpios);
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uint16_t gpio_get(uint16_t gpios);
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void gpio_toggle(uint16_t gpios);
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void gpio_input(uint16_t gpios);
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void gpio_output(uint16_t gpios);
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void gpio_sel_af(uint16_t gpios, bool af_en);
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void gpio_pullup(uint16_t gpios, bool en);
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void gpio_in_en(uint16_t gpios, bool en);
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void gpio_sel_swd(bool en);
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END_DECLS
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#endif
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@ -0,0 +1,21 @@
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{
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"irqs": [
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"timer_se0",
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"timer_se1",
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"wdt",
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"cp",
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"gpioa0",
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"gpioa1",
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"gpioa2",
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"gpioa3",
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"gpioa4",
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"gpioa5",
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"gpioa6",
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"gpioa7",
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"gpioa8",
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"gpioa9"
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],
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"partname_humanreadable": "SWM050 series",
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"partname_doxygen": "SWM050",
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"includeguard": "LIBOPENCM3_SWM050_NVIC_H"
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}
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@ -0,0 +1,35 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_MEMORYMAP_H
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#define LIBOPENCM3_MEMORYMAP_H
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#include <libopencm3/cm3/memorymap.h>
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/* Memory map for all buses */
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#define PERIPH_BASE (0x40000000U)
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#define SYSTEM_CON_BASE (PERIPH_BASE + 0x0)
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#define GPIO_BASE (PERIPH_BASE + 0x1000)
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#define TIMER_SE0_BASE (PERIPH_BASE + 0x2000)
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#define TIMER_SE1_BASE (PERIPH_BASE + 0x2400)
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#define WDT_BASE (PERIPH_BASE + 0x19000)
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#define SYSCTL_BASE (PERIPH_BASE + 0xf0000)
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#endif
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@ -59,6 +59,8 @@
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/* Yes, we use the same interrupt table for both LM3S and LM4F */
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/* Yes, we use the same interrupt table for both LM3S and LM4F */
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# include <libopencmsis/lm3s/irqhandlers.h>
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# include <libopencmsis/lm3s/irqhandlers.h>
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#elif defined(SWM050)
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# include <libopencmsis/swm050/irqhandlers.h>
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#else
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#else
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# warning"no chipset defined; user interrupts are not redirected"
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# warning"no chipset defined; user interrupts are not redirected"
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@ -0,0 +1,22 @@
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/* This file is part of the libopencm3 project.
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*
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* It was generated by the irq2nvic_h script.
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*
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* These definitions bend every interrupt handler that is defined CMSIS style
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* to the weak symbol exported by libopencm3.
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*/
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#define TIMER_SE0_IRQHandler timer_se0_isr
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#define TIMER_SE1_IRQHandler timer_se1_isr
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#define WDT_IRQHandler wdt_isr
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#define CP_IRQHandler cp_isr
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#define GPIOA0_IRQHandler gpioa0_isr
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#define GPIOA1_IRQHandler gpioa1_isr
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#define GPIOA2_IRQHandler gpioa2_isr
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#define GPIOA3_IRQHandler gpioa3_isr
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#define GPIOA4_IRQHandler gpioa4_isr
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#define GPIOA5_IRQHandler gpioa5_isr
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#define GPIOA6_IRQHandler gpioa6_isr
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#define GPIOA7_IRQHandler gpioa7_isr
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#define GPIOA8_IRQHandler gpioa8_isr
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#define GPIOA9_IRQHandler gpioa9_isr
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@ -71,6 +71,9 @@
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#elif defined(MSP432E4)
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#elif defined(MSP432E4)
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# include "../msp432/e4/vector_nvic.c"
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# include "../msp432/e4/vector_nvic.c"
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#elif defined(SWM050)
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# include "../swm050/vector_nvic.c"
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#else
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#else
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# warning "no interrupts defined for chipset;"\
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# warning "no interrupts defined for chipset;"\
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"not allocating space in the vector table"
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"not allocating space in the vector table"
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@ -0,0 +1,41 @@
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##
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## This file is part of the libopencm3 project.
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##
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## Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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##
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## This library is free software: you can redistribute it and/or modify
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## it under the terms of the GNU Lesser General Public License as published by
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## the Free Software Foundation, either version 3 of the License, or
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## (at your option) any later version.
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##
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## This library is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU Lesser General Public License for more details.
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##
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## You should have received a copy of the GNU Lesser General Public License
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## along with this library. If not, see <http://www.gnu.org/licenses/>.
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##
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LIBNAME = libopencm3_swm050
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SRCLIBDIR ?= ..
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PREFIX ?= arm-none-eabi
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CC = $(PREFIX)-gcc
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AR = $(PREFIX)-ar
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TGT_CFLAGS = -Os \
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-Wall -Wextra -Wimplicit-function-declaration \
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-Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes \
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-Wundef -Wshadow \
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-I../../include -fno-common \
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-mcpu=cortex-m0 $(FP_FLAGS) -mthumb -Wstrict-prototypes \
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-ffunction-sections -fdata-sections -MD -DSWM050
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TGT_CFLAGS += $(DEBUG_FLAGS)
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TGT_CFLAGS += $(STANDARD_FLAGS)
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ARFLAGS = rcs
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OBJS = gpio.o
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VPATH += ../cm3
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include ../Makefile.include
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@ -0,0 +1,190 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/swm050/gpio.h>
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/*---------------------------------------------------------------------------*/
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/** @brief Set a Group of Pins
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Set one or more pins of GPIO to 1. Please note that this chip doesn't support
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atomic pin setting.
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@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
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If multiple pins are to be changed, use bitwise OR '|' to separate
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them.
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*/
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void gpio_set(uint16_t gpios)
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{
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GPIO_DATA |= gpios;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear a Group of Pins
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Set one or more pins of GPIO to 0. Please note that this chip doesn't support
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atomic pin setting.
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@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
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If multiple pins are to be changed, use bitwise OR '|' to separate
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them.
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*/
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void gpio_clear(uint16_t gpios)
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{
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GPIO_DATA &= ~gpios;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Read a Group of Pins.
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@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
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If multiple pins are to be read, use bitwise OR '|' to separate
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them.
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@return Unsigned int16 value of the pin values. The bit position of the pin
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value returned corresponds to the pin number.
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*/
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uint16_t gpio_get(uint16_t gpios)
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{
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return GPIO_EXT & gpios;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Toggle a Group of Pins
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Toggle one or more pins of GPIO. The non-toggled pins are not affected.
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@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
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If multiple pins are to be changed, use bitwise OR '|' to separate
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them.
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*/
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void gpio_toggle(uint16_t gpios)
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{
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uint32_t curr_status = GPIO_DATA & gpios;
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GPIO_DATA = (GPIO_DATA & (~gpios)) | (~curr_status);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Set the direction of a Group of Pins to Input
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Set the direction of one or more pins of GPIO to input.
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@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
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If multiple pins are to be changed, use bitwise OR '|' to separate
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them.
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*/
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void gpio_input(uint16_t gpios)
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{
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GPIO_DIR &= ~gpios;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Set the direction of a Group of Pins to Output
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Set the direction of one or more pins of GPIO to output.
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@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
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If multiple pins are to be changed, use bitwise OR '|' to separate
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them.
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*/
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void gpio_output(uint16_t gpios)
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{
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GPIO_DIR |= gpios;
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}
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||||||
|
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/** @brief Select the alternative function of a Group of Pins
|
||||||
|
|
||||||
|
Select the alternative function of one or more pins of GPIO.
|
||||||
|
|
||||||
|
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||||
|
If multiple pins are to be changed, use bitwise OR '|' to separate
|
||||||
|
them.
|
||||||
|
@param[in] af_en Bool. Whether alternative function is selected
|
||||||
|
*/
|
||||||
|
void gpio_sel_af(uint16_t gpios, bool af_en)
|
||||||
|
{
|
||||||
|
if (gpios & GPIO0) {
|
||||||
|
GPIO_SEL = (GPIO_SEL & (~0x3)) | (af_en ? 0x1 : 0x0);
|
||||||
|
}
|
||||||
|
if (gpios & GPIO1) {
|
||||||
|
GPIO_SEL = (GPIO_SEL & (~0xc)) | (af_en ? 0x4 : 0x0);
|
||||||
|
}
|
||||||
|
if (gpios & GPIO2) {
|
||||||
|
GPIO_SEL = (GPIO_SEL & (~0x30)) | (af_en ? 0x10 : 0x0);
|
||||||
|
}
|
||||||
|
if (gpios & GPIO7) {
|
||||||
|
GPIO_SEL = (GPIO_SEL & (~0xc000)) | (af_en ? 0x4000 : 0x0);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/** @brief Enable the internal pull-up of a Group of Pins
|
||||||
|
|
||||||
|
Enable or disable the internal pull-up of one or more pins of GPIO.
|
||||||
|
|
||||||
|
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||||
|
If multiple pins are to be changed, use bitwise OR '|' to separate
|
||||||
|
them.
|
||||||
|
@param[in] en Bool. Whether pull-up is enabled
|
||||||
|
*/
|
||||||
|
void gpio_pullup(uint16_t gpios, bool en)
|
||||||
|
{
|
||||||
|
if (en) {
|
||||||
|
GPIO_PULLUP |= gpios;
|
||||||
|
} else {
|
||||||
|
GPIO_PULLUP &= ~gpios;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/** @brief Enable the input function of a Group of Pins
|
||||||
|
|
||||||
|
Enable or disable the input function of one or more pins of GPIO. Disabling
|
||||||
|
the input function of pins can decrease the power usage of the MCU.
|
||||||
|
|
||||||
|
@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
|
||||||
|
If multiple pins are to be changed, use bitwise OR '|' to separate
|
||||||
|
them.
|
||||||
|
@param[in] en Bool. Whether input function is enabled
|
||||||
|
*/
|
||||||
|
void gpio_in_en(uint16_t gpios, bool en)
|
||||||
|
{
|
||||||
|
if (en) {
|
||||||
|
GPIO_INEN &= ~gpios;
|
||||||
|
} else {
|
||||||
|
GPIO_INEN |= gpios;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/** @brief Select the SWD function of GPIO 1/2
|
||||||
|
|
||||||
|
Enable or disable the SWD debugging port at GPIO 1/2. When SWD debugging port
|
||||||
|
is enabled, GPIO and AF of the SWD pins will be both unavailable.
|
||||||
|
|
||||||
|
@param[in] en Bool. Whether SWD is enabled
|
||||||
|
*/
|
||||||
|
void gpio_sel_swd(bool en)
|
||||||
|
{
|
||||||
|
if (en) {
|
||||||
|
SWD_SEL = 1;
|
||||||
|
} else {
|
||||||
|
SWD_SEL = 0;
|
||||||
|
}
|
||||||
|
}
|
Loading…
Reference in New Issue