dect: com-on-air: support for rebuilding firmware
Add the Com-on-Air firmware source and support for rebuilding it during the kernel build process. Signed-off-by: Patrick McHardy <kaber@trash.net>
This commit is contained in:
parent
dfdc90c521
commit
e2bc8bd43a
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@ -0,0 +1,4 @@
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bin2c
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*.p
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*.h.tmp
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*.bin
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@ -1,2 +1,12 @@
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config DECT_COA
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tristate
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config DECT_COA_FIRMWARE
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bool "Build Com-on-Air firmware (requires ASL macro assembler)"
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depends on DECT_COA
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help
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This option enables rebuild of the firmware for the Com-on-Air
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devices during the kernel build process. The ASL macro compiler
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is required for this.
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If unsure, say N.
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@ -1,3 +1,37 @@
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com_on_air-objs := sc14421_firmware.o sc14421.o
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obj-$(CONFIG_DECT_COA) += com_on_air.o
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$(obj)/sc14421.o: $(obj)/sc14421_firmware.c
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$(obj)/sc14421_firmware.c: NAME=sc14421
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clean-files += sc14421_firmware.p
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clean-files += sc14421_firmware.bin
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clean-files += sc14421_firmware.h.tmp
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hostprogs-$(CONFIG_DECT_COA_FIRMWARE) += bin2c
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ifeq ($(CONFIG_DECT_COA_FIRMWARE),y)
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ASL = asl
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P2BIN = p2bin
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BIN2C = $(obj)/bin2c
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quiet_cmd_asl = ASL $<
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cmd_asl = $(ASL) -q -c $< -o $(<:.asm=.p) -shareout $(<:.asm=.h.tmp); \
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$(P2BIN) $(<:.asm=.p) $(<:.asm=.bin) -r 0-507; \
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$(BIN2C) $(<:.asm=.bin) $(NAME)_firmware > $@; \
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( \
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echo "\#ifndef $$(echo $(NAME) | tr a-z A-Z)_FIRMWARE"; \
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echo "\#define $$(echo $(NAME) | tr a-z A-Z)_FIRMWARE"; \
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echo;\
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echo "extern const unsigned char $(NAME)_firmware[509];"; \
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echo;\
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grep define $(<:.asm=.h.tmp); \
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echo;\
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echo "\#endif /* $$(echo $(NAME) | tr a-z A-Z)_FIRMWARE */"; \
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) > $(@:.c=.h)
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$(obj)/%_firmware.c: $(src)/%_firmware.asm $(BIN2C)
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$(call if_changed,asl)
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endif
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@ -0,0 +1,57 @@
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#include <stdio.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <string.h>
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#include <errno.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <unistd.h>
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#define HEADER_FMT \
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"/*\n" \
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" * automatically generated file\n" \
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" * DO NOT EDIT\n" \
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" * edit firmware/filename.asm instead\n" \
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" */\n" \
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"\n" \
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"#include \"%s.h\"\n" \
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"\n" \
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"const unsigned char %s[] = {\n"
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#define FOOTER "};\n"
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int main(int argc, char *argv[])
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{
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uint32_t wordcount = 0;
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uint16_t w;
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int f;
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if (argc < 3) {
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printf("usage: bin2c bin-file varname > c-file\n");
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exit(1);
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}
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f = open(argv[1], O_RDONLY);
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if (f < 0) {
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printf("cant open(\"%s\"): %s\n", argv[1], strerror(errno));
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exit(1);
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}
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printf(HEADER_FMT, argv[2], argv[2]);
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while (2 == read(f, &w, 2)) {
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if (!wordcount)
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printf("\t");
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else
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if (!(wordcount % 4))
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printf(",\n\t");
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else
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printf(", ");
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printf("0x%.2x, 0x%.2x", (w & 0xff00) >> 8, w & 0xff);
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wordcount++;
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}
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printf(FOOTER);
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close(f);
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return 0;
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}
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CPU SC14421
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ORG 0
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BR Start
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PB_LED EQU 0x80
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PB_RX_ON EQU 0x40
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PB_TX_ON EQU 0x10
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PB_RADIOPOWER EQU 0x04
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PB_DCTHRESHOLD EQU 0x02
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PB_RSSI EQU 0x01
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; memory banks 0-7, lower and upper halfs (128 bytes each)
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BANK0_LOW EQU 0x00
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BANK0_HIGH EQU 0x10
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BANK1_LOW EQU 0x20
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BANK1_HIGH EQU 0x30
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BANK2_LOW EQU 0x40
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BANK2_HIGH EQU 0x50
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BANK3_LOW EQU 0x60
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BANK3_HIGH EQU 0x70
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BANK4_LOW EQU 0x80
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BANK4_HIGH EQU 0x90
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BANK5_LOW EQU 0xa0
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BANK5_HIGH EQU 0xb0
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BANK6_LOW EQU 0xc0
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BANK6_HIGH EQU 0xd0
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BANK7_LOW EQU 0xe0
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BANK7_HIGH EQU 0xf0
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DIP_RF_INIT EQU 0x00
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RF_DESC EQU 0x4A
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TX_DESC EQU 0x50
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RX_DESC EQU 0x58
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KEY_DESC EQU 0x58
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; scrambler frame number offset to {RX,TX}_DESC
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TRX_DESC_FN EQU 0x06
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SD_PREAMBLE_OFF EQU 0x01
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SD_A_FIELD_OFF EQU 0x06
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SD_B_FIELD_OFF EQU 0x0E
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; status descriptor
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SD_BASE_OFF EQU 0x00
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SD_RSSI_OFF EQU 0x00
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SD_CSUM_OFF EQU 0x01
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SD_DATA_OFF EQU 0x06
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; U2785 radio
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U2785_CFG1_LEN EQU 24
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U2785_CFG2_LEN EQU 9
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;-------------------------------------------------------------
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Start: BR InitDIP
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;-------------------------------------------------------------
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SlotTable: SLOTZERO
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JP0: BK_C BANK1_LOW
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PP0: WNT 2
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JP2: BK_C BANK1_HIGH
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PP2: WNT 2
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JP4: BK_C BANK2_LOW
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PP4: WNT 2
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U_INT0
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JP6: BK_C BANK2_HIGH
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PP6: WNT 2
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JP8: BK_C BANK3_LOW
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PP8: WNT 2
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JP10: BK_C BANK3_HIGH
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PP10: WNT 2
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U_INT1
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JP12: BK_C BANK4_LOW
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PP12: WNT 2
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JP14: BK_C BANK4_HIGH
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PP14: WNT 2
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JP16: BK_C BANK5_LOW
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PP16: WNT 2
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U_INT2
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JP18: BK_C BANK5_HIGH
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PP18: WNT 2
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JP20: BK_C BANK6_LOW
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PP20: WNT 2
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JP22: BK_C BANK6_HIGH
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PP22: WNT 2
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U_INT3
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BR SlotTable
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;-------------------------------------------------------------------------------
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; Receive a P32 packet using the the unprotected full slot B-field format in
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; the D32-field
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;
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RecvP32U: JMP RFInit
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JMP Receive
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WT 1 ; | p: 94 A: 62
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B_BRFU SD_B_FIELD_OFF ; Receive unprotected full-slot B-field | p: 95 A: 63
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JMP RecvP32U_BZ ; Receive B-field | p: 96 B: 0
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BR label_51
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; Receive a P32 packet using the protected full slot B-field format in the
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; D32-field
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RecvP32P: JMP RFInit
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JMP Receive
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BR RecvP32P_B ; Receive B-Subfields | p: 94 A: 62
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;-------------------------------------------------------------------------------
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; Transmit a P00 packet
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;
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TransmitP00: JMP RFInit ; Init radio
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JMP Transmit ; Transmit S- and beginning of A-field |
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;WT 1 ; Transmit one bit of A-field data | p: 94 A: 62
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;B_BT SD_B_FIELD_OFF ; Transmit B-Field data (latency must be > 2!) | p: 95 A: 63
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JMP TransmitEnd ; End transmission | p: 96 B: 0
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BR label_53 ;
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; Transmit a P32 packet using the unprotected full slot B-field format in the
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; D32-field
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TransmitP32U: JMP RFInit ; Init radio
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JMP Transmit ; Transmit S- and beginning of A-field |
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WT 1 ; Transmit one bit of A-field data | p: 94 A: 62
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B_BTFU SD_B_FIELD_OFF ; Transmit unprotected full-slot B-field data | p: 95 A: 63
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JMP TransmitP32U_BZ ; Transmit the B- and Z-fields | p: 96 B: 0
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BR label_54 ;
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; Transmit a P32 packet using the protected full slot B-field format in the
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; D32-field
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TransmitP32P: JMP RFInit ; Enable radio
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JMP Transmit ; Transmit S- and beginning of A-field |
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BR TransmitP32P_B ; Transmit B-Subfields | p: 94 A: 62
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;-------------------------------------------------------------------------------
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label_51: B_WRS SD_BASE_OFF ; write status
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WT 6
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label_53: B_RST
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label_54: P_LDL PB_RX_ON | PB_TX_ON
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WT 5
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WNT 1
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RTN
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;-------------------------------------------------------------------------------
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label_58: B_RST
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P_LDL PB_RX_ON | PB_TX_ON
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RTN
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;-------------------------------------------------------------------------------
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; Enable the receiver, receive the S-field and the first 61 bits of the D-field
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; (93 bits total)
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;
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Receive: P_LDH PB_RX_ON
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P_LDL PB_RSSI ; enable RSSI measurement
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WT 25
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WNT 1 ; wait until beginning of slot |
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WT 9 ; | p: -33--25
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B_XON ; | p: -24
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P_LDH PB_DCTHRESHOLD ; | p: -23
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WT 5 ; | p: -22--16
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B_SR ; Receive S-field | p: -17
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EN_SL_ADJ ; | p: -16 S: 0
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WT 12 ; | p: -15--4 S: 1-12
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P_LDL PB_DCTHRESHOLD ; | p: -3 S: 13
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WT 33 ; | p: -2-30 S: 14-46
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B_AR2 SD_A_FIELD_OFF ; | p: 31 S: 47
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WT 61 ; | p: 32-92 A: 0-60
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RTN ; | p: 93 A: 61
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; Receive the B- and Z-fields of a P32 packet using the protected full slot
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; B-field format in the D32-field
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RecvP32U_BZ: WT 249 ; | p: 97-345 B: 1-249
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WT 79 ; | p: 346-415 B: 250-319
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; | p: 416-419 B: 320-323 X: 0-3
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; | p: 420-423 Z: 0- 3
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; | p: 424 ??
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ReceiveEnd: P_LDH PB_RSSI ; |
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P_LDL PB_RX_ON
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RTN
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;-------------------------------------------------------------------------------
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; Enable transmitter, transmit the S-field and the first 61 bits of the D-field
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; (93 bits total)
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;
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Transmit: P_LDH 0x00 ;
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WT 40 ;
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B_RST ;
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B_RC TX_DESC ;
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WNT 1 ; Wait until beginning of slot
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B_ST 0x00 ; Start transmission of S-field data |
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WT 1 ; Wait one bit | p: -8 S: 0
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P_LDH PB_TX_ON ; Enable transmitter | p: -7 S: 1
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WT 37 ; Transmit 29 bits S-field | p: -6-30 S: 2-38
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B_AT2 SD_A_FIELD_OFF ; Start transission of A-field data | p: 31 S: 39
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WT 61 ; Transmit first 61 bits of A-field | p: 32-92 A: 0-60
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RTN ; Return | p: 93 A: 61
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;-------------------------------------------------------------------------------
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;
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;
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TransmitP32U_BZ:
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WT 249 ; | p: 97-345 B: 1-249
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WT 84 ; Last bits of B-field data | p: 346-415 B: 250-319
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; X-field | p: 416-419 B: 320-323 X: 0-3
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; Z-field (?) | p: 420-424 Z: 0- 3
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; 5 bits of crap? | p: 425-429
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B_RST ; Reset BMC | p: 430
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TransmitEnd: P_LDL PB_TX_ON ; Disable transmitter |
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WT 8 ; Wait until transmitter is disabled |
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P_LDL 0x00 ;
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RTN ; Return
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;-------------------------------------------------------------------------------
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; Transfer a protected B-field subfield
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;
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; The X-CRC includes the R-CRC in its calculation, which is contained in the
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; last 16 bits of the subfield.
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;
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TransferBP: B_XON ; Enable X-CRC calculation | p: 159+i*80 Bi: 63
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WT 15 ; Transfer 15 bits R-CRC, include in X-CRC | p: 160+i*80-164+i*80 Bi: 64-78 R_Bi: 0-14
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B_XOFF ; Disable X-CRC calculation | p: 175+i*80 Bi: 79 R_Bi: 15
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WT 61 ; Transfer first 61 bits of next B-field | p: 176+i*80-236+i*80 Bi: 0-60
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RTN ; Return | p: 237+i*80 Bi: 61
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; Transfer the B-field subfields of a P32 packet using protected full slot
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; format
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TransferP32P_B: WT 61 ; Transfer 61 bits of B-field | p: 97-157 B: 1- 61 B0: 1-61
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JMP TransferBP ; End subfield, begin next subfield | p: 158-237 B: 62-141 B0: 62-79 B1: 0-61
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JMP TransferBP ; End subfield, begin next subfield | p: 238-317 B: 142-221 B1: 62-79 B2: 0-61
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JMP TransferBP ; End subfield, begin next subfield | p: 318-397 B: 222-301 B2: 62-79 B3: 0-61
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WT 1 ; | p: 398 B: 302 B3: 62
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B_XON ; | p: 399 B: 303 B3: 63
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WT 11 ; | p: 400-410 B: 304-314 R_B3: 0-10
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RTN ; | p: 411 B: 315 R_B3: 11
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;-------------------------------------------------------------------------------
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; Receive the B-subfields in protected format
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;
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RecvP32P_B: B_BRFP SD_B_FIELD_OFF ; Receive protected full slot B-field data | p: 95 A: 63
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JMP TransferP32P_B ; Receive the B-subfields | p: 96-411 B: 0-315
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WT 3 ; | p: 412-414 B: 316-318
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B_XR ; Receive X-CRC | p: 415 B: 319
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WT 6 ; | p: 416-419 B: 320-323 X: 0-3
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; | p: 420-421 Z: 0- 1
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JMP ReceiveEnd ; | p: 422 Z: 2
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B_WRS SD_BASE_OFF ; write status
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WT 6
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BR label_58
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;-------------------------------------------------------------------------------
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; Transmit the B-subfields in protected format
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;
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TransmitP32P_B: B_BTFP SD_B_FIELD_OFF ; Transmit protect fulls-slot B-field data | p: 95 A: 63
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JMP TransferP32P_B ; Transmit the B-subfields | p: 96-411 B: 0-315
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WT 3 ; | p: 412-414 B: 316-318
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B_XT ; Transmit X-CRC | p: 415 B: 319
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WT 13 ; | p: 416-419 B: 320-323 X: 0-3
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; | p: 420-423 Z: 0-3
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; | p: 424-428 ???
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B_RST ; | p: 429
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JMP TransmitEnd ; End transmission | p: 430
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BR label_58 ;
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;-------------------------------------------------------------------------------
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RFInit: RFEN
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WT 2
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MEN1N
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M_WR RF_DESC
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WT U2785_CFG1_LEN + 1
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M_RST
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MEN1
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MEN1N
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M_WR RF_DESC + U2785_CFG1_LEN / 8
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WT U2785_CFG2_LEN + 1
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M_RST
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MEN1
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WT 1
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RFInit2: P_LDL 0x20
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RFInit3: B_RST
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B_RC RX_DESC
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WT 8
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MEN2
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WT 182
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MEN2N
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P_LDH 0x00
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WT 16
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RTN
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;--------------------------------------------------------------
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;
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LoadKey: D_LDK KEY_DESC ; load cipher key (64 bits)
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WT 16
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D_LDK 0
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D_PREP 0
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WT 39
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D_PREP 0
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RTN
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SaveEncState: D_WRS 0 ;pointer
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WT 10
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D_WRS 0
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D_RST
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RTN
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LoadEncState: D_LDS 0 ;pointer
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WT 10
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D_LDS 0
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RTN
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D_RST
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;-------------------------------------------------------------
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SyncInit: BK_C BANK1_LOW
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Sync: JMP RFInit
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WT 250
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P_SC 0x20
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P_LDH PB_RX_ON | PB_DCTHRESHOLD
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UNLCK
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WT 64
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B_XOFF
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B_SR
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WNT 20
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JMP1 SFieldFound
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B_RST
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U_INT1
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WNT 23
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BR Sync
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;-------------------------------------------------------------
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SFieldFound: WNT 23
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P_SC 0x00
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SyncLock: JMP RecvP32U
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U_INT0
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WNT 22
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SyncLoop: BR Sync
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;-------------------------------------------------------------
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InitDIP: B_RST
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BK_C BANK0_LOW
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;C_LD 0x10
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;WT 10
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B_RC DIP_RF_INIT
|
||||
WT 8
|
||||
B_RST
|
||||
;C_ON
|
||||
WT 10
|
||||
P_EN
|
||||
P_LD 0x04
|
||||
RCK_INT
|
||||
RFEN
|
||||
RFStart: BR SyncInit
|
||||
;-------------------------------------------------------------
|
||||
|
||||
SHARED DIP_RF_INIT
|
||||
SHARED RF_DESC,RX_DESC,TX_DESC,TRX_DESC_FN
|
||||
SHARED SD_RSSI_OFF,SD_CSUM_OFF,SD_PREAMBLE_OFF,SD_DATA_OFF
|
||||
|
||||
SHARED PP0,PP2,PP4,PP6,PP8,PP10,PP12,PP14,PP16,PP18,PP20,PP22
|
||||
SHARED JP0,JP2,JP4,JP6,JP8,JP10,JP12,JP14,JP16,JP18,JP20,JP22
|
||||
|
||||
SHARED RFStart,SlotTable
|
||||
SHARED SyncInit,Sync,SyncLock,SyncLoop
|
||||
SHARED RecvP32U
|
||||
SHARED RecvP32P
|
||||
SHARED TransmitP00
|
||||
SHARED TransmitP32U
|
||||
SHARED TransmitP32P
|
Reference in New Issue