ARM: arm-soc: Cleanups on various subarchitectures
Cleanup patches for various ARM platforms and some of their associated drivers. There's also a branch in here that enables Freescale i.MX to be part of the multiplatform support -- the first "big" SoC that is moved over (more multiplatform work comes in a separate branch later during the merge window). -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQx2p9AAoJEIwa5zzehBx3aPUQAIjV3VDf/ACkA4KUQu0BFg5U 57OIkl6RCZvfKhYgq5+6OJ2AK6VkGh9PqTmXkDS7Nj3QMS/uWcb3U419aPJsd3Z/ vNGpTl+J/YcAcFrKMqTyNv98TAiAOJlpm70CqmRbkhpMfoJb7//1JKqGTJPBO+tj 8ZEwNGC0WbRNOSQTY/TTAhbZE1sqXwKy9mDLGmcwqKBY8H1TFHyPB6yWYFSxMHxS JAegbYhYO9FawOOLoi9ovT+2vUR9vDu0xxV4zUK9f5DqKcCb/wYuN0QkusjnEutm RfIt7iXHHzi35YPxtlrGgSz9EIYXKAafSzkgf3Ydpjci5DH/vbVexm/CT+V+SwOT SvucYJMALI/aOEFJWN/50L6B9zipSrWb51tK7WFXz/sUCrMQrXH3Mu99mjHZXSoL 1cylsvs3DFQC7vHFLSjRpX6eJdfE+Hb0LZ878eXSbDVCOnU8odAQrofugqfmeVDk eN0+BWmchJgvljOiKVUQMC3PCquCaAAO1lm/HU7bWPlVigTuHSW0uisDyCYAtlt1 dGxnbbhoFJvSH7CMOoMO7hIFnoNJEe6+uVUuwA/+iJouMXMJLoY6Da4L72h1Mp81 o4Hr6Kxly/SMtURZ/6pCycx5ahb5TaahstYAoe7Qp1dMj5U2m6fUVfKkG7tUx1CW MIuvN3qJeW2qKWKmZRVM =zfPd -----END PGP SIGNATURE----- Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups on various subarchitectures from Olof Johansson: "Cleanup patches for various ARM platforms and some of their associated drivers. There's also a branch in here that enables Freescale i.MX to be part of the multiplatform support -- the first "big" SoC that is moved over (more multiplatform work comes in a separate branch later during the merge window)." Conflicts fixed as per Olof, including a silent semantic one in arch/arm/mach-omap2/board-generic.c (omap_prcm_restart() was renamed to omap3xxx_restart(), and a new user of the old name was added). * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (189 commits) ARM: omap: fix typo on timer cleanup ARM: EXYNOS: Remove unused regs-mem.h file ARM: EXYNOS: Remove unused non-dt support for dwmci controller ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan ARM: OMAP3: cm-t3517: use GPTIMER for system clock ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER ARM: SAMSUNG: use devm_ functions for ADC driver ARM: EXYNOS: no duplicate mask/unmask in eint0_15 ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443 ARM: EXYNOS: Remove i2c0 resource information and setting of device names ARM: Kirkwood: checkpatch cleanups ARM: Kirkwood: Fix sparse warnings. ARM: Kirkwood: Remove unused includes ARM: kirkwood: cleanup lsxl board includes ARM: integrator: use BUG_ON where possible ARM: integrator: push down SC dependencies ARM: integrator: delete static UART1 mapping ARM: integrator: delete SC mapping on the CP ARM: integrator: remove static CP syscon mapping ARM: integrator: remove static AP syscon mapping ...
This commit is contained in:
Linus Torvalds
commit
d01e4afdbb
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@ -9,6 +9,10 @@ Required properties (in root node):
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FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
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In the root node the Integrator/CP must have a /cpcon node pointing
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to the CP control registers, and the Integrator/AP must have a
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/syscon node pointing to the Integrator/AP system controller.
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ARM Versatile Application and Platform Baseboards
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-------------------------------------------------
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@ -0,0 +1,15 @@
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OMAP Counter-32K bindings
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Required properties:
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- compatible: Must be "ti,omap-counter32k" for OMAP controllers
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- reg: Contains timer register address range (base address and length)
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- ti,hwmods: Name of the hwmod associated to the counter, which is typically
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"counter_32k"
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Example:
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counter32k: counter@4a304000 {
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compatible = "ti,omap-counter32k";
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reg = <0x4a304000 0x20>;
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ti,hwmods = "counter_32k";
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};
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@ -0,0 +1,31 @@
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OMAP Timer bindings
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Required properties:
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- compatible: Must be "ti,omap2-timer" for OMAP2+ controllers.
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- reg: Contains timer register address range (base address and
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length).
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- interrupts: Contains the interrupt information for the timer. The
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format is being dependent on which interrupt controller
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the OMAP device uses.
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- ti,hwmods: Name of the hwmod associated to the timer, "timer<X>",
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where <X> is the instance number of the timer from the
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HW spec.
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Optional properties:
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- ti,timer-alwon: Indicates the timer is in an alway-on power domain.
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- ti,timer-dsp: Indicates the timer can interrupt the on-chip DSP in
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addition to the ARM CPU.
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- ti,timer-pwm: Indicates the timer can generate a PWM output.
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- ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
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and therefore cannot be used by the kernel.
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Example:
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timer12: timer@48304000 {
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compatible = "ti,omap2-timer";
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reg = <0x48304000 0x400>;
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interrupts = <95>;
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ti,hwmods = "timer12"
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ti,timer-alwon;
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ti,timer-secure;
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};
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@ -2,9 +2,27 @@
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properties:
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- compatible : Should be "ti,omap-ocp2scp"
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- reg : Address and length of the register set for the device
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- #address-cells, #size-cells : Must be present if the device has sub-nodes
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- ranges : the child address space are mapped 1:1 onto the parent address space
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- ti,hwmods : must be "ocp2scp_usb_phy"
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Sub-nodes:
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All the devices connected to ocp2scp are described using sub-node to ocp2scp
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ocp2scp@4a0ad000 {
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compatible = "ti,omap-ocp2scp";
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reg = <0x4a0ad000 0x1f>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "ocp2scp_usb_phy";
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subnode1 {
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...
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};
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subnode2 {
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...
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};
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};
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@ -12,13 +12,13 @@ Optional properties:
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Examples:
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i2c@83fc4000 { /* I2C2 on i.MX51 */
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compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
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compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
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reg = <0x83fc4000 0x4000>;
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interrupts = <63>;
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};
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i2c@70038000 { /* HS-I2C on i.MX51 */
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compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
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compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
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reg = <0x70038000 0x4000>;
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interrupts = <64>;
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clock-frequency = <400000>;
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@ -55,5 +55,7 @@ st-micro,24c256 i2c serial eeprom (24cxx)
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stm,m41t00 Serial Access TIMEKEEPER
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stm,m41t62 Serial real-time clock (RTC) with alarm
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stm,m41t80 M41T80 - SERIAL ACCESS RTC WITH ALARMS
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taos,tsl2550 Ambient Light Sensor with SMBUS/Two Wire Serial Interface
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ti,tsc2003 I2C Touch-Screen Controller
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ti,tmp102 Low Power Digital Temperature Sensor with SMBUS/Two Wire Serial Interface
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ti,tmp275 Digital Temperature Sensor
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|
|
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@ -1,5 +1,7 @@
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AM33XX MUSB GLUE
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- compatible : Should be "ti,musb-am33xx"
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- reg : offset and length of register sets, first usbss, then for musb instances
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- interrupts : usbss, musb instance interrupts in order
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- ti,hwmods : must be "usb_otg_hs"
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- multipoint : Should be "1" indicating the musb controller supports
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multipoint. This is a MUSB configuration-specific setting.
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@ -12,3 +14,22 @@ AM33XX MUSB GLUE
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represents PERIPHERAL.
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- power : Should be "250". This signifies the controller can supply upto
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500mA when operating in host mode.
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Example:
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usb@47400000 {
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compatible = "ti,musb-am33xx";
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reg = <0x47400000 0x1000 /* usbss */
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0x47401000 0x800 /* musb instance 0 */
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0x47401800 0x800>; /* musb instance 1 */
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interrupts = <17 /* usbss */
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18 /* musb instance 0 */
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19>; /* musb instance 1 */
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multipoint = <1>;
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num-eps = <16>;
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ram-bits = <12>;
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port0-mode = <3>;
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port1-mode = <3>;
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power = <250>;
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ti,hwmods = "usb_otg_hs";
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};
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@ -797,7 +797,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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T: git git://git.pengutronix.de/git/imx/linux-2.6.git
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F: arch/arm/mach-imx/
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F: arch/arm/plat-mxc/
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F: arch/arm/configs/imx*_defconfig
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ARM/FREESCALE IMX6
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@ -438,19 +438,6 @@ config ARCH_FOOTBRIDGE
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Support for systems based on the DC21285 companion chip
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("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
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config ARCH_MXC
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bool "Freescale MXC/iMX-based"
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select MULTI_IRQ_HANDLER
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select SPARSE_IRQ
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select USE_OF
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help
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Support for Freescale MXC/iMX-based family of processors
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config ARCH_MXS
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bool "Freescale MXS-based"
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select ARCH_REQUIRE_GPIOLIB
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@ -966,7 +953,6 @@ config ARCH_ZYNQ
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bool "Xilinx Zynq ARM Cortex A9 Platform"
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select ARM_AMBA
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select ARM_GIC
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select CLKDEV_LOOKUP
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select CPU_V7
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select GENERIC_CLOCKEVENTS
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select ICST
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@ -1065,7 +1051,7 @@ source "arch/arm/mach-msm/Kconfig"
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source "arch/arm/mach-mv78xx0/Kconfig"
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source "arch/arm/plat-mxc/Kconfig"
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source "arch/arm/mach-imx/Kconfig"
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source "arch/arm/mach-mxs/Kconfig"
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@ -1175,7 +1161,7 @@ config ARM_NR_BANKS
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config IWMMXT
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bool "Enable iWMMXt support"
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depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
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default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
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default y if PXA27x || PXA3xx || ARCH_MMP
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help
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Enable support for iWMMXt context switching at run time if
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running on a CPU that supports it.
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@ -412,6 +412,14 @@ endchoice
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config DEBUG_LL_INCLUDE
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string
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default "debug/icedcc.S" if DEBUG_ICEDCC
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default "debug/imx.S" if DEBUG_IMX1_UART || \
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DEBUG_IMX25_UART || \
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DEBUG_IMX21_IMX27_UART || \
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DEBUG_IMX31_IMX35_UART || \
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DEBUG_IMX51_UART || \
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DEBUG_IMX50_IMX53_UART ||\
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DEBUG_IMX6Q_UART2 || \
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DEBUG_IMX6Q_UART4
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default "debug/highbank.S" if DEBUG_HIGHBANK_UART
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default "debug/mvebu.S" if DEBUG_MVEBU_UART
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default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
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@ -197,10 +197,8 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq
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# Platform directory name. This list is sorted alphanumerically
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# by CONFIG_* macro name.
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plat-$(CONFIG_ARCH_MXC) += mxc
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plat-$(CONFIG_ARCH_OMAP) += omap
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plat-$(CONFIG_ARCH_S3C64XX) += samsung
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plat-$(CONFIG_ARCH_ZYNQ) += versatile
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plat-$(CONFIG_PLAT_IOP) += iop
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plat-$(CONFIG_PLAT_NOMADIK) += nomadik
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plat-$(CONFIG_PLAT_ORION) += orion
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@ -54,10 +54,6 @@ ifeq ($(CONFIG_ARCH_SA1100),y)
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OBJS += head-sa1100.o
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endif
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ifeq ($(CONFIG_ARCH_VT8500),y)
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OBJS += head-vt8500.o
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endif
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ifeq ($(CONFIG_CPU_XSCALE),y)
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OBJS += head-xscale.o
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endif
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|
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@ -1,46 +0,0 @@
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/*
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* linux/arch/arm/boot/compressed/head-vt8500.S
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*
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* Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
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*
|
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* VIA VT8500 specific tweaks. This is merged into head.S by the linker.
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*
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*/
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#include <linux/linkage.h>
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#include <asm/mach-types.h>
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.section ".start", "ax"
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__VT8500_start:
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@ Compare the SCC ID register against a list of known values
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ldr r1, .SCCID
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ldr r3, [r1]
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@ VT8500 override
|
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ldr r4, .VT8500SCC
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cmp r3, r4
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ldreq r7, .ID_BV07
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beq .Lendvt8500
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|
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@ WM8505 override
|
||||
ldr r4, .WM8505SCC
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cmp r3, r4
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ldreq r7, .ID_8505
|
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beq .Lendvt8500
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|
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@ Otherwise, leave the bootloader's machine id untouched
|
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|
||||
.SCCID:
|
||||
.word 0xd8120000
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.VT8500SCC:
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.word 0x34000102
|
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.WM8505SCC:
|
||||
.word 0x34260103
|
||||
|
||||
.ID_BV07:
|
||||
.word MACH_TYPE_BV07
|
||||
.ID_8505:
|
||||
.word MACH_TYPE_WM8505_7IN_NETBOOK
|
||||
|
||||
.Lendvt8500:
|
||||
|
|
@ -79,15 +79,17 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
|
|||
imx28-m28evk.dtb \
|
||||
imx28-tx28.dtb
|
||||
dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
|
||||
omap3-beagle.dtb \
|
||||
omap3-beagle-xm.dtb \
|
||||
omap3-evm.dtb \
|
||||
omap3-tobi.dtb \
|
||||
omap4-panda.dtb \
|
||||
omap4-pandaES.dtb \
|
||||
omap4-var_som.dtb \
|
||||
omap4-panda-es.dtb \
|
||||
omap4-var-som.dtb \
|
||||
omap4-sdp.dtb \
|
||||
omap5-evm.dtb \
|
||||
am335x-evm.dtb \
|
||||
am335x-evmsk.dtb \
|
||||
am335x-bone.dtb
|
||||
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
|
||||
|
|
|
|||
|
|
@ -13,11 +13,31 @@
|
|||
model = "TI AM335x BeagleBone";
|
||||
compatible = "ti,am335x-bone", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
am33xx_pinmux: pinmux@44e10800 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_s0>;
|
||||
|
||||
user_leds_s0: user_leds_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
|
||||
0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */
|
||||
0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */
|
||||
0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
ocp {
|
||||
uart1: serial@44e09000 {
|
||||
status = "okay";
|
||||
|
|
@ -33,6 +53,36 @@
|
|||
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@2 {
|
||||
label = "beaglebone:green:heartbeat";
|
||||
gpios = <&gpio2 21 0>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "beaglebone:green:mmc0";
|
||||
gpios = <&gpio2 22 0>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@4 {
|
||||
label = "beaglebone:green:usr2";
|
||||
gpios = <&gpio2 23 0>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@5 {
|
||||
label = "beaglebone:green:usr3";
|
||||
gpios = <&gpio2 24 0>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "tps65217.dtsi"
|
||||
|
|
|
|||
|
|
@ -13,11 +13,39 @@
|
|||
model = "TI AM335x EVM";
|
||||
compatible = "ti,am335x-evm", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vdd1_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
am33xx_pinmux: pinmux@44e10800 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>;
|
||||
|
||||
matrix_keypad_s0: matrix_keypad_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */
|
||||
0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */
|
||||
0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */
|
||||
0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */
|
||||
0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */
|
||||
>;
|
||||
};
|
||||
|
||||
volume_keys_s0: volume_keys_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */
|
||||
0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
ocp {
|
||||
uart1: serial@44e09000 {
|
||||
status = "okay";
|
||||
|
|
@ -31,6 +59,49 @@
|
|||
reg = <0x2d>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c2: i2c@4802a000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
lis331dlh: lis331dlh@18 {
|
||||
compatible = "st,lis331dlh", "st,lis3lv02d";
|
||||
reg = <0x18>;
|
||||
Vdd-supply = <&lis3_reg>;
|
||||
Vdd_IO-supply = <&lis3_reg>;
|
||||
|
||||
st,click-single-x;
|
||||
st,click-single-y;
|
||||
st,click-single-z;
|
||||
st,click-thresh-x = <10>;
|
||||
st,click-thresh-y = <10>;
|
||||
st,click-thresh-z = <10>;
|
||||
st,irq1-click;
|
||||
st,irq2-click;
|
||||
st,wakeup-x-lo;
|
||||
st,wakeup-x-hi;
|
||||
st,wakeup-y-lo;
|
||||
st,wakeup-y-hi;
|
||||
st,wakeup-z-lo;
|
||||
st,wakeup-z-hi;
|
||||
st,min-limit-x = <120>;
|
||||
st,min-limit-y = <120>;
|
||||
st,min-limit-z = <140>;
|
||||
st,max-limit-x = <550>;
|
||||
st,max-limit-y = <550>;
|
||||
st,max-limit-z = <750>;
|
||||
};
|
||||
|
||||
tsl2550: tsl2550@39 {
|
||||
compatible = "taos,tsl2550";
|
||||
reg = <0x39>;
|
||||
};
|
||||
|
||||
tmp275: tmp275@48 {
|
||||
compatible = "ti,tmp275";
|
||||
reg = <0x48>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
|
|
@ -40,6 +111,53 @@
|
|||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lis3_reg: fixedregulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "lis3_reg";
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
col-scan-delay-us = <2>;
|
||||
|
||||
row-gpios = <&gpio2 25 0 /* Bank1, pin25 */
|
||||
&gpio2 26 0 /* Bank1, pin26 */
|
||||
&gpio2 27 0>; /* Bank1, pin27 */
|
||||
|
||||
col-gpios = <&gpio2 21 0 /* Bank1, pin21 */
|
||||
&gpio2 22 0>; /* Bank1, pin22 */
|
||||
|
||||
linux,keymap = <0x0000008b /* MENU */
|
||||
0x0100009e /* BACK */
|
||||
0x02000069 /* LEFT */
|
||||
0x0001006a /* RIGHT */
|
||||
0x0101001c /* ENTER */
|
||||
0x0201006c>; /* DOWN */
|
||||
};
|
||||
|
||||
gpio_keys: volume_keys@0 {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
autorepeat;
|
||||
|
||||
switch@9 {
|
||||
label = "volume-up";
|
||||
linux,code = <115>;
|
||||
gpios = <&gpio1 2 1>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
switch@10 {
|
||||
label = "volume-down";
|
||||
linux,code = <114>;
|
||||
gpios = <&gpio1 3 1>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "tps65910.dtsi"
|
||||
|
|
|
|||
|
|
@ -0,0 +1,250 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* AM335x Starter Kit
|
||||
* http://www.ti.com/tool/tmdssk3358
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "am33xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI AM335x EVM-SK";
|
||||
compatible = "ti,am335x-evmsk", "ti,am33xx";
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vdd1_reg>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
am33xx_pinmux: pinmux@44e10800 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>;
|
||||
|
||||
user_leds_s0: user_leds_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x10 0x7 /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */
|
||||
0x14 0x7 /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */
|
||||
0x18 0x7 /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */
|
||||
0x1c 0x7 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio_keys_s0: gpio_keys_s0 {
|
||||
pinctrl-single,pins = <
|
||||
0x94 0x27 /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */
|
||||
0x90 0x27 /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */
|
||||
0x70 0x27 /* gpmc_wait0.gpio0_30, INPUT | MODE7 */
|
||||
0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
ocp {
|
||||
uart1: serial@44e09000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c1: i2c@44e0b000 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps@2d {
|
||||
reg = <0x2d>;
|
||||
};
|
||||
|
||||
lis331dlh: lis331dlh@18 {
|
||||
compatible = "st,lis331dlh", "st,lis3lv02d";
|
||||
reg = <0x18>;
|
||||
Vdd-supply = <&lis3_reg>;
|
||||
Vdd_IO-supply = <&lis3_reg>;
|
||||
|
||||
st,click-single-x;
|
||||
st,click-single-y;
|
||||
st,click-single-z;
|
||||
st,click-thresh-x = <10>;
|
||||
st,click-thresh-y = <10>;
|
||||
st,click-thresh-z = <10>;
|
||||
st,irq1-click;
|
||||
st,irq2-click;
|
||||
st,wakeup-x-lo;
|
||||
st,wakeup-x-hi;
|
||||
st,wakeup-y-lo;
|
||||
st,wakeup-y-hi;
|
||||
st,wakeup-z-lo;
|
||||
st,wakeup-z-hi;
|
||||
st,min-limit-x = <120>;
|
||||
st,min-limit-y = <120>;
|
||||
st,min-limit-z = <140>;
|
||||
st,max-limit-x = <550>;
|
||||
st,max-limit-y = <550>;
|
||||
st,max-limit-z = <750>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vbat: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
lis3_reg: fixedregulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "lis3_reg";
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led@1 {
|
||||
label = "evmsk:green:usr0";
|
||||
gpios = <&gpio2 4 0>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@2 {
|
||||
label = "evmsk:green:usr1";
|
||||
gpios = <&gpio2 5 0>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@3 {
|
||||
label = "evmsk:green:mmc0";
|
||||
gpios = <&gpio2 6 0>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led@4 {
|
||||
label = "evmsk:green:heartbeat";
|
||||
gpios = <&gpio2 7 0>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_buttons: gpio_buttons@0 {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch@1 {
|
||||
label = "button0";
|
||||
linux,code = <0x100>;
|
||||
gpios = <&gpio3 3 0>;
|
||||
};
|
||||
|
||||
switch@2 {
|
||||
label = "button1";
|
||||
linux,code = <0x101>;
|
||||
gpios = <&gpio3 2 0>;
|
||||
};
|
||||
|
||||
switch@3 {
|
||||
label = "button2";
|
||||
linux,code = <0x102>;
|
||||
gpios = <&gpio1 30 0>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
switch@4 {
|
||||
label = "button3";
|
||||
linux,code = <0x103>;
|
||||
gpios = <&gpio3 5 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "tps65910.dtsi"
|
||||
|
||||
&tps {
|
||||
vcc1-supply = <&vbat>;
|
||||
vcc2-supply = <&vbat>;
|
||||
vcc3-supply = <&vbat>;
|
||||
vcc4-supply = <&vbat>;
|
||||
vcc5-supply = <&vbat>;
|
||||
vcc6-supply = <&vbat>;
|
||||
vcc7-supply = <&vbat>;
|
||||
vccio-supply = <&vbat>;
|
||||
|
||||
regulators {
|
||||
vrtc_reg: regulator@0 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vio_reg: regulator@1 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1312500>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@3 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <912500>;
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd3_reg: regulator@4 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig1_reg: regulator@5 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdig2_reg: regulator@6 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vpll_reg: regulator@7 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdac_reg: regulator@8 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux1_reg: regulator@9 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux2_reg: regulator@10 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux33_reg: regulator@11 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vmmc_reg: regulator@12 {
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
/ {
|
||||
compatible = "ti,am33xx";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
|
|
@ -25,6 +26,21 @@
|
|||
cpus {
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a8";
|
||||
|
||||
/*
|
||||
* To consider voltage drop between PMIC and SoC,
|
||||
* tolerance value is reduced to 2% from 4% and
|
||||
* voltage value is increased as a precaution.
|
||||
*/
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
720000 1285000
|
||||
600000 1225000
|
||||
500000 1125000
|
||||
275000 1125000
|
||||
>;
|
||||
voltage-tolerance = <2>; /* 2 percentage */
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -40,6 +56,15 @@
|
|||
};
|
||||
};
|
||||
|
||||
am33xx_pinmux: pinmux@44e10800 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x44e10800 0x0238>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0x7f>;
|
||||
};
|
||||
|
||||
/*
|
||||
* XXX: Use a flat representation of the AM33XX interconnect.
|
||||
* The real AM33XX interconnect network is quite complex.Since
|
||||
|
|
@ -70,7 +95,6 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x44e07000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <96>;
|
||||
};
|
||||
|
||||
|
|
@ -82,7 +106,6 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x4804c000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <98>;
|
||||
};
|
||||
|
||||
|
|
@ -94,7 +117,6 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x481ac000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <32>;
|
||||
};
|
||||
|
||||
|
|
@ -106,7 +128,6 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x481ae000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <62>;
|
||||
};
|
||||
|
||||
|
|
@ -115,7 +136,6 @@
|
|||
ti,hwmods = "uart1";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x44e09000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <72>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -125,7 +145,6 @@
|
|||
ti,hwmods = "uart2";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x48022000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <73>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -135,7 +154,6 @@
|
|||
ti,hwmods = "uart3";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x48024000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <74>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -145,7 +163,6 @@
|
|||
ti,hwmods = "uart4";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x481a6000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <44>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -155,7 +172,6 @@
|
|||
ti,hwmods = "uart5";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x481a8000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <45>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -165,7 +181,6 @@
|
|||
ti,hwmods = "uart6";
|
||||
clock-frequency = <48000000>;
|
||||
reg = <0x481aa000 0x2000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <46>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -176,7 +191,6 @@
|
|||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c1";
|
||||
reg = <0x44e0b000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <70>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -187,7 +201,6 @@
|
|||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c2";
|
||||
reg = <0x4802a000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <71>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -198,7 +211,6 @@
|
|||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c3";
|
||||
reg = <0x4819c000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <30>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -207,8 +219,124 @@
|
|||
compatible = "ti,omap3-wdt";
|
||||
ti,hwmods = "wd_timer2";
|
||||
reg = <0x44e35000 0x1000>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
dcan0: d_can@481cc000 {
|
||||
compatible = "bosch,d_can";
|
||||
ti,hwmods = "d_can0";
|
||||
reg = <0x481cc000 0x2000>;
|
||||
interrupts = <52>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dcan1: d_can@481d0000 {
|
||||
compatible = "bosch,d_can";
|
||||
ti,hwmods = "d_can1";
|
||||
reg = <0x481d0000 0x2000>;
|
||||
interrupts = <55>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer1: timer@44e31000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x44e31000 0x400>;
|
||||
interrupts = <67>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@48040000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48040000 0x400>;
|
||||
interrupts = <68>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48042000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48042000 0x400>;
|
||||
interrupts = <69>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@48044000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48044000 0x400>;
|
||||
interrupts = <92>;
|
||||
ti,hwmods = "timer4";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer5: timer@48046000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48046000 0x400>;
|
||||
interrupts = <93>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer6: timer@48048000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48048000 0x400>;
|
||||
interrupts = <94>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer7: timer@4804a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4804a000 0x400>;
|
||||
interrupts = <95>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
rtc@44e3e000 {
|
||||
compatible = "ti,da830-rtc";
|
||||
reg = <0x44e3e000 0x1000>;
|
||||
interrupts = <75
|
||||
76>;
|
||||
ti,hwmods = "rtc";
|
||||
};
|
||||
|
||||
spi0: spi@48030000 {
|
||||
compatible = "ti,omap4-mcspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x48030000 0x400>;
|
||||
interrupt = <65>;
|
||||
ti,spi-num-cs = <2>;
|
||||
ti,hwmods = "spi0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@481a0000 {
|
||||
compatible = "ti,omap4-mcspi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x481a0000 0x400>;
|
||||
interrupt = <125>;
|
||||
ti,spi-num-cs = <2>;
|
||||
ti,hwmods = "spi1";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@47400000 {
|
||||
compatible = "ti,musb-am33xx";
|
||||
reg = <0x47400000 0x1000 /* usbss */
|
||||
0x47401000 0x800 /* musb instance 0 */
|
||||
0x47401800 0x800>; /* musb instance 1 */
|
||||
interrupts = <17 /* usbss */
|
||||
18 /* musb instance 0 */
|
||||
19>; /* musb instance 1 */
|
||||
multipoint = <1>;
|
||||
num-eps = <16>;
|
||||
ram-bits = <12>;
|
||||
port0-mode = <3>;
|
||||
port1-mode = <3>;
|
||||
power = <250>;
|
||||
ti,hwmods = "usb_otg_hs";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -113,7 +113,7 @@
|
|||
i2c1: i2c@10012000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x10012000 0x1000>;
|
||||
interrupts = <12>;
|
||||
status = "disabled";
|
||||
|
|
@ -205,7 +205,7 @@
|
|||
i2c2: i2c@1001d000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x1001d000 0x1000>;
|
||||
interrupts = <1>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -377,7 +377,7 @@
|
|||
i2c@83fc4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x83fc4000 0x4000>;
|
||||
interrupts = <63>;
|
||||
status = "disabled";
|
||||
|
|
@ -386,7 +386,7 @@
|
|||
i2c@83fc8000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x83fc8000 0x4000>;
|
||||
interrupts = <62>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -432,7 +432,7 @@
|
|||
i2c@53fec000 { /* I2C3 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x53fec000 0x4000>;
|
||||
interrupts = <64>;
|
||||
status = "disabled";
|
||||
|
|
@ -488,7 +488,7 @@
|
|||
i2c@63fc4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x63fc4000 0x4000>;
|
||||
interrupts = <63>;
|
||||
status = "disabled";
|
||||
|
|
@ -497,7 +497,7 @@
|
|||
i2c@63fc8000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x63fc8000 0x4000>;
|
||||
interrupts = <62>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -882,7 +882,7 @@
|
|||
i2c@021a0000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a0000 0x4000>;
|
||||
interrupts = <0 36 0x04>;
|
||||
clocks = <&clks 125>;
|
||||
|
|
@ -892,7 +892,7 @@
|
|||
i2c@021a4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a4000 0x4000>;
|
||||
interrupts = <0 37 0x04>;
|
||||
clocks = <&clks 126>;
|
||||
|
|
@ -902,7 +902,7 @@
|
|||
i2c@021a8000 { /* I2C3 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a8000 0x4000>;
|
||||
interrupts = <0 38 0x04>;
|
||||
clocks = <&clks 127>;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,11 @@
|
|||
bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
|
||||
};
|
||||
|
||||
syscon {
|
||||
/* AP system controller registers */
|
||||
reg = <0x11000000 0x100>;
|
||||
};
|
||||
|
||||
timer0: timer@13000000 {
|
||||
compatible = "arm,integrator-timer";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,6 +18,11 @@
|
|||
bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
|
||||
};
|
||||
|
||||
cpcon {
|
||||
/* CP controller registers */
|
||||
reg = <0xcb000000 0x100>;
|
||||
};
|
||||
|
||||
timer0: timer@13000000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
/ {
|
||||
compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
|
|
@ -65,5 +66,90 @@
|
|||
ti,hwmods = "uart3";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
timer2: timer@4802a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4802a000 0x400>;
|
||||
interrupts = <38>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48078000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48078000 0x400>;
|
||||
interrupts = <39>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@4807a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4807a000 0x400>;
|
||||
interrupts = <40>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@4807c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4807c000 0x400>;
|
||||
interrupts = <41>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4807e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4807e000 0x400>;
|
||||
interrupts = <42>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer7: timer@48080000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48080000 0x400>;
|
||||
interrupts = <43>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@48082000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48082000 0x400>;
|
||||
interrupts = <44>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer9: timer@48084000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48084000 0x400>;
|
||||
interrupts = <45>;
|
||||
ti,hwmods = "timer9";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x400>;
|
||||
interrupts = <46>;
|
||||
ti,hwmods = "timer10";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x400>;
|
||||
interrupts = <47>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer12: timer@4808a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4808a000 0x400>;
|
||||
interrupts = <48>;
|
||||
ti,hwmods = "timer12";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -14,6 +14,12 @@
|
|||
compatible = "ti,omap2420", "ti,omap2";
|
||||
|
||||
ocp {
|
||||
counter32k: counter@48004000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x48004000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap2420_pmx: pinmux@48000030 {
|
||||
compatible = "ti,omap2420-padconf", "pinctrl-single";
|
||||
reg = <0x48000030 0x0113>;
|
||||
|
|
@ -30,7 +36,6 @@
|
|||
interrupts = <59>, /* TX interrupt */
|
||||
<60>; /* RX interrupt */
|
||||
interrupt-names = "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
|
||||
|
|
@ -41,8 +46,15 @@
|
|||
interrupts = <62>, /* TX interrupt */
|
||||
<63>; /* RX interrupt */
|
||||
interrupt-names = "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
|
||||
timer1: timer@48028000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48028000 0x400>;
|
||||
interrupts = <37>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -14,6 +14,12 @@
|
|||
compatible = "ti,omap2430", "ti,omap2";
|
||||
|
||||
ocp {
|
||||
counter32k: counter@49020000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x49020000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap2430_pmx: pinmux@49002030 {
|
||||
compatible = "ti,omap2430-padconf", "pinctrl-single";
|
||||
reg = <0x49002030 0x0154>;
|
||||
|
|
@ -32,7 +38,6 @@
|
|||
<60>, /* RX interrupt */
|
||||
<61>; /* RX overflow interrupt */
|
||||
interrupt-names = "common", "tx", "rx", "rx_overflow";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
|
|
@ -45,7 +50,6 @@
|
|||
<62>, /* TX interrupt */
|
||||
<63>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
|
|
@ -58,7 +62,6 @@
|
|||
<89>, /* TX interrupt */
|
||||
<90>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3";
|
||||
};
|
||||
|
|
@ -71,7 +74,6 @@
|
|||
<54>, /* TX interrupt */
|
||||
<55>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp4";
|
||||
};
|
||||
|
|
@ -84,9 +86,16 @@
|
|||
<81>, /* TX interrupt */
|
||||
<82>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp5";
|
||||
};
|
||||
|
||||
timer1: timer@49018000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49018000 0x400>;
|
||||
interrupts = <37>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -55,12 +55,6 @@
|
|||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
vsim: regulator-vsim {
|
||||
compatible = "ti,twl4030-vsim";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,67 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "omap3.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI OMAP3 BeagleBoard";
|
||||
compatible = "ti,omap3-beagle", "ti,omap3";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pmu_stat {
|
||||
label = "beagleboard::pmu_stat";
|
||||
gpios = <&twl_gpio 19 0>; /* LEDB */
|
||||
};
|
||||
|
||||
heartbeat {
|
||||
label = "beagleboard::usr0";
|
||||
gpios = <&gpio5 22 0>; /* 150 -> D6 LED */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
|
||||
mmc {
|
||||
label = "beagleboard::usr1";
|
||||
gpios = <&gpio5 21 0>; /* 149 -> D7 LED */
|
||||
linux,default-trigger = "mmc0";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "twl4030.dtsi"
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
/ {
|
||||
compatible = "ti,omap3430", "ti,omap3";
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
|
|
@ -60,6 +61,12 @@
|
|||
ranges;
|
||||
ti,hwmods = "l3_main";
|
||||
|
||||
counter32k: counter@48320000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x48320000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
intc: interrupt-controller@48200000 {
|
||||
compatible = "ti,omap2-intc";
|
||||
interrupt-controller;
|
||||
|
|
@ -240,7 +247,6 @@
|
|||
<59>, /* TX interrupt */
|
||||
<60>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
|
|
@ -255,7 +261,6 @@
|
|||
<63>, /* RX interrupt */
|
||||
<4>; /* Sidetone */
|
||||
interrupt-names = "common", "tx", "rx", "sidetone";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <1280>;
|
||||
ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
|
||||
};
|
||||
|
|
@ -270,7 +275,6 @@
|
|||
<90>, /* RX interrupt */
|
||||
<5>; /* Sidetone */
|
||||
interrupt-names = "common", "tx", "rx", "sidetone";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
|
||||
};
|
||||
|
|
@ -283,7 +287,6 @@
|
|||
<54>, /* TX interrupt */
|
||||
<55>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp4";
|
||||
};
|
||||
|
|
@ -296,9 +299,103 @@
|
|||
<81>, /* TX interrupt */
|
||||
<82>; /* RX interrupt */
|
||||
interrupt-names = "common", "tx", "rx";
|
||||
interrupt-parent = <&intc>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp5";
|
||||
};
|
||||
|
||||
timer1: timer@48318000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48318000 0x400>;
|
||||
interrupts = <37>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@49032000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49032000 0x400>;
|
||||
interrupts = <38>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@49034000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49034000 0x400>;
|
||||
interrupts = <39>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@49036000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49036000 0x400>;
|
||||
interrupts = <40>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@49038000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49038000 0x400>;
|
||||
interrupts = <41>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4903a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4903a000 0x400>;
|
||||
interrupts = <42>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer7: timer@4903c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4903c000 0x400>;
|
||||
interrupts = <43>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@4903e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4903e000 0x400>;
|
||||
interrupts = <44>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-pwm;
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer9: timer@49040000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x49040000 0x400>;
|
||||
interrupts = <45>;
|
||||
ti,hwmods = "timer9";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x400>;
|
||||
interrupts = <46>;
|
||||
ti,hwmods = "timer10";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x400>;
|
||||
interrupts = <47>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer12: timer@48304000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48304000 0x400>;
|
||||
interrupts = <95>;
|
||||
ti,hwmods = "timer12";
|
||||
ti,timer-alwon;
|
||||
ti,timer-secure;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/include/ "omap4-panda.dts"
|
||||
|
||||
/* Pandaboard Rev A4+ have external pullups on SCL & SDA */
|
||||
&dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
|
||||
0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
|
||||
0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
|
||||
>;
|
||||
};
|
||||
|
|
@ -22,3 +22,12 @@
|
|||
"AFML", "Line In",
|
||||
"AFMR", "Line In";
|
||||
};
|
||||
|
||||
/* PandaboardES has external pullups on SCL & SDA */
|
||||
&dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
|
||||
0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
|
||||
0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
|
||||
>;
|
||||
};
|
||||
|
|
@ -65,6 +65,8 @@
|
|||
&twl6040_pins
|
||||
&mcpdm_pins
|
||||
&mcbsp1_pins
|
||||
&dss_hdmi_pins
|
||||
&tpd12s015_pins
|
||||
>;
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
|
|
@ -92,6 +94,22 @@
|
|||
0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
|
||||
0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
|
||||
0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
|
||||
0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
|
||||
0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
@ -184,3 +202,7 @@
|
|||
&dmic {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&twl_usb_comparator {
|
||||
usb-supply = <&vusb>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/include/ "omap4-sdp.dts"
|
||||
|
||||
/* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */
|
||||
&dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
|
||||
0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */
|
||||
0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */
|
||||
>;
|
||||
};
|
||||
|
|
@ -124,6 +124,8 @@
|
|||
&dmic_pins
|
||||
&mcbsp1_pins
|
||||
&mcbsp2_pins
|
||||
&dss_hdmi_pins
|
||||
&tpd12s015_pins
|
||||
>;
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
|
|
@ -194,6 +196,22 @@
|
|||
0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_hdmi_pins: pinmux_dss_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
|
||||
0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */
|
||||
0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */
|
||||
0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */
|
||||
0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
@ -406,3 +424,7 @@
|
|||
&mcbsp3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&twl_usb_comparator {
|
||||
usb-supply = <&vusb>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -95,6 +95,12 @@
|
|||
ranges;
|
||||
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
|
||||
|
||||
counter32k: counter@4a304000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x4a304000 0x20>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap4_pmx_core: pinmux@4a100040 {
|
||||
compatible = "ti,omap4-padconf", "pinctrl-single";
|
||||
reg = <0x4a100040 0x0196>;
|
||||
|
|
@ -340,7 +346,6 @@
|
|||
<0x49032000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 112 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "mcpdm";
|
||||
};
|
||||
|
||||
|
|
@ -350,7 +355,6 @@
|
|||
<0x4902e000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 114 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "dmic";
|
||||
};
|
||||
|
||||
|
|
@ -361,7 +365,6 @@
|
|||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 17 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
|
|
@ -373,7 +376,6 @@
|
|||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 22 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
|
|
@ -385,7 +387,6 @@
|
|||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 23 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3";
|
||||
};
|
||||
|
|
@ -396,7 +397,6 @@
|
|||
reg-names = "mpu";
|
||||
interrupts = <0 16 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp4";
|
||||
};
|
||||
|
|
@ -431,12 +431,103 @@
|
|||
hw-caps-temp-alert;
|
||||
};
|
||||
|
||||
ocp2scp {
|
||||
ocp2scp@4a0ad000 {
|
||||
compatible = "ti,omap-ocp2scp";
|
||||
reg = <0x4a0ad000 0x1f>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "ocp2scp_usb_phy";
|
||||
};
|
||||
|
||||
timer1: timer@4a318000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4a318000 0x80>;
|
||||
interrupts = <0 37 0x4>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@48032000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48032000 0x80>;
|
||||
interrupts = <0 38 0x4>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48034000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48034000 0x80>;
|
||||
interrupts = <0 39 0x4>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@48036000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48036000 0x80>;
|
||||
interrupts = <0 40 0x4>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@40138000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x40138000 0x80>,
|
||||
<0x49038000 0x80>;
|
||||
interrupts = <0 41 0x4>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4013a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013a000 0x80>,
|
||||
<0x4903a000 0x80>;
|
||||
interrupts = <0 42 0x4>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer7: timer@4013c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013c000 0x80>,
|
||||
<0x4903c000 0x80>;
|
||||
interrupts = <0 43 0x4>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@4013e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013e000 0x80>,
|
||||
<0x4903e000 0x80>;
|
||||
interrupts = <0 44 0x4>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-pwm;
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer9: timer@4803e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4803e000 0x80>;
|
||||
interrupts = <0 45 0x4>;
|
||||
ti,hwmods = "timer9";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x80>;
|
||||
interrupts = <0 46 0x4>;
|
||||
ti,hwmods = "timer10";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x80>;
|
||||
interrupts = <0 47 0x4>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
/dts-v1/;
|
||||
|
||||
/include/ "omap5.dtsi"
|
||||
/include/ "samsung_k3pe0e000b.dtsi"
|
||||
|
||||
/ {
|
||||
model = "TI OMAP5 EVM board";
|
||||
|
|
@ -15,7 +16,7 @@
|
|||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
reg = <0x80000000 0x80000000>; /* 2 GB */
|
||||
};
|
||||
|
||||
vmmcsd_fixed: fixedregulator-mmcsd {
|
||||
|
|
@ -140,3 +141,13 @@
|
|||
&mcbsp3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&emif1 {
|
||||
cs1-used;
|
||||
device-handle = <&samsung_K3PE0E000B>;
|
||||
};
|
||||
|
||||
&emif2 {
|
||||
cs1-used;
|
||||
device-handle = <&samsung_K3PE0E000B>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -77,6 +77,12 @@
|
|||
ranges;
|
||||
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
|
||||
|
||||
counter32k: counter@4ae04000 {
|
||||
compatible = "ti,omap-counter32k";
|
||||
reg = <0x4ae04000 0x40>;
|
||||
ti,hwmods = "counter_32k";
|
||||
};
|
||||
|
||||
omap5_pmx_core: pinmux@4a002840 {
|
||||
compatible = "ti,omap4-padconf", "pinctrl-single";
|
||||
reg = <0x4a002840 0x01b6>;
|
||||
|
|
@ -104,6 +110,8 @@
|
|||
|
||||
gpio1: gpio@4ae10000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x4ae10000 0x200>;
|
||||
interrupts = <0 29 0x4>;
|
||||
ti,hwmods = "gpio1";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -113,6 +121,8 @@
|
|||
|
||||
gpio2: gpio@48055000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48055000 0x200>;
|
||||
interrupts = <0 30 0x4>;
|
||||
ti,hwmods = "gpio2";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -122,6 +132,8 @@
|
|||
|
||||
gpio3: gpio@48057000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48057000 0x200>;
|
||||
interrupts = <0 31 0x4>;
|
||||
ti,hwmods = "gpio3";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -131,6 +143,8 @@
|
|||
|
||||
gpio4: gpio@48059000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48059000 0x200>;
|
||||
interrupts = <0 32 0x4>;
|
||||
ti,hwmods = "gpio4";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -140,6 +154,8 @@
|
|||
|
||||
gpio5: gpio@4805b000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x4805b000 0x200>;
|
||||
interrupts = <0 33 0x4>;
|
||||
ti,hwmods = "gpio5";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -149,6 +165,8 @@
|
|||
|
||||
gpio6: gpio@4805d000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x4805d000 0x200>;
|
||||
interrupts = <0 34 0x4>;
|
||||
ti,hwmods = "gpio6";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -158,6 +176,8 @@
|
|||
|
||||
gpio7: gpio@48051000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48051000 0x200>;
|
||||
interrupts = <0 35 0x4>;
|
||||
ti,hwmods = "gpio7";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -167,6 +187,8 @@
|
|||
|
||||
gpio8: gpio@48053000 {
|
||||
compatible = "ti,omap4-gpio";
|
||||
reg = <0x48053000 0x200>;
|
||||
interrupts = <0 121 0x4>;
|
||||
ti,hwmods = "gpio8";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
|
@ -176,6 +198,8 @@
|
|||
|
||||
i2c1: i2c@48070000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x48070000 0x100>;
|
||||
interrupts = <0 56 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c1";
|
||||
|
|
@ -183,6 +207,8 @@
|
|||
|
||||
i2c2: i2c@48072000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x48072000 0x100>;
|
||||
interrupts = <0 57 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c2";
|
||||
|
|
@ -190,20 +216,26 @@
|
|||
|
||||
i2c3: i2c@48060000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x48060000 0x100>;
|
||||
interrupts = <0 61 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c3";
|
||||
};
|
||||
|
||||
i2c4: i2c@4807A000 {
|
||||
i2c4: i2c@4807a000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x4807a000 0x100>;
|
||||
interrupts = <0 62 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c4";
|
||||
};
|
||||
|
||||
i2c5: i2c@4807C000 {
|
||||
i2c5: i2c@4807c000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x4807c000 0x100>;
|
||||
interrupts = <0 60 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c5";
|
||||
|
|
@ -211,42 +243,56 @@
|
|||
|
||||
uart1: serial@4806a000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x4806a000 0x100>;
|
||||
interrupts = <0 72 0x4>;
|
||||
ti,hwmods = "uart1";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart2: serial@4806c000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x4806c000 0x100>;
|
||||
interrupts = <0 73 0x4>;
|
||||
ti,hwmods = "uart2";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart3: serial@48020000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x48020000 0x100>;
|
||||
interrupts = <0 74 0x4>;
|
||||
ti,hwmods = "uart3";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart4: serial@4806e000 {
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x4806e000 0x100>;
|
||||
interrupts = <0 70 0x4>;
|
||||
ti,hwmods = "uart4";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart5: serial@48066000 {
|
||||
compatible = "ti,omap5-uart";
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x48066000 0x100>;
|
||||
interrupts = <0 105 0x4>;
|
||||
ti,hwmods = "uart5";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart6: serial@48068000 {
|
||||
compatible = "ti,omap6-uart";
|
||||
compatible = "ti,omap4-uart";
|
||||
reg = <0x48068000 0x100>;
|
||||
interrupts = <0 106 0x4>;
|
||||
ti,hwmods = "uart6";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
mmc1: mmc@4809c000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x4809c000 0x400>;
|
||||
interrupts = <0 83 0x4>;
|
||||
ti,hwmods = "mmc1";
|
||||
ti,dual-volt;
|
||||
ti,needs-special-reset;
|
||||
|
|
@ -254,24 +300,32 @@
|
|||
|
||||
mmc2: mmc@480b4000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480b4000 0x400>;
|
||||
interrupts = <0 86 0x4>;
|
||||
ti,hwmods = "mmc2";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
|
||||
mmc3: mmc@480ad000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480ad000 0x400>;
|
||||
interrupts = <0 94 0x4>;
|
||||
ti,hwmods = "mmc3";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
|
||||
mmc4: mmc@480d1000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480d1000 0x400>;
|
||||
interrupts = <0 96 0x4>;
|
||||
ti,hwmods = "mmc4";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
|
||||
mmc5: mmc@480d5000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x480d5000 0x400>;
|
||||
interrupts = <0 59 0x4>;
|
||||
ti,hwmods = "mmc5";
|
||||
ti,needs-special-reset;
|
||||
};
|
||||
|
|
@ -287,7 +341,6 @@
|
|||
<0x49032000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 112 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "mcpdm";
|
||||
};
|
||||
|
||||
|
|
@ -297,7 +350,6 @@
|
|||
<0x4902e000 0x7f>; /* L3 Interconnect */
|
||||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 114 0x4>;
|
||||
interrupt-parent = <&gic>;
|
||||
ti,hwmods = "dmic";
|
||||
};
|
||||
|
||||
|
|
@ -308,7 +360,6 @@
|
|||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 17 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp1";
|
||||
};
|
||||
|
|
@ -320,7 +371,6 @@
|
|||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 22 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp2";
|
||||
};
|
||||
|
|
@ -332,9 +382,119 @@
|
|||
reg-names = "mpu", "dma";
|
||||
interrupts = <0 23 0x4>;
|
||||
interrupt-names = "common";
|
||||
interrupt-parent = <&gic>;
|
||||
ti,buffer-size = <128>;
|
||||
ti,hwmods = "mcbsp3";
|
||||
};
|
||||
|
||||
timer1: timer@4ae18000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4ae18000 0x80>;
|
||||
interrupts = <0 37 0x4>;
|
||||
ti,hwmods = "timer1";
|
||||
ti,timer-alwon;
|
||||
};
|
||||
|
||||
timer2: timer@48032000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48032000 0x80>;
|
||||
interrupts = <0 38 0x4>;
|
||||
ti,hwmods = "timer2";
|
||||
};
|
||||
|
||||
timer3: timer@48034000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48034000 0x80>;
|
||||
interrupts = <0 39 0x4>;
|
||||
ti,hwmods = "timer3";
|
||||
};
|
||||
|
||||
timer4: timer@48036000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48036000 0x80>;
|
||||
interrupts = <0 40 0x4>;
|
||||
ti,hwmods = "timer4";
|
||||
};
|
||||
|
||||
timer5: timer@40138000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x40138000 0x80>,
|
||||
<0x49038000 0x80>;
|
||||
interrupts = <0 41 0x4>;
|
||||
ti,hwmods = "timer5";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer6: timer@4013a000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013a000 0x80>,
|
||||
<0x4903a000 0x80>;
|
||||
interrupts = <0 42 0x4>;
|
||||
ti,hwmods = "timer6";
|
||||
ti,timer-dsp;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer7: timer@4013c000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013c000 0x80>,
|
||||
<0x4903c000 0x80>;
|
||||
interrupts = <0 43 0x4>;
|
||||
ti,hwmods = "timer7";
|
||||
ti,timer-dsp;
|
||||
};
|
||||
|
||||
timer8: timer@4013e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4013e000 0x80>,
|
||||
<0x4903e000 0x80>;
|
||||
interrupts = <0 44 0x4>;
|
||||
ti,hwmods = "timer8";
|
||||
ti,timer-dsp;
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
timer9: timer@4803e000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x4803e000 0x80>;
|
||||
interrupts = <0 45 0x4>;
|
||||
ti,hwmods = "timer9";
|
||||
};
|
||||
|
||||
timer10: timer@48086000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48086000 0x80>;
|
||||
interrupts = <0 46 0x4>;
|
||||
ti,hwmods = "timer10";
|
||||
};
|
||||
|
||||
timer11: timer@48088000 {
|
||||
compatible = "ti,omap2-timer";
|
||||
reg = <0x48088000 0x80>;
|
||||
interrupts = <0 47 0x4>;
|
||||
ti,hwmods = "timer11";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
emif1: emif@0x4c000000 {
|
||||
compatible = "ti,emif-4d5";
|
||||
ti,hwmods = "emif1";
|
||||
phy-type = <2>; /* DDR PHY type: Intelli PHY */
|
||||
reg = <0x4c000000 0x400>;
|
||||
interrupts = <0 110 0x4>;
|
||||
hw-caps-read-idle-ctrl;
|
||||
hw-caps-ll-interface;
|
||||
hw-caps-temp-alert;
|
||||
};
|
||||
|
||||
emif2: emif@0x4d000000 {
|
||||
compatible = "ti,emif-4d5";
|
||||
ti,hwmods = "emif2";
|
||||
phy-type = <2>; /* DDR PHY type: Intelli PHY */
|
||||
reg = <0x4d000000 0x400>;
|
||||
interrupts = <0 111 0x4>;
|
||||
hw-caps-read-idle-ctrl;
|
||||
hw-caps-ll-interface;
|
||||
hw-caps-temp-alert;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,67 @@
|
|||
/*
|
||||
* Timings and Geometry for Samsung K3PE0E000B memory part
|
||||
*/
|
||||
|
||||
/ {
|
||||
samsung_K3PE0E000B: lpddr2 {
|
||||
compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4";
|
||||
density = <4096>;
|
||||
io-width = <32>;
|
||||
|
||||
tRPab-min-tck = <3>;
|
||||
tRCD-min-tck = <3>;
|
||||
tWR-min-tck = <3>;
|
||||
tRASmin-min-tck = <3>;
|
||||
tRRD-min-tck = <2>;
|
||||
tWTR-min-tck = <2>;
|
||||
tXP-min-tck = <2>;
|
||||
tRTP-min-tck = <2>;
|
||||
tCKE-min-tck = <3>;
|
||||
tCKESR-min-tck = <3>;
|
||||
tFAW-min-tck = <8>;
|
||||
|
||||
timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 {
|
||||
compatible = "jedec,lpddr2-timings";
|
||||
min-freq = <10000000>;
|
||||
max-freq = <533333333>;
|
||||
tRPab = <21000>;
|
||||
tRCD = <18000>;
|
||||
tWR = <15000>;
|
||||
tRAS-min = <42000>;
|
||||
tRRD = <10000>;
|
||||
tWTR = <7500>;
|
||||
tXP = <7500>;
|
||||
tRTP = <7500>;
|
||||
tCKESR = <15000>;
|
||||
tDQSCK-max = <5500>;
|
||||
tFAW = <50000>;
|
||||
tZQCS = <90000>;
|
||||
tZQCL = <360000>;
|
||||
tZQinit = <1000000>;
|
||||
tRAS-max-ns = <70000>;
|
||||
tDQSCK-max-derated = <6000>;
|
||||
};
|
||||
|
||||
timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 {
|
||||
compatible = "jedec,lpddr2-timings";
|
||||
min-freq = <10000000>;
|
||||
max-freq = <266666666>;
|
||||
tRPab = <21000>;
|
||||
tRCD = <18000>;
|
||||
tWR = <15000>;
|
||||
tRAS-min = <42000>;
|
||||
tRRD = <10000>;
|
||||
tWTR = <7500>;
|
||||
tXP = <7500>;
|
||||
tRTP = <7500>;
|
||||
tCKESR = <15000>;
|
||||
tDQSCK-max = <5500>;
|
||||
tFAW = <50000>;
|
||||
tZQCS = <90000>;
|
||||
tZQCL = <360000>;
|
||||
tZQinit = <1000000>;
|
||||
tRAS-max-ns = <70000>;
|
||||
tDQSCK-max-derated = <6000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -297,131 +297,98 @@
|
|||
vinldo9-supply = <&sm2_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sys_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "sys";
|
||||
sys_reg: sys {
|
||||
regulator-name = "vdd_sys";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sm0";
|
||||
sm0 {
|
||||
regulator-name = "vdd_sm0,vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sm1";
|
||||
sm1 {
|
||||
regulator-name = "vdd_sm1,vdd_cpu";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm2_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "sm2";
|
||||
sm2_reg: sm2 {
|
||||
regulator-name = "vdd_sm2,vin_ldo*";
|
||||
regulator-min-microvolt = <3700000>;
|
||||
regulator-max-microvolt = <3700000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo0";
|
||||
ldo0 {
|
||||
regulator-name = "vdd_ldo0,vddio_pex_clk";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo1";
|
||||
ldo1 {
|
||||
regulator-name = "vdd_ldo1,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo2";
|
||||
ldo2 {
|
||||
regulator-name = "vdd_ldo2,vdd_rtc";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo3";
|
||||
ldo3 {
|
||||
regulator-name = "vdd_ldo3,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo4";
|
||||
ldo4 {
|
||||
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo5";
|
||||
ldo5 {
|
||||
regulator-name = "vdd_ldo5,vcore_mmc";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo6";
|
||||
ldo6 {
|
||||
regulator-name = "vdd_ldo6,avdd_vdac";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo7";
|
||||
ldo7 {
|
||||
regulator-name = "vdd_ldo7,avdd_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo8";
|
||||
ldo8 {
|
||||
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "ldo9";
|
||||
ldo9 {
|
||||
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@14 {
|
||||
reg = <14>;
|
||||
regulator-compatible = "ldo_rtc";
|
||||
ldo_rtc {
|
||||
regulator-name = "vdd_rtc_out,vdd_cell";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
|
|
|||
|
|
@ -291,37 +291,26 @@
|
|||
vinldo9-supply = <&sm2_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sys_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "sys";
|
||||
sys_reg: sys {
|
||||
regulator-name = "vdd_sys";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sm0";
|
||||
sm0 {
|
||||
regulator-name = "+1.2vs_sm0,vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sm1";
|
||||
sm1 {
|
||||
regulator-name = "+1.0vs_sm1,vdd_cpu";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm2_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "sm2";
|
||||
sm2_reg: sm2 {
|
||||
regulator-name = "+3.7vs_sm2,vin_ldo*";
|
||||
regulator-min-microvolt = <3700000>;
|
||||
regulator-max-microvolt = <3700000>;
|
||||
|
|
@ -330,53 +319,41 @@
|
|||
|
||||
/* LDO0 is not connected to anything */
|
||||
|
||||
regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo1";
|
||||
ldo1 {
|
||||
regulator-name = "+1.1vs_ldo1,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo2";
|
||||
ldo2 {
|
||||
regulator-name = "+1.2vs_ldo2,vdd_rtc";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo3";
|
||||
ldo3 {
|
||||
regulator-name = "+3.3vs_ldo3,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo4";
|
||||
ldo4 {
|
||||
regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo5";
|
||||
ldo5 {
|
||||
regulator-name = "+2.85vs_ldo5,vcore_mmc";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo6";
|
||||
ldo6 {
|
||||
/*
|
||||
* Research indicates this should be
|
||||
* 1.8v; other boards that use this
|
||||
|
|
@ -390,34 +367,26 @@
|
|||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo7";
|
||||
ldo7 {
|
||||
regulator-name = "+3.3vs_ldo7,avdd_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo8";
|
||||
ldo8 {
|
||||
regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "ldo9";
|
||||
ldo9 {
|
||||
regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@14 {
|
||||
reg = <14>;
|
||||
regulator-compatible = "ldo_rtc";
|
||||
ldo_rtc {
|
||||
regulator-name = "+3.3vs_rtc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
|
|
|||
|
|
@ -395,37 +395,26 @@
|
|||
vinldo9-supply = <&sm2_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sys_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "sys";
|
||||
sys_reg: sys {
|
||||
regulator-name = "vdd_sys";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sm0";
|
||||
sm0 {
|
||||
regulator-name = "vdd_sm0,vdd_core";
|
||||
regulator-min-microvolt = <1300000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sm1";
|
||||
sm1 {
|
||||
regulator-name = "vdd_sm1,vdd_cpu";
|
||||
regulator-min-microvolt = <1125000>;
|
||||
regulator-max-microvolt = <1125000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm2_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "sm2";
|
||||
sm2_reg: sm2 {
|
||||
regulator-name = "vdd_sm2,vin_ldo*";
|
||||
regulator-min-microvolt = <3700000>;
|
||||
regulator-max-microvolt = <3700000>;
|
||||
|
|
@ -434,86 +423,66 @@
|
|||
|
||||
/* LDO0 is not connected to anything */
|
||||
|
||||
regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo1";
|
||||
ldo1 {
|
||||
regulator-name = "vdd_ldo1,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo2";
|
||||
ldo2 {
|
||||
regulator-name = "vdd_ldo2,vdd_rtc";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo3";
|
||||
ldo3 {
|
||||
regulator-name = "vdd_ldo3,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo4";
|
||||
ldo4 {
|
||||
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo5";
|
||||
ldo5 {
|
||||
regulator-name = "vdd_ldo5,vcore_mmc";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo6";
|
||||
ldo6 {
|
||||
regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo7";
|
||||
ldo7 {
|
||||
regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo8";
|
||||
ldo8 {
|
||||
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "ldo9";
|
||||
ldo9 {
|
||||
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@14 {
|
||||
reg = <14>;
|
||||
regulator-compatible = "ldo_rtc";
|
||||
ldo_rtc {
|
||||
regulator-name = "vdd_rtc_out,vdd_cell";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
|
|
|||
|
|
@ -271,97 +271,72 @@
|
|||
vinldo9-supply = <&sm2_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sys_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "sys";
|
||||
sys_reg: sys {
|
||||
regulator-name = "vdd_sys";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sm0";
|
||||
sm0 {
|
||||
regulator-name = "vdd_sys_sm0,vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sm1";
|
||||
sm1 {
|
||||
regulator-name = "vdd_sys_sm1,vdd_cpu";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm2_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "sm2";
|
||||
sm2_reg: sm2 {
|
||||
regulator-name = "vdd_sys_sm2,vin_ldo*";
|
||||
regulator-min-microvolt = <3700000>;
|
||||
regulator-max-microvolt = <3700000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo0";
|
||||
ldo0 {
|
||||
regulator-name = "vdd_ldo0,vddio_pex_clk";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo1";
|
||||
ldo1 {
|
||||
regulator-name = "vdd_ldo1,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo2";
|
||||
ldo2 {
|
||||
regulator-name = "vdd_ldo2,vdd_rtc";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo3";
|
||||
ldo3 {
|
||||
regulator-name = "vdd_ldo3,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo4";
|
||||
ldo4 {
|
||||
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo5";
|
||||
ldo5 {
|
||||
regulator-name = "vdd_ldo5,vcore_mmc";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
};
|
||||
|
||||
regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo6";
|
||||
ldo6 {
|
||||
regulator-name = "vdd_ldo6,avdd_vdac";
|
||||
/*
|
||||
* According to the Tegra 2 Automotive
|
||||
|
|
@ -373,25 +348,19 @@
|
|||
regulator-max-microvolt = <2850000>;
|
||||
};
|
||||
|
||||
regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo7";
|
||||
ldo7 {
|
||||
regulator-name = "vdd_ldo7,avdd_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo8";
|
||||
ldo8 {
|
||||
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "ldo9";
|
||||
ldo9 {
|
||||
regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
|
||||
/*
|
||||
* According to the Tegra 2 Automotive
|
||||
|
|
@ -404,9 +373,7 @@
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@14 {
|
||||
reg = <14>;
|
||||
regulator-compatible = "ldo_rtc";
|
||||
ldo_rtc {
|
||||
regulator-name = "vdd_rtc_out";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
|
|
|||
|
|
@ -311,37 +311,26 @@
|
|||
vinldo9-supply = <&sm2_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sys_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "sys";
|
||||
sys_reg: sys {
|
||||
regulator-name = "vdd_sys";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sm0";
|
||||
sm0 {
|
||||
regulator-name = "vdd_sm0,vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sm1";
|
||||
sm1 {
|
||||
regulator-name = "vdd_sm1,vdd_cpu";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sm2_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "sm2";
|
||||
sm2_reg: sm2 {
|
||||
regulator-name = "vdd_sm2,vin_ldo*";
|
||||
regulator-min-microvolt = <3700000>;
|
||||
regulator-max-microvolt = <3700000>;
|
||||
|
|
@ -350,86 +339,66 @@
|
|||
|
||||
/* LDO0 is not connected to anything */
|
||||
|
||||
regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo1";
|
||||
ldo1 {
|
||||
regulator-name = "vdd_ldo1,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo2";
|
||||
ldo2 {
|
||||
regulator-name = "vdd_ldo2,vdd_rtc";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo3";
|
||||
ldo3 {
|
||||
regulator-name = "vdd_ldo3,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo4";
|
||||
ldo4 {
|
||||
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo5";
|
||||
ldo5 {
|
||||
regulator-name = "vdd_ldo5,vcore_mmc";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo6";
|
||||
ldo6 {
|
||||
regulator-name = "vdd_ldo6,avdd_vdac";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo7";
|
||||
ldo7 {
|
||||
regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo8";
|
||||
ldo8 {
|
||||
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "ldo9";
|
||||
ldo9 {
|
||||
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
||||
regulator-min-microvolt = <2850000>;
|
||||
regulator-max-microvolt = <2850000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@14 {
|
||||
reg = <14>;
|
||||
regulator-compatible = "ldo_rtc";
|
||||
ldo_rtc {
|
||||
regulator-name = "vdd_rtc_out,vdd_cell";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
|
|
|
|||
|
|
@ -295,243 +295,182 @@
|
|||
in20-supply = <&mbatt_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mbatt_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "mbatt";
|
||||
mbatt_reg: mbatt {
|
||||
regulator-name = "vbat_pmu";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "sd1";
|
||||
sd1 {
|
||||
regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "sd2";
|
||||
sd2 {
|
||||
regulator-name = "nvvdd_sv2,vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
nvvdd_sv3_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "sd3";
|
||||
nvvdd_sv3_reg: sd3 {
|
||||
regulator-name = "nvvdd_sv3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo1";
|
||||
ldo1 {
|
||||
regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo2";
|
||||
ldo2 {
|
||||
regulator-name = "nvvdd_ldo2,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@6 {
|
||||
reg = <6>;
|
||||
regulator-compatible = "ldo3";
|
||||
ldo3 {
|
||||
regulator-name = "nvvdd_ldo3,vcom_1v8b";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo4";
|
||||
ldo4 {
|
||||
regulator-name = "nvvdd_ldo4,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo5";
|
||||
ldo5 {
|
||||
regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo6";
|
||||
ldo6 {
|
||||
regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo7";
|
||||
ldo7 {
|
||||
regulator-name = "nvvdd_ldo7,avddio_audio";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo8";
|
||||
ldo8 {
|
||||
regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
regulator@12 {
|
||||
reg = <12>;
|
||||
regulator-compatible = "ldo9";
|
||||
ldo9 {
|
||||
regulator-name = "nvvdd_ldo9,avdd_cam*";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "ldo10";
|
||||
ldo10 {
|
||||
regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@14 {
|
||||
reg = <14>;
|
||||
regulator-compatible = "ldo11";
|
||||
ldo11 {
|
||||
regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@15 {
|
||||
reg = <15>;
|
||||
regulator-compatible = "ldo12";
|
||||
ldo12 {
|
||||
regulator-name = "nvvdd_ldo12,vddio_sdio";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@16 {
|
||||
reg = <16>;
|
||||
regulator-compatible = "ldo13";
|
||||
ldo13 {
|
||||
regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
regulator@17 {
|
||||
reg = <17>;
|
||||
regulator-compatible = "ldo14";
|
||||
ldo14 {
|
||||
regulator-name = "nvvdd_ldo14,avdd_vdac";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
regulator@18 {
|
||||
reg = <18>;
|
||||
regulator-compatible = "ldo15";
|
||||
ldo15 {
|
||||
regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
regulator@19 {
|
||||
reg = <19>;
|
||||
regulator-compatible = "ldo16";
|
||||
ldo16 {
|
||||
regulator-name = "nvvdd_ldo16,vdd_dbrtr";
|
||||
regulator-min-microvolt = <1300000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
};
|
||||
|
||||
regulator@20 {
|
||||
reg = <20>;
|
||||
regulator-compatible = "ldo17";
|
||||
ldo17 {
|
||||
regulator-name = "nvvdd_ldo17,vddio_mipi";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
regulator@21 {
|
||||
reg = <21>;
|
||||
regulator-compatible = "ldo18";
|
||||
ldo18 {
|
||||
regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
regulator@22 {
|
||||
reg = <22>;
|
||||
regulator-compatible = "ldo19";
|
||||
ldo19 {
|
||||
regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
regulator@23 {
|
||||
reg = <23>;
|
||||
regulator-compatible = "ldo20";
|
||||
ldo20 {
|
||||
regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@24 {
|
||||
reg = <24>;
|
||||
regulator-compatible = "out5v";
|
||||
out5v {
|
||||
regulator-name = "usb0_vbus_reg";
|
||||
};
|
||||
|
||||
regulator@25 {
|
||||
reg = <25>;
|
||||
regulator-compatible = "out33v";
|
||||
out33v {
|
||||
regulator-name = "pmu_out3v3";
|
||||
};
|
||||
|
||||
regulator@26 {
|
||||
reg = <26>;
|
||||
regulator-compatible = "bbat";
|
||||
bbat {
|
||||
regulator-name = "pmu_bbat";
|
||||
regulator-min-microvolt = <2400000>;
|
||||
regulator-max-microvolt = <2400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@27 {
|
||||
reg = <27>;
|
||||
regulator-compatible = "sdby";
|
||||
sdby {
|
||||
regulator-name = "vdd_aon";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regulator@28 {
|
||||
reg = <28>;
|
||||
regulator-compatible = "vrtc";
|
||||
vrtc {
|
||||
regulator-name = "vrtc,pmu_vccadc";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -171,56 +171,41 @@
|
|||
vccio-supply = <&vdd_ac_bat_reg>;
|
||||
|
||||
regulators {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
vdd1_reg: regulator@0 {
|
||||
reg = <0>;
|
||||
regulator-compatible = "vdd1";
|
||||
vdd1_reg: vdd1 {
|
||||
regulator-name = "vddio_ddr_1v2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@1 {
|
||||
reg = <1>;
|
||||
regulator-compatible = "vdd2";
|
||||
vdd2_reg: vdd2 {
|
||||
regulator-name = "vdd_1v5_gen";
|
||||
regulator-min-microvolt = <1500000>;
|
||||
regulator-max-microvolt = <1500000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vddctrl_reg: regulator@2 {
|
||||
reg = <2>;
|
||||
regulator-compatible = "vddctrl";
|
||||
vddctrl_reg: vddctrl {
|
||||
regulator-name = "vdd_cpu,vdd_sys";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vio_reg: regulator@3 {
|
||||
reg = <3>;
|
||||
regulator-compatible = "vio";
|
||||
vio_reg: vio {
|
||||
regulator-name = "vdd_1v8_gen";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@4 {
|
||||
reg = <4>;
|
||||
regulator-compatible = "ldo1";
|
||||
ldo1_reg: ldo1 {
|
||||
regulator-name = "vdd_pexa,vdd_pexb";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@5 {
|
||||
reg = <5>;
|
||||
regulator-compatible = "ldo2";
|
||||
ldo2_reg: ldo2 {
|
||||
regulator-name = "vdd_sata,avdd_plle";
|
||||
regulator-min-microvolt = <1050000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
|
|
@ -228,44 +213,34 @@
|
|||
|
||||
/* LDO3 is not connected to anything */
|
||||
|
||||
ldo4_reg: regulator@7 {
|
||||
reg = <7>;
|
||||
regulator-compatible = "ldo4";
|
||||
ldo4_reg: ldo4 {
|
||||
regulator-name = "vdd_rtc";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo5_reg: regulator@8 {
|
||||
reg = <8>;
|
||||
regulator-compatible = "ldo5";
|
||||
ldo5_reg: ldo5 {
|
||||
regulator-name = "vddio_sdmmc,avdd_vdac";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo6_reg: regulator@9 {
|
||||
reg = <9>;
|
||||
regulator-compatible = "ldo6";
|
||||
ldo6_reg: ldo6 {
|
||||
regulator-name = "avdd_dsi_csi,pwrdet_mipi";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
ldo7_reg: regulator@10 {
|
||||
reg = <10>;
|
||||
regulator-compatible = "ldo7";
|
||||
ldo7_reg: ldo7 {
|
||||
regulator-name = "vdd_pllm,x,u,a_p_c_s";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo8_reg: regulator@11 {
|
||||
reg = <11>;
|
||||
regulator-compatible = "ldo8";
|
||||
ldo8_reg: ldo8 {
|
||||
regulator-name = "vdd_ddr_hs";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
|
|
|
|||
|
|
@ -37,6 +37,24 @@
|
|||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
vusb1v5: regulator-vusb1v5 {
|
||||
compatible = "ti,twl4030-vusb1v5";
|
||||
};
|
||||
|
||||
vusb1v8: regulator-vusb1v8 {
|
||||
compatible = "ti,twl4030-vusb1v8";
|
||||
};
|
||||
|
||||
vusb3v1: regulator-vusb3v1 {
|
||||
compatible = "ti,twl4030-vusb3v1";
|
||||
};
|
||||
|
||||
vsim: regulator-vsim {
|
||||
compatible = "ti,twl4030-vsim";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
twl_gpio: gpio {
|
||||
compatible = "ti,twl4030-gpio";
|
||||
gpio-controller;
|
||||
|
|
@ -44,4 +62,13 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
twl4030-usb {
|
||||
compatible = "ti,twl4030-usb";
|
||||
interrupts = <10>, <4>;
|
||||
usb1v5-supply = <&vusb1v5>;
|
||||
usb1v8-supply = <&vusb1v8>;
|
||||
usb3v1-supply = <&vusb3v1>;
|
||||
usb_mode = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -86,4 +86,9 @@
|
|||
clk32kg: regulator-clk32kg {
|
||||
compatible = "ti,twl6030-clk32kg";
|
||||
};
|
||||
|
||||
twl_usb_comparator: usb-comparator {
|
||||
compatible = "ti,twl6030-usb";
|
||||
interrupts = <4>, <10>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -36,16 +36,27 @@
|
|||
ranges;
|
||||
|
||||
intc: interrupt-controller@f8f01000 {
|
||||
compatible = "arm,cortex-a9-gic";
|
||||
#interrupt-cells = <3>;
|
||||
#address-cells = <1>;
|
||||
interrupt-controller;
|
||||
compatible = "arm,gic";
|
||||
reg = <0xF8F01000 0x1000>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0xF8F01000 0x1000>,
|
||||
<0xF8F00100 0x100>;
|
||||
};
|
||||
|
||||
L2: cache-controller {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0xF8F02000 0x1000>;
|
||||
arm,data-latency = <2 3 2>;
|
||||
arm,tag-latency = <2 3 2>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
};
|
||||
|
||||
uart0: uart@e0000000 {
|
||||
compatible = "xlnx,xuartps";
|
||||
reg = <0xE0000000 0x1000>;
|
||||
interrupts = <59 0>;
|
||||
interrupts = <0 27 4>;
|
||||
clock = <50000000>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_ARCH_IMX_V4_V5=y
|
||||
CONFIG_ARCH_MULTI_V4T=y
|
||||
CONFIG_ARCH_MULTI_V5=y
|
||||
# CONFIG_ARCH_MULTI_V7 is not set
|
||||
CONFIG_ARCH_MX1ADS=y
|
||||
CONFIG_MACH_SCB9328=y
|
||||
CONFIG_MACH_APF9328=y
|
||||
|
|
|
|||
|
|
@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y
|
|||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_ARCH_MULTI_V6=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_MACH_MX31LILLY=y
|
||||
CONFIG_MACH_MX31LITE=y
|
||||
CONFIG_MACH_PCM037=y
|
||||
|
|
|
|||
|
|
@ -210,13 +210,6 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
|
|||
*/
|
||||
extern void __init init_dma_coherent_pool_size(unsigned long size);
|
||||
|
||||
/*
|
||||
* This can be called during boot to increase the size of the consistent
|
||||
* DMA region above it's default value of 2MB. It must be called before the
|
||||
* memory allocator is initialised, i.e. before any core_initcall.
|
||||
*/
|
||||
static inline void init_consistent_dma_size(unsigned long size) { }
|
||||
|
||||
/*
|
||||
* For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
|
||||
* and utilize bounce buffers as needed to work around limited DMA windows.
|
||||
|
|
|
|||
|
|
@ -10,27 +10,38 @@
|
|||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#ifdef CONFIG_DEBUG_IMX1_UART
|
||||
#define UART_PADDR MX1_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x00206000
|
||||
#elif defined (CONFIG_DEBUG_IMX25_UART)
|
||||
#define UART_PADDR MX25_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x43f90000
|
||||
#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
|
||||
#define UART_PADDR MX2x_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x1000a000
|
||||
#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
|
||||
#define UART_PADDR MX3x_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x43f90000
|
||||
#elif defined (CONFIG_DEBUG_IMX51_UART)
|
||||
#define UART_PADDR MX51_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x73fbc000
|
||||
#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
|
||||
#define UART_PADDR MX53_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x53fbc000
|
||||
#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
|
||||
#define UART_PADDR MX6Q_UART2_BASE_ADDR
|
||||
#define UART_PADDR 0x021e8000
|
||||
#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
|
||||
#define UART_PADDR MX6Q_UART4_BASE_ADDR
|
||||
#define UART_PADDR 0x021f0000
|
||||
#endif
|
||||
|
||||
#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR)
|
||||
/*
|
||||
* FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to
|
||||
* stay sync with that. It's hard to maintain, and should be fixed
|
||||
* globally for multi-platform build to use a fixed virtual address
|
||||
* for low-level debug uart port across platforms.
|
||||
*/
|
||||
#define IMX_IO_P2V(x) ( \
|
||||
(((x) & 0x80000000) >> 7) | \
|
||||
(0xf4000000 + \
|
||||
(((x) & 0x50000000) >> 6) + \
|
||||
(((x) & 0x0b000000) >> 4) + \
|
||||
(((x) & 0x000fffff))))
|
||||
|
||||
#define UART_VADDR IMX_IO_P2V(UART_PADDR)
|
||||
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rp, =UART_PADDR @ physical
|
||||
|
|
@ -351,7 +351,6 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
|
|||
static void __init at91sam9g45_map_io(void)
|
||||
{
|
||||
at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
|
||||
init_consistent_dma_size(SZ_4M);
|
||||
}
|
||||
|
||||
static void __init at91sam9g45_ioremap_registers(void)
|
||||
|
|
|
|||
|
|
@ -14,11 +14,4 @@ struct mci_dma_data {
|
|||
#define slave_data_ptr(s) (&(s)->sdata)
|
||||
#define find_slave_dev(s) ((s)->sdata.dma_dev)
|
||||
|
||||
#define setup_dma_addr(s, t, r) do { \
|
||||
if (s) { \
|
||||
(s)->sdata.tx_reg = (t); \
|
||||
(s)->sdata.rx_reg = (r); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#endif /* __MACH_ATMEL_MCI_H */
|
||||
|
|
|
|||
|
|
@ -1,3 +1 @@
|
|||
zreladdr-y := 0x00008000
|
||||
params_phys-y := 0x00000100
|
||||
initrd_phys-y := 0x00800000
|
||||
zreladdr-y := 0x00008000
|
||||
|
|
|
|||
|
|
@ -30,12 +30,12 @@ static struct map_desc io_map __initdata = {
|
|||
.type = MT_DEVICE
|
||||
};
|
||||
|
||||
void __init bcm2835_map_io(void)
|
||||
static void __init bcm2835_map_io(void)
|
||||
{
|
||||
iotable_init(&io_map, 1);
|
||||
}
|
||||
|
||||
void __init bcm2835_init(void)
|
||||
static void __init bcm2835_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -194,7 +194,7 @@ static int evm_led_setup(struct i2c_client *client, int gpio,
|
|||
while (ngpio--) {
|
||||
leds->gpio = gpio++;
|
||||
leds++;
|
||||
};
|
||||
}
|
||||
|
||||
evm_led_dev = platform_device_alloc("leds-gpio", 0);
|
||||
platform_device_add_data(evm_led_dev, &evm_led_data,
|
||||
|
|
|
|||
|
|
@ -87,8 +87,6 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
|
|||
iotable_init(davinci_soc_info.io_desc,
|
||||
davinci_soc_info.io_desc_num);
|
||||
|
||||
init_consistent_dma_size(14 << 20);
|
||||
|
||||
/*
|
||||
* Normally devicemaps_init() would flush caches and tlb after
|
||||
* mdesc->map_io(), but we must also do it here because of the CPU
|
||||
|
|
|
|||
|
|
@ -42,14 +42,8 @@ static struct musb_hdrc_config musb_config = {
|
|||
};
|
||||
|
||||
static struct musb_hdrc_platform_data usb_data = {
|
||||
#if defined(CONFIG_USB_MUSB_OTG)
|
||||
/* OTG requires a Mini-AB connector */
|
||||
.mode = MUSB_OTG,
|
||||
#elif defined(CONFIG_USB_MUSB_PERIPHERAL)
|
||||
.mode = MUSB_PERIPHERAL,
|
||||
#elif defined(CONFIG_USB_MUSB_HOST)
|
||||
.mode = MUSB_HOST,
|
||||
#endif
|
||||
.clock = "usb",
|
||||
.config = &musb_config,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -98,11 +98,6 @@ config EXYNOS_DEV_SYSMMU
|
|||
help
|
||||
Common setup code for SYSTEM MMU in EXYNOS platforms
|
||||
|
||||
config EXYNOS4_DEV_DWMCI
|
||||
bool
|
||||
help
|
||||
Compile in platform device definitions for DWMCI
|
||||
|
||||
config EXYNOS4_DEV_USB_OHCI
|
||||
bool
|
||||
help
|
||||
|
|
|
|||
|
|
@ -50,7 +50,6 @@ obj-$(CONFIG_MACH_EXYNOS5_DT) += mach-exynos5-dt.o
|
|||
obj-y += dev-uart.o
|
||||
obj-$(CONFIG_ARCH_EXYNOS4) += dev-audio.o
|
||||
obj-$(CONFIG_EXYNOS4_DEV_AHCI) += dev-ahci.o
|
||||
obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
|
||||
obj-$(CONFIG_EXYNOS_DEV_DMA) += dma.o
|
||||
obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
|
||||
obj-$(CONFIG_EXYNOS_DEV_DRM) += dev-drm.o
|
||||
|
|
|
|||
|
|
@ -611,11 +611,6 @@ static struct clk exynos4_init_clocks_off[] = {
|
|||
.devname = "exynos4210-spi.2",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 18),
|
||||
}, {
|
||||
.name = "iis",
|
||||
.devname = "samsung-i2s.0",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 19),
|
||||
}, {
|
||||
.name = "iis",
|
||||
.devname = "samsung-i2s.1",
|
||||
|
|
|
|||
|
|
@ -292,7 +292,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = {
|
|||
.nr_sources = ARRAY_SIZE(exynos5_clk_src_mpll_list),
|
||||
};
|
||||
|
||||
struct clksrc_clk exynos5_clk_mout_mpll = {
|
||||
static struct clksrc_clk exynos5_clk_mout_mpll = {
|
||||
.clk = {
|
||||
.name = "mout_mpll",
|
||||
},
|
||||
|
|
@ -467,12 +467,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = {
|
|||
|
||||
/* Core list of CMU_TOP side */
|
||||
|
||||
struct clk *exynos5_clkset_aclk_top_list[] = {
|
||||
static struct clk *exynos5_clkset_aclk_top_list[] = {
|
||||
[0] = &exynos5_clk_mout_mpll_user.clk,
|
||||
[1] = &exynos5_clk_mout_bpll_user.clk,
|
||||
};
|
||||
|
||||
struct clksrc_sources exynos5_clkset_aclk = {
|
||||
static struct clksrc_sources exynos5_clkset_aclk = {
|
||||
.sources = exynos5_clkset_aclk_top_list,
|
||||
.nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_top_list),
|
||||
};
|
||||
|
|
@ -486,12 +486,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = {
|
|||
.reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
|
||||
};
|
||||
|
||||
struct clk *exynos5_clkset_aclk_333_166_list[] = {
|
||||
static struct clk *exynos5_clkset_aclk_333_166_list[] = {
|
||||
[0] = &exynos5_clk_mout_cpll.clk,
|
||||
[1] = &exynos5_clk_mout_mpll_user.clk,
|
||||
};
|
||||
|
||||
struct clksrc_sources exynos5_clkset_aclk_333_166 = {
|
||||
static struct clksrc_sources exynos5_clkset_aclk_333_166 = {
|
||||
.sources = exynos5_clkset_aclk_333_166_list,
|
||||
.nr_sources = ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),
|
||||
};
|
||||
|
|
@ -966,7 +966,7 @@ static struct clk exynos5_clk_fimd1 = {
|
|||
.ctrlbit = (1 << 0),
|
||||
};
|
||||
|
||||
struct clk *exynos5_clkset_group_list[] = {
|
||||
static struct clk *exynos5_clkset_group_list[] = {
|
||||
[0] = &clk_ext_xtal_mux,
|
||||
[1] = NULL,
|
||||
[2] = &exynos5_clk_sclk_hdmi24m,
|
||||
|
|
@ -979,7 +979,7 @@ struct clk *exynos5_clkset_group_list[] = {
|
|||
[9] = &exynos5_clk_mout_cpll.clk,
|
||||
};
|
||||
|
||||
struct clksrc_sources exynos5_clkset_group = {
|
||||
static struct clksrc_sources exynos5_clkset_group = {
|
||||
.sources = exynos5_clkset_group_list,
|
||||
.nr_sources = ARRAY_SIZE(exynos5_clkset_group_list),
|
||||
};
|
||||
|
|
@ -1195,7 +1195,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = {
|
|||
.reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },
|
||||
};
|
||||
|
||||
struct clksrc_clk exynos5_clk_sclk_fimd1 = {
|
||||
static struct clksrc_clk exynos5_clk_sclk_fimd1 = {
|
||||
.clk = {
|
||||
.name = "sclk_fimd",
|
||||
.devname = "exynos5-fb.1",
|
||||
|
|
@ -1476,7 +1476,7 @@ static void exynos5_clock_resume(void)
|
|||
#define exynos5_clock_resume NULL
|
||||
#endif
|
||||
|
||||
struct syscore_ops exynos5_clock_syscore_ops = {
|
||||
static struct syscore_ops exynos5_clock_syscore_ops = {
|
||||
.suspend = exynos5_clock_suspend,
|
||||
.resume = exynos5_clock_resume,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -63,7 +63,7 @@ static void exynos4_map_io(void);
|
|||
static void exynos5_map_io(void);
|
||||
static void exynos4_init_clocks(int xtal);
|
||||
static void exynos5_init_clocks(int xtal);
|
||||
static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
||||
static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
||||
static int exynos_init(void);
|
||||
|
||||
static struct cpu_table cpu_ids[] __initdata = {
|
||||
|
|
@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
.idmask = EXYNOS4_CPU_MASK,
|
||||
.map_io = exynos4_map_io,
|
||||
.init_clocks = exynos4_init_clocks,
|
||||
.init_uarts = exynos_init_uarts,
|
||||
.init_uarts = exynos4_init_uarts,
|
||||
.init = exynos_init,
|
||||
.name = name_exynos4210,
|
||||
}, {
|
||||
|
|
@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
.idmask = EXYNOS4_CPU_MASK,
|
||||
.map_io = exynos4_map_io,
|
||||
.init_clocks = exynos4_init_clocks,
|
||||
.init_uarts = exynos_init_uarts,
|
||||
.init_uarts = exynos4_init_uarts,
|
||||
.init = exynos_init,
|
||||
.name = name_exynos4212,
|
||||
}, {
|
||||
|
|
@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
.idmask = EXYNOS4_CPU_MASK,
|
||||
.map_io = exynos4_map_io,
|
||||
.init_clocks = exynos4_init_clocks,
|
||||
.init_uarts = exynos_init_uarts,
|
||||
.init_uarts = exynos4_init_uarts,
|
||||
.init = exynos_init,
|
||||
.name = name_exynos4412,
|
||||
}, {
|
||||
|
|
@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
.idmask = EXYNOS5_SOC_MASK,
|
||||
.map_io = exynos5_map_io,
|
||||
.init_clocks = exynos5_init_clocks,
|
||||
.init_uarts = exynos_init_uarts,
|
||||
.init = exynos_init,
|
||||
.name = name_exynos5250,
|
||||
},
|
||||
|
|
@ -256,26 +255,11 @@ static struct map_desc exynos5_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_COMBINER),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_UART),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_GIC_CPU,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_GIC_CPU),
|
||||
.length = SZ_8K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_GIC_DIST,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_GIC_DIST),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -354,23 +338,6 @@ static void __init exynos4_map_io(void)
|
|||
static void __init exynos5_map_io(void)
|
||||
{
|
||||
iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
|
||||
|
||||
s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);
|
||||
s3c_device_i2c0.resource[0].end = EXYNOS5_PA_IIC(0) + SZ_4K - 1;
|
||||
s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;
|
||||
s3c_device_i2c0.resource[1].end = EXYNOS5_IRQ_IIC;
|
||||
|
||||
s3c_sdhci_setname(0, "exynos4-sdhci");
|
||||
s3c_sdhci_setname(1, "exynos4-sdhci");
|
||||
s3c_sdhci_setname(2, "exynos4-sdhci");
|
||||
s3c_sdhci_setname(3, "exynos4-sdhci");
|
||||
|
||||
/* The I2C bus controllers are directly compatible with s3c2440 */
|
||||
s3c_i2c0_setname("s3c2440-i2c");
|
||||
s3c_i2c1_setname("s3c2440-i2c");
|
||||
s3c_i2c2_setname("s3c2440-i2c");
|
||||
|
||||
s3c64xx_spi_setname("exynos4210-spi");
|
||||
}
|
||||
|
||||
static void __init exynos4_init_clocks(int xtal)
|
||||
|
|
@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base,
|
|||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
int __init combiner_of_init(struct device_node *np, struct device_node *parent)
|
||||
static int __init combiner_of_init(struct device_node *np,
|
||||
struct device_node *parent)
|
||||
{
|
||||
void __iomem *combiner_base;
|
||||
|
||||
|
|
@ -727,7 +695,7 @@ static int __init exynos_init(void)
|
|||
|
||||
/* uart registration process */
|
||||
|
||||
static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
|
||||
static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)
|
||||
{
|
||||
struct s3c2410_uartcfg *tcfg = cfg;
|
||||
u32 ucnt;
|
||||
|
|
@ -735,10 +703,7 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)
|
|||
for (ucnt = 0; ucnt < no; ucnt++, tcfg++)
|
||||
tcfg->has_fracval = 1;
|
||||
|
||||
if (soc_is_exynos5250())
|
||||
s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);
|
||||
else
|
||||
s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
|
||||
s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);
|
||||
}
|
||||
|
||||
static void __iomem *exynos_eint_base;
|
||||
|
|
@ -970,14 +935,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
|
|||
struct irq_chip *chip = irq_get_chip(irq);
|
||||
|
||||
chained_irq_enter(chip, desc);
|
||||
chip->irq_mask(&desc->irq_data);
|
||||
|
||||
if (chip->irq_ack)
|
||||
chip->irq_ack(&desc->irq_data);
|
||||
|
||||
generic_handle_irq(*irq_data);
|
||||
|
||||
chip->irq_unmask(&desc->irq_data);
|
||||
chained_irq_exit(chip, desc);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -14,9 +14,9 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/platform_data/asoc-s3c.h>
|
||||
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <linux/platform_data/asoc-s3c.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <mach/dma.h>
|
||||
|
|
|
|||
|
|
@ -1,75 +0,0 @@
|
|||
/*
|
||||
* linux/arch/arm/mach-exynos4/dev-dwmci.c
|
||||
*
|
||||
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* Platform device for Synopsys DesignWare Mobile Storage IP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/mmc/dw_mmc.h>
|
||||
|
||||
#include <plat/devs.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
static int exynos4_dwmci_get_bus_wd(u32 slot_id)
|
||||
{
|
||||
return 4;
|
||||
}
|
||||
|
||||
static int exynos4_dwmci_init(u32 slot_id, irq_handler_t handler, void *data)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct resource exynos4_dwmci_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(EXYNOS4_PA_DWMCI, SZ_4K),
|
||||
[1] = DEFINE_RES_IRQ(EXYNOS4_IRQ_DWMCI),
|
||||
};
|
||||
|
||||
static struct dw_mci_board exynos4_dwci_pdata = {
|
||||
.num_slots = 1,
|
||||
.quirks = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
|
||||
.bus_hz = 80 * 1000 * 1000,
|
||||
.detect_delay_ms = 200,
|
||||
.init = exynos4_dwmci_init,
|
||||
.get_bus_wd = exynos4_dwmci_get_bus_wd,
|
||||
};
|
||||
|
||||
static u64 exynos4_dwmci_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
struct platform_device exynos4_device_dwmci = {
|
||||
.name = "dw_mmc",
|
||||
.id = -1,
|
||||
.num_resources = ARRAY_SIZE(exynos4_dwmci_resource),
|
||||
.resource = exynos4_dwmci_resource,
|
||||
.dev = {
|
||||
.dma_mask = &exynos4_dwmci_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &exynos4_dwci_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
void __init exynos4_dwmci_set_platdata(struct dw_mci_board *pd)
|
||||
{
|
||||
struct dw_mci_board *npd;
|
||||
|
||||
npd = s3c_set_platdata(pd, sizeof(struct dw_mci_board),
|
||||
&exynos4_device_dwmci);
|
||||
|
||||
if (!npd->init)
|
||||
npd->init = exynos4_dwmci_init;
|
||||
if (!npd->get_bus_wd)
|
||||
npd->get_bus_wd = exynos4_dwmci_get_bus_wd;
|
||||
}
|
||||
|
|
@ -12,10 +12,10 @@
|
|||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/platform_data/usb-exynos.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/map.h>
|
||||
#include <linux/platform_data/usb-exynos.h>
|
||||
|
||||
#include <plat/devs.h>
|
||||
#include <plat/usb-phy.h>
|
||||
|
|
|
|||
|
|
@ -52,27 +52,3 @@ struct s3c24xx_uart_resources exynos4_uart_resources[] __initdata = {
|
|||
.nr_resources = ARRAY_SIZE(exynos4_uart3_resource),
|
||||
},
|
||||
};
|
||||
|
||||
EXYNOS_UART_RESOURCE(5, 0)
|
||||
EXYNOS_UART_RESOURCE(5, 1)
|
||||
EXYNOS_UART_RESOURCE(5, 2)
|
||||
EXYNOS_UART_RESOURCE(5, 3)
|
||||
|
||||
struct s3c24xx_uart_resources exynos5_uart_resources[] __initdata = {
|
||||
[0] = {
|
||||
.resources = exynos5_uart0_resource,
|
||||
.nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
|
||||
},
|
||||
[1] = {
|
||||
.resources = exynos5_uart1_resource,
|
||||
.nr_resources = ARRAY_SIZE(exynos5_uart0_resource),
|
||||
},
|
||||
[2] = {
|
||||
.resources = exynos5_uart2_resource,
|
||||
.nr_resources = ARRAY_SIZE(exynos5_uart2_resource),
|
||||
},
|
||||
[3] = {
|
||||
.resources = exynos5_uart3_resource,
|
||||
.nr_resources = ARRAY_SIZE(exynos5_uart3_resource),
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,20 +0,0 @@
|
|||
/* linux/arch/arm/mach-exynos4/include/mach/dwmci.h
|
||||
*
|
||||
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com/
|
||||
*
|
||||
* Synopsys DesignWare Mobile Storage for EXYNOS4210
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARM_ARCH_DWMCI_H
|
||||
#define __ASM_ARM_ARCH_DWMCI_H __FILE__
|
||||
|
||||
#include <linux/mmc/dw_mmc.h>
|
||||
|
||||
extern void exynos4_dwmci_set_platdata(struct dw_mci_board *pd);
|
||||
|
||||
#endif /* __ASM_ARM_ARCH_DWMCI_H */
|
||||
|
|
@ -259,11 +259,6 @@
|
|||
#define EXYNOS5_IRQ_IEM_IEC IRQ_SPI(48)
|
||||
#define EXYNOS5_IRQ_IEM_APC IRQ_SPI(49)
|
||||
#define EXYNOS5_IRQ_GPIO_C2C IRQ_SPI(50)
|
||||
#define EXYNOS5_IRQ_UART0 IRQ_SPI(51)
|
||||
#define EXYNOS5_IRQ_UART1 IRQ_SPI(52)
|
||||
#define EXYNOS5_IRQ_UART2 IRQ_SPI(53)
|
||||
#define EXYNOS5_IRQ_UART3 IRQ_SPI(54)
|
||||
#define EXYNOS5_IRQ_UART4 IRQ_SPI(55)
|
||||
#define EXYNOS5_IRQ_IIC IRQ_SPI(56)
|
||||
#define EXYNOS5_IRQ_IIC1 IRQ_SPI(57)
|
||||
#define EXYNOS5_IRQ_IIC2 IRQ_SPI(58)
|
||||
|
|
|
|||
|
|
@ -280,7 +280,6 @@
|
|||
#define EXYNOS5_PA_UART1 0x12C10000
|
||||
#define EXYNOS5_PA_UART2 0x12C20000
|
||||
#define EXYNOS5_PA_UART3 0x12C30000
|
||||
#define EXYNOS5_SZ_UART SZ_256
|
||||
|
||||
#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
|
||||
|
||||
|
|
|
|||
|
|
@ -1,23 +0,0 @@
|
|||
/* linux/arch/arm/mach-exynos4/include/mach/regs-mem.h
|
||||
*
|
||||
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* EXYNOS4 - SROMC and DMC register definitions
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_REGS_MEM_H
|
||||
#define __ASM_ARCH_REGS_MEM_H __FILE__
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
#define S5P_DMC0_MEMCON_OFFSET 0x04
|
||||
|
||||
#define S5P_DMC0_MEMTYPE_SHIFT 8
|
||||
#define S5P_DMC0_MEMTYPE_MASK 0xF
|
||||
|
||||
#endif /* __ASM_ARCH_REGS_MEM_H */
|
||||
|
|
@ -230,8 +230,6 @@
|
|||
|
||||
/* For EXYNOS5 */
|
||||
|
||||
#define EXYNOS5_USB_CFG S5P_PMUREG(0x0230)
|
||||
|
||||
#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
|
||||
#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
|
||||
|
||||
|
|
|
|||
|
|
@ -25,7 +25,10 @@
|
|||
#include <linux/mmc/host.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <linux/platform_data/mipi-csis.h>
|
||||
#include <linux/platform_data/s3c-hsotg.h>
|
||||
#include <linux/platform_data/usb-ehci-s5p.h>
|
||||
#include <drm/exynos_drm.h>
|
||||
|
||||
#include <video/platform_lcd.h>
|
||||
|
|
@ -45,14 +48,11 @@
|
|||
#include <plat/devs.h>
|
||||
#include <plat/fb.h>
|
||||
#include <plat/sdhci.h>
|
||||
#include <linux/platform_data/usb-ehci-s5p.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <plat/mfc.h>
|
||||
#include <plat/fimc-core.h>
|
||||
#include <plat/camport.h>
|
||||
#include <linux/platform_data/mipi-csis.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
|
|
@ -113,7 +113,6 @@ static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
|
|||
.host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
|
||||
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
|
||||
MMC_CAP_ERASE),
|
||||
.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
|
||||
.cd_type = S3C_SDHCI_CD_PERMANENT,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -23,7 +23,10 @@
|
|||
#include <linux/mfd/max8997.h>
|
||||
#include <linux/lcd.h>
|
||||
#include <linux/rfkill-gpio.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <linux/platform_data/s3c-hsotg.h>
|
||||
#include <linux/platform_data/usb-ehci-s5p.h>
|
||||
#include <linux/platform_data/usb-exynos.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
|
|
@ -36,8 +39,6 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/sdhci.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <linux/platform_data/usb-ehci-s5p.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <plat/backlight.h>
|
||||
|
|
@ -45,7 +46,6 @@
|
|||
#include <plat/mfc.h>
|
||||
#include <plat/hdmi.h>
|
||||
|
||||
#include <linux/platform_data/usb-exynos.h>
|
||||
#include <mach/map.h>
|
||||
|
||||
#include <drm/exynos_drm.h>
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <linux/platform_data/s3c-hsotg.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
@ -34,7 +35,6 @@
|
|||
#include <plat/devs.h>
|
||||
#include <plat/fb.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <plat/keypad.h>
|
||||
#include <plat/mfc.h>
|
||||
#include <plat/regs-serial.h>
|
||||
|
|
|
|||
|
|
@ -20,7 +20,10 @@
|
|||
#include <linux/input.h>
|
||||
#include <linux/pwm.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <linux/platform_data/s3c-hsotg.h>
|
||||
#include <linux/platform_data/usb-ehci-s5p.h>
|
||||
#include <linux/platform_data/usb-exynos.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
|
|
@ -35,16 +38,13 @@
|
|||
#include <plat/fb.h>
|
||||
#include <plat/keypad.h>
|
||||
#include <plat/sdhci.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <plat/backlight.h>
|
||||
#include <plat/mfc.h>
|
||||
#include <linux/platform_data/usb-ehci-s5p.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/hdmi.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <linux/platform_data/usb-exynos.h>
|
||||
|
||||
#include <drm/exynos_drm.h>
|
||||
#include "common.h"
|
||||
|
|
|
|||
|
|
@ -23,6 +23,8 @@
|
|||
#include <linux/i2c-gpio.h>
|
||||
#include <linux/i2c/mcs.h>
|
||||
#include <linux/i2c/atmel_mxt_ts.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <linux/platform_data/mipi-csis.h>
|
||||
#include <linux/platform_data/s3c-hsotg.h>
|
||||
#include <drm/exynos_drm.h>
|
||||
|
||||
|
|
@ -35,7 +37,6 @@
|
|||
#include <plat/clock.h>
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/devs.h>
|
||||
#include <linux/platform_data/i2c-s3c2410.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <plat/fb.h>
|
||||
#include <plat/mfc.h>
|
||||
|
|
@ -43,7 +44,6 @@
|
|||
#include <plat/fimc-core.h>
|
||||
#include <plat/s5p-time.h>
|
||||
#include <plat/camport.h>
|
||||
#include <linux/platform_data/mipi-csis.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
|
|
@ -754,7 +754,6 @@ static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
|
|||
.max_width = 8,
|
||||
.host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
|
||||
MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
|
||||
.host_caps2 = MMC_CAP2_BROKEN_VOLTAGE,
|
||||
.cd_type = S3C_SDHCI_CD_PERMANENT,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include "hardware.h"
|
||||
|
||||
/* LAN9217 ethernet base address */
|
||||
#define LAN9217_BASE_ADDR(n) (n + 0x0)
|
||||
|
|
@ -1,3 +1,70 @@
|
|||
config ARCH_MXC
|
||||
bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
select CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_IRQ_CHIP
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SPARSE_IRQ
|
||||
select USE_OF
|
||||
help
|
||||
Support for Freescale MXC/iMX-based family of processors
|
||||
|
||||
menu "Freescale i.MX support"
|
||||
depends on ARCH_MXC
|
||||
|
||||
config MXC_IRQ_PRIOR
|
||||
bool "Use IRQ priority"
|
||||
help
|
||||
Select this if you want to use prioritized IRQ handling.
|
||||
This feature prevents higher priority ISR to be interrupted
|
||||
by lower priority IRQ even IRQF_DISABLED flag is not set.
|
||||
This may be useful in embedded applications, where are strong
|
||||
requirements for timing.
|
||||
Say N here, unless you have a specialized requirement.
|
||||
|
||||
config MXC_TZIC
|
||||
bool
|
||||
|
||||
config MXC_AVIC
|
||||
bool
|
||||
|
||||
config MXC_DEBUG_BOARD
|
||||
bool "Enable MXC debug board(for 3-stack)"
|
||||
help
|
||||
The debug board is an integral part of the MXC 3-stack(PDK)
|
||||
platforms, it can be attached or removed from the peripheral
|
||||
board. On debug board, several debug devices(ethernet, UART,
|
||||
buttons, LEDs and JTAG) are implemented. Between the MCU and
|
||||
these devices, a CPLD is added as a bridge which performs
|
||||
data/address de-multiplexing and decode, signal level shift,
|
||||
interrupt control and various board functions.
|
||||
|
||||
config HAVE_EPIT
|
||||
bool
|
||||
|
||||
config MXC_USE_EPIT
|
||||
bool "Use EPIT instead of GPT"
|
||||
depends on HAVE_EPIT
|
||||
help
|
||||
Use EPIT as the system timer on systems that have it. Normally you
|
||||
don't have a reason to do so as the EPIT has the same features and
|
||||
uses the same clocks as the GPT. Anyway, on some systems the GPT
|
||||
may be in use for other purposes.
|
||||
|
||||
config MXC_ULPI
|
||||
bool
|
||||
|
||||
config ARCH_HAS_RNGA
|
||||
bool
|
||||
|
||||
config IRAM_ALLOC
|
||||
bool
|
||||
select GENERIC_ALLOCATOR
|
||||
|
||||
config HAVE_IMX_GPC
|
||||
bool
|
||||
|
||||
|
|
@ -5,6 +72,12 @@ config HAVE_IMX_MMDC
|
|||
bool
|
||||
|
||||
config HAVE_IMX_SRC
|
||||
def_bool y if SMP
|
||||
|
||||
config IMX_HAVE_IOMUX_V1
|
||||
bool
|
||||
|
||||
config ARCH_MXC_IOMUX_V3
|
||||
bool
|
||||
|
||||
config ARCH_MX1
|
||||
|
|
@ -104,7 +177,7 @@ config SOC_IMX51
|
|||
select PINCTRL_IMX51
|
||||
select SOC_IMX5
|
||||
|
||||
if ARCH_IMX_V4_V5
|
||||
if ARCH_MULTI_V4T
|
||||
|
||||
comment "MX1 platforms:"
|
||||
config MACH_MXLADS
|
||||
|
|
@ -133,6 +206,10 @@ config MACH_APF9328
|
|||
help
|
||||
Say Yes here if you are using the Armadeus APF9328 development board
|
||||
|
||||
endif
|
||||
|
||||
if ARCH_MULTI_V5
|
||||
|
||||
comment "MX21 platforms:"
|
||||
|
||||
config MACH_MX21ADS
|
||||
|
|
@ -384,7 +461,7 @@ config MACH_IMX27_DT
|
|||
|
||||
endif
|
||||
|
||||
if ARCH_IMX_V6_V7
|
||||
if ARCH_MULTI_V6
|
||||
|
||||
comment "MX31 platforms:"
|
||||
|
||||
|
|
@ -649,6 +726,10 @@ config MACH_VPR200
|
|||
Include support for VPR200 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
endif
|
||||
|
||||
if ARCH_MULTI_V7
|
||||
|
||||
comment "i.MX5 platforms:"
|
||||
|
||||
config MACH_MX50_RDP
|
||||
|
|
@ -756,7 +837,6 @@ config SOC_IMX6Q
|
|||
select HAVE_CAN_FLEXCAN if CAN
|
||||
select HAVE_IMX_GPC
|
||||
select HAVE_IMX_MMDC
|
||||
select HAVE_IMX_SRC
|
||||
select HAVE_SMP
|
||||
select MFD_SYSCON
|
||||
select PINCTRL
|
||||
|
|
@ -766,3 +846,7 @@ config SOC_IMX6Q
|
|||
This enables support for Freescale i.MX6 Quad processor.
|
||||
|
||||
endif
|
||||
|
||||
source "arch/arm/mach-imx/devices/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
|
|
|||
|
|
@ -1,3 +1,5 @@
|
|||
obj-y := time.o cpu.o system.o irq-common.o
|
||||
|
||||
obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o
|
||||
obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o
|
||||
|
||||
|
|
@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i
|
|||
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
|
||||
clk-pfd.o clk-busy.o clk.o
|
||||
|
||||
obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
|
||||
obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
|
||||
|
||||
obj-$(CONFIG_MXC_TZIC) += tzic.o
|
||||
obj-$(CONFIG_MXC_AVIC) += avic.o
|
||||
|
||||
obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
|
||||
obj-$(CONFIG_MXC_ULPI) += ulpi.o
|
||||
obj-$(CONFIG_MXC_USE_EPIT) += epit.o
|
||||
obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
|
||||
obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
|
||||
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
|
||||
|
||||
ifdef CONFIG_SND_IMX_SOC
|
||||
obj-y += ssi-fiq.o
|
||||
obj-y += ssi-fiq-ksym.o
|
||||
endif
|
||||
|
||||
# Support for CMOS sensor interface
|
||||
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
|
||||
|
||||
|
|
@ -89,3 +109,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
|
|||
|
||||
obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
|
||||
obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
|
||||
|
||||
obj-y += devices/
|
||||
|
|
|
|||
|
|
@ -22,12 +22,11 @@
|
|||
#include <linux/irqdomain.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <mach/common.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/exception.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
#include "irq-common.h"
|
||||
|
||||
#define AVIC_INTCNTL 0x00 /* int control reg */
|
||||
|
|
@ -22,9 +22,9 @@
|
|||
#include <linux/clkdev.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
/* CCM register addresses */
|
||||
#define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
|
||||
|
|
@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref)
|
|||
pr_err("imx1 clk %d: register failed with %ld\n",
|
||||
i, PTR_ERR(clk[i]));
|
||||
|
||||
clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma");
|
||||
clk_register_clkdev(clk[hclk], "ipg", "imx1-dma");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");
|
||||
clk_register_clkdev(clk[mma_gate], "mma", NULL);
|
||||
clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");
|
||||
|
|
@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");
|
||||
clk_register_clkdev(clk[per1], "per", "imx1-uart.2");
|
||||
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");
|
||||
clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");
|
||||
clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx1-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0");
|
||||
clk_register_clkdev(clk[hclk], "mshc", NULL);
|
||||
clk_register_clkdev(clk[per3], "ssi", NULL);
|
||||
clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
|
||||
clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0");
|
||||
clk_register_clkdev(clk[clko], "clko", NULL);
|
||||
|
||||
mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
|
||||
|
|
|
|||
|
|
@ -25,9 +25,9 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
|
||||
|
||||
|
|
@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
|
|||
clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1");
|
||||
clk_register_clkdev(clk[per2], "per", "imx21-cspi.2");
|
||||
clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2");
|
||||
clk_register_clkdev(clk[per3], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[per3], "per", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0");
|
||||
clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0");
|
||||
clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma");
|
||||
clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma");
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad");
|
||||
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
|
||||
clk_register_clkdev(clk[brom_gate], "brom", NULL);
|
||||
|
|
|
|||
|
|
@ -24,10 +24,10 @@
|
|||
#include <linux/clkdev.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/mx25.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
#include "mx25.h"
|
||||
|
||||
#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
|
||||
|
||||
|
|
@ -197,7 +197,7 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
|
||||
/* i.mx25 has the i.mx35 type cspi */
|
||||
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
|
||||
clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
|
||||
|
|
@ -212,15 +212,15 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");
|
||||
clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
|
||||
clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");
|
||||
clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");
|
||||
clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
|
||||
|
|
@ -230,9 +230,9 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");
|
||||
clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");
|
||||
clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");
|
||||
clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0");
|
||||
clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0");
|
||||
clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0");
|
||||
clk_register_clkdev(clk[dummy], "audmux", NULL);
|
||||
clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");
|
||||
clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");
|
||||
|
|
|
|||
|
|
@ -6,9 +6,9 @@
|
|||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
|
||||
|
||||
|
|
@ -211,19 +211,19 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");
|
||||
clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");
|
||||
clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
|
||||
clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
|
||||
clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
|
||||
clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
|
||||
clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
|
||||
|
|
@ -238,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||
clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0");
|
||||
clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
|
||||
clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
|
||||
clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma");
|
||||
clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma");
|
||||
clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");
|
||||
clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0");
|
||||
clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
|
||||
clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
|
||||
clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
|
||||
clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
|
||||
clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
|
||||
clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
|
||||
clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
|
||||
clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
|
||||
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc");
|
||||
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
|
||||
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
|
||||
clk_register_clkdev(clk[cpu_div], "cpu", NULL);
|
||||
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
|
||||
|
|
|
|||
|
|
@ -22,12 +22,11 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/mx31.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "crmregs-imx3.h"
|
||||
#include "hardware.h"
|
||||
#include "mx31.h"
|
||||
|
||||
static const char *mcu_main_sel[] = { "spll", "mpll", };
|
||||
static const char *per_sel[] = { "per_div", "ipg", };
|
||||
|
|
@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");
|
||||
clk_register_clkdev(clk[pwm_gate], "pwm", NULL);
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc");
|
||||
clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc");
|
||||
clk_register_clkdev(clk[epit1_gate], "epit", NULL);
|
||||
clk_register_clkdev(clk[epit2_gate], "epit", NULL);
|
||||
clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
|
||||
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
|
||||
|
|
@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");
|
||||
clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
|
||||
clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
|
||||
clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1");
|
||||
clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
|
||||
clk_register_clkdev(clk[firi_gate], "firi", NULL);
|
||||
|
|
|
|||
|
|
@ -14,11 +14,10 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "crmregs-imx3.h"
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
struct arm_ahb_div {
|
||||
unsigned char arm, ahb, sel;
|
||||
|
|
@ -226,9 +225,9 @@ int __init mx35_clocks_init()
|
|||
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
|
||||
clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
|
||||
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
|
||||
|
|
@ -256,7 +255,7 @@ int __init mx35_clocks_init()
|
|||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
|
||||
clk_prepare_enable(clk[spba_gate]);
|
||||
|
|
|
|||
|
|
@ -14,11 +14,10 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "crm-regs-imx5.h"
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
/* Low-power Audio Playback Mode clock */
|
||||
static const char *lp_apm_sel[] = { "osc", };
|
||||
|
|
@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||
clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2");
|
||||
clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");
|
||||
clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0");
|
||||
|
|
@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||
clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
|
||||
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
|
||||
|
|
@ -345,7 +344,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
|
|||
|
||||
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
|
||||
|
||||
clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);
|
||||
clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");
|
||||
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
|
||||
|
|
@ -440,7 +439,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
|
|||
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
|
||||
|
||||
clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
|
||||
clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu");
|
||||
clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu");
|
||||
|
|
|
|||
|
|
@ -19,8 +19,9 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
|
||||
#define CCGR0 0x68
|
||||
#define CCGR1 0x6c
|
||||
|
|
|
|||
|
|
@ -4,10 +4,10 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/err.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
/**
|
||||
* pll v1
|
||||
|
|
|
|||
|
|
@ -79,6 +79,7 @@ extern void mxc_arch_reset_init(void __iomem *);
|
|||
extern int mx53_revision(void);
|
||||
extern int mx53_display_revision(void);
|
||||
extern void imx_set_aips(void __iomem *);
|
||||
extern int mxc_device_init(void);
|
||||
|
||||
enum mxc_cpu_pwr_mode {
|
||||
WAIT_CLOCKED, /* wfi only */
|
||||
|
|
@ -11,8 +11,9 @@
|
|||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iim.h>
|
||||
|
||||
#include "iim.h"
|
||||
#include "hardware.h"
|
||||
|
||||
static int mx25_cpu_rev = -1;
|
||||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue