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[MIPS] Use correct dma flushing in dma_cache_sync() 

Not cache coherent R10k systems (like IP28) need to do real cache
invalidates in dma_cache_sync().

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thomas Bogendoerfer 2007-11-27 19:31:33 +01:00 committed by Ralf Baechle
parent 930bff8822
commit c7c6b39050
1 changed files with 1 additions and 1 deletions
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2
arch/mips/mm/dma-default.c
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@ -383,7 +383,7 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
BUG_ON(direction == DMA_NONE);
if (!plat_device_is_coherent(dev))
dma_cache_wback_inv((unsigned long)vaddr, size);
__dma_sync((unsigned long)vaddr, size, direction);
}
EXPORT_SYMBOL(dma_cache_sync);