intel-gtt add a cleanup function for chipset specific stuff
The old code didn't clean up the i830 chipset flush page. And it looks nicer. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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22533b494f
commit
ae83dd5c7d
1 changed files with 31 additions and 8 deletions
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@ -76,6 +76,9 @@ struct intel_gtt_driver {
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unsigned int dma_mask_size : 8;
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/* Chipset specific GTT setup */
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int (*setup)(void);
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/* This should undo anything done in ->setup() save the unmapping
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* of the mmio register file, that's done in the generic code. */
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void (*cleanup)(void);
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void (*write_entry)(dma_addr_t addr, unsigned int entry, unsigned int flags);
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/* Flags is a more or less chipset specific opaque value.
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* For chipsets that need to support old ums (non-gem) code, this
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@ -732,12 +735,8 @@ static void intel_gtt_teardown_scratch_page(void)
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static void intel_gtt_cleanup(void)
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{
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if (intel_private.i9xx_flush_page)
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iounmap(intel_private.i9xx_flush_page);
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if (intel_private.resource_valid)
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release_resource(&intel_private.ifp_resource);
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intel_private.ifp_resource.start = 0;
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intel_private.resource_valid = 0;
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intel_private.driver->cleanup();
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iounmap(intel_private.gtt);
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iounmap(intel_private.registers);
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@ -766,6 +765,7 @@ static int intel_gtt_init(void)
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intel_private.gtt = ioremap(intel_private.gtt_bus_addr,
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gtt_map_size);
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if (!intel_private.gtt) {
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intel_private.driver->cleanup();
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iounmap(intel_private.registers);
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return -ENOMEM;
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}
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@ -775,6 +775,7 @@ static int intel_gtt_init(void)
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/* we have to call this as early as possible after the MMIO base address is known */
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intel_private.base.gtt_stolen_entries = intel_gtt_stolen_entries();
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if (intel_private.base.gtt_stolen_entries == 0) {
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intel_private.driver->cleanup();
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iounmap(intel_private.registers);
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iounmap(intel_private.gtt);
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return -ENOMEM;
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@ -809,7 +810,7 @@ static int intel_fake_agp_fetch_size(void)
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return 0;
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}
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static void intel_i830_fini_flush(void)
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static void i830_cleanup(void)
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{
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kunmap(intel_private.i8xx_page);
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intel_private.i8xx_flush_page = NULL;
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@ -831,7 +832,7 @@ static void intel_i830_setup_flush(void)
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intel_private.i8xx_flush_page = kmap(intel_private.i8xx_page);
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if (!intel_private.i8xx_flush_page)
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intel_i830_fini_flush();
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i830_cleanup();
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}
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/* The chipset_flush interface needs to get data that has already been
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@ -1174,6 +1175,16 @@ static void intel_i9xx_setup_flush(void)
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"can't ioremap flush page - no chipset flushing\n");
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}
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static void i9xx_cleanup(void)
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{
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if (intel_private.i9xx_flush_page)
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iounmap(intel_private.i9xx_flush_page);
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if (intel_private.resource_valid)
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release_resource(&intel_private.ifp_resource);
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intel_private.ifp_resource.start = 0;
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intel_private.resource_valid = 0;
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}
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static void i9xx_chipset_flush(void)
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{
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if (intel_private.i9xx_flush_page)
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@ -1217,6 +1228,10 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
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writel(addr | pte_flags, intel_private.gtt + entry);
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}
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static void gen6_cleanup(void)
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{
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}
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static int i9xx_setup(void)
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{
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u32 reg_addr;
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@ -1315,6 +1330,7 @@ static const struct intel_gtt_driver i81x_gtt_driver = {
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static const struct intel_gtt_driver i8xx_gtt_driver = {
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.gen = 2,
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.setup = i830_setup,
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.cleanup = i830_cleanup,
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.write_entry = i830_write_entry,
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.dma_mask_size = 32,
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.check_flags = i830_check_flags,
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@ -1323,6 +1339,7 @@ static const struct intel_gtt_driver i8xx_gtt_driver = {
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static const struct intel_gtt_driver i915_gtt_driver = {
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.gen = 3,
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.setup = i9xx_setup,
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.cleanup = i9xx_cleanup,
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/* i945 is the last gpu to need phys mem (for overlay and cursors). */
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.write_entry = i830_write_entry,
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.dma_mask_size = 32,
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@ -1333,6 +1350,7 @@ static const struct intel_gtt_driver g33_gtt_driver = {
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.gen = 3,
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.is_g33 = 1,
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.setup = i9xx_setup,
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.cleanup = i9xx_cleanup,
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.write_entry = i965_write_entry,
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.dma_mask_size = 36,
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.check_flags = i830_check_flags,
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@ -1342,6 +1360,7 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
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.gen = 3,
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.is_pineview = 1, .is_g33 = 1,
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.setup = i9xx_setup,
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.cleanup = i9xx_cleanup,
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.write_entry = i965_write_entry,
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.dma_mask_size = 36,
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.check_flags = i830_check_flags,
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@ -1350,6 +1369,7 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
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static const struct intel_gtt_driver i965_gtt_driver = {
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.gen = 4,
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.setup = i9xx_setup,
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.cleanup = i9xx_cleanup,
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.write_entry = i965_write_entry,
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.dma_mask_size = 36,
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.check_flags = i830_check_flags,
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@ -1358,6 +1378,7 @@ static const struct intel_gtt_driver i965_gtt_driver = {
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static const struct intel_gtt_driver g4x_gtt_driver = {
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.gen = 5,
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.setup = i9xx_setup,
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.cleanup = i9xx_cleanup,
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.write_entry = i965_write_entry,
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.dma_mask_size = 36,
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.check_flags = i830_check_flags,
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@ -1367,6 +1388,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
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.gen = 5,
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.is_ironlake = 1,
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.setup = i9xx_setup,
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.cleanup = i9xx_cleanup,
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.write_entry = i965_write_entry,
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.dma_mask_size = 36,
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.check_flags = i830_check_flags,
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@ -1375,6 +1397,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
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static const struct intel_gtt_driver sandybridge_gtt_driver = {
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.gen = 6,
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.setup = i9xx_setup,
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.cleanup = gen6_cleanup,
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.write_entry = gen6_write_entry,
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.dma_mask_size = 40,
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.check_flags = gen6_check_flags,
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