Merge branch 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux
Pull i2c fixes from Wolfram Sang: "Bugfixes for the i2c subsystem. Except for a few one-liners, there is mainly one revert because of an overlooked dependency. Since there is no linux-next at the moment, I did some extra testing, and all was fine for me." * 'i2c-embedded/for-current' of git://git.pengutronix.de/git/wsa/linux: i2c: mxs: Handle i2c DMA failure properly i2c: s3c2410: Fix code to free gpios i2c: omap: ensure writes to dev->buf_len are ordered Revert "ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints" i2c: at91: fix SMBus quick command
This commit is contained in:
Linus Torvalds
commit
33f1459340
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@ -26,12 +26,14 @@
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <mach/irqs.h>
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#include <plat/i2c.h>
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#include <plat/omap-pm.h>
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#include <plat/omap_device.h>
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#define OMAP_I2C_SIZE 0x3f
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@ -127,6 +129,16 @@ static inline int omap1_i2c_add_bus(int bus_id)
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#ifdef CONFIG_ARCH_OMAP2PLUS
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/*
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* XXX This function is a temporary compatibility wrapper - only
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* needed until the I2C driver can be converted to call
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* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
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*/
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static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
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{
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omap_pm_set_max_mpu_wakeup_lat(dev, t);
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}
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static inline int omap2_i2c_add_bus(int bus_id)
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{
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int l;
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@ -158,6 +170,15 @@ static inline int omap2_i2c_add_bus(int bus_id)
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dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
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pdata->flags = dev_attr->flags;
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/*
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* When waiting for completion of a i2c transfer, we need to
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* set a wake up latency constraint for the MPU. This is to
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* ensure quick enough wakeup from idle, when transfer
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* completes.
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* Only omap3 has support for constraints
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*/
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if (cpu_is_omap34xx())
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pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
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pdev = omap_device_build(name, bus_id, oh, pdata,
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sizeof(struct omap_i2c_bus_platform_data),
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NULL, 0, 0);
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@ -39,6 +39,7 @@
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#define AT91_TWI_STOP 0x0002 /* Send a Stop Condition */
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#define AT91_TWI_MSEN 0x0004 /* Master Transfer Enable */
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#define AT91_TWI_SVDIS 0x0020 /* Slave Transfer Disable */
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#define AT91_TWI_QUICK 0x0040 /* SMBus quick command */
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#define AT91_TWI_SWRST 0x0080 /* Software Reset */
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#define AT91_TWI_MMR 0x0004 /* Master Mode Register */
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@ -212,7 +213,11 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
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INIT_COMPLETION(dev->cmd_complete);
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dev->transfer_status = 0;
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if (dev->msg->flags & I2C_M_RD) {
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if (!dev->buf_len) {
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at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_QUICK);
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at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP);
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} else if (dev->msg->flags & I2C_M_RD) {
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unsigned start_flags = AT91_TWI_START;
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if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) {
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@ -287,12 +287,14 @@ read_init_dma_fail:
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select_init_dma_fail:
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dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE);
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select_init_pio_fail:
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dmaengine_terminate_all(i2c->dmach);
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return -EINVAL;
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/* Write failpath. */
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write_init_dma_fail:
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dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE);
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write_init_pio_fail:
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dmaengine_terminate_all(i2c->dmach);
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return -EINVAL;
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}
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@ -43,7 +43,6 @@
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#include <linux/slab.h>
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#include <linux/i2c-omap.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_qos.h>
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/* I2C controller revisions */
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#define OMAP_I2C_OMAP1_REV_2 0x20
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@ -187,8 +186,9 @@ struct omap_i2c_dev {
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int reg_shift; /* bit shift for I2C register addresses */
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struct completion cmd_complete;
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struct resource *ioarea;
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u32 latency; /* maximum MPU wkup latency */
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struct pm_qos_request pm_qos_request;
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u32 latency; /* maximum mpu wkup latency */
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void (*set_mpu_wkup_lat)(struct device *dev,
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long latency);
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u32 speed; /* Speed of bus in kHz */
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u32 dtrev; /* extra revision from DT */
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u32 flags;
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@ -494,7 +494,9 @@ static void omap_i2c_resize_fifo(struct omap_i2c_dev *dev, u8 size, bool is_rx)
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dev->b_hw = 1; /* Enable hardware fixes */
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/* calculate wakeup latency constraint for MPU */
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dev->latency = (1000000 * dev->threshold) / (1000 * dev->speed / 8);
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if (dev->set_mpu_wkup_lat != NULL)
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dev->latency = (1000000 * dev->threshold) /
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(1000 * dev->speed / 8);
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}
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/*
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@ -522,6 +524,9 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
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dev->buf = msg->buf;
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dev->buf_len = msg->len;
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/* make sure writes to dev->buf_len are ordered */
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barrier();
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omap_i2c_write_reg(dev, OMAP_I2C_CNT_REG, dev->buf_len);
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/* Clear the FIFO Buffers */
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@ -579,7 +584,6 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adap,
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*/
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timeout = wait_for_completion_timeout(&dev->cmd_complete,
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OMAP_I2C_TIMEOUT);
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dev->buf_len = 0;
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if (timeout == 0) {
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dev_err(dev->dev, "controller timed out\n");
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omap_i2c_init(dev);
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@ -629,16 +633,8 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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if (r < 0)
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goto out;
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/*
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* When waiting for completion of a i2c transfer, we need to
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* set a wake up latency constraint for the MPU. This is to
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* ensure quick enough wakeup from idle, when transfer
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* completes.
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*/
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if (dev->latency)
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pm_qos_add_request(&dev->pm_qos_request,
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PM_QOS_CPU_DMA_LATENCY,
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dev->latency);
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if (dev->set_mpu_wkup_lat != NULL)
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dev->set_mpu_wkup_lat(dev->dev, dev->latency);
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for (i = 0; i < num; i++) {
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r = omap_i2c_xfer_msg(adap, &msgs[i], (i == (num - 1)));
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@ -646,8 +642,8 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
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break;
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}
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if (dev->latency)
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pm_qos_remove_request(&dev->pm_qos_request);
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if (dev->set_mpu_wkup_lat != NULL)
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dev->set_mpu_wkup_lat(dev->dev, -1);
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if (r == 0)
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r = num;
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@ -1104,6 +1100,7 @@ omap_i2c_probe(struct platform_device *pdev)
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} else if (pdata != NULL) {
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dev->speed = pdata->clkrate;
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dev->flags = pdata->flags;
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dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat;
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dev->dtrev = pdata->rev;
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}
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@ -1159,8 +1156,9 @@ omap_i2c_probe(struct platform_device *pdev)
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dev->b_hw = 1; /* Enable hardware fixes */
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/* calculate wakeup latency constraint for MPU */
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dev->latency = (1000000 * dev->fifo_size) /
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(1000 * dev->speed / 8);
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if (dev->set_mpu_wkup_lat != NULL)
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dev->latency = (1000000 * dev->fifo_size) /
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(1000 * dev->speed / 8);
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}
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/* reset ASAP, clearing any IRQs */
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@ -806,6 +806,7 @@ static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c)
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dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio);
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goto free_gpio;
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}
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i2c->gpios[idx] = gpio;
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ret = gpio_request(gpio, "i2c-bus");
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if (ret) {
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@ -34,6 +34,7 @@ struct omap_i2c_bus_platform_data {
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u32 clkrate;
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u32 rev;
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u32 flags;
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void (*set_mpu_wkup_lat)(struct device *dev, long set);
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};
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#endif
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