329 lines
8.1 KiB
C
329 lines
8.1 KiB
C
/* Interface handler for Sysmocom L1 (real hardware) */
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/* (C) 2011 by Harald Welte <laforge@gnumonks.org>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU Affero General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include <assert.h>
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#include <stdint.h>
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#include <unistd.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <osmocom/core/talloc.h>
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#include <osmocom/core/utils.h>
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#include <osmocom/core/select.h>
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#include <osmocom/core/write_queue.h>
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#include <osmocom/gsm/gsm_utils.h>
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#include <osmo-bts/logging.h>
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#include <osmo-bts/gsm_data.h>
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#include <sysmocom/femtobts/superfemto.h>
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#include <sysmocom/femtobts/gsml1prim.h>
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#include <sysmocom/femtobts/gsml1const.h>
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#include <sysmocom/femtobts/gsml1types.h>
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#include "femtobts.h"
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#include "l1_if.h"
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#include "l1_transp.h"
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#ifdef HW_SYSMOBTS_V1
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#define DEV_SYS_DSP2ARM_NAME "/dev/msgq/femtobts_dsp2arm"
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#define DEV_SYS_ARM2DSP_NAME "/dev/msgq/femtobts_arm2dsp"
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#define DEV_L1_DSP2ARM_NAME "/dev/msgq/gsml1_dsp2arm"
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#define DEV_L1_ARM2DSP_NAME "/dev/msgq/gsml1_arm2dsp"
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#else
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#define DEV_SYS_DSP2ARM_NAME "/dev/msgq/superfemto_dsp2arm"
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#define DEV_SYS_ARM2DSP_NAME "/dev/msgq/superfemto_arm2dsp"
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#define DEV_L1_DSP2ARM_NAME "/dev/msgq/gsml1_sig_dsp2arm"
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#define DEV_L1_ARM2DSP_NAME "/dev/msgq/gsml1_sig_arm2dsp"
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#define DEV_TCH_DSP2ARM_NAME "/dev/msgq/gsml1_tch_dsp2arm"
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#define DEV_TCH_ARM2DSP_NAME "/dev/msgq/gsml1_tch_arm2dsp"
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#define DEV_PDTCH_DSP2ARM_NAME "/dev/msgq/gsml1_pdtch_dsp2arm"
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#define DEV_PDTCH_ARM2DSP_NAME "/dev/msgq/gsml1_pdtch_arm2dsp"
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#endif
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static const char *rd_devnames[] = {
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[MQ_SYS_READ] = DEV_SYS_DSP2ARM_NAME,
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[MQ_L1_READ] = DEV_L1_DSP2ARM_NAME,
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#ifndef HW_SYSMOBTS_V1
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[MQ_TCH_READ] = DEV_TCH_DSP2ARM_NAME,
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[MQ_PDTCH_READ] = DEV_PDTCH_DSP2ARM_NAME,
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#endif
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};
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static const char *wr_devnames[] = {
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[MQ_SYS_WRITE] = DEV_SYS_ARM2DSP_NAME,
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[MQ_L1_WRITE] = DEV_L1_ARM2DSP_NAME,
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#ifndef HW_SYSMOBTS_V1
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[MQ_TCH_WRITE] = DEV_TCH_ARM2DSP_NAME,
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[MQ_PDTCH_WRITE]= DEV_PDTCH_ARM2DSP_NAME,
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#endif
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};
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/*
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* Make sure that all structs we read fit into the SYSMOBTS_PRIM_SIZE
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*/
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osmo_static_assert(sizeof(GsmL1_Prim_t) + 128 <= SYSMOBTS_PRIM_SIZE, l1_prim)
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osmo_static_assert(sizeof(SuperFemto_Prim_t) + 128 <= SYSMOBTS_PRIM_SIZE, super_prim)
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static int wqueue_vector_cb(struct osmo_fd *fd, unsigned int what)
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{
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struct osmo_wqueue *queue;
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queue = container_of(fd, struct osmo_wqueue, bfd);
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if (what & BSC_FD_READ)
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queue->read_cb(fd);
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if (what & BSC_FD_EXCEPT)
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queue->except_cb(fd);
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if (what & BSC_FD_WRITE) {
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struct iovec iov[5];
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struct msgb *msg, *tmp;
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int written, count = 0;
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fd->when &= ~BSC_FD_WRITE;
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llist_for_each_entry(msg, &queue->msg_queue, list) {
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/* more writes than we have */
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if (count >= ARRAY_SIZE(iov))
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break;
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iov[count].iov_base = msg->l1h;
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iov[count].iov_len = msgb_l1len(msg);
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count += 1;
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}
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/* TODO: check if all lengths are the same. */
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/* Nothing scheduled? This should not happen. */
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if (count == 0) {
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if (!llist_empty(&queue->msg_queue))
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fd->when |= BSC_FD_WRITE;
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return 0;
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}
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written = writev(fd->fd, iov, count);
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if (written < 0) {
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/* nothing written?! */
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if (!llist_empty(&queue->msg_queue))
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fd->when |= BSC_FD_WRITE;
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return 0;
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}
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/* now delete the written entries */
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written = written / iov[0].iov_len;
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count = 0;
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llist_for_each_entry_safe(msg, tmp, &queue->msg_queue, list) {
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queue->current_length -= 1;
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llist_del(&msg->list);
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msgb_free(msg);
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count += 1;
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if (count >= written)
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break;
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}
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if (!llist_empty(&queue->msg_queue))
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fd->when |= BSC_FD_WRITE;
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}
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return 0;
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}
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static int prim_size_for_queue(int queue)
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{
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switch (queue) {
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case MQ_SYS_WRITE:
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return sizeof(SuperFemto_Prim_t);
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case MQ_L1_WRITE:
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#ifndef HW_SYSMOBTS_V1
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case MQ_TCH_WRITE:
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case MQ_PDTCH_WRITE:
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#endif
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return sizeof(GsmL1_Prim_t);
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default:
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/* The compiler can't know that priv_nr is an enum. Assist. */
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LOGP(DL1C, LOGL_FATAL, "writing on a wrong queue: %d\n",
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queue);
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assert(false);
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break;
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}
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}
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/* callback when there's something to read from the l1 msg_queue */
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static int read_dispatch_one(struct femtol1_hdl *fl1h, struct msgb *msg, int queue)
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{
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switch (queue) {
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case MQ_SYS_WRITE:
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return l1if_handle_sysprim(fl1h, msg);
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case MQ_L1_WRITE:
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#ifndef HW_SYSMOBTS_V1
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case MQ_TCH_WRITE:
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case MQ_PDTCH_WRITE:
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#endif
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return l1if_handle_l1prim(queue, fl1h, msg);
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default:
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/* The compiler can't know that priv_nr is an enum. Assist. */
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LOGP(DL1C, LOGL_FATAL, "writing on a wrong queue: %d\n",
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queue);
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assert(false);
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break;
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}
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};
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static int l1if_fd_cb(struct osmo_fd *ofd, unsigned int what)
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{
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int i, rc;
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const uint32_t prim_size = prim_size_for_queue(ofd->priv_nr);
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uint32_t count;
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struct iovec iov[3];
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struct msgb *msg[ARRAY_SIZE(iov)];
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for (i = 0; i < ARRAY_SIZE(iov); ++i) {
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msg[i] = msgb_alloc_headroom(prim_size + 128, 128, "1l_fd");
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msg[i]->l1h = msg[i]->data;
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iov[i].iov_base = msg[i]->l1h;
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iov[i].iov_len = msgb_tailroom(msg[i]);
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}
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rc = readv(ofd->fd, iov, ARRAY_SIZE(iov));
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if (rc < 0) {
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LOGP(DL1C, LOGL_ERROR, "failed to read from fd: %s\n", strerror(errno));
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/* N. B: we do not abort to let the cycle below cleanup allocated memory properly,
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the return value is ignored by the caller anyway.
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TODO: use libexplain's explain_readv() to provide detailed error description */
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count = 0;
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} else
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count = rc / prim_size;
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for (i = 0; i < count; ++i) {
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msgb_put(msg[i], prim_size);
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read_dispatch_one(ofd->data, msg[i], ofd->priv_nr);
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}
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for (i = count; i < ARRAY_SIZE(iov); ++i)
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msgb_free(msg[i]);
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return 1;
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}
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/* callback when we can write to one of the l1 msg_queue devices */
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static int l1fd_write_cb(struct osmo_fd *ofd, struct msgb *msg)
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{
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int rc;
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rc = write(ofd->fd, msg->l1h, msgb_l1len(msg));
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if (rc < 0) {
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LOGP(DL1C, LOGL_ERROR, "error writing to L1 msg_queue: %s\n",
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strerror(errno));
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return rc;
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} else if (rc < msg->len) {
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LOGP(DL1C, LOGL_ERROR, "short write to L1 msg_queue: "
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"%u < %u\n", rc, msg->len);
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return -EIO;
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}
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return 0;
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}
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int l1if_transport_open(int q, struct femtol1_hdl *hdl)
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{
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int rc;
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/* Step 1: Open all msg_queue file descriptors */
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struct osmo_fd *read_ofd = &hdl->read_ofd[q];
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struct osmo_wqueue *wq = &hdl->write_q[q];
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struct osmo_fd *write_ofd = &hdl->write_q[q].bfd;
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rc = open(rd_devnames[q], O_RDONLY);
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if (rc < 0) {
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LOGP(DL1C, LOGL_FATAL, "[%d] unable to open %s for reading: %s\n",
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q, rd_devnames[q], strerror(errno));
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return rc;
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}
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read_ofd->fd = rc;
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read_ofd->priv_nr = q;
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read_ofd->data = hdl;
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read_ofd->cb = l1if_fd_cb;
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read_ofd->when = BSC_FD_READ;
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rc = osmo_fd_register(read_ofd);
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if (rc < 0) {
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close(read_ofd->fd);
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read_ofd->fd = -1;
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return rc;
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}
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rc = open(wr_devnames[q], O_WRONLY);
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if (rc < 0) {
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LOGP(DL1C, LOGL_FATAL, "[%d] unable to open %s for writing: %s\n",
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q, wr_devnames[q], strerror(errno));
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goto out_read;
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}
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osmo_wqueue_init(wq, 10);
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wq->write_cb = l1fd_write_cb;
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write_ofd->cb = wqueue_vector_cb;
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write_ofd->fd = rc;
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write_ofd->priv_nr = q;
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write_ofd->data = hdl;
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write_ofd->when = BSC_FD_WRITE;
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rc = osmo_fd_register(write_ofd);
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if (rc < 0) {
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close(write_ofd->fd);
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write_ofd->fd = -1;
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goto out_read;
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}
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return 0;
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out_read:
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close(hdl->read_ofd[q].fd);
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osmo_fd_unregister(&hdl->read_ofd[q]);
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return rc;
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}
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int l1if_transport_close(int q, struct femtol1_hdl *hdl)
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{
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struct osmo_fd *read_ofd = &hdl->read_ofd[q];
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struct osmo_fd *write_ofd = &hdl->write_q[q].bfd;
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osmo_fd_unregister(read_ofd);
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close(read_ofd->fd);
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read_ofd->fd = -1;
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osmo_fd_unregister(write_ofd);
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close(write_ofd->fd);
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write_ofd->fd = -1;
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return 0;
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}
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