2022-04-11 16:59:58 +00:00
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/* AMR link adaptation loop (see 3GPP TS 45.009, section 3) */
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2013-02-24 10:09:19 +00:00
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/* (C) 2013 by Andreas Eversberg <jolly@eversberg.eu>
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2022-04-12 13:12:41 +00:00
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* (C) 2022 by sysmocom - s.m.f.c. GmbH <info@sysmocom.de>
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2013-02-24 10:09:19 +00:00
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Affero General Public License as published by
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* the Free Software Foundation; either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU Affero General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include <stdint.h>
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#include <unistd.h>
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#include <stdlib.h>
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#include <errno.h>
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2019-11-05 11:41:28 +00:00
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#include <inttypes.h>
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2013-02-24 10:09:19 +00:00
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#include <osmo-bts/gsm_data.h>
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#include <osmo-bts/logging.h>
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2019-11-05 11:41:28 +00:00
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#include <osmocom/gsm/gsm_utils.h>
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2013-02-24 10:09:19 +00:00
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2022-04-11 16:59:58 +00:00
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#include "amr_loop.h"
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2013-02-24 10:09:19 +00:00
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[VAMOS] Re-organize osmo-bts-trx specific structures
Together with the 'generic' structures which used to be shared between
osmo-bsc and osmo-bts some time ago, we also have the following
osmo-bts-trx specific structures (in hierarchical order):
- struct l1sched_trx (struct gsm_bts_trx),
- struct l1sched_ts (struct gsm_bts_trx_ts),
- struct l1sched_chan_state (struct gsm_lchan).
These structures are not integrated into the tree of the generic
structures, but maintained in a _separate tree_ instead. Until
recently, only the 'l1sched_trx' had a pointer to generic
'gsm_bts_trx', so in order to find the corresponding 'gsm_lchan' for
'l1sched_chan_state' one would need to traverse all the way up to
'l1sched_trx' and then tracerse another three backwards.
+ gsm_network
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--+ gsm_bts (0..255)
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--+ l1sched_trx --------------------> gsm_bts_trx (0..255)
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--+ l1sched_trx_ts --+ gsm_bts_trx_ts (8)
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--+ l1sched_chan_state --+ gsm_lchan (up to 8)
I find this architecture a bit over-complicated, especially given
that 'l1sched_trx' is kind of a dummy node containing nothing else
than a pointer to 'gsm_bts_trx' and the list of 'l1sched_trx_ts'.
In this path I slightly change the architecture as follows:
+ gsm_network
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--+ gsm_bts (0..255)
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--+ gsm_bts_trx (0..255)
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--+ l1sched_trx_ts <----------------> gsm_bts_trx_ts (8)
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--+ l1sched_chan_state --+ gsm_lchan (up to 8)
Note that unfortunately we cannot 1:1 map 'l1sched_chan_state' to
'gsm_lchan' (like we do for 'l1sched_trx_ts' and 'gsm_bts_trx_ts')
because there is no direct mapping. The former is a higl-level
representation of a logical channel, while the later represents
one specific logical channel type like FCCH, SDCCH/0 or SACCH/0.
osmo-bts-virtual re-uses the osmo-bts-trx hierarchy, so it's also
affected by this change.
Change-Id: I7c4379e43a25e9d858d582a99bf6c4b65c9af481
2021-05-07 13:47:57 +00:00
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void trx_loop_amr_input(struct l1sched_chan_state *chan_state,
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2022-04-12 13:12:41 +00:00
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const struct l1sched_meas_set *meas_set)
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2013-03-26 08:05:14 +00:00
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{
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2022-04-12 13:12:41 +00:00
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const struct gsm_lchan *lchan = chan_state->lchan;
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const struct amr_multirate_conf *cfg = &lchan->tch.amr_mr;
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2022-04-13 15:09:11 +00:00
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const uint8_t mi = chan_state->ul_ft; /* mode index 0..3 */
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2022-04-12 13:12:41 +00:00
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int lqual_cb = meas_set->ci_cb; /* cB (centibel) */
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2013-03-26 08:05:14 +00:00
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/* check if loop is enabled */
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if (!chan_state->amr_loop)
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2018-12-12 22:20:29 +00:00
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return;
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2013-03-26 08:05:14 +00:00
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/* wait for MS to use the requested codec */
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2022-04-13 15:09:11 +00:00
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if (mi != chan_state->dl_cmr)
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2018-12-12 22:20:29 +00:00
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return;
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2013-03-26 08:05:14 +00:00
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2022-04-12 13:12:41 +00:00
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/* count per-block C/I samples for further averaging */
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[VAMOS] Re-organize osmo-bts-trx specific structures
Together with the 'generic' structures which used to be shared between
osmo-bsc and osmo-bts some time ago, we also have the following
osmo-bts-trx specific structures (in hierarchical order):
- struct l1sched_trx (struct gsm_bts_trx),
- struct l1sched_ts (struct gsm_bts_trx_ts),
- struct l1sched_chan_state (struct gsm_lchan).
These structures are not integrated into the tree of the generic
structures, but maintained in a _separate tree_ instead. Until
recently, only the 'l1sched_trx' had a pointer to generic
'gsm_bts_trx', so in order to find the corresponding 'gsm_lchan' for
'l1sched_chan_state' one would need to traverse all the way up to
'l1sched_trx' and then tracerse another three backwards.
+ gsm_network
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--+ gsm_bts (0..255)
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--+ l1sched_trx --------------------> gsm_bts_trx (0..255)
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--+ l1sched_trx_ts --+ gsm_bts_trx_ts (8)
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--+ l1sched_chan_state --+ gsm_lchan (up to 8)
I find this architecture a bit over-complicated, especially given
that 'l1sched_trx' is kind of a dummy node containing nothing else
than a pointer to 'gsm_bts_trx' and the list of 'l1sched_trx_ts'.
In this path I slightly change the architecture as follows:
+ gsm_network
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--+ gsm_bts (0..255)
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--+ gsm_bts_trx (0..255)
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--+ l1sched_trx_ts <----------------> gsm_bts_trx_ts (8)
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--+ l1sched_chan_state --+ gsm_lchan (up to 8)
Note that unfortunately we cannot 1:1 map 'l1sched_chan_state' to
'gsm_lchan' (like we do for 'l1sched_trx_ts' and 'gsm_bts_trx_ts')
because there is no direct mapping. The former is a higl-level
representation of a logical channel, while the later represents
one specific logical channel type like FCCH, SDCCH/0 or SACCH/0.
osmo-bts-virtual re-uses the osmo-bts-trx hierarchy, so it's also
affected by this change.
Change-Id: I7c4379e43a25e9d858d582a99bf6c4b65c9af481
2021-05-07 13:47:57 +00:00
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if (lchan->type == GSM_LCHAN_TCH_H) {
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2022-04-12 13:12:41 +00:00
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chan_state->lqual_cb_num += 2;
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chan_state->lqual_cb_sum += (lqual_cb + lqual_cb);
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2013-03-26 08:05:14 +00:00
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} else {
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2022-04-12 13:12:41 +00:00
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chan_state->lqual_cb_num++;
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chan_state->lqual_cb_sum += lqual_cb;
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2013-03-26 08:05:14 +00:00
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}
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/* count frames */
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2022-04-12 13:12:41 +00:00
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if (chan_state->lqual_cb_num < 48)
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2018-12-12 22:20:29 +00:00
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return;
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2013-03-26 08:05:14 +00:00
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2022-04-12 13:12:41 +00:00
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/* calculate average (reuse lqual_cb variable) */
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lqual_cb = chan_state->lqual_cb_sum / chan_state->lqual_cb_num;
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2013-03-26 08:05:14 +00:00
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2022-04-12 13:12:41 +00:00
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LOGPLCHAN(lchan, DLOOP, LOGL_DEBUG, "AMR link quality (C/I) is %d cB, "
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2022-04-13 15:09:11 +00:00
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"codec mode[%u]=%u\n", lqual_cb, mi, cfg->mode[mi].mode);
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2013-03-26 08:05:14 +00:00
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2022-04-12 13:12:41 +00:00
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/* reset the link quality measurements */
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chan_state->lqual_cb_num = 0;
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chan_state->lqual_cb_sum = 0;
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2013-03-26 08:05:14 +00:00
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2022-04-13 15:16:05 +00:00
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/* If the current codec mode can be degraded */
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2022-04-13 15:09:11 +00:00
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if (mi > 0) {
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2022-04-12 13:12:41 +00:00
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/* The threshold/hysteresis is in 0.5 dB steps, convert to cB:
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* 1dB is 10cB, so 0.5dB is 5cB - this is why we multiply by 5. */
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2022-04-13 15:09:11 +00:00
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const int thresh_lower_cb = cfg->mode[mi - 1].threshold * 5;
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2022-04-12 13:12:41 +00:00
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/* Degrade if the link quality is below THR_MX_Dn(i - 1) */
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if (lqual_cb < thresh_lower_cb) {
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LOGPLCHAN(lchan, DLOOP, LOGL_INFO, "Degrading AMR codec mode: "
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2022-04-13 15:09:11 +00:00
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"[%u]=%u -> [%u]=%u due to link quality %d cB < THR_MX_Dn=%d cB\n",
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mi, cfg->mode[mi].mode, mi - 1, cfg->mode[mi - 1].mode,
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2022-04-12 13:12:41 +00:00
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lqual_cb, thresh_lower_cb);
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2013-03-26 08:05:14 +00:00
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chan_state->dl_cmr--;
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2022-04-13 15:16:05 +00:00
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return;
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2013-03-26 08:05:14 +00:00
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}
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2022-04-13 15:16:05 +00:00
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}
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/* If the current codec mode can be upgraded */
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if (mi < chan_state->codecs - 1) {
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2022-04-12 13:12:41 +00:00
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/* The threshold/hysteresis is in 0.5 dB steps, convert to cB:
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* 1dB is 10cB, so 0.5dB is 5cB - this is why we multiply by 5. */
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2022-04-13 15:09:11 +00:00
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const int thresh_upper_cb = cfg->mode[mi].threshold * 5 \
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+ cfg->mode[mi].hysteresis * 5;
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2022-04-12 13:12:41 +00:00
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/* Upgrade if the link quality is above THR_MX_Up(i) */
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if (lqual_cb > thresh_upper_cb) {
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LOGPLCHAN(lchan, DLOOP, LOGL_INFO, "Upgrading AMR codec mode: "
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2022-04-13 15:09:11 +00:00
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"[%u]=%u -> [%u]=%u due to link quality %d cB > THR_MX_Up=%d cB\n",
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mi, cfg->mode[mi].mode, mi + 1, cfg->mode[mi + 1].mode,
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2022-04-12 13:12:41 +00:00
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lqual_cb, thresh_upper_cb);
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2013-03-26 08:05:14 +00:00
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chan_state->dl_cmr++;
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2022-04-13 15:16:05 +00:00
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return;
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2013-03-26 08:05:14 +00:00
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}
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}
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}
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2018-12-12 22:20:29 +00:00
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void trx_loop_amr_set(struct l1sched_chan_state *chan_state, int loop)
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2013-03-26 08:05:14 +00:00
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{
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2022-04-13 13:59:54 +00:00
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if (chan_state->amr_loop == loop)
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2018-12-12 22:20:29 +00:00
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return;
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2022-04-13 13:59:54 +00:00
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if (!chan_state->amr_loop) {
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2022-04-12 13:12:41 +00:00
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/* reset the link quality measurements */
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chan_state->lqual_cb_num = 0;
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chan_state->lqual_cb_sum = 0;
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2013-03-26 08:05:14 +00:00
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}
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2022-04-13 13:59:54 +00:00
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chan_state->amr_loop = loop;
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2013-03-26 08:05:14 +00:00
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}
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