2013-02-05 10:45:28 +00:00
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#ifndef TRX_SCHEDULER_H
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#define TRX_SCHEDULER_H
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extern uint32_t trx_clock_advance;
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extern uint32_t tranceiver_last_fn;
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int trx_sched_init(struct trx_l1h *l1h);
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void trx_sched_exit(struct trx_l1h *l1h);
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int trx_sched_ph_data_req(struct trx_l1h *l1h, struct osmo_phsap_prim *l1sap);
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int trx_sched_tch_req(struct trx_l1h *l1h, struct osmo_phsap_prim *l1sap);
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int trx_sched_clock(uint32_t fn);
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int trx_sched_ul_burst(struct trx_l1h *l1h, uint8_t tn, uint32_t fn,
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2013-02-11 11:52:56 +00:00
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sbit_t *bits, int8_t rssi, float toa);
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2013-02-05 10:45:28 +00:00
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/* set multiframe scheduler to given pchan */
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int trx_sched_set_pchan(struct trx_l1h *l1h, uint8_t tn,
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enum gsm_phys_chan_config pchan);
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/* setting all logical channels given attributes to active/inactive */
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int trx_sched_set_lchan(struct trx_l1h *l1h, uint8_t chan_nr, uint8_t link_id,
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2013-03-14 06:56:05 +00:00
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int downlink);
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2013-02-05 10:45:28 +00:00
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2013-02-14 10:21:13 +00:00
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/* setting all logical channels given attributes to active/inactive */
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int trx_sched_set_mode(struct trx_l1h *l1h, uint8_t chan_nr, uint8_t rsl_cmode,
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uint8_t tch_mode);
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2013-02-21 08:27:52 +00:00
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/* setting cipher on logical channels */
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int trx_sched_set_cipher(struct trx_l1h *l1h, uint8_t chan_nr, int downlink,
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int algo, uint8_t *key, int key_len);
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2013-02-05 15:53:04 +00:00
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/* close all logical channels and reset timeslots */
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void trx_sched_reset(struct trx_l1h *l1h);
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2013-02-05 10:45:28 +00:00
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#endif /* TRX_SCHEDULER_H */
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