From 96501d0be6a2b9bc3a46abe5f6ed6dbb1906ec8f Mon Sep 17 00:00:00 2001 From: Harald Welte Date: Mon, 14 Jan 2019 22:46:34 +0100 Subject: [PATCH] Add new CCID_Templates module containing USB-CCID related templates --- src/CCID_Templates.ttcn | 273 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 273 insertions(+) create mode 100644 src/CCID_Templates.ttcn diff --git a/src/CCID_Templates.ttcn b/src/CCID_Templates.ttcn new file mode 100644 index 0000000..740b1c5 --- /dev/null +++ b/src/CCID_Templates.ttcn @@ -0,0 +1,273 @@ +module CCID_Templates { + +import from Osmocom_Types all; +import from General_Types all; +import from USB_Types all; +import from CCID_Types all; + +/*********************************************************************** + * Bulk OUT + ***********************************************************************/ + +template (value) CCID_Header ts_CCID_Header(CCID_MsgType msgt, uint32_t len := 10, uint8_t slot := 0, uint8_t seq := 0) := { + bMessageType := msgt, + dwLength := len, + bSlot := slot, + bSeq := seq +} + +template CCID_Header tr_CCID_Header(template CCID_MsgType msgt, template uint32_t len := ?, + template uint8_t slot := ?, template uint8_t seq := ?) := { + bMessageType := msgt, + dwLength := len, + bSlot := slot, + bSeq := seq +} + + +template (value) CCID_PDU ts_CCID_IccPowerOn(uint8_t slot, CCID_PowerSelect psel, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_IccPowerOn, 10, slot, seq), + hdr_in := omit, + u := { + IccPowerOn := { + bPowerSelect := psel, + abRFU := '0000'O + } + } +} + +template (value) CCID_PDU ts_CCID_IccPowerOff(uint8_t slot, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_IccPowerOff, 10, slot, seq), + hdr_in := omit, + u := { + IccPowerOff := { + abRFU := '000000'O + } + } +} + +template (value) CCID_PDU ts_CCID_GetSlotStatus(uint8_t slot, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_GetSlotStatus, 10, slot, seq), + hdr_in := omit, + u := { + GetSlotStatus := { + abRFU := '000000'O + } + } +} + +template (value) CCID_PDU ts_CCID_XfrBlock(uint8_t slot, octetstring data, uint8_t seq := 0, uint8_t bwi, uint16_t level) := { + hdr := ts_CCID_Header(PC_to_RDR_XfrBlock, 10 + lengthof(data), slot, seq), + hdr_in := omit, + u := { + XfrBlock := { + bBWI := bwi, + wLevelParameter := level, + abData := data + } + } +} + +template (value) CCID_PDU ts_CCID_GetParameters(uint8_t slot, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_GetParameters, 10, slot, seq), + hdr_in := omit, + u := { + GetParameters := { + abRFU := '000000'O + } + } +} + +template (value) CCID_PDU ts_CCID_ResetParameters(uint8_t slot, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_ResetParameters, 10, slot, seq), + hdr_in := omit, + u := { + ResetParameters := { + abRFU := '000000'O + } + } +} + +private function get_pdata_size(CCID_ProtocolData pd) return integer { + if (ischosen(pd.T0)) { + return 5; + } else { + return 7; + } +} + +template (value) CCID_PDU ts_CCID_SetParameters(uint8_t slot, CCID_ProtocolData pd, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_ResetParameters, 10+get_pdata_size(pd), slot, seq), + hdr_in := omit, + u := { + SetParameters := { + abRFU := '0000'O, + abProtocolData := pd + } + } +} + +template (value) CCID_PDU ts_CCID_Escape(uint8_t slot, octetstring data, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_Escape, 10+lengthof(data), slot, seq), + hdr_in := omit, + u := { + EscapeOut := { + abRFU := '000000'O, + abData := data + } + } +} + +template (value) CCID_PDU ts_CCID_ClockCommand(uint8_t slot, CCID_ClockCommand cmd, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_IccClock, 10, slot, seq), + hdr_in := omit, + u := { + IccClock := { + bClockCommand := cmd, + abRFU := '0000'O + } + } +} + +template (value) CCID_PDU ts_CCID_T0APDU(uint8_t slot, uint8_t changes, uint8_t get_resp, + uint8_t envelope, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_T0APDU, 10, slot, seq), + hdr_in := omit, + u := { + T0APDU := { + bmChanges := changes, + bClassGetResponse := get_resp, + bClassEnvelope := envelope + } + } +} + +template (value) CCID_PDU ts_CCID_Secure(uint8_t slot, uint8_t bwi, uint16_t level, octetstring data, + uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_Secure, 10 + lengthof(data), slot, seq), + hdr_in := omit, + u := { + Secure := { + bBWI := bwi, + wLevelParameter := level, + abData := data + } + } +} + +template (value) CCID_PDU ts_CCID_Mechanical(uint8_t slot, CCID_MechanicalFunction func, + uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_Mechanical, 10, slot, seq), + hdr_in := omit, + u := { + Mechanical := { + bFunction := func, + abRFU := '0000'O + } + } +} + +template (value) CCID_PDU ts_CCID_Abort(uint8_t slot, uint8_t seq := 0) := { + hdr := ts_CCID_Header(PC_to_RDR_Mechanical, 10, slot, seq), + hdr_in := omit, + u := { + Abort := { + abRFU := '000000'O + } + } +} + + +/*********************************************************************** + * Bulk IN + ***********************************************************************/ + +template CCID_PDU tr_CCID_DataBlock(template uint8_t slot := ?, template uint9_t seq := ?, + template octetstring data := ?) := { + hdr := tr_CCID_Header(RDR_to_PC_DataBlock, ?, slot, seq), + hdr_in := ?, + u := { + DataBlock := { + bChainParameter := ?, + abData := data + } + } +} + +template CCID_PDU tr_CCID_SlotStatus(template uint8_t slot := ?, template uint8_t seq := ?, + template CCID_ClockStatus csts := ?) := { + hdr := tr_CCID_Header(RDR_to_PC_SlotStatus, 10, slot, seq), + hdr_in := ?, + u := { + SlotStatus := { + bClockStatus := csts + } + } +} + +template CCID_PDU tr_CCID_Parameters(template uint8_t slot := ?, template uint8_t seq := ?, + template CCID_ProtocolData pd := ?) := { + hdr := tr_CCID_Header(RDR_to_PC_Parameters, ?, slot, seq), + hdr_in := ?, + u := { + Parameters := { + abProtocolData := pd + } + } +} + +template CCID_PDU tr_CCID_EscapeIN(template uint8_t slot := ?, template uint8_t seq := ?, + template octetstring data := ?) := { + hdr := tr_CCID_Header(RDR_to_PC_Escape, ?, slot, seq), + hdr_in := ?, + u := { + EscapeIn := { + bRFU := ?, + abData := data + } + } +} + +template CCID_PDU tr_CCID_DataRateAndClock(template uint8_t slot := ?, template uint8_t seq := ?, + template uint32_t clock_freq := ?, + template uint32_t data_rate := ?) := { + hdr := tr_CCID_Header(RDR_to_PC_DataRateAndClock, 18, slot, seq), + hdr_in := ?, + u := { + DataRateAndClock := { + bRFU := ?, + dwClockFrequency := clock_freq, + dwDataRate := data_rate + } + } +} + + +/*********************************************************************** + * Interrupt IN + ***********************************************************************/ + +template CCID_PDU tr_CCID_NotifySlotChange(template uint8_t slot := ?, template uint8_t seq := ?, + template bitstring slot_cc_state := ?) := { + hdr := tr_CCID_Header(RDR_to_PC_NotifySlotChange, ?, slot, seq), + hdr_in := ?, + u := { + NotifySlotChange := { + bmSlotCCState := slot_cc_state + } + } +} + +template CCID_PDU tr_CCID_HardwareError(template uint8_t slot := ?, template uint8_t seq := ?, + template CCID_HardwareErrorCode code := ?) := { + hdr := tr_CCID_Header(RDR_to_PC_HardwareError, ?, slot, seq), + hdr_in := ?, + u := { + HardwareError := { + bHardwareErrorCode := code + } + } +} + + +}