GPRS_Components: use more suitable SAPI for DL TBF assignment

The function that assigns the downlink TBF f_ms_exp_dl_tbf_ass_ccch()
uses SAPI PCU_IF_SAPI_AGCH as default but actually downlink TBFs are
assigned via the PCH. This means we have to put PCU_IF_SAPI_PCH into the
parameter list on every function call, so it makes sense to change the
default to PCU_IF_SAPI_PCH and omit the SAPI when calling the function

Related: OS#5927
Change-Id: I49c59bad0162cb303669f6108201f154918b1db3
This commit is contained in:
Philipp Maier 2023-07-18 15:47:16 +02:00
parent ba272329b5
commit 8e1a5ee4b4
2 changed files with 31 additions and 31 deletions

View File

@ -628,7 +628,7 @@ runs on MS_BTS_IFACE_CT {
ms.ul_tbf := f_ultbf_new_from_rr_imm_ass(rr_imm_ass);
}
function f_ms_exp_dl_tbf_ass_ccch(inout GprsMS ms, template PCUIF_Sapi sapi := PCU_IF_SAPI_AGCH,
function f_ms_exp_dl_tbf_ass_ccch(inout GprsMS ms, template PCUIF_Sapi sapi := PCU_IF_SAPI_PCH,
template GsmRrMessage t_imm_ass := tr_IMM_TBF_ASS(true, ?, ?),
template (present) TsTrxBtsNum nr := tr_TsTrxBtsNum)
runs on MS_BTS_IFACE_CT {

View File

@ -447,7 +447,7 @@ testcase TC_pcuif_suspend_active_tbf() runs on RAW_PCU_Test_CT {
/* Now SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -480,7 +480,7 @@ testcase TC_pcuif_suspend_active_tbf() runs on RAW_PCU_Test_CT {
/* New data arrives, PCU should page the MS since no TBF active exists: */
/* Send some more data, it will never reach the MS */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
f_shutdown(__BFILE__, __LINE__, final := true);
}
@ -593,7 +593,7 @@ testcase TC_ta_idle_dl_tbf_ass() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will initiate Packet Downlink
* Assignment on CCCH (PCH). We don't care about the payload. */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, f_rnd_octstring(10)));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Make sure that Timing Advance is 0 (the actual value is not known yet).
* As per 3GPP S 44.018, section 3.5.3.1.2, the network *shall* initiate
@ -1060,7 +1060,7 @@ testcase TC_cs_initial_dl() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -1103,7 +1103,7 @@ function f_dl_data_exp_cs(template (present) CodingScheme exp_final_cs := ?, tem
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, ms_racap));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS */
f_sleep(X2002);
@ -1333,7 +1333,7 @@ testcase TC_mcs_initial_dl() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, bssgp_ms_racap_egprs_def));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -1727,7 +1727,7 @@ testcase TC_x2031_t3191() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data1));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -1786,7 +1786,7 @@ testcase TC_x2031_t3191() runs on RAW_PCU_Test_CT {
/* The TBF should be freed now, so new data should trigger an Assignment: */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data2));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -1828,7 +1828,7 @@ testcase TC_zero_x2031_t3191() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data1));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -1861,7 +1861,7 @@ testcase TC_zero_x2031_t3191() runs on RAW_PCU_Test_CT {
/* The TBF should be freed now, so new data should trigger an Assignment: */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data2));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -1907,7 +1907,7 @@ testcase TC_t3193() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -1981,7 +1981,7 @@ testcase TC_n3105_max_t3195() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data1));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -2054,7 +2054,7 @@ testcase TC_n3105_max_t3195() runs on RAW_PCU_Test_CT {
/* after T_3195 timeout, TBF is released */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data2));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -2119,7 +2119,7 @@ function f_TC_t3172(integer t3172_ms, BIT1 wait_ind_size) runs on RAW_PCU_Test_C
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -2435,7 +2435,7 @@ private function f_TC_mo_ping_pong_1phase_access(template (present) CodingScheme
/* Now SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -2625,7 +2625,7 @@ runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, ms_racap));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -2780,7 +2780,7 @@ testcase TC_imm_ass_dl_block_retrans() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -2789,7 +2789,7 @@ testcase TC_imm_ass_dl_block_retrans() runs on RAW_PCU_Test_CT {
/* Now we don't ack the dl block (emulate MS failed receiveing IMM ASS
* or GPRS DL, or DL ACK was lost for some reason). As a result, PCU
* should retrigger IMM ASS + GPRS DL procedure after poll timeout. */
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -2831,7 +2831,7 @@ testcase TC_dl_flow_more_blocks() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS */
f_sleep(X2002);
@ -3028,7 +3028,7 @@ testcase TC_dl_no_ack_retrans_imm_ass() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data1));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -3047,7 +3047,7 @@ testcase TC_dl_no_ack_retrans_imm_ass() runs on RAW_PCU_Test_CT {
}
/* PCU starts whole process again */
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -3132,7 +3132,7 @@ testcase TC_dl_llc_sapi_priority() runs on RAW_PCU_Test_CT {
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi7));
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi8));
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi1));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS */
f_sleep(X2002);
@ -3574,7 +3574,7 @@ function f_TC_ul_tbf_reestablish_with_pkt_dl_ack_nack(boolean use_egprs) runs on
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, racap_tmpl));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -3853,7 +3853,7 @@ testcase TC_bssgp_dl_unitdata_with_valid_imsi() runs on RAW_PCU_Test_CT {
/* Now SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, imsi := ts_BSSGP_IMSI(ms.imsi)));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
@ -3945,7 +3945,7 @@ private function f_tc_dl_data_no_llc_ui_dummy(template (omit) MSRadioAccessCapab
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, ms_racap));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS */
f_sleep(X2002);
@ -4040,7 +4040,7 @@ testcase TC_ul_tbf_finished_pkt_dl_ass_pch() runs on RAW_PCU_Test_CT {
/* UL ACK/NACK sets poll+rrbp requesting PACKET CONTROL ACK */
f_ms_tx_ul_block(ms, ts_RLCMAC_CTRL_ACK(ms.tlli), sched_fn);
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
f_sleep(X2002);
f_rx_rlcmac_dl_block_exp_data(dl_block, dl_fn, data, 0);
@ -4107,7 +4107,7 @@ testcase TC_ul_tbf_1phase_while_dl_ass_pch() runs on RAW_PCU_Test_CT {
/* UL ACK/NACK sets poll+rrbp requesting PACKET CONTROL ACK */
f_ms_tx_ul_block(ms, ts_RLCMAC_CTRL_ACK(ms.tlli), sched_fn);
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Now the PCU is waiting for the MS to move to PDCH in order to send data to it (timer X2002).
* The MS decides it want to send new Ul TBF so it send RACH req to ask for it: */
@ -4187,7 +4187,7 @@ testcase TC_ul_tbf_2phase_while_dl_ass_pch() runs on RAW_PCU_Test_CT {
/* UL ACK/NACK sets poll+rrbp requesting PACKET CONTROL ACK */
f_ms_tx_ul_block(ms, ts_RLCMAC_CTRL_ACK(ms.tlli), sched_fn);
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Now the PCU is waiting for the MS to move to PDCH in order to send data to it (timer X2002).
* The MS decides it want to send new Ul TBF so it send RACH req to ask for it: */
@ -4652,7 +4652,7 @@ testcase TC_pcuif_fh_imm_ass_dl() runs on RAW_PCU_Test_CT {
/* SGSN sends some DL data, PCU will page on CCCH (PCH) */
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, f_rnd_octstring(12)));
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
f_TC_pcuif_fh_check_imm_ass(valueof(info_ind), ms.dl_tbf.rr_imm_ass);
f_shutdown(__BFILE__, __LINE__, final := true);
@ -7137,7 +7137,7 @@ function f_tc_stat_pdch_avail_occ_ms_not_known(boolean egprs) runs on RAW_PCU_Te
} else {
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, bssgp_ms_racap_gprs));
}
f_ms_exp_dl_tbf_ass_ccch(ms, PCU_IF_SAPI_PCH);
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS */
f_sleep(X2002);