Sylvain Munaut 6a7ee1d17a gateware: Set explicit 100K pullup for pwr_usb_n/pwr_chg_n ... We want them weak in case any of this can leak back in the 5V domain. Signed-off-by: Sylvain Munaut <tnt@246tNt.com>		2023-03-16 09:59:06 +01:00
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build@ab34622c82	gateware: Initial import of the FPGA gateware	2023-03-11 23:54:12 +01:00
cores	gateware: Initial import of the FPGA gateware	2023-03-11 23:54:12 +01:00
data	gateware: Set explicit 100K pullup for pwr_usb_n/pwr_chg_n	2023-03-16 09:59:06 +01:00
rtl	gateware/sysmgr: Make sure sys_start _always_ forces system clock ON	2023-03-16 09:59:06 +01:00
sim	gateware: Initial import of the FPGA gateware	2023-03-11 23:54:12 +01:00
.gitignore	gateware: Add .gitignore	2023-03-12 11:07:38 +01:00
Makefile	gateware: Initial import of the FPGA gateware	2023-03-11 23:54:12 +01:00