Sylvain Munaut 6a7ee1d17a gateware: Set explicit 100K pullup for pwr_usb_n/pwr_chg_n ... We want them weak in case any of this can leak back in the 5V domain. Signed-off-by: Sylvain Munaut <tnt@246tNt.com>		2023-03-16 09:59:06 +01:00
..
clocks.py	gateware: Initial import of the FPGA gateware	2023-03-11 23:54:12 +01:00
top-xmas-snoopy.pcf	gateware: Set explicit 100K pullup for pwr_usb_n/pwr_chg_n	2023-03-16 09:59:06 +01:00