hardware/xs-ctrl: Add issues/reworks for VBUS detect

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2023-03-13 21:45:36 +01:00
parent cb8197a6c7
commit 0aa54bc297
1 changed files with 14 additions and 0 deletions

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@ -29,6 +29,15 @@ Two of the boards were assembled and tested.
* The `CHG_FPGA_n` line through the LED * The `CHG_FPGA_n` line through the LED
* The `SENSE` line from the voltage divider * The `SENSE` line from the voltage divider
* Voltages on the USB lines (most importantly through the pull-up) end
up leaking on the 5V rail through the ESD protection diode, which in
turn causes the `SENSE` line to be triggered ...
I think ideally the pull-up from the FPGA should actually go through
and external NMOS that enables pull-up from 5V rail.
* The 5V rail doesn't drain when disconnected.
* The soft-off circuit wouldn't actually turn-off. * The soft-off circuit wouldn't actually turn-off.
* When the battery is not connected, the system can't be operated. The * When the battery is not connected, the system can't be operated. The
@ -60,6 +69,11 @@ boards.
may need an active discharge resistor to make sure the gate discharges may need an active discharge resistor to make sure the gate discharges
when USB is disconnected. Not tested. when USB is disconnected. Not tested.
* Cut the 5V rail from the ESD diode to prevent voltages on the data line
to leak to an un-powered 5V rail.
* Added a 1M pulldown on 5V rail so it discharges.
* Replaced C14 with a 2.2uF cap in parallel with a 100k resistor. * Replaced C14 with a 2.2uF cap in parallel with a 100k resistor.
This makes the `PWR_EN` line only raise to 1.6V which is enough to enable This makes the `PWR_EN` line only raise to 1.6V which is enough to enable
the regulator but makes it easier to discharge without it re-triggering. the regulator but makes it easier to discharge without it re-triggering.