diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/ads7843.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/ads7843.h deleted file mode 100644 index ea148283..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/ads7843.h +++ /dev/null @@ -1,55 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for ADS7843 driver. - */ - -#ifndef _ADS7843_ -#define _ADS7843_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void ADS7843_Initialize( void ) ; - -extern void ADS7843_Reset( void ) ; - -extern void ADS7843_GetPosition( uint32_t *px_pos, uint32_t *py_pos ) ; - -#endif /* #ifndef _ADS7843_H */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/at45_spi.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/at45_spi.h deleted file mode 100644 index 8b438227..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/at45_spi.h +++ /dev/null @@ -1,203 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of SPI At45 driver. - * - */ - -#ifndef _SPI_AT45_ -#define _SPI_AT45_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "board.h" - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ -/** Returns 1 if the device is ready; otherwise 0.*/ -#define AT45_STATUS_READY(status) (status & 0x80) -/** Returns the device ID code.*/ -#define AT45_STATUS_ID(status) (status & 0x3c) -/** Returns 1 if the device is configured in binary page mode; otherwise 0.*/ -#define AT45_STATUS_BINARY(status) (status & 0x01) - -#define AT45_PageOffset(pAt45) ((pAt45)->pDesc->pageOffset) -#define AT45_PageNumber(pAt45) ((pAt45)->pDesc->pageNumber) - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** The dataflash driver is currently in use.*/ -#define AT45_ERROR_LOCK 1 -/** There was an error with the SPI driver.*/ -#define AT45_ERROR_SPI 2 - -/** AT45 dataflash SPI CSR settings given MCK and SPCK.*/ -#define AT45_CSR(mck, spck) (SPI_CSR_NCPHA | SPID_CSR_DLYBCT(mck, 250) | SPID_CSR_DLYBS(mck, 250) | SPID_CSR_SCBR(mck, spck)) - -/** Main memory page read command code. */ -#define AT45_PAGE_READ 0xD2 -/** Continous array read (legacy) command code.*/ -#define AT45_CONTINUOUS_READ_LEG 0xE8 -/** Continous array read (low frequency) command code.*/ -#define AT45_CONTINUOUS_READ_LF 0x03 -/** Continous array read command code.*/ -#define AT45_CONTINUOUS_READ 0x0B -/** Buffer 1 read (low frequency) command code.*/ -#define AT45_BUF1_READ_LF 0xD1 -/** Buffer 2 read (low frequency) command code.*/ -#define AT45_BUF2_READ_LF 0xD3 -/** Buffer 1 read (serial) command code.*/ -#define AT45_BUF1_READ_SER 0xD4 -/** Buffer 2 read (serial) command code.*/ -#define AT45_BUF2_READ_SER 0xD6 -/** Buffer 1 read (8-bit) command code.*/ -#define AT45_BUF1_READ_8B 0x54 -/** Buffer 2 read (8-bit) command code.*/ -#define AT45_BUF2_READ_8B 0x56 - -/** Buffer 1 write command code.*/ -#define AT45_BUF1_WRITE 0x84 -/** Buffer 2 write command code.*/ -#define AT45_BUF2_WRITE 0x87 -/** Buffer 1 to main memory page program with erase command code.*/ -#define AT45_BUF1_MEM_ERASE 0x83 -/** Buffer 2 to main memory page program with erase command code.*/ -#define AT45_BUF2_MEM_ERASE 0x86 -/** Buffer 1 to main memory page program without erase command code.*/ -#define AT45_BUF1_MEM_NOERASE 0x88 -/** Buffer 2 to main memory page program without erase command code.*/ -#define AT45_BUF2_MEM_NOERASE 0x89 -/** Page erase command code.*/ -#define AT45_PAGE_ERASE 0x81 -/** Block erase command code.*/ -#define AT45_BLOCK_ERASE 0x50 -/** Sector erase command code.*/ -#define AT45_SECTOR_ERASE 0x7C -/** Chip erase command code.*/ -#define AT45_CHIP_ERASE 0xC7, 0x94, 0x80, 0x9A -/** Main memory page program through buffer 1 command code.*/ -#define AT45_PAGE_WRITE_BUF1 0x82 -/** Main memory page program through buffer 2 command code.*/ -#define AT45_PAGE_WRITE_BUF2 0x85 - -/** Main memory page to buffer 1 transfer command code.*/ -#define AT45_PAGE_BUF1_TX 0x53 -/** Main memory page to buffer 2 transfer command code.*/ -#define AT45_PAGE_BUF2_TX 0x55 -/** Main memory page to buffer 1 compare command code.*/ -#define AT45_PAGE_BUF1_CMP 0x60 -/** Main memory page to buffer 2 compare command code.*/ -#define AT45_PAGE_BUF2_CMP 0x61 -/** Auto page rewrite through buffer 1 command code.*/ -#define AT45_AUTO_REWRITE_BUF1 0x58 -/** Auto page rewrite through buffer 2 command code.*/ -#define AT45_AUTO_REWRITE_BUF2 0x59 -/** Deep power-down command code.*/ -#define AT45_DEEP_PDOWN 0xB9 -/** Resume from deep power-down command code.*/ -#define AT45_RES_DEEP_PDOWN 0xAB -/** Status register read command code.*/ -#define AT45_STATUS_READ 0xD7 -/** Manufacturer and device ID read command code.*/ -#define AT45_ID_READ 0x9F - -/** Power-of-2 binary page size configuration command code.*/ -#define AT45_BINARY_PAGE_FIRST_OPCODE 0x3D -#define AT45_BINARY_PAGE 0x2A, 0x80, 0xA6 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** \brief Dataflash description. - * - * A constant array of DataflashDesc instance is defined in at45.c. - * The DF_Scan() function returns the corresponding descriptor according - * to the dataflash ID detected. This description (page_size, page_offset) - * is used to compute the internal dataflash address by the DF_Command() - * function. - * - */ -typedef struct { - /** dataflash page number. */ - uint32_t pageNumber; - // indicate if power-of-2 binary page supported.*/ - uint32_t hasBinaryPage; - /** dataflash page size.*/ - uint32_t pageSize; - /** page offset in command.*/ - uint32_t pageOffset; - /** Dataflash ID.*/ - uint8_t id; - /** Identifier.*/ - const char *name; -} At45Desc; - -/** \brief Dataflash driver structure. - * - * It holds the current command being processed.This structure is initialized - * by the DF_Init() command.pDfDesc field can be initialized by the DF_Scan() - * function. cmdBuffer is a private driver area used to compute the dataflash - * address to be sent to the dataflash. Beware the PDC master must have access - * to this area. - */ -typedef struct _Dataflash { - /** Pointer to Spi Structure (SPI low level driver).*/ - Spid *pSpid; - /** Current SPI command sent to the SPI low level driver.*/ - SpidCmd command; - /** Pointer to the dataflash description.*/ - const At45Desc *pDesc; - /** Buffer to store the current command (opcode + dataflash address.*/ - uint8_t pCmdBuffer[8]; -} At45 ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint32_t AT45_Configure( At45* pAt45, Spid *pSpid, uint8_t ucSpiCs ) ; - -extern uint32_t AT45_IsBusy( At45* pAt45 ) ; - -extern uint32_t AT45_SendCommand( At45* pAt45, uint8_t ucCmd, uint8_t ucCmdSize, uint8_t *pucData, uint32_t dwDataSize, - uint32_t dwAddress, SpidCallback callback, void *pArgument ) ; - -extern const At45Desc* AT45_FindDevice( At45* pAt45, uint8_t ucStatus ) ; - -extern uint32_t AT45_PageSize( At45* pAt45 ) ; - -#endif /* #ifndef _SPI_AT45_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/at45d.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/at45d.h deleted file mode 100644 index 502e2b7f..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/at45d.h +++ /dev/null @@ -1,63 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of At45 driver. - * - */ - -#ifndef _AT45D_ -#define _AT45D_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "at45_spi.h" - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -extern void AT45D_WaitReady( At45* pAt45 ) ; - -extern uint32_t AT45D_GetStatus( At45* pAt45 ) ; - -extern void AT45D_Read( At45* pAt45, uint8_t* pucBuffer, uint32_t dwSize, uint32_t dwAddress ) ; - -extern void AT45D_Write( At45* pAt45, uint8_t *pucBuffer, uint32_t dwSize, uint32_t dwAddress ) ; - -extern void AT45D_Erase( At45* pAt45, uint32_t dwAddress ) ; - -extern void AT45D_BinaryPage( At45* pAt45 ) ; - -#endif /* #ifndef _AT45D_ */ - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/bmp.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/bmp.h deleted file mode 100644 index 9bacf578..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/bmp.h +++ /dev/null @@ -1,104 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * \section Purpose - * - * Utility for BMP - * - */ - -#ifndef BMP_H -#define BMP_H - -/** BMP magic number ('BM'). */ -#define BMP_TYPE 0x4D42 - -/** headerSize must be set to 40 */ -#define BITMAPINFOHEADER 40 - -/*------------------------------------------------------------------------------ - * Exported types - *------------------------------------------------------------------------------*/ - -#pragma pack( 1 ) - -/** BMP (Windows) Header Format */ -typedef struct _BMPHeader -{ - /* signature, must be 4D42 hex */ - uint16_t type; - /* size of BMP file in bytes (unreliable) */ - uint32_t fileSize; - /* reserved, must be zero */ - uint16_t reserved1; - /* reserved, must be zero */ - uint16_t reserved2; - /* offset to start of image data in bytes */ - uint32_t offset; - /* size of BITMAPINFOHEADER structure, must be 40 */ - uint32_t headerSize; - /* image width in pixels */ - uint32_t width; - /* image height in pixels */ - uint32_t height; - /* number of planes in the image, must be 1 */ - uint16_t planes; - /* number of bits per pixel (1, 4, 8, 16, 24, 32) */ - uint16_t bits; - /* compression type (0=none, 1=RLE-8, 2=RLE-4) */ - uint32_t compression; - /* size of image data in bytes (including padding) */ - uint32_t imageSize; - /* horizontal resolution in pixels per meter (unreliable) */ - uint32_t xresolution; - /* vertical resolution in pixels per meter (unreliable) */ - uint32_t yresolution; - /* number of colors in image, or zero */ - uint32_t ncolours; - /* number of important colors, or zero */ - uint32_t importantcolours; - -} BMPHeader; - -#pragma pack() - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern uint8_t BMP_IsValid(void *file); -extern uint32_t BMP_GetFileSize(void *file); -extern uint8_t BMP_Decode( void *file, uint8_t *buffer, uint32_t width, uint32_t height, uint8_t bpp ); -extern void WriteBMPheader( uint32_t* pAddressHeader, uint32_t bmpHSize, uint32_t bmpVSize, uint8_t nbByte_Pixels ); -extern void BMP_displayHeader(uint32_t* pAddressHeader); -extern void RGB565toBGR555( uint8_t *fileSource, uint8_t *fileDestination, uint32_t width, uint32_t height, uint8_t bpp ); - -#endif //#ifndef BMP_H - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/board_memories.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/board_memories.h deleted file mode 100644 index ec0b5d4e..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/board_memories.h +++ /dev/null @@ -1,49 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for memories configuration on board. - * - */ - -#ifndef BOARD_MEMORIES_H -#define BOARD_MEMORIES_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void BOARD_ConfigureNandFlash( Smc* pSmc ) ; -extern void BOARD_ConfigureNorFlash( Smc* pSmc ) ; -extern void BOARD_ConfigurePSRAM( Smc* pSmc ) ; - -#endif /* #ifndef BOARD_MEMORIES_H */ - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/clock.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/clock.h deleted file mode 100644 index 14b1a3fc..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/clock.h +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _CLOCK_ -#define _CLOCK_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void CLOCK_SetConfig( uint8_t configuration ) ; - -extern void CLOCK_DisplayMenu( void ) ; - -extern void CLOCK_UserChangeConfig( void ) ; - -extern uint16_t CLOCK_GetCurrMCK( void ) ; - -extern uint16_t CLOCK_GetCurrPCK( void ) ; - -#endif /* #ifndef _CLOCK_ */ - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/frame_buffer.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/frame_buffer.h deleted file mode 100644 index 69371ca3..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/frame_buffer.h +++ /dev/null @@ -1,53 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface of frame buffer driver. - * - */ - -#ifndef _FRAME_BUFFER_ -#define _FRAME_BUFFER_ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void FB_SetFrameBuffer(LcdColor_t *pBuffer, uint8_t ucWidth, uint8_t ucHeight); -extern void FB_SetColor(uint32_t color); -extern uint32_t FB_DrawLine ( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ); -extern uint32_t FB_DrawPixel( uint32_t x, uint32_t y ); -extern uint32_t FB_DrawCircle( uint32_t x, uint32_t y, uint32_t r ); -extern uint32_t FB_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius); -extern uint32_t FB_DrawRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ); -extern uint32_t FB_DrawFilledRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ); -extern uint32_t FB_DrawPicture( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2, const void *pBuffer ); -#endif /* #ifndef _FRAME_BUFFER_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/hamming.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/hamming.h deleted file mode 100644 index 0e6ac857..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/hamming.h +++ /dev/null @@ -1,64 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _HAMMING_ -#define _HAMMING_ - -/*------------------------------------------------------------------------------ - * Defines - *------------------------------------------------------------------------------*/ - -/** - * These are the possible errors when trying to verify a block of data encoded - * using a Hamming code: - * - * \section Errors - * - Hamming_ERROR_SINGLEBIT - * - Hamming_ERROR_ECC - * - Hamming_ERROR_MULTIPLEBITS - */ - -/** A single bit was incorrect but has been recovered. */ -#define Hamming_ERROR_SINGLEBIT 1 - -/** The original code has been corrupted. */ -#define Hamming_ERROR_ECC 2 - -/** Multiple bits are incorrect in the data and they cannot be corrected. */ -#define Hamming_ERROR_MULTIPLEBITS 3 - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void Hamming_Compute256x( const uint8_t* pucData, uint32_t dwSize, uint8_t* pucCode ) ; - -extern uint8_t Hamming_Verify256x( uint8_t* pucData, uint32_t dwSize, const uint8_t* pucCode ) ; - -#endif /* _HAMMING_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/ili9325.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/ili9325.h deleted file mode 100644 index fcbd9b22..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/ili9325.h +++ /dev/null @@ -1,182 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface of ILI9325 driver. - * - */ - -#ifndef _ILI9325_ -#define _ILI9325_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#include -typedef uint32_t LcdColor_t ; - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/* ILI9325 ID code */ -#define ILI9325_DEVICE_CODE 0x9325 - -/* ILI9325 LCD Registers */ -#define ILI9325_R00H 0x00 /* Driver Code Read */ -#define ILI9325_R01H 0x01 /* Driver Output Control 1 */ -#define ILI9325_R01H_SS ((uint16_t)0x0100) -#define ILI9325_R01H_SM ((uint16_t)0x0400) -#define ILI9325_R02H 0x02 /* LCD Driving Control */ -#define ILI9325_R03H 0x03 /* Entry Mode */ -#define ILI9325_R03H_AM ((uint16_t)0x0008) /* AM Control the GRAM update direction */ -#define ILI9325_R03H_ID0 ((uint16_t)0x0010) /* I/D[1:0] Control the address counter */ -#define ILI9325_R03H_ID1 ((uint16_t)0x0020) -#define ILI9325_R03H_ORG ((uint16_t)0x0080) -#define ILI9325_R03H_HWM ((uint16_t)0x0200) -#define ILI9325_R03H_BGR ((uint16_t)0x1000) -#define ILI9325_R03H_DFM ((uint16_t)0x4000) -#define ILI9325_R03H_TRI ((uint16_t)0x8000) -#define ILI9325_R04H 0x04 /* Resize Control */ -#define ILI9325_R07H 0x07 /* Display Control 1 */ -#define ILI9325_R07H_D0 ((uint16_t)0x0001) -#define ILI9325_R07H_D1 ((uint16_t)0x0002) -#define ILI9325_R07H_CL ((uint16_t)0x0008) -#define ILI9325_R07H_DTE ((uint16_t)0x0010) -#define ILI9325_R07H_GON ((uint16_t)0x0020) -#define ILI9325_R07H_BASEE ((uint16_t)0x0100) -#define ILI9325_R07H_PTDE0 ((uint16_t)0x1000) -#define ILI9325_R07H_PTDE1 ((uint16_t)0x2000) - -#define ILI9325_R08H 0x08 /* Display Control 2 */ -#define ILI9325_R09H 0x09 /* Display Control 3 */ -#define ILI9325_R0AH 0x0A /* Display Control 4 */ -#define ILI9325_R0CH 0x0C /* RGB Display Interface Control 1 */ -#define ILI9325_R0DH 0x0D /* Frame Maker Position */ -#define ILI9325_R0FH 0x0F /* RGB Display Interface Control 2 */ - -#define ILI9325_R10H 0x10 /* Power Control 1 */ -#define ILI9325_R11H 0x11 /* Power Control 2 */ -#define ILI9325_R12H 0x12 /* Power Control 3 */ -#define ILI9325_R13H 0x13 /* Power Control 4 */ - -#define ILI9325_R20H 0x20 /* Horizontal GRAM Address Set */ -#define ILI9325_R21H 0x21 /* Vertical GRAM Address Set */ -#define ILI9325_R22H 0x22 /* Write Data to GRAM */ -#define ILI9325_R29H 0x29 /* Power Control 7 */ -#define ILI9325_R2BH 0x2B /* Frame Rate and Color Control */ - -#define ILI9325_R30H 0x30 /* Gamma Control 1 */ -#define ILI9325_R31H 0x31 /* Gamma Control 2 */ -#define ILI9325_R32H 0x32 /* Gamma Control 3 */ -#define ILI9325_R35H 0x35 /* Gamma Control 4 */ -#define ILI9325_R36H 0x36 /* Gamma Control 5 */ -#define ILI9325_R37H 0x37 /* Gamma Control 6 */ -#define ILI9325_R38H 0x38 /* Gamma Control 7 */ -#define ILI9325_R39H 0x39 /* Gamma Control 8 */ -#define ILI9325_R3CH 0x3C /* Gamma Control 9 */ -#define ILI9325_R3DH 0x3D /* Gamma Control 10 */ - -#define ILI9325_R50H 0x50 /* Horizontal Address Start Position */ -#define ILI9325_R51H 0x51 /* Horizontal Address End Position */ -#define ILI9325_R52H 0x52 /* Vertical Address Start Position */ -#define ILI9325_R53H 0x53 /* Vertical Address End Position */ - -#define ILI9325_R60H 0x60 /* Driver Output Control 2 */ -#define ILI9325_R60H_GS ((uint16_t)0x8000) -#define ILI9325_R61H 0x61 /* Base Image Display Control */ -#define ILI9325_R6AH 0x6A /* Vertical Scroll Control */ - -#define ILI9325_R80H 0x80 /* Partial Image 1 Display Position */ -#define ILI9325_R81H 0x81 /* Partial Image 1 Area (Start Line) */ -#define ILI9325_R82H 0x82 /* Partial Image 1 Area (End Line) */ -#define ILI9325_R83H 0x83 /* Partial Image 2 Display Position */ -#define ILI9325_R84H 0x84 /* Partial Image 2 Area (Start Line) */ -#define ILI9325_R85H 0x85 /* Partial Image 2 Area (End Line) */ - -#define ILI9325_R90H 0x90 /* Panel Interface Control 1 */ -#define ILI9325_R92H 0x92 /* Panel Interface Control 2 */ -#define ILI9325_R95H 0x95 /* Panel Interface Control 4 */ - -#define ILI9325_RA1H 0xA1 /* OTP VCM Programming Control */ -#define ILI9325_RA2H 0xA2 /* OTP VCM Status and Enable */ -#define ILI9325_RA5H 0xA5 /* OTP Programming ID Key */ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -typedef volatile uint8_t REG8; - -/*---------------------------------------------------------------------------- - * Marcos - *----------------------------------------------------------------------------*/ - -/** LCD index register address */ -#define LCD_IR() (*((REG8 *)(BOARD_LCD_BASE))) -/** LCD status register address */ -#define LCD_SR() (*((REG8 *)(BOARD_LCD_BASE))) -/** LCD data address */ -#define LCD_D() (*((REG8 *)((uint32_t)(BOARD_LCD_BASE) + BOARD_LCD_RS))) - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void LCD_WriteRAM_Prepare( void ); -extern void LCD_WriteRAM( LcdColor_t dwColor ); -extern void LCD_ReadRAM_Prepare( void ); -extern uint32_t LCD_ReadRAM( void ); -extern uint32_t LCD_Initialize( void ); -extern void LCD_On( void ); -extern void LCD_Off( void ); -extern void LCD_PowerDown( void ); -extern uint32_t LCD_SetColor(uint32_t dwRgb24Bits); -extern void LCD_SetCursor( uint16_t x, uint16_t y ); -extern void LCD_SetWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight ); -extern void LCD_SetDisplayLandscape( uint32_t dwRGB ); -extern void LCD_SetDisplayPortrait( uint32_t dwRGB ); -extern void LCD_VerticalScroll( uint16_t wY ); -extern void LCD_SetPartialImage1( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd ); -extern void LCD_SetPartialImage2( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd ); -extern uint32_t LCD_DrawPixel( uint32_t x, uint32_t y ); -extern void LCD_TestPattern( uint32_t dwRGB ); -extern uint32_t LCD_DrawFilledRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ); -extern uint32_t LCD_DrawPicture( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2, const LcdColor_t *pBuffer ); -extern uint32_t LCD_DrawLine ( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ); -extern uint32_t LCD_DrawCircle( uint32_t dwX, uint32_t dwY, uint32_t dwR ); -extern uint32_t LCD_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius); -extern uint32_t LCD_DrawRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ); -extern void LCD_SetBacklight (uint32_t level); - -#endif /* #ifndef ILI9325 */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_color.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_color.h deleted file mode 100644 index 3258b82c..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_color.h +++ /dev/null @@ -1,85 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef COLOR_H -#define COLOR_H - -/** - * \file - * - * RGB 24-bits color table definition. - * - */ - -/* - * RGB 24 Bpp - * RGB 888 - * R7R6R5R4 R3R2R1R0 G7G6G5G4 G3G2G1G0 B7B6B5B4 B3B2B1B0 - */ -#define COLOR_BLACK 0x000000 -#define COLOR_WHITE 0xFFFFFF - -#define COLOR_BLUE 0x0000FF -#define COLOR_GREEN 0x00FF00 -#define COLOR_RED 0xFF0000 - -#define COLOR_NAVY 0x000080 -#define COLOR_DARKBLUE 0x00008B -#define COLOR_DARKGREEN 0x006400 -#define COLOR_DARKCYAN 0x008B8B -#define COLOR_CYAN 0x00FFFF -#define COLOR_TURQUOISE 0x40E0D0 -#define COLOR_INDIGO 0x4B0082 -#define COLOR_DARKRED 0x800000 -#define COLOR_OLIVE 0x808000 -#define COLOR_GRAY 0x808080 -#define COLOR_SKYBLUE 0x87CEEB -#define COLOR_BLUEVIOLET 0x8A2BE2 -#define COLOR_LIGHTGREEN 0x90EE90 -#define COLOR_DARKVIOLET 0x9400D3 -#define COLOR_YELLOWGREEN 0x9ACD32 -#define COLOR_BROWN 0xA52A2A -#define COLOR_DARKGRAY 0xA9A9A9 -#define COLOR_SIENNA 0xA0522D -#define COLOR_LIGHTBLUE 0xADD8E6 -#define COLOR_GREENYELLOW 0xADFF2F -#define COLOR_SILVER 0xC0C0C0 -#define COLOR_LIGHTGREY 0xD3D3D3 -#define COLOR_LIGHTCYAN 0xE0FFFF -#define COLOR_VIOLET 0xEE82EE -#define COLOR_AZUR 0xF0FFFF -#define COLOR_BEIGE 0xF5F5DC -#define COLOR_MAGENTA 0xFF00FF -#define COLOR_TOMATO 0xFF6347 -#define COLOR_GOLD 0xFFD700 -#define COLOR_ORANGE 0xFFA500 -#define COLOR_SNOW 0xFFFAFA -#define COLOR_YELLOW 0xFFFF00 - -#endif /* #define COLOR_H */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_draw.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_draw.h deleted file mode 100644 index 57e8ff9d..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_draw.h +++ /dev/null @@ -1,85 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Interface for draw function on LCD. - * - */ - -#ifndef DRAW_H -#define DRAW_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include -#include "lcd_gimp_image.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Horizontal direction line definition */ -#define DIRECTION_HLINE 0 -/** Vertical direction line definition */ -#define DIRECTION_VLINE 1 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void LCDD_Fill( uint32_t color ) ; - -extern void LCDD_DrawPixel( uint32_t x, uint32_t y, uint32_t c ) ; - -extern uint32_t LCDD_ReadPixel( uint32_t x, uint32_t y ) ; - -extern void LCDD_DrawLine( uint32_t x, uint32_t y, uint32_t length, uint32_t direction, uint32_t color ) ; - -extern void LCDD_DrawRectangle( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ; - -extern void LCDD_DrawRectangleWithFill( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ; - -extern void LCDD_DrawCircle( uint32_t x, uint32_t y, uint32_t r, uint32_t color ) ; - -extern void LCDD_DrawString( uint32_t x, uint32_t y, const uint8_t *pString, uint32_t color ) ; - -extern void LCDD_DrawStringWithBGColor( uint32_t x, uint32_t y, const char *pString, uint32_t fontColor, uint32_t bgColor ) ; - -extern void LCDD_GetStringSize( const uint8_t *pString, uint32_t *pWidth, uint32_t *pHeight ) ; - -extern void LCDD_DrawImage( uint32_t x, uint32_t y, const uint8_t *pImage, uint32_t width, uint32_t height ) ; - -extern void LCDD_DrawGIMPImage( uint32_t dwX, uint32_t dwY, const SGIMPImage* pGIMPImage ); - -extern void LCDD_ClearWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) ; - -#endif /* #ifndef DRAW_H */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_font.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_font.h deleted file mode 100644 index 38f755c5..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_font.h +++ /dev/null @@ -1,97 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for draw font on LCD. - * - */ - -/** - * - * \section Purpose - * - * The font.h files declares a font structure and a LCDD_DrawChar function - * that must be implemented by a font definition file to be used with the - * LCDD_DrawString method of draw.h. - * - * The font10x14.c implements the necessary variable and function for a 10x14 - * font. - * - * \section Usage - * - * -# Declare a gFont global variable with the necessary Font information. - * -# Implement an LCDD_DrawChar function which displays the specified - * character on the LCD. - * -# Use the LCDD_DrawString method defined in draw.h to display a complete - * string. - */ - -#ifndef _LCD_FONT_ -#define _LCD_FONT_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - - -/** \brief Describes the font (width, height, supported characters, etc.) used by - * the LCD driver draw API. - */ -typedef struct _Font { - /* Font width in pixels. */ - uint8_t width; - /* Font height in pixels. */ - uint8_t height; -} Font; - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** Global variable describing the font being instancied. */ -extern const Font gFont; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void LCDD_DrawChar( uint32_t x, uint32_t y, uint8_t c, uint32_t color ) ; - -extern void LCDD_DrawCharWithBGColor( uint32_t x, uint32_t y, uint8_t c, uint32_t fontColor, uint32_t bgColor ) ; - -#endif /* #ifndef LCD_FONT_ */ - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_font10x14.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_font10x14.h deleted file mode 100644 index 417471a3..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_font10x14.h +++ /dev/null @@ -1,45 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Font 10x14 table definition. - * - */ - -#ifndef _LCD_FONT_10x14_ -#define _LCD_FONT_10x14_ - -#include - -/** Char set of font 10x14 */ -extern const uint8_t pCharset10x14[] ; - -#endif /* #ifdef _LCD_FONT_10x14_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_gimp_image.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_gimp_image.h deleted file mode 100644 index a79b4579..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcd_gimp_image.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _GIMP_IMAGE_ -#define _GIMP_IMAGE_ - -#include - -typedef struct _SGIMPImage -{ - uint32_t dwWidth; - uint32_t dwHeight; - uint32_t dwBytes_per_pixel; /* 3:RGB, 4:RGBA */ - uint8_t* pucPixel_data ; -} SGIMPImage ; - -#endif // _GIMP_IMAGE_ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcdd.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcdd.h deleted file mode 100644 index 8ba19f05..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/lcdd.h +++ /dev/null @@ -1,52 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for LCD driver. - * - */ - -#ifndef LCDD_H -#define LCDD_H - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void LCDD_Initialize(void); - -extern void LCDD_On(void); - -extern void LCDD_Off(void); - -extern void LCDD_SetBacklight (uint32_t step); - -#endif /* #ifndef LCDD_H */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/math.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/math.h deleted file mode 100644 index 9f486836..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/math.h +++ /dev/null @@ -1,42 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _MATH_ -#define _MATH_ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern uint32_t min( uint32_t dwA, uint32_t dwB ) ; -extern uint32_t absv( int32_t lValue ) ; -extern uint32_t power( uint32_t dwX, uint32_t dwY ) ; - -#endif /* #ifndef _MATH_ */ - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/rand.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/rand.h deleted file mode 100644 index c041b606..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/rand.h +++ /dev/null @@ -1,48 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * \file - * - * \section Purpose - * Small function for gererating random number. - * - *------------------------------------------------------------------------------*/ - -#ifndef _RAND_ -#define _RAND_ - -/*------------------------------------------------------------------------------ - * Global Functions - *------------------------------------------------------------------------------*/ - -extern void srand( uint32_t dwSeed ) ; -extern int rand( void ) ; - -#endif /* #ifndef _RAND_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/timetick.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/timetick.h deleted file mode 100644 index 098ad32a..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/timetick.h +++ /dev/null @@ -1,78 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Methods and definitions for Global time tick and wait functions. - * - * Defines a common and simpliest use of Time Tick, to increase tickCount - * every 1ms, the application can get this value through GetTickCount(). - * - * \par Usage - * - * -# Configure the System Tick with TimeTick_Configure() when MCK changed - * \note - * Must be done before any invoke of GetTickCount(), Wait() or Sleep(). - * -# Uses GetTickCount to get current tick value. - * -# Uses Wait to wait several ms. - * -# Uses Sleep to enter wait for interrupt mode to wait several ms. - * - */ - -#ifndef _TIMETICK_ -#define _TIMETICK_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -extern uint32_t TimeTick_Configure( uint32_t dwNew_MCK ) ; - -extern void TimeTick_Increment( void ) ; - -extern uint32_t GetTickCount( void ) ; - -extern void Wait( volatile uint32_t dwMs ) ; - -extern void Sleep( volatile uint32_t dwMs ) ; - -#endif /* _TIMETICK_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd.h deleted file mode 100644 index 476ca910..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd.h +++ /dev/null @@ -1,69 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for touchscreen driver which includes touchscreen calibration, - * retrieving measurements etc. - * - * \par Usage - * - * -# Call TSD_Initialize() whenever the touchscreen should start the - * calibration process (as it is done in the function). - * -# Declare a global TSD_PenPressed function anywhere in your code. This - * function will get called every time the pen is pressed on the screen. - * -# Declare a global TSD_PenMoved function, which will get called whenever - * the pen stays in contact with the screen but changes position. - * -# Declare a global TSD_PenReleased function, which will be invoked as the - * pen is lifted from the screen. - */ - -#ifndef _TSD_ -#define _TSD_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "tsd_com.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void TSD_Initialize( int8_t calEn ) ; - -extern uint8_t TSD_Calibrate( void ) ; - -extern void TSD_Reset( void ) ; - -extern void TSD_TimerHandler( void ) ; - -#endif /* #ifndef _TSD_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd_ads7843.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd_ads7843.h deleted file mode 100644 index abc3c5b4..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd_ads7843.h +++ /dev/null @@ -1,54 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for touchscreen driver device - */ - -#ifndef _TSD_ADS7843_ -#define _TSD_ADS7843_ - -/*---------------------------------------------------------------------------- - * External functions - *----------------------------------------------------------------------------*/ -extern void TSD_PenPressed( uint32_t x, uint32_t y ) ; -extern void TSD_PenMoved( uint32_t x, uint32_t y ) ; -extern void TSD_PenReleased( uint32_t x, uint32_t y ) ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void TSD_GetRawMeasurement( uint32_t *pdwData ) ; -extern void TSD_WaitPenPressed( void ) ; -extern void TSD_WaitPenReleased( void ) ; - -#endif /* #ifndef _TSD_ADS7843_ */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd_com.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd_com.h deleted file mode 100644 index a2e67755..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/tsd_com.h +++ /dev/null @@ -1,53 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for touchscreen driver device irrelevance code. - */ - -#ifndef _TSD_COM_ -#define _TSD_COM_ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void TSDCom_InterpolateMeasurement( const uint32_t *pData, uint32_t *pPoint ) ; - -uint8_t TSDCom_Calibrate( void ) ; - -uint8_t TSDCom_IsCalibrationOk( void ) ; - -void TSDCom_ReadCalibrateData( void *pBuffer, uint32_t size ) ; -void TSDCom_RestoreCalibrateData( void *pBuffer, uint32_t size ) ; - -#endif /* #ifndef _TSD_COM_ */ - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/wav.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/wav.h deleted file mode 100644 index c33437be..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/wav.h +++ /dev/null @@ -1,78 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef WAV_H -#define WAV_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -/* Standard WAV file header information. */ -typedef struct _WavHeader -{ - /* Contains the letters "RIFF" in ASCII form. */ - unsigned int chunkID; - /* Size of the rest of the chunk following this number.*/ - unsigned int chunkSize; - /* Contains the letters "WAVE".*/ - unsigned int format; - /* Contains the letters "fmt ".*/ - unsigned int subchunk1ID; - /* 16 for PCM. This is the size of the rest of the Subchunk which follows this number.*/ - unsigned int subchunk1Size; - /* PCM = 1 (i.e. Linear quantization). Values other than 1 indicate some form of compression.*/ - unsigned short audioFormat; - /* Mono = 1, Stereo = 2, etc.*/ - unsigned short numChannels; - /* 8000, 44100, etc.*/ - unsigned int sampleRate; - /* SampleRate * NumChannels * BitsPerSample/8*/ - unsigned int byteRate; - /* NumChannels * BitsPerSample/8*/ - unsigned short blockAlign; - /* 8 bits = 8, 16 bits = 16, etc.*/ - unsigned short bitsPerSample; - /* Contains the letters "data".*/ - unsigned int subchunk2ID; - /* Number of bytes in the data.*/ - unsigned int subchunk2Size; - -} WavHeader; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern unsigned char WAV_IsValid(const WavHeader *header); - -extern void WAV_DisplayInfo(const WavHeader *header); - -#endif //#ifndef WAV_H - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/wm8731.h b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/wm8731.h deleted file mode 100644 index f2389c2f..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/include/wm8731.h +++ /dev/null @@ -1,194 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -/** - * \file - * - * Implementation WM8731 driver. - * - */ - -#ifndef WM8731_H -#define WM8731_H - -#include "board.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -#define WM8731_CSB_STATE (0x0 << 0) - -/** Slave address */ -//#define WM8731_SLAVE_ADDRESS 0x1a | WM8731_CSB_STATE*/ -#define WM8731_SLAVE_ADDRESS 0x1b - - -/** Reset register*/ -#define WM8731_REG_RESET 0x0F - -/** Left Line in register*/ -#define WM8731_REG_LEFT_lINEIN 0x0 -/** Left line input volume control*/ -#define WM8731_LINVOL_BITS (0x1f << 0) -/** Left line input mute to ADC*/ -#define WM8731_LINMUTE_BIT (0x1 << 7) -/** Left to right channel line input volume and mute data load control*/ -#define WM8731_LRINBOTH_BIT (0x0 << 8) - -/** Right Line in register*/ -#define WM8731_REG_RIGHT_lINEIN 0x1 -/** Right line input volume control*/ -#define WM8731_RINVOL_BITS (0x1f << 0) -/** Right line input mute to ADC*/ -#define WM8731_RINMUTE_BIT (0x1 << 7) -/** Right to right channel line input volume and mute data load control*/ -#define WM8731_RLINBOTH_BIT (0x0 << 8) - -/** Left Headphone out register*/ -#define WM8731_REG_LEFT_HPOUT 0x2 -/** Left chnnel headphone output volume control*/ -#define WM8731_LHPVOL_BITS (0x7f << 0) -/** Left channel zero cross detect enable*/ -#define WM8731_LZCEN_BIT (0x1 << 7) -/** Left to right channel headphone volume, mute and zero cross data load control*/ -#define WM8731_LRHPBOTH_BIT (0x1 << 8) - -/** Right Headphone out register*/ -#define WM8731_REG_RIGHT_HPOUT 0x3 -/** Right chnnel headphone output volume control*/ -#define WM8731_RHPVOL_BITS (0x7f << 0) -/** Right channel zero cross detect enable*/ -#define WM8731_RZCEN_BIT (0x1 << 7) -/** Right to right channel headphone volume, mute and zero cross data load control*/ -#define WM8731_RLHPBOTH_BIT (0x1 << 8) - -/** Analogue audio path control register*/ -#define WM8731_REG_ANALOGUE_PATH_CTRL 0x4 - -/** Digital audio path control register*/ -#define WM8731_REG_DIGITAL_PATH_CTRL 0x5 - -/** Power down control register*/ -#define WM8731_REG_PWDOWN_CTRL 0x6 -/** LineIn power down*/ -#define WM8731_LINEINPD_BIT (0x1 << 0) -#define WM8731_ENABLE_LINEINPD (0x1 << 0) -#define WM8731_DISABLE_LINEINPD (0x0 << 0) -/** Mic power down*/ -#define WM8731_MICPD_BIT (0x1 << 1) -#define WM8731_ENABLE_MICPD (0x1 << 1) -#define WM8731_DISABLE_MICPD (0x0 << 1) -/** ADC power down*/ -#define WM8731_ADCPD_BIT (0x1 << 2) -#define WM8731_ENABLE_ADCPD (0x1 << 2) -#define WM8731_DISABLE_ADCPD (0x0 << 2) -/** DAC power down*/ -#define WM8731_DACPD_BIT (0x1 << 3) -#define WM8731_ENABLE_DACPD (0x1 << 3) -#define WM8731_DISABLE_DACPD (0x0 << 3) -/** OUT power down*/ -#define WM8731_OUTPD_BIT (0x1 << 4) -#define WM8731_ENABLE_OUTPD (0x1 << 4) -#define WM8731_DISABLE_OUTPD (0x0 << 4) -/** OSC power down*/ -#define WM8731_OSCBIT (0x1 << 5) -#define WM8731_ENABLE_OSCPD (0x1 << 5) -#define WM8731_DISABLE_OSCPD (0x0 << 5) -/** CLKOUT powerdown*/ -#define WM8731_CLKOUTPD_BIT (0x1 << 6) -#define WM8731_ENABLE_CLKOUTPD (0x1 << 6) -#define WM8731_DISABLE_CLKOUTPD (0x0 << 6) -/** Power off device*/ -#define WM8731_POWEROFF_BIT (0x1 << 7) -#define WM8731_DEV_POWER_OFF (0x1 << 7) -#define WM8731_DEV_POWER_ON (0x0 << 7) - -/** Interface format register*/ -#define WM8731_REG_DA_INTERFACE_FORMAT 0x7 -/** Format*/ -#define WM8731_FORMAT_BITS (0x3 << 0) -#define WM8731_FORMAT_MSB_LEFT_JUSTIFIED (0x0 << 0) -#define WM8731_FORMAT_MSB_RIGHT_JUSTIFIED (0x1 << 0) -#define WM8731_FORMAT_I2S (0x2 << 0) -#define WM8731_FORMAT_DSP (0x3 << 0) -/** Input audio data bit length select*/ -#define WM8731_IWL_BITS (0x3 << 2) -#define WM8731_IWL_16_BIT (0x0 << 2) -#define WM8731_IWL_20_BIT (0x1 << 2) -#define WM8731_IWL_24_BIT (0x2 << 2) -#define WM8731_IWL_32_BIT (0x3 << 2) -/** DACLRC phase control*/ -#define WM8731_IRP_BITS (0x1 << 4) -/** DAC Left right clock swap*/ -#define WM8731_IRSWAP_BIT (0x1 << 5) -/** Master slave mode control*/ -#define WM8731_MS_BIT (0x1 << 6) -#define WM8731_ENABLE_MASTER_MODE (0x1 << 6) -#define WM8731_ENABLE_SLAVE_MODE (0x0 << 6) -/** Bit clock invert*/ -#define WM8731_BCLKINV_BIT (0x1 << 7) - -/** Sampling control*/ -#define WM8731_REG_SAMPLECTRL 0x8 -/** Mode select, usb mode, normal mode*/ -#define WM8731_USBNORMAL_BIT (0x1 << 0) -#define WM8731_NORMAL_MODE (0x1 << 0) -#define WM8731_USB_MODE (0x1 << 1) -/** Base over-sampling rate*/ -#define WM8731_BOSR_BIT (0x1 << 1) -#define WM8731_USB_250FS (0x0 << 1) -#define WM8731_USB_272FS (0x1 << 1) -#define WM8731_NORMAL_256FS (0x0 << 1) -#define WM8731_NORMAL_128_192_384_FS (0x1 << 1) -/** Sample rate control*/ -#define WM8731_SR_BITS (0xf << 2) -#define WM8731_CLKIDIV2_BIT (0x1 << 6) -#define WM8731_CLKODIV2_BIT (0x1 << 7) - -/** Active control register*/ -#define WM8731_REG_ACTIVE_CTRL 0x9 -/** Activate interface*/ -#define WM8731_ACTIVE_BIT (0x1 << 0) -#define WM8731_ACTIVE_INTERFACE_ACTIVE (0x1 << 1) -#define WM8731_ACTIVE_INTERFACE_INACTIVE (0x0 << 1) - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint16_t WM8731_Read(Twid *pTwid, uint32_t device, uint32_t regAddr); -extern void WM8731_Write(Twid *pTwid, uint32_t device, uint32_t regAddr, uint16_t data); -extern uint8_t WM8731_DAC_Init(Twid *pTwid, uint32_t device); -extern uint8_t WM8731_VolumeSet(Twid *pTwid, uint32_t device, uint16_t value); - -#endif // WM8731_H - - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/ads7843.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/ads7843.c deleted file mode 100644 index 1ad9fde2..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/ads7843.c +++ /dev/null @@ -1,197 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of ADS7843 driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -#define ADS_CTRL_PD0 (1 << 0) /* PD0 */ -#define ADS_CTRL_PD1 (1 << 1) /* PD1 */ -#define ADS_CTRL_DFR (1 << 2) /* SER/DFR */ -#define ADS_CTRL_EIGHT_BITS_MOD (1 << 3) /* Mode */ -#define ADS_CTRL_START (1 << 7) /* Start Bit */ -#define ADS_CTRL_SWITCH_SHIFT 4 /* Address setting */ - -/* Get X position command */ -#define CMD_Y_POSITION ((1 << ADS_CTRL_SWITCH_SHIFT) | ADS_CTRL_START | ADS_CTRL_PD0 | ADS_CTRL_PD1) -/* Get Y position command */ -#define CMD_X_POSITION ((5 << ADS_CTRL_SWITCH_SHIFT) | ADS_CTRL_START | ADS_CTRL_PD0 | ADS_CTRL_PD1) - -/* Enable penIRQ */ -#define CMD_ENABLE_PENIRQ ((1 << ADS_CTRL_SWITCH_SHIFT) | ADS_CTRL_START) - - -#define ADS7843_TIMEOUT 5000000 - -#define DELAY_BEFORE_SPCK 200 /* 2us min (tCSS) <=> 200/100 000 000 = 2us */ -#define DELAY_BETWEEN_CONS_COM 0xf /* 5us min (tCSH) <=> (32 * 15) / (100 000 000) = 5us */ - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Pins used by SPI */ -static const Pin pinsSPI[] = {BOARD_TSC_SPI_PINS, BOARD_TSC_NPCS_PIN}; - -/** Touch screen BUSY pin */ -static const Pin pinBusy[] = {PIN_TSC_BUSY}; - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Generic function to send a command to the touchscreen controller. - * - * \param bCmd command to send - * - * \return command result - */ -static uint32_t SendCommand( uint8_t bCmd ) -{ - uint32_t uResult = 0; - uint32_t uTimeout = 0; - - /* (volatile declaration needed for code optimisation by compiler) */ - volatile uint8_t bufferRX[3]; - volatile uint8_t bufferTX[3]; - - Pdc *pPdc = (Pdc *)SPI; - uint32_t dStatus; - - bufferRX[0] = 0; - bufferRX[1] = 0; - bufferRX[2] = 0; - - bufferTX[0] = bCmd; - bufferTX[1] = 0; - bufferTX[2] = 0; - - /* Send Command and data through the SPI */ - pPdc->PERIPH_PTCR = PERIPH_PTCR_RXTDIS; - pPdc->PERIPH_RPR = (uint32_t) bufferRX; - pPdc->PERIPH_RCR = 3; - - pPdc->PERIPH_PTCR = PERIPH_PTCR_TXTDIS; - pPdc->PERIPH_TPR = (uint32_t) bufferTX; - pPdc->PERIPH_TCR = 3; - - pPdc->PERIPH_PTCR = PERIPH_PTCR_RXTEN; - pPdc->PERIPH_PTCR = PERIPH_PTCR_TXTEN; - - do - { - dStatus = REG_SPI_SR; - uTimeout++; - } - while ((( dStatus & SPI_SR_RXBUFF) != SPI_SR_RXBUFF) && (uTimeout < ADS7843_TIMEOUT)); - - pPdc->PERIPH_PTCR = PERIPH_PTCR_RXTDIS; - pPdc->PERIPH_PTCR = PERIPH_PTCR_TXTDIS; - - uResult = (uint32_t)bufferRX[1] << 8; - uResult |= (uint32_t)bufferRX[2]; - uResult = uResult >> 4; - - return uResult; -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Get position of the pen by ask the ADS controller (SPI). - * - * \param px_pos pointer to the horizontal position - * \param py_pos pointer to the vertical position - * - */ -extern void ADS7843_GetPosition( uint32_t *px_pos, uint32_t *py_pos ) -{ - /* Get X position */ - *px_pos = SendCommand(CMD_X_POSITION); - /* Get Y position */ - *py_pos = SendCommand(CMD_Y_POSITION); - /* Switch to full power mode */ - SendCommand(CMD_ENABLE_PENIRQ); -} - -/** - * \brief Initialization of the SPI for communication with ADS7843 component. - */ -extern void ADS7843_Initialize( void ) -{ - volatile uint32_t uDummy; - - /* Configure pins */ - PIO_Configure(pinsSPI, PIO_LISTSIZE(pinsSPI)); - - PIO_Configure(pinBusy, PIO_LISTSIZE(pinBusy)); - - SPI_Configure(BOARD_TSC_SPI_BASE, - BOARD_TSC_SPI_ID, - SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_PCS(BOARD_TSC_NPCS) /* Value of the SPI configuration register. */ - ); - - SPI_ConfigureNPCS(BOARD_TSC_SPI_BASE, BOARD_TSC_NPCS, - SPI_CSR_NCPHA | SPI_CSR_DLYBS(DELAY_BEFORE_SPCK) | - SPI_CSR_DLYBCT(DELAY_BETWEEN_CONS_COM) | SPI_CSR_SCBR(0xC8) ); - - SPI_Enable(BOARD_TSC_SPI_BASE); - - for (uDummy=0; uDummy<100000; uDummy++); - - uDummy = REG_SPI_SR; - uDummy = REG_SPI_RDR; - - SendCommand(CMD_ENABLE_PENIRQ); -} - -/** - * \brief Reset the ADS7843 - */ -void ADS7843_Reset( void ) -{ - /* Disable SPI */ - SPI_Disable( BOARD_TSC_SPI_BASE ) ; -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/at45_spi.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/at45_spi.c deleted file mode 100644 index 2d84c4c2..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/at45_spi.c +++ /dev/null @@ -1,316 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_at45_module SPI AT45 driver - * \ingroup at45d_module - * The Dataflash driver is based on top of the corresponding Spi driver. - * A Dataflash structure instance has to be initialized using the DF_Init - * function. Then basic dataflash operations can be launched using macros such - * as DF_continuous_read. These macros invoke the DF_Command() function which - * invokes the DPI low driver using the SPI_SendCommand() function. - * Beware to compute the dataflash internal address, the dataflash sector - * description must be known (DataflashDesc). Dataflash can be automatically - * detected using the DF_Scan() function. - * - * \section Usage - *
    - *
  • Initializes an AT45 instance and configures SPI chip select pin - * using AT45_Configure().
    • - *
  • Detect DF and returns DF description corresponding to the device - * connected using AT45_FindDevice().This function shall be called by - * the application before AT45_SendCommand.
    • - *
  • Sends a command to the DF through the SPI using AT45_SendCommand(). - * The command is identified by its command code and the number of - * bytes to transfer.
    • - *
  • Example code for sending command to write a page to DF.
    • - * \code - * // Issue a page write through buffer 1 command - * error = AT45_SendCommand(pAt45, AT45_PAGE_WRITE_BUF1, 4, - * pBuffer, size, address, 0, 0); - * \endcode - *
  • Example code for sending command to read a page from DF. - * If data needs to be received, then a data buffer must be - * provided.
    • - * \code - * // Issue a continuous read array command - * error = AT45_SendCommand(pAt45, AT45_CONTINUOUS_READ_LEG, 8, - * pBuffer, size, address, 0, 0); - * \endcode - *
  • This function does not block; its optional callback will - * be invoked when the transfer completes.
    • - *
  • Check the AT45 driver is ready or not by polling AT45_IsBusy(). - *
- * Related files :\n - * \ref spi_at45.c\n - * \ref spi_at45.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of SPI At45 driver. - * - */ - - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#include -#include - -/*---------------------------------------------------------------------------- - * Internal definitions - *----------------------------------------------------------------------------*/ - -/** Number of dataflash which can be recognized.*/ -#define NUMDATAFLASH (sizeof(at45Devices) / sizeof(At45Desc)) - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** indicate if the device is configured as binary page or not.*/ -static uint8_t configuredBinaryPage; - -/** At45 device descriptor structure. */ -static const At45Desc at45Devices[] = { - { 512, 1, 264, 9, 0x0C, "AT45DB011D"}, - { 1024, 1, 264, 9, 0x14, "AT45DB021D"}, - { 2048, 1, 264, 9, 0x1C, "AT45DB041D"}, - { 4096, 1, 264, 9, 0x24, "AT45DB081D"}, - { 4096, 1, 528, 10, 0x2C, "AT45DB161D"}, - { 8192, 1, 528, 10, 0x34, "AT45DB321D"}, - { 8192, 1, 1056, 11, 0x3C, "AT45DB642D"}, - {16384, 1, 1056, 11, 0x10, "AT45DB1282"}, - {16384, 1, 2112, 12, 0x18, "AT45DB2562"}, - {32768, 1, 2112, 12, 0x20, "AT45DB5122"} -}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes an AT45 instance and configures SPI chip select register. - * - * \param pAt45 Pointer to the At45 instance to initialize. - * \param pSpid Pointer to the underlying SPI driver. - * \param spiCs Chip select value to connect to the At45. - * \return 0. - */ -extern uint32_t AT45_Configure( At45* pAt45, Spid* pSpid, uint8_t ucSpiCs ) -{ - SpidCmd* pCommand ; - - /* Sanity checks */ - assert( pSpid != NULL ) ; - assert( pAt45 != NULL ) ; - - /* Initialize the At45 instance */ - pAt45->pSpid = pSpid ; - pAt45->pDesc = 0 ; - memset( pAt45->pCmdBuffer, 0, 8 ) ; - - /* Initialize the spidCmd structure */ - pCommand = &(pAt45->command) ; - pCommand->pCmd = pAt45->pCmdBuffer ; - pCommand->callback = 0 ; - pCommand->pArgument = 0 ; - pCommand->spiCs = ucSpiCs ; - - return 0 ; -} - -/** - * \brief Check if the At45 driver is in busy. - * - * \param pAt45 Pointer to the At45 instance to initialize. - * \return 1 if the At45 driver is not executing any command,otherwise it returns 0. - */ -extern uint32_t AT45_IsBusy( At45* pAt45 ) -{ - return SPID_IsBusy( pAt45->pSpid ) ; -} - -/** - * \brief Sends a command to the dataflash through the SPI. - * The command is identified by its command code and the number of bytes to transfer - * (1 + number of address bytes + number of dummy bytes).If data needs to be received, - * then a data buffer must be provided. - * \note This function does not block; its optional callback will be invoked when - * the transfer completes. - * \param pAt45 Pointer to the At45 instance to initialize. - * \param cmd Command code. - * \param cmdSize Size of command code + address bytes + dummy bytes. - * \param pData Data buffer. - * \param dataSize Number of data bytes to send/receive. - * \param address Address at which the command is performed if meaningful. - * \param callback Optional callback to invoke at end of transfer. - * \param pArgument Optional parameter to the callback function. - * \return 0. - */ -extern uint32_t AT45_SendCommand( At45* pAt45, uint8_t ucCmd, uint8_t ucCmdSize, uint8_t *pucData, uint32_t dwDataSize, - uint32_t dwAddress, SpidCallback pCallback, void *pArgument ) -{ - SpidCmd *pCommand ; - const At45Desc *pDesc; - uint32_t dfAddress = 0 ; - - /* Sanity checks */ - assert( pAt45 != NULL ) ; - - pDesc = pAt45->pDesc ; - - assert( pDesc || (ucCmd == AT45_STATUS_READ) ) ; - - /* Check if the SPI driver is available*/ - if ( AT45_IsBusy( pAt45 ) ) - { - return AT45_ERROR_LOCK ; - } - - /* Compute command pattern*/ - pAt45->pCmdBuffer[0] = ucCmd ; - - /* Add address bytes if necessary*/ - if ( ucCmdSize > 1 ) - { - assert( pDesc != NULL ) ; - if ( !configuredBinaryPage ) - { - dfAddress = ((dwAddress / (pDesc->pageSize)) << pDesc->pageOffset) - + (dwAddress % (pDesc->pageSize)); - } - else - { - dfAddress = dwAddress ; - } - - /* Write address bytes */ - if ( pDesc->pageNumber >= 16384 ) - { - pAt45->pCmdBuffer[1] = ((dfAddress & 0x0F000000) >> 24); - pAt45->pCmdBuffer[2] = ((dfAddress & 0x00FF0000) >> 16); - pAt45->pCmdBuffer[3] = ((dfAddress & 0x0000FF00) >> 8); - pAt45->pCmdBuffer[4] = ((dfAddress & 0x000000FF) >> 0); - - if ( (ucCmd != AT45_CONTINUOUS_READ) && (ucCmd != AT45_PAGE_READ) ) - { - ucCmdSize++ ; - } - } - else - { - pAt45->pCmdBuffer[1] = ((dfAddress & 0x00FF0000) >> 16); - pAt45->pCmdBuffer[2] = ((dfAddress & 0x0000FF00) >> 8); - pAt45->pCmdBuffer[3] = ((dfAddress & 0x000000FF) >> 0); - } - } - - /* Update the SPI Transfer descriptors */ - pCommand = &(pAt45->command) ; - pCommand->cmdSize = ucCmdSize ; - pCommand->pData = pucData ; - pCommand->dataSize = dwDataSize ; - pCommand->callback = pCallback ; - pCommand->pArgument = pArgument ; - - /* Send Command and data through the SPI */ - if ( SPID_SendCommand( pAt45->pSpid, pCommand ) ) - { - return AT45_ERROR_SPI ; - } - - return 0 ; -} - -/** - * \brief returns the At45Desc structure corresponding to the device connected. - * It automatically initializes pAt45->pDesc field structure. - * - * \note This function shall be called by the application before AT45_SendCommand. - * - * \param pAt45 Pointer to the At45 instance to initialize. - * \param status Device status register value. - * - * \return 0 if successful; Otherwise, returns AT45_ERROR_LOCK if the At45 - * driver is in use or AT45_ERROR_SPI if there was an error with the SPI driver. - */ -extern const At45Desc * AT45_FindDevice( At45 *pAt45, uint8_t status ) -{ - uint32_t i; - uint8_t id = AT45_STATUS_ID(status); - - /* Check if status is all one; in which case, it is assumed that no device is connected*/ - if ( status == 0xFF ) - { - return 0 ; - } - - /* Look in device array */ - i = 0 ; - pAt45->pDesc = 0 ; - while ( (i < NUMDATAFLASH) && !(pAt45->pDesc) ) - { - if ( at45Devices[i].id == id ) - { - pAt45->pDesc = &(at45Devices[i]) ; - } - i++ ; - } - - configuredBinaryPage = AT45_STATUS_BINARY(status); - - return pAt45->pDesc ; -} - -/** - * \brief returns the pagesize corresponding to the device connected. - * \param pAt45 Pointer to the At45 instance to initialize. - * \return page size. - */ -extern uint32_t AT45_PageSize( At45 *pAt45 ) -{ - uint32_t dwPageSize = pAt45->pDesc->pageSize ; - - if ( ((pAt45->pDesc->hasBinaryPage) == 0) || !configuredBinaryPage ) - { - return dwPageSize ; - } - - return ((dwPageSize >> 8) << 8) ; -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/at45d.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/at45d.c deleted file mode 100644 index 71b7b76d..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/at45d.c +++ /dev/null @@ -1,254 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \addtogroup external_component External Component - * - * \addtogroup at45d_module AT45 driver - * \ingroup external_component - * The AT45 Dataflash driver is based on the corresponding AT45 driver. - * A AT45 instance has to be initialized using the Dataflash levle function - * AT45_Configure(). AT45 Dataflash can be automatically detected using - * the AT45_FindDevice() function. Then AT45 dataflash operations such as - * read, write and erase DF can be launched using AT45_SendCommand function - * with corresponding AT45 command set. - * - * \section Usage - *
    - *
  • Reads data from the At45 at the specified address using AT45D_Read().
    • - *
  • Writes data on the At45 at the specified address using AT45D_Write().
    • - *
  • Erases a page of data at the given address using AT45D_Erase().
    • - *
  • Poll until the At45 has completed of corresponding operations using - * AT45D_WaitReady().
    • - *
  • Retrieves and returns the At45 current using AT45D_GetStatus().
    • - *
- * Related files :\n - * \ref at45d.c\n - * \ref at45d.h.\n - */ - /*@{*/ - /*@}*/ - - -/** - * \file - * - * Implementation of At45 driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#include -#include - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Wait for transfer to finish calling the SPI driver ISR (interrupts are - * disabled). - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -static void AT45D_Wait( At45* pAt45 ) -{ - assert( pAt45 != NULL ) ; - - /* Wait for transfer to finish */ - while ( AT45_IsBusy( pAt45 ) ) - { - SPID_Handler( pAt45->pSpid ) ; - } -} - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Waits for the At45 to be ready to accept new commands. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -extern void AT45D_WaitReady( At45* pAt45 ) -{ - uint8_t ready = 0; - - assert( pAt45 != NULL ) ; - - /* Poll device until it is ready. */ - while (!ready) - { - ready = AT45_STATUS_READY(AT45D_GetStatus(pAt45)); - } -} - -/** - * \brief Retrieves and returns the At45 current status, or 0 if an error happened. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -extern uint32_t AT45D_GetStatus( At45* pAt45 ) -{ - uint32_t dwError ; - uint8_t ucStatus ; - - assert( pAt45 != NULL ) ; - - /* Issue a status register read command */ - dwError = AT45_SendCommand( pAt45, AT45_STATUS_READ, 1, &ucStatus, 1, 0, 0, 0 ) ; - assert( !dwError ) ; - - /* Wait for command to terminate */ - while ( AT45_IsBusy( pAt45 ) ) - { - AT45D_Wait( pAt45 ) ; - } - - return ucStatus ; -} - -/** - * \brief Reads data from the At45 inside the provided buffer. Since a continuous - * read command is used, there is no restriction on the buffer size and read address. - * - * \param pAt45 Pointer to an AT45 driver instance. - * \param pBuffer Data buffer. - * \param size Number of bytes to read. - * \param address Address at which data shall be read. - */ -extern void AT45D_Read( At45* pAt45, uint8_t* pucBuffer, uint32_t dwSize, uint32_t dwAddress ) -{ - uint32_t dwError ; - - assert( pAt45 != NULL ) ; - assert( pucBuffer != NULL ) ; - - /* Issue a continuous read array command. */ - dwError = AT45_SendCommand( pAt45, AT45_CONTINUOUS_READ_LEG, 8, pucBuffer, dwSize, dwAddress, 0, 0 ) ; - assert( !dwError ) ; - - /* Wait for the read command to execute. */ - while ( AT45_IsBusy( pAt45 ) ) - { - AT45D_Wait( pAt45 ) ; - } -} - -/** - * \brief Writes data on the At45 at the specified address. Only one page of - * data is written that way; if the address is not at the beginning of the - * page, the data is written starting from this address and wraps around to - * the beginning of the page. - * - * \param pAt45 Pointer to an AT45 driver instance. - * \param pucBuffer Data buffer. - * \param dwSize Number of bytes to write. - * \param dwAddress Destination address on the At45. - */ -extern void AT45D_Write( At45* pAt45, uint8_t *pucBuffer, uint32_t dwSize, uint32_t dwAddress ) -{ - uint8_t dwError ; - - assert( pAt45 != NULL ) ; - assert( pucBuffer != NULL ) ; - assert( dwSize <= pAt45->pDesc->pageSize ) ; - - /* Issue a page write through buffer 1 command. */ - dwError = AT45_SendCommand( pAt45, AT45_PAGE_WRITE_BUF1, 4, pucBuffer, dwSize, dwAddress, 0, 0 ) ; - assert( !dwError ) ; - - /* Wait until the command is sent. */ - while ( AT45_IsBusy( pAt45 ) ) - { - AT45D_Wait( pAt45 ) ; - } - - /* Wait until the At45 becomes ready again.*/ - AT45D_WaitReady( pAt45 ) ; -} - -/** - * \brief Erases a page of data at the given address in the At45. - * - * \param pAt45 Pointer to an AT45 driver instance. - * \param dwAddress Address of page to erase. - */ -extern void AT45D_Erase( At45* pAt45, uint32_t dwAddress ) -{ - uint32_t dwError ; - - assert( pAt45 != NULL ) ; - - /* Issue a page erase command. */ - dwError = AT45_SendCommand( pAt45, AT45_PAGE_ERASE, 4, 0, 0, dwAddress, 0, 0 ) ; - assert( !dwError ) ; - - /* Wait for end of transfer. */ - while ( AT45_IsBusy(pAt45 ) ) - { - AT45D_Wait( pAt45 ) ; - } - - /* Poll until the At45 has completed the erase operation. */ - AT45D_WaitReady( pAt45 ) ; -} - -/** - * \brief Configure power-of-2 binary page size in the At45. - * - * \param pAt45 Pointer to an AT45 driver instance. - */ -extern void AT45D_BinaryPage( At45* pAt45 ) -{ - uint8_t dwError ; - uint8_t opcode[3]= {AT45_BINARY_PAGE}; - assert( pAt45 != NULL ) ; - - /* Issue a binary page command. */ - - dwError = AT45_SendCommand( pAt45, AT45_BINARY_PAGE_FIRST_OPCODE, 1, opcode, 3, 0, 0, 0 ) ; - - assert( !dwError ) ; - - /* Wait for end of transfer.*/ - while ( AT45_IsBusy( pAt45 ) ) - { - AT45D_Wait( pAt45 ) ; - } - - /* Wait until the At45 becomes ready again.*/ - AT45D_WaitReady( pAt45 ) ; -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/bmp.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/bmp.c deleted file mode 100644 index 7637e76c..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/bmp.c +++ /dev/null @@ -1,319 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "board.h" - -#include - -//----------------------------------------------------------------------------- -// Define -//----------------------------------------------------------------------------- -/// BMP offset for header -#define IMAGE_OFFSET 0x100 - - -//------------------------------------------------------------------------------ -// Internal constants -//------------------------------------------------------------------------------ - - -//------------------------------------------------------------------------------ -// Internal types -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Describe the BMP palette -//------------------------------------------------------------------------------ -typedef struct _BMPPaletteEntry -{ - /// Blue value - uint8_t b; - /// Green value - uint8_t g; - /// Red value - uint8_t r; - /// Filler character value - uint8_t filler; -} BMPPaletteEntry ; - -//------------------------------------------------------------------------------ -// Exported functions -//------------------------------------------------------------------------------ - -//------------------------------------------------------------------------------ -/// Test if BMP is valid -/// \param file Buffer holding the file to examinate. -/// \return 1 if the header of a BMP file is valid; otherwise returns 0. -//------------------------------------------------------------------------------ -uint8_t BMP_IsValid( void *file ) -{ - return ((BMPHeader*) file)->type == BMP_TYPE ; -} - -//------------------------------------------------------------------------------ -/// Returns the size of a BMP image given at least its header (the file does -/// not have to be complete). -/// \param file Pointer to the buffer which holds the BMP file. -/// \return size of BMP image -//------------------------------------------------------------------------------ -uint32_t BMP_GetFileSize( void *file ) -{ - return ((BMPHeader *) file)->fileSize ; -} - -//----------------------------------------------------------------------------- -/// Write a BMP header -/// \param pAddressHeader Begin address of the BMP -/// \param bmpHSize BMP heigth size -/// \param bmpVSize BMP width size -/// \param nbByte_Pixels Number of byte per pixels -//----------------------------------------------------------------------------- -void WriteBMPheader( uint32_t* pAddressHeader, uint32_t bmpHSize, uint32_t bmpVSize, uint8_t nbByte_Pixels ) -{ - uint32_t i; - uint32_t* fill; - BMPHeader *Header; - - fill = pAddressHeader; - for ( i=0 ; i < IMAGE_OFFSET ; i+=4 ) - { - *fill++ = 0; - } - - Header = (BMPHeader*) pAddressHeader; - - Header->type = BMP_TYPE; - Header->fileSize = (bmpHSize * bmpVSize * nbByte_Pixels) + IMAGE_OFFSET; - Header->reserved1 = 0; - Header->reserved2 = 0; - Header->offset = IMAGE_OFFSET; - Header->headerSize = BITMAPINFOHEADER; - Header->width = bmpHSize; - Header->height = bmpVSize; - Header->planes = 1; - Header->bits = nbByte_Pixels * 8; - Header->compression = 0; - Header->imageSize = bmpHSize * bmpVSize * nbByte_Pixels; - Header->xresolution = 0; - Header->yresolution = 0; - Header->ncolours = 0; - Header->importantcolours = 0; -} - - -//------------------------------------------------------------------------------ -/// debug function, dislay BMP header -/// \param pAddressHeader Address of the BMP -//------------------------------------------------------------------------------ -#if (TRACE_LEVEL >= TRACE_LEVEL_INFO) -void BMP_displayHeader( uint32_t* pAddressHeader ) -{ - BMPHeader *header; - - header = (BMPHeader*) pAddressHeader; - - TRACE_INFO("BMP\n\r"); - TRACE_INFO("type 0x%X \n\r", header->type); - TRACE_INFO("fileSize %d \n\r", header->fileSize); - TRACE_INFO("reserved1 %d \n\r", header->reserved1); - TRACE_INFO("reserved2 %d \n\r", header->reserved2); - TRACE_INFO("offset %d \n\r", header->offset); - TRACE_INFO("headerSize %d \n\r", header->headerSize); - TRACE_INFO("width %d \n\r", header->width); - TRACE_INFO("height %d \n\r", header->height); - TRACE_INFO("planes %d \n\r", header->planes); - TRACE_INFO("bits %d \n\r", header->bits); - TRACE_INFO("compression %d \n\r", header->compression); - TRACE_INFO("imageSize %d \n\r", header->imageSize); - TRACE_INFO("xresolution %d \n\r", header->xresolution); - TRACE_INFO("yresolution %d \n\r", header->yresolution); - TRACE_INFO("ncolours %d \n\r", header->ncolours); - TRACE_INFO("importantcolours %d\n\r", header->importantcolours); -} -#endif - -//------------------------------------------------------------------------------ -/// Loads a BMP image located at the given address, decodes it and stores the -/// resulting image inside the provided buffer. Image must have the specified -/// width & height. -/// If no buffer is provided, this function simply checks if it is able to -/// decode the image. -/// \param file Buffer which holds the BMP file. -/// \param buffer Buffer in which to store the decoded image. -/// \param width Buffer width in pixels. -/// \param height Buffer height in pixels. -/// \param bpp Number of bits per pixels that the buffer stores. -/// \return 0 if the image has been loaded; otherwise returns an error code. -//------------------------------------------------------------------------------ -uint8_t BMP_Decode( void *file, uint8_t *buffer, uint32_t width, uint32_t height, uint8_t bpp ) -{ - BMPHeader *header; - uint32_t i, j; - uint8_t r, g, b; - uint8_t *image; - - // Read header information - header = (BMPHeader*) file; - - // Verify that the file is valid - if ( !BMP_IsValid( file ) ) - { - TRACE_ERROR("BMP_Decode: File type is not 'BM' (0x%04X).\n\r",header->type); - - return 1; - } - - // Check that parameters match - if ( (header->compression != 0) || (header->width != width) || (header->height != height)) - { - TRACE_ERROR("BMP_Decode: File format not supported\n\r"); - TRACE_ERROR(" -> .compression = %u\n\r", (unsigned int)header->compression); - TRACE_ERROR(" -> .width = %u\n\r", (unsigned int)header->width); - TRACE_ERROR(" -> .height = %u\n\r", (unsigned int)header->height); - TRACE_ERROR(" -> .bits = %d\n\r", (int)header->bits); - - return 2; - } - - // Get image data - image = (uint8_t *) ((uint32_t) file + header->offset); - - // Check that the bpp resolution is supported - // Only a 24-bit output & 24- or 8-bit input are supported - if ( bpp != 24 ) - { - TRACE_ERROR("BMP_Decode: Output resolution not supported\n\r"); - - return 3; - } - else - { - if (header->bits == 24) - { - // Decoding is ok - if (!buffer) return 0; - - // Get image data (swapping red & blue) - for ( i=0 ; i < height ; i++ ) - { - for ( j=0 ; j < width; j++ ) - { - r = image[((height - i - 1) * width + j) * 3 + 2]; - g = image[((height - i - 1) * width + j) * 3 + 1]; - b = image[((height - i - 1) * width + j) * 3]; - - #if defined(BOARD_LCD_RGB565) - // Interlacing - r = ((r << 1) & 0xF0) | ((g & 0x80) >> 4) | ((r & 0x80) >> 5); - g = (g << 1) & 0xF8; - b = b & 0xF8; - - buffer[(i * width + j) * 3] = b; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = r; - - #else - buffer[(i * width + j) * 3] = r; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = b; - #endif //#if defined(BOARD_LCD_RGB565) - } - } - } - else - { - if ( header->bits == 8 ) - { - BMPPaletteEntry palette[256]; - - // Decoding is ok - if (!buffer) return 0; - - // Retrieve palette - memcpy( palette, (uint8_t *) ((uint32_t) file + sizeof( BMPHeader )), header->offset - sizeof( BMPHeader ) ) ; - - // Decode image (reversing row order) - for ( i=0 ; i < height ; i++ ) - { - for (j=0; j < width; j++) - { - r = palette[image[(height - i - 1) * width + j]].r; - g = palette[image[(height - i - 1) * width + j]].g; - b = palette[image[(height - i - 1) * width + j]].b; - - buffer[(i * width + j) * 3] = r; - buffer[(i * width + j) * 3 + 1] = g; - buffer[(i * width + j) * 3 + 2] = b; - } - } - } - else - { - - TRACE_ERROR("BMP_Decode: Input resolution not supported\n\r"); - TRACE_INFO("header->bits 0x%X \n\r", header->bits); - return 4 ; - } - } - } - - return 0 ; -} - -//------------------------------------------------------------------------------ -/// Convert RGB 565 to RGB 555 (RGB 555 is adapted to LCD) -/// \param fileSource Buffer which holds the RGB file -/// \param fileDestination Buffer in which to store the decoded image -/// \param width Buffer width in pixels. -/// \param height Buffer height in pixels. -/// \param bpp Number of bits per pixels that the buffer stores. -//------------------------------------------------------------------------------ -void RGB565toBGR555( uint8_t *fileSource, uint8_t *fileDestination, uint32_t width, uint32_t height, uint8_t bpp ) -{ - uint32_t i; - uint32_t j; - uint32_t row; - - for (i=0; i < height*(bpp/8); i++) - { - row = (i*width*(bpp/8)); - - for (j=0; j <= width*(bpp/8); j+=2) - { - fileDestination[row+j] = ((fileSource[row+j+1]>>3)&0x1F) - | (fileSource[row+j]&0xE0); - fileDestination[row+j+1] = (fileSource[row+j+1]&0x03) - | ((fileSource[row+j]&0x1F)<<2); - } - } -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/board_memories.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/board_memories.c deleted file mode 100644 index ddeba30d..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/board_memories.c +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of memories configuration on board. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "board.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures the EBI for NandFlash access. - */ -extern void BOARD_ConfigureNandFlash( Smc* pSmc ) -{ - /* Enable peripheral clock */ - PMC_EnablePeripheral( ID_SMC ) ; - - /* NCS0 is assigned to a NAND Flash (NANDOE and NANWE used for NCS0) */ - MATRIX->CCFG_SMCNFCS = CCFG_SMCNFCS_SMC_NFCS0; - - pSmc->SMC_CS_NUMBER[0].SMC_SETUP = SMC_SETUP_NWE_SETUP(0) - | SMC_SETUP_NCS_WR_SETUP(1) - | SMC_SETUP_NRD_SETUP(0) - | SMC_SETUP_NCS_RD_SETUP(1); - - pSmc->SMC_CS_NUMBER[0].SMC_PULSE = SMC_PULSE_NWE_PULSE(2) - | SMC_PULSE_NCS_WR_PULSE(3) - | SMC_PULSE_NRD_PULSE(4) - | SMC_PULSE_NCS_RD_PULSE(4); - - pSmc->SMC_CS_NUMBER[0].SMC_CYCLE = SMC_CYCLE_NWE_CYCLE(4) - | SMC_CYCLE_NRD_CYCLE(7); - - pSmc->SMC_CS_NUMBER[0].SMC_MODE = SMC_MODE_READ_MODE - | SMC_MODE_WRITE_MODE - | SMC_MODE_DBW_8_BIT; -} - -/** - * \brief Configures the EBI for %NorFlash access. - */ -extern void BOARD_ConfigureNorFlash( Smc* pSmc ) -{ - /* Enable peripheral clock */ - PMC_EnablePeripheral( ID_SMC ) ; - - /* Configure SMC, NCS3 is assigned to a norflash */ - pSmc->SMC_CS_NUMBER[3].SMC_SETUP = SMC_SETUP_NWE_SETUP(2) - | SMC_SETUP_NCS_WR_SETUP(0) - | SMC_SETUP_NRD_SETUP(0) - | SMC_SETUP_NCS_RD_SETUP(0); - - pSmc->SMC_CS_NUMBER[3].SMC_PULSE = SMC_PULSE_NWE_PULSE(6) - | SMC_PULSE_NCS_WR_PULSE(0xA) - | SMC_PULSE_NRD_PULSE(0xA) - | SMC_PULSE_NCS_RD_PULSE(0xA); - - pSmc->SMC_CS_NUMBER[3].SMC_CYCLE = SMC_CYCLE_NWE_CYCLE(0xA) - | SMC_CYCLE_NRD_CYCLE(0xA); - - pSmc->SMC_CS_NUMBER[3].SMC_MODE = SMC_MODE_READ_MODE - | SMC_MODE_WRITE_MODE - | SMC_MODE_DBW_8_BIT - | SMC_MODE_EXNW_MODE_DISABLED - | SMC_MODE_TDF_CYCLES(0x1); -} - -/** - * \brief An accurate one-to-one comparison is necessary between PSRAM and SMC waveforms for - * a complete SMC configuration. - * \note The system is running at 48 MHz for the EBI Bus. - * Please refer to the "AC Characteristics" section of the customer product datasheet. - */ -extern void BOARD_ConfigurePSRAM( Smc* pSmc ) -{ - uint32_t dwTmp ; - - /* Enable peripheral clock */ - PMC_EnablePeripheral( ID_SMC ) ; - - /* Configure SMC, NCS1 is assigned to a external PSRAM */ - /** - * PSRAM IS66WV51216BLL - * 55 ns Access time - * tdoe = 25 ns max - * SMC1 (timing SAM3S read mode SMC) = 21 ns of setup - * 21 + 55 = 76 ns => at least 5 cycles at 64 MHz - * Write pulse width minimum = 45 ns (PSRAM) - */ - pSmc->SMC_CS_NUMBER[1].SMC_SETUP = SMC_SETUP_NWE_SETUP( 1 ) - | SMC_SETUP_NCS_WR_SETUP( 0 ) - | SMC_SETUP_NRD_SETUP( 2 ) - | SMC_SETUP_NCS_RD_SETUP( 0 ) ; - - pSmc->SMC_CS_NUMBER[1].SMC_PULSE = SMC_PULSE_NWE_PULSE( 3 ) - | SMC_PULSE_NCS_WR_PULSE( 4 ) - | SMC_PULSE_NRD_PULSE( 3 ) - | SMC_PULSE_NCS_RD_PULSE( 5 ) ; - - /* NWE_CYCLE: The total duration of the write cycle. - NWE_CYCLE = NWE_SETUP + NWE_PULSE + NWE_HOLD - = NCS_WR_SETUP + NCS_WR_PULSE + NCS_WR_HOLD - (tWC) Write Cycle Time min. 70ns - NRD_CYCLE: The total duration of the read cycle. - NRD_CYCLE = NRD_SETUP + NRD_PULSE + NRD_HOLD - = NCS_RD_SETUP + NCS_RD_PULSE + NCS_RD_HOLD - (tRC) Read Cycle Time min. 70ns. */ - pSmc->SMC_CS_NUMBER[1].SMC_CYCLE = SMC_CYCLE_NWE_CYCLE( 4 ) - | SMC_CYCLE_NRD_CYCLE( 5 ) ; - - dwTmp = SMC->SMC_CS_NUMBER[0].SMC_MODE & (uint32_t)(~(SMC_MODE_DBW_Msk)) ; - pSmc->SMC_CS_NUMBER[1].SMC_MODE = dwTmp - | SMC_MODE_READ_MODE - | SMC_MODE_WRITE_MODE - | SMC_MODE_DBW_8_BIT ; -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/clock.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/clock.c deleted file mode 100644 index fb31374f..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/clock.c +++ /dev/null @@ -1,184 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/* - * \brief Describes a possible clock configuration (processor clock & master clock), - * including the necessary register values. - */ -typedef struct _ClockConfiguration -{ - - /** Processor clock frequency (in MHz). */ - uint16_t pck; - /** Master clock frequency (in MHz). */ - uint16_t mck; - /** CKGR_PLL reqister value. */ - uint32_t pllr; - /** PMC_MCKR register value. */ - uint32_t mckr; -} ClockConfiguration ; - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/* Clock configurations for the AT91SAM3S4-EK */ -#define CKGR_MUL_SHIFT 16 -#define CKGR_PLLCOUNT_SHIFT 8 -#define CKGR_DIV_SHIFT 0 - -/* Clock configuration for the AT91SAM3S */ -static const ClockConfiguration clockConfigurations[] = { - - /* PCK = 24 MHz, MCK = 24 MHz - * PCK = 12000000 * (7+1) / 2 / 2 = 24 MHz - */ - {24, 24, (CKGR_PLLAR_STUCKTO1 | (7 << CKGR_MUL_SHIFT) \ - | (0x3f << CKGR_PLLCOUNT_SHIFT) \ - | (2 << CKGR_DIV_SHIFT)), - ( PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK)}, - /* PCK = 48 MHz, MCK = 48 MHz - * PCK = 12000000 * (7+1) / 1 / 2 = 48 MHz - */ - {48, 48, (CKGR_PLLAR_STUCKTO1 | (7 << CKGR_MUL_SHIFT) \ - | (0x3f << CKGR_PLLCOUNT_SHIFT) \ - | (1 << CKGR_DIV_SHIFT)), - ( PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK)}, - /* PCK = 64 MHz, MCK = 64 MHz - * PCK = 12000000 * (15+1) / 3 / 1 = 64 MHz - */ - {64, 64, (CKGR_PLLAR_STUCKTO1 | (15 << CKGR_MUL_SHIFT) \ - | (0x3f << CKGR_PLLCOUNT_SHIFT) \ - | (3 << CKGR_DIV_SHIFT)), - ( PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)} -}; - -/* Number of available clock configurations */ -#define NB_CLOCK_CONFIGURATION (sizeof(clockConfigurations)/sizeof(clockConfigurations[0])) - -/* Current clock configuration */ -uint32_t currentConfig = 0; /* 0 have to be the default configuration */ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Sets the specified clock configuration. - * - * \param configuration Index of the configuration to set. - */ -void CLOCK_SetConfig(uint8_t configuration) -{ - TRACE_DEBUG("Setting clock configuration #%d ... ", configuration); - currentConfig = configuration; - - /* Switch to main oscillator in two operations */ - PMC->PMC_MCKR = (PMC->PMC_MCKR & (uint32_t)~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK; - while ((PMC->PMC_SR & PMC_SR_MCKRDY) == 0); - - /* Configure PLL */ - PMC->CKGR_PLLAR = clockConfigurations[configuration].pllr; - while ((PMC->PMC_SR & PMC_SR_LOCKA) == 0); - - /* Configure master clock in two operations */ - PMC->PMC_MCKR = (clockConfigurations[configuration].mckr & (uint32_t)~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK; - while ((PMC->PMC_SR & PMC_SR_MCKRDY) == 0); - PMC->PMC_MCKR = clockConfigurations[configuration].mckr; - while ((PMC->PMC_SR & PMC_SR_MCKRDY) == 0); - - /* DBGU reconfiguration */ - UART_Configure(115200, clockConfigurations[configuration].mck*1000000); - TRACE_DEBUG("done.\n\r"); -} - -/** - * \brief Display the user menu on the DBGU. - */ -void CLOCK_DisplayMenu(void) -{ - uint32_t i; - - printf("\n\rMenu Clock configuration:\n\r"); - for (i = 0; i < NB_CLOCK_CONFIGURATION; i++) { - - printf(" %u: Set PCK = %3u MHz, MCK = %3u MHz %s\n\r", - (unsigned int)i, - (unsigned int)clockConfigurations[i].pck, - (unsigned int)clockConfigurations[i].mck, - (currentConfig==i)?"(curr)":""); - } -} - -/** - * \brief Get the current MCK - */ -uint16_t CLOCK_GetCurrMCK(void) -{ - return clockConfigurations[currentConfig].mck; -} - -/** - * \brief Get the current PCK - */ -uint16_t CLOCK_GetCurrPCK(void) -{ - return clockConfigurations[currentConfig].pck; -} - -/** - * \brief Change clock configuration. - */ -void CLOCK_UserChangeConfig(void) -{ - uint8_t key = 0; - - while (1) - { - CLOCK_DisplayMenu(); - key = UART_GetChar(); - - if ((key >= '0') && (key <= ('0' + NB_CLOCK_CONFIGURATION - 1))) - { - CLOCK_SetConfig(key - '0'); - break; - } - } -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/frame_buffer.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/frame_buffer.c deleted file mode 100644 index bfc20ba4..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/frame_buffer.c +++ /dev/null @@ -1,435 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" -#include -#include - -/** Frame buffer color cache size used to optimize memcpy */ -#define FB_COLOR_CACHE_SIZE 8 -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ -/** Pointer to frame buffer. It is 16 bit aligned to allow PDC operations - * LcdColor_t shall be defined in the physical lcd API (ili9225.c) -*/ -static LcdColor_t *gpBuffer; -/** Frame buffer width */ -static uint8_t gucWidth; -/** Frame buffer height */ -static uint8_t gucHeight; -/* Pixel color cache */ -static LcdColor_t gFbPixelCache[FB_COLOR_CACHE_SIZE]; - -/*---------------------------------------------------------------------------- - * Static functions - *----------------------------------------------------------------------------*/ -/** - * \brief Check Box coordinates. Return upper left and bottom right coordinates. - * - * \param pX1 X-coordinate of upper-left corner on LCD. - * \param pY1 Y-coordinate of upper-left corner on LCD. - * \param pX2 X-coordinate of lower-right corner on LCD. - * \param pY2 Y-coordinate of lower-right corner on LCD. - */ -static void CheckBoxCoordinates( uint32_t *pX1, uint32_t *pY1, uint32_t *pX2, uint32_t *pY2 ) -{ - uint32_t dw; - - if ( *pX1 >= gucWidth ) - *pX1=gucWidth-1 ; - - if ( *pX2 >= gucWidth ) - *pX2=gucWidth-1 ; - - if ( *pY1 >= gucHeight ) - *pY1=gucHeight-1 ; - - if ( *pY2 >= gucHeight ) - *pY2=gucHeight-1 ; - - if (*pX1 > *pX2) { - dw = *pX1; - *pX1 = *pX2; - *pX2 = dw; - } - if (*pY1 > *pY2) { - dw = *pY1; - *pY1 = *pY2; - *pY2 = dw; - } -} - -/* - * \brief Draw a line on LCD, which is not horizontal or vertical. - * - * \param x X-coordinate of line start. - * \param y Y-coordinate of line start. - * \param length line length. - * \param direction line direction: 0 - horizontal, 1 - vertical. - * \param color Pixel color. - */ -static uint32_t DrawLineBresenham( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - int dx, dy ; - int i ; - int xinc, yinc, cumul ; - int x, y ; - - x = dwX1 ; - y = dwY1 ; - dx = dwX2 - dwX1 ; - dy = dwY2 - dwY1 ; - - xinc = ( dx > 0 ) ? 1 : -1 ; - yinc = ( dy > 0 ) ? 1 : -1 ; - dx = ( dx > 0 ) ? dx : -dx ; - dy = ( dy > 0 ) ? dy : -dy ; - - FB_DrawPixel(x, y); - - if ( dx > dy ) - { - cumul = dx / 2 ; - for ( i = 1 ; i <= dx ; i++ ) - { - x += xinc ; - cumul += dy ; - - if ( cumul >= dx ) - { - cumul -= dx ; - y += yinc ; - } - FB_DrawPixel(x, y); - } - } - else - { - cumul = dy / 2 ; - for ( i = 1 ; i <= dy ; i++ ) - { - y += yinc ; - cumul += dx ; - - if ( cumul >= dy ) - { - cumul -= dy ; - x += xinc ; - } - - FB_DrawPixel(x, y); - } - } - - return 0 ; -} - -/*---------------------------------------------------------------------------- - * External functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configure the current frame buffer. - * Next frame buffer operations will take place in this frame buffer area. - * \param pBuffer 16 bit aligned sram buffer. PDC shall be able to access this - * memory area. - * \param ucWidth frame buffer width - * \param ucHeight frame buffer height - */ -extern void FB_SetFrameBuffer(LcdColor_t *pBuffer, uint8_t ucWidth, uint8_t ucHeight) -{ - /* Sanity check */ - assert(pBuffer != NULL); - - gpBuffer = pBuffer; - gucWidth = ucWidth; - gucHeight = ucHeight; -} - - -/** - * \brief Configure the current color that will be used in the next graphical operations. - * - * \param dwRgb24Bits 24 bit rgb color - */ -extern void FB_SetColor(uint32_t dwRgb24Bits) -{ - uint16_t i; -// LcdColor_t wColor; - -// wColor = (dwRgb24Bits & 0xF80000) >> 8 | -// (dwRgb24Bits & 0x00FC00) >> 5 | -// (dwRgb24Bits & 0x0000F8) >> 3; - - /* Fill the cache with selected color */ - for (i = 0; i < FB_COLOR_CACHE_SIZE; ++i) { - gFbPixelCache[i] = dwRgb24Bits ; - } -} -/** - * \brief Draw a pixel on FB of given color. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - * - * \return 0 is operation is successful, 1 if pixel is out of the fb - */ -extern uint32_t FB_DrawPixel( - uint32_t dwX, - uint32_t dwY) -{ - if ((dwX >= gucWidth) || (dwY >= gucHeight)) { - return 1; - } - gpBuffer[dwX + dwY * gucWidth] = gFbPixelCache[0]; - - return 0; -} - -/** - * \brief Write several pixels with the same color to FB. - * - * Pixel color is set by the LCD_SetColor() function. - * This function is optimized using an sram buffer to transfer block instead of - * individual pixels in order to limit the number of SPI interrupts. - * \param dwX1 X-coordinate of upper-left corner on LCD. - * \param dwY1 Y-coordinate of upper-left corner on LCD. - * \param dwX2 X-coordinate of lower-right corner on LCD. - * \param dwY2 Y-coordinate of lower-right corner on LCD. - * - * \return 0 if operation is successfull - */ -extern uint32_t FB_DrawFilledRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - LcdColor_t *pFbBuffer, *pDestFbBuffer; - uint32_t dwY, blocks, bytes; - - /* Swap coordinates if necessary */ - CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2); - - blocks = ((dwX2 - dwX1 + 1) / FB_COLOR_CACHE_SIZE); - bytes = ((dwX2 - dwX1 + 1) % FB_COLOR_CACHE_SIZE); - - /* Each row is sent by block to benefit from memcpy optimizations */ - pFbBuffer = &(gpBuffer[dwY1 * gucWidth + dwX1]); - for (dwY = dwY1; dwY <= dwY2; ++dwY) { - pDestFbBuffer = pFbBuffer; - while (blocks--) { - memcpy(pDestFbBuffer, gFbPixelCache, FB_COLOR_CACHE_SIZE * sizeof(LcdColor_t)); - pDestFbBuffer += FB_COLOR_CACHE_SIZE; - - } - memcpy(pDestFbBuffer, gFbPixelCache, bytes * sizeof(LcdColor_t)); - pFbBuffer += gucWidth; - } - - return 0; -} - -/** - * \brief Write several pixels pre-formatted in a bufer to FB. - * - * \param dwX1 X-coordinate of upper-left corner on LCD. - * \param dwY1 Y-coordinate of upper-left corner on LCD. - * \param dwX2 X-coordinate of lower-right corner on LCD. - * \param dwY2 Y-coordinate of lower-right corner on LCD. - * \param pBuffer pixel buffer area (no constraint on alignment). - */ -extern uint32_t FB_DrawPicture( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2, const void *pBuffer ) -{ - LcdColor_t *pFbBuffer; - uint32_t dwY; - - /* Swap coordinates if necessary */ - CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2); - - pFbBuffer = &(gpBuffer[dwY1 * gucWidth + dwX1]); - for (dwY = dwY1; dwY <= dwY2; ++dwY) { - memcpy(pFbBuffer, pBuffer, (dwX2 - dwX1 + 1) * sizeof(LcdColor_t)); - pFbBuffer += gucWidth; - } - - return 0 ; -} - -/* - * \brief Draw a line on LCD, horizontal and vertical line are supported. - * - * \param dwX1 X-coordinate of line start. - * \param dwY1 Y-coordinate of line start. - * \param dwX2 X-coordinate of line end. - * \param dwY2 Y-coordinate of line end. - * - * \return 0 if operation is successful -*/ -extern uint32_t FB_DrawLine ( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - /* Optimize horizontal or vertical line drawing */ - if (( dwY1 == dwY2 ) || (dwX1 == dwX2)) { - FB_DrawFilledRectangle( dwX1, dwY1, dwX2, dwY2 ); - } - else { - DrawLineBresenham( dwX1, dwY1, dwX2, dwY2 ) ; - } - - return 0 ; -} - -/** - * \brief Draws a circle in FB, at the given coordinates. - * - * \param dwX X-coordinate of circle center. - * \param dwY Y-coordinate of circle center. - * \param dwR circle radius. - * - * \return 0 if operation is successful -*/ -extern uint32_t FB_DrawCircle( - uint32_t dwX, - uint32_t dwY, - uint32_t dwR) -{ - int32_t d; /* Decision Variable */ - uint32_t curX; /* Current X Value */ - uint32_t curY; /* Current Y Value */ - - if (dwR == 0) - return 0; - d = 3 - (dwR << 1); - curX = 0; - curY = dwR; - - while (curX <= curY) - { - FB_DrawPixel(dwX + curX, dwY + curY); - FB_DrawPixel(dwX + curX, dwY - curY); - FB_DrawPixel(dwX - curX, dwY + curY); - FB_DrawPixel(dwX - curX, dwY - curY); - FB_DrawPixel(dwX + curY, dwY + curX); - FB_DrawPixel(dwX + curY, dwY - curX); - FB_DrawPixel(dwX - curY, dwY + curX); - FB_DrawPixel(dwX - curY, dwY - curX); - - if (d < 0) { - d += (curX << 2) + 6; - } - else { - d += ((curX - curY) << 2) + 10; - curY--; - } - curX++; - } - return 0; -} - -/** - * \brief Draws a filled circle in FB, at the given coordinates. - * - * \param dwX X-coordinate of circle center. - * \param dwY Y-coordinate of circle center. - * \param dwR circle radius. - * - * \return 0 if operation is successful -*/ -extern uint32_t FB_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius) -{ - signed int d ; // Decision Variable - uint32_t dwCurX ; // Current X Value - uint32_t dwCurY ; // Current Y Value - uint32_t dwXmin, dwYmin; - - if (dwRadius == 0) - return 0; - d = 3 - (dwRadius << 1) ; - dwCurX = 0 ; - dwCurY = dwRadius ; - - while ( dwCurX <= dwCurY ) - { - dwXmin = (dwCurX > dwX) ? 0 : dwX-dwCurX; - dwYmin = (dwCurY > dwY) ? 0 : dwY-dwCurY; - FB_DrawFilledRectangle( dwXmin, dwYmin, dwX+dwCurX, dwYmin ) ; - FB_DrawFilledRectangle( dwXmin, dwY+dwCurY, dwX+dwCurX, dwY+dwCurY ) ; - dwXmin = (dwCurY > dwX) ? 0 : dwX-dwCurY; - dwYmin = (dwCurX > dwY) ? 0 : dwY-dwCurX; - FB_DrawFilledRectangle( dwXmin, dwYmin, dwX+dwCurY, dwYmin ) ; - FB_DrawFilledRectangle( dwXmin, dwY+dwCurX, dwX+dwCurY, dwY+dwCurX ) ; - - if ( d < 0 ) - { - d += (dwCurX << 2) + 6 ; - } - else - { - d += ((dwCurX - dwCurY) << 2) + 10; - dwCurY-- ; - } - - dwCurX++ ; - } - - return 0 ; -} - -/** -* Pixel color is set by the LCD_SetColor() function. -* This function is optimized using an sram buffer to transfer block instead of -* individual pixels in order to limit the number of SPI interrupts. -* \param dwX1 X-coordinate of upper-left corner on LCD. -* \param dwY1 Y-coordinate of upper-left corner on LCD. -* \param dwX2 X-coordinate of lower-right corner on LCD. -* \param dwY2 Y-coordinate of lower-right corner on LCD. -* -* \return 0 if operation is successfull -*/ -extern uint32_t FB_DrawRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2); - - FB_DrawFilledRectangle( dwX1, dwY1, dwX2, dwY1 ) ; - FB_DrawFilledRectangle( dwX1, dwY2, dwX2, dwY2 ) ; - - FB_DrawFilledRectangle( dwX1, dwY1, dwX1, dwY2 ) ; - FB_DrawFilledRectangle( dwX2, dwY1, dwX2, dwY2 ) ; - - return 0 ; -} - - - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/hamming.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/hamming.c deleted file mode 100644 index 4a4fc0c4..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/hamming.c +++ /dev/null @@ -1,339 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -/*---------------------------------------------------------------------------- - * Internal function - *----------------------------------------------------------------------------*/ - -/** - * Counts and return the number of bits set to '1' in the given byte. - * \param byte Byte to count. - */ -static uint8_t CountBitsInByte(uint8_t byte) -{ - uint8_t count = 0; - - while (byte > 0) - { - if (byte & 1) - { - count++; - } - byte >>= 1; - } - - return count; -} - -/** - * Counts and return the number of bits set to '1' in the given hamming code. - * \param code Hamming code. - */ -static uint8_t CountBitsInCode256(uint8_t *code) -{ - return CountBitsInByte(code[0]) + CountBitsInByte(code[1]) + CountBitsInByte(code[2]); -} - -/** - * Calculates the 22-bit hamming code for a 256-bytes block of data. - * \param data Data buffer to calculate code for. - * \param code Pointer to a buffer where the code should be stored. - */ -static void Compute256(const uint8_t *data, uint8_t *code) -{ - uint32_t i; - uint8_t columnSum = 0; - uint8_t evenLineCode = 0; - uint8_t oddLineCode = 0; - uint8_t evenColumnCode = 0; - uint8_t oddColumnCode = 0; - - // Xor all bytes together to get the column sum; - // At the same time, calculate the even and odd line codes - for (i=0; i < 256; i++) - { - columnSum ^= data[i]; - - // If the xor sum of the byte is 0, then this byte has no incidence on - // the computed code; so check if the sum is 1. - if ((CountBitsInByte(data[i]) & 1) == 1) - { - // Parity groups are formed by forcing a particular index bit to 0 - // (even) or 1 (odd). - // Example on one byte: - // - // bits (dec) 7 6 5 4 3 2 1 0 - // (bin) 111 110 101 100 011 010 001 000 - // '---'---'---'----------. - // | - // groups P4' ooooooooooooooo eeeeeeeeeeeeeee P4 | - // P2' ooooooo eeeeeee ooooooo eeeeeee P2 | - // P1' ooo eee ooo eee ooo eee ooo eee P1 | - // | - // We can see that: | - // - P4 -> bit 2 of index is 0 --------------------' - // - P4' -> bit 2 of index is 1. - // - P2 -> bit 1 of index if 0. - // - etc... - // We deduce that a bit position has an impact on all even Px if - // the log2(x)nth bit of its index is 0 - // ex: log2(4) = 2, bit2 of the index must be 0 (-> 0 1 2 3) - // and on all odd Px' if the log2(x)nth bit of its index is 1 - // ex: log2(2) = 1, bit1 of the index must be 1 (-> 0 1 4 5) - // - // As such, we calculate all the possible Px and Px' values at the - // same time in two variables, evenLineCode and oddLineCode, such as - // evenLineCode bits: P128 P64 P32 P16 P8 P4 P2 P1 - // oddLineCode bits: P128' P64' P32' P16' P8' P4' P2' P1' - // - evenLineCode ^= (255 - i); - oddLineCode ^= i; - } - } - - // At this point, we have the line parities, and the column sum. First, We - // must caculate the parity group values on the column sum. - for (i=0; i < 8; i++) - { - if (columnSum & 1) - { - evenColumnCode ^= (7 - i); - oddColumnCode ^= i; - } - columnSum >>= 1; - } - - // Now, we must interleave the parity values, to obtain the following layout: - // Code[0] = Line1 - // Code[1] = Line2 - // Code[2] = Column - // Line = Px' Px P(x-1)- P(x-1) ... - // Column = P4' P4 P2' P2 P1' P1 PadBit PadBit - code[0] = 0; - code[1] = 0; - code[2] = 0; - - for (i=0; i < 4; i++) - { - code[0] <<= 2; - code[1] <<= 2; - code[2] <<= 2; - - // Line 1 - if ((oddLineCode & 0x80) != 0) - { - code[0] |= 2; - } - - if ((evenLineCode & 0x80) != 0) - { - code[0] |= 1; - } - - // Line 2 - if ((oddLineCode & 0x08) != 0) - { - code[1] |= 2; - } - - if ((evenLineCode & 0x08) != 0) - { - code[1] |= 1; - } - - // Column - if ((oddColumnCode & 0x04) != 0) - { - code[2] |= 2; - } - - if ((evenColumnCode & 0x04) != 0) - { - code[2] |= 1; - } - - oddLineCode <<= 1; - evenLineCode <<= 1; - oddColumnCode <<= 1; - evenColumnCode <<= 1; - } - - // Invert codes (linux compatibility) - code[0] = (~(uint32_t)code[0]); - code[1] = (~(uint32_t)code[1]); - code[2] = (~(uint32_t)code[2]); - - TRACE_DEBUG("Computed code = %02X %02X %02X\n\r", - code[0], code[1], code[2]); -} - -/** - * Verifies and corrects a 256-bytes block of data using the given 22-bits - * hamming code. - * - * \param data Data buffer to check. - * \param originalCode Hamming code to use for verifying the data. - * - * \return 0 if there is no error, otherwise returns a HAMMING_ERROR code. - */ -static uint8_t Verify256( uint8_t* pucData, const uint8_t* pucOriginalCode ) -{ - /* Calculate new code */ - uint8_t computedCode[3] ; - uint8_t correctionCode[3] ; - - Compute256( pucData, computedCode ) ; - - /* Xor both codes together */ - correctionCode[0] = computedCode[0] ^ pucOriginalCode[0] ; - correctionCode[1] = computedCode[1] ^ pucOriginalCode[1] ; - correctionCode[2] = computedCode[2] ^ pucOriginalCode[2] ; - - TRACE_DEBUG( "Correction code = %02X %02X %02X\n\r", correctionCode[0], correctionCode[1], correctionCode[2] ) ; - - // If all bytes are 0, there is no error - if ( (correctionCode[0] == 0) && (correctionCode[1] == 0) && (correctionCode[2] == 0) ) - { - return 0 ; - } - - /* If there is a single bit error, there are 11 bits set to 1 */ - if ( CountBitsInCode256( correctionCode ) == 11 ) - { - // Get byte and bit indexes - uint8_t byte ; - uint8_t bit ; - - byte = correctionCode[0] & 0x80; - byte |= (correctionCode[0] << 1) & 0x40; - byte |= (correctionCode[0] << 2) & 0x20; - byte |= (correctionCode[0] << 3) & 0x10; - - byte |= (correctionCode[1] >> 4) & 0x08; - byte |= (correctionCode[1] >> 3) & 0x04; - byte |= (correctionCode[1] >> 2) & 0x02; - byte |= (correctionCode[1] >> 1) & 0x01; - - bit = (correctionCode[2] >> 5) & 0x04; - bit |= (correctionCode[2] >> 4) & 0x02; - bit |= (correctionCode[2] >> 3) & 0x01; - - /* Correct bit */ - TRACE_DEBUG("Correcting byte #%d at bit %d\n\r", byte, bit ) ; - pucData[byte] ^= (1 << bit) ; - - return Hamming_ERROR_SINGLEBIT ; - } - - /* Check if ECC has been corrupted */ - if ( CountBitsInCode256( correctionCode ) == 1 ) - { - return Hamming_ERROR_ECC ; - } - /* Otherwise, this is a multi-bit error */ - else - { - return Hamming_ERROR_MULTIPLEBITS ; - } -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * Computes 3-bytes hamming codes for a data block whose size is multiple of - * 256 bytes. Each 256 bytes block gets its own code. - * \param data Data to compute code for. - * \param size Data size in bytes. - * \param code Codes buffer. - */ -void Hamming_Compute256x( const uint8_t *pucData, uint32_t dwSize, uint8_t* puCode ) -{ - TRACE_DEBUG("Hamming_Compute256x()\n\r"); - - while ( dwSize > 0 ) - { - Compute256( pucData, puCode ) ; - - pucData += 256; - puCode += 3; - dwSize -= 256; - } -} - -/** - * Verifies 3-bytes hamming codes for a data block whose size is multiple of - * 256 bytes. Each 256-bytes block is verified with its own code. - * - * \return 0 if the data is correct, Hamming_ERROR_SINGLEBIT if one or more - * block(s) have had a single bit corrected, or either Hamming_ERROR_ECC - * or Hamming_ERROR_MULTIPLEBITS. - * - * \param data Data buffer to verify. - * \param size Size of the data in bytes. - * \param code Original codes. - */ -uint8_t Hamming_Verify256x( uint8_t* pucData, uint32_t dwSize, const uint8_t* pucCode ) -{ - uint8_t error ; - uint8_t result = 0 ; - - TRACE_DEBUG( "Hamming_Verify256x()\n\r" ) ; - - while ( dwSize > 0 ) - { - error = Verify256( pucData, pucCode ) ; - - if ( error == Hamming_ERROR_SINGLEBIT ) - { - result = Hamming_ERROR_SINGLEBIT ; - } - else - { - if ( error ) - { - return error ; - } - } - - pucData += 256; - pucCode += 3; - dwSize -= 256; - } - - return result ; -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/ili9325.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/ili9325.c deleted file mode 100644 index 1b55e249..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/ili9325.c +++ /dev/null @@ -1,907 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of ILI9325 driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "board.h" - -#include -#include - -#ifdef BOARD_LCD_ILI9325 - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/* Pixel cache used to speed up communication */ -#define LCD_DATA_CACHE_SIZE BOARD_LCD_WIDTH -static LcdColor_t gLcdPixelCache[LCD_DATA_CACHE_SIZE]; - -/*---------------------------------------------------------------------------- - * Export functions - *----------------------------------------------------------------------------*/ - - -/** - * \brief Write data to LCD Register. - * - * \param reg Register address. - * \param data Data to be written. - */ -static void LCD_WriteReg( uint8_t reg, uint16_t data ) -{ - LCD_IR() = 0; - LCD_IR() = reg; - LCD_D() = (data >> 8) & 0xFF; - LCD_D() = data & 0xFF; -} - -/** - * \brief Read data from LCD Register. - * - * \param reg Register address. - * - * \return Readed data. - */ -static uint16_t LCD_ReadReg( uint8_t reg ) -{ - uint16_t value; - - LCD_IR() = 0; - LCD_IR() = reg; - - value = LCD_D(); - value = (value << 8) | LCD_D(); - - return value; -} - - -/** - * \brief Prepare to write GRAM data. - */ -extern void LCD_WriteRAM_Prepare( void ) -{ - LCD_IR() = 0 ; - LCD_IR() = ILI9325_R22H ; /* Write Data to GRAM (R22h) */ -} - -/** - * \brief Write data to LCD GRAM. - * - * \param color 24-bits RGB color. - */ -extern void LCD_WriteRAM( LcdColor_t dwColor ) -{ - LCD_D() = ((dwColor >> 16) & 0xFF); - LCD_D() = ((dwColor >> 8) & 0xFF); - LCD_D() = (dwColor & 0xFF); -} - -/** - * \brief Write mutiple data in buffer to LCD controller. - * - * \param pBuf data buffer. - * \param size size in pixels. - */ -static void LCD_WriteRAMBuffer(const LcdColor_t *pBuf, uint32_t size) -{ - uint32_t addr ; - - for ( addr = 0 ; addr < size ; addr++ ) - { - LCD_WriteRAM(pBuf[addr]); - } -} - -/** - * \brief Prepare to read GRAM data. - */ -extern void LCD_ReadRAM_Prepare( void ) -{ - LCD_IR() = 0 ; - LCD_IR() = ILI9325_R22H ; /* Write Data to GRAM (R22h) */ -} - -/** - * \brief Read data to LCD GRAM. - * - * \note Because pixel data LCD GRAM is 18-bits, so convertion to RGB 24-bits - * will cause low color bit lose. - * - * \return color 24-bits RGB color. - */ -extern uint32_t LCD_ReadRAM( void ) -{ - uint8_t value[2]; - uint32_t color; - - value[0] = LCD_D(); /* dummy read */ - value[1] = LCD_D(); /* dummy read */ - value[0] = LCD_D(); /* data upper byte */ - value[1] = LCD_D(); /* data lower byte */ - - /* Convert RGB565 to RGB888 */ - /* For BGR format */ - color = ((value[0] & 0xF8)) | /* R */ - ((value[0] & 0x07) << 13) | ((value[1] & 0xE0) << 5) | /* G */ - ((value[1] & 0x1F) << 19); /* B */ - return color; -} - -/*---------------------------------------------------------------------------- - * Basic ILI9225 primitives - *----------------------------------------------------------------------------*/ - - -/** - * \brief Check Box coordinates. Return upper left and bottom right coordinates. - * - * \param pX1 X-coordinate of upper-left corner on LCD. - * \param pY1 Y-coordinate of upper-left corner on LCD. - * \param pX2 X-coordinate of lower-right corner on LCD. - * \param pY2 Y-coordinate of lower-right corner on LCD. - */ -static void CheckBoxCoordinates( uint32_t *pX1, uint32_t *pY1, uint32_t *pX2, uint32_t *pY2 ) -{ - uint32_t dw; - - if ( *pX1 >= BOARD_LCD_WIDTH ) - { - *pX1 = BOARD_LCD_WIDTH-1 ; - } - if ( *pX2 >= BOARD_LCD_WIDTH ) - { - *pX2 = BOARD_LCD_WIDTH-1 ; - } - if ( *pY1 >= BOARD_LCD_HEIGHT ) - { - *pY1 = BOARD_LCD_HEIGHT-1 ; - } - if ( *pY2 >= BOARD_LCD_HEIGHT ) - { - *pY2 = BOARD_LCD_HEIGHT-1 ; - } - if (*pX1 > *pX2) - { - dw = *pX1; - *pX1 = *pX2; - *pX2 = dw; - } - if (*pY1 > *pY2) - { - dw = *pY1; - *pY1 = *pY2; - *pY2 = dw; - } -} - -/** - * \brief Initialize the LCD controller. - */ -extern uint32_t LCD_Initialize( void ) -{ - uint16_t chipid ; - - /* Check ILI9325 chipid */ - chipid = LCD_ReadReg( ILI9325_R00H ) ; /* Driver Code Read (R00h) */ - if ( chipid != ILI9325_DEVICE_CODE ) - { - printf( "Read ILI9325 chip ID (0x%04x) error, skip initialization.\r\n", chipid ) ; - return 1 ; - } - - /* Turn off LCD */ - LCD_PowerDown() ; - - /* Start initial sequence */ - LCD_WriteReg(ILI9325_R10H, 0x0000); /* DSTB = LP = STB = 0 */ - LCD_WriteReg(ILI9325_R00H, 0x0001); /* start internal OSC */ - LCD_WriteReg(ILI9325_R01H, ILI9325_R01H_SS ) ; /* set SS and SM bit */ - LCD_WriteReg(ILI9325_R02H, 0x0700); /* set 1 line inversion */ - //LCD_WriteReg(ILI9325_R03H, 0xD030); /* set GRAM write direction and BGR=1. */ - LCD_WriteReg(ILI9325_R04H, 0x0000); /* Resize register */ - LCD_WriteReg(ILI9325_R08H, 0x0207); /* set the back porch and front porch */ - LCD_WriteReg(ILI9325_R09H, 0x0000); /* set non-display area refresh cycle ISC[3:0] */ - LCD_WriteReg(ILI9325_R0AH, 0x0000); /* FMARK function */ - LCD_WriteReg(ILI9325_R0CH, 0x0000); /* RGB interface setting */ - LCD_WriteReg(ILI9325_R0DH, 0x0000); /* Frame marker Position */ - LCD_WriteReg(ILI9325_R0FH, 0x0000); /* RGB interface polarity */ - - /* Power on sequence */ - LCD_WriteReg(ILI9325_R10H, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ - LCD_WriteReg(ILI9325_R11H, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ - LCD_WriteReg(ILI9325_R12H, 0x0000); /* VREG1OUT voltage */ - LCD_WriteReg(ILI9325_R13H, 0x0000); /* VDV[4:0] for VCOM amplitude */ - Wait( 200 ) ; /* Dis-charge capacitor power voltage */ - LCD_WriteReg(ILI9325_R10H, 0x1290); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ - LCD_WriteReg(ILI9325_R11H, 0x0227); /* DC1[2:0], DC0[2:0], VC[2:0] */ - Wait( 50 ) ; - LCD_WriteReg(ILI9325_R12H, 0x001B); /* Internal reference voltage= Vci; */ - Wait( 50 ) ; - LCD_WriteReg(ILI9325_R13H, 0x1100); /* Set VDV[4:0] for VCOM amplitude */ - LCD_WriteReg(ILI9325_R29H, 0x0019); /* Set VCM[5:0] for VCOMH */ - LCD_WriteReg(ILI9325_R2BH, 0x000D); /* Set Frame Rate */ - Wait( 50 ) ; - - /* Adjust the Gamma Curve */ - LCD_WriteReg(ILI9325_R30H, 0x0000); - LCD_WriteReg(ILI9325_R31H, 0x0204); - LCD_WriteReg(ILI9325_R32H, 0x0200); - LCD_WriteReg(ILI9325_R35H, 0x0007); - LCD_WriteReg(ILI9325_R36H, 0x1404); - LCD_WriteReg(ILI9325_R37H, 0x0705); - LCD_WriteReg(ILI9325_R38H, 0x0305); - LCD_WriteReg(ILI9325_R39H, 0x0707); - LCD_WriteReg(ILI9325_R3CH, 0x0701); - LCD_WriteReg(ILI9325_R3DH, 0x000e); - - LCD_SetDisplayPortrait( 0 ) ; - /* Vertical Scrolling */ - LCD_WriteReg( ILI9325_R61H, 0x0001 ) ; - LCD_WriteReg( ILI9325_R6AH, 0x0000 ) ; - - /* Partial Display Control */ - LCD_WriteReg(ILI9325_R80H, 0x0000); - LCD_WriteReg(ILI9325_R81H, 0x0000); - LCD_WriteReg(ILI9325_R82H, 0x0000); - LCD_WriteReg(ILI9325_R83H, 0x0000); - LCD_WriteReg(ILI9325_R84H, 0x0000); - LCD_WriteReg(ILI9325_R85H, 0x0000); - - /* Panel Control */ - LCD_WriteReg(ILI9325_R90H, 0x0010); - LCD_WriteReg(ILI9325_R92H, 0x0600); - LCD_WriteReg(ILI9325_R95H, 0x0110); - - LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ; - LCD_SetCursor( 0, 0 ) ; - - return 0 ; -} - -/** - * \brief Turn on the LCD. - */ -extern void LCD_On( void ) -{ - /* Display Control 1 (R07h) */ - /* When BASEE = “1”, the base image is displayed. */ - /* GON and DTE Set the output level of gate driver G1 ~ G320 : Normal Display */ - /* D1=1 D0=1 BASEE=1: Base image display Operate */ - LCD_WriteReg( ILI9325_R07H, ILI9325_R07H_BASEE - | ILI9325_R07H_GON | ILI9325_R07H_DTE - | ILI9325_R07H_D1 | ILI9325_R07H_D0 ) ; -} - - -/** - * \brief Turn off the LCD. - */ -extern void LCD_Off( void ) -{ - /* Display Control 1 (R07h) */ - /* When BASEE = “0”, no base image is displayed. */ - /* When the display is turned off by setting D[1:0] = “00”, the ILI9325 internal display - operation is halted completely. */ - /* PTDE1/0 = 0: turns off partial image. */ - LCD_WriteReg( ILI9325_R07H, 0x00 ) ; -} - -/** - * \brief Power down the LCD. - */ -extern void LCD_PowerDown( void ) -{ - /* Display Control 1 (R07h) */ - /* When BASEE = “0”, no base image is displayed. */ - /* GON and DTE Set the output level of gate driver G1 ~ G320 : Normal Display */ - /* D1=1 D0=1 BASEE=1: Base image display Operate */ - LCD_WriteReg( ILI9325_R07H, ILI9325_R07H_GON | ILI9325_R07H_DTE - | ILI9325_R07H_D1 | ILI9325_R07H_D0 ) ; -} - -/** - * \brief Convert 24 bit RGB color into 5-6-5 rgb color space. - * - * Initialize the LcdColor_t cache with the color pattern. - * \param x 24-bits RGB color. - * \return 0 for successfull operation. - */ -extern uint32_t LCD_SetColor( uint32_t dwRgb24Bits ) -{ - uint32_t i ; - - /* Fill the cache with selected color */ - for ( i = 0 ; i < LCD_DATA_CACHE_SIZE ; ++i ) - { - gLcdPixelCache[i] = dwRgb24Bits ; - } - - return 0; -} - -/** - * \brief Set cursor of LCD srceen. - * - * \param x X-coordinate of upper-left corner on LCD. - * \param y Y-coordinate of upper-left corner on LCD. - */ -extern void LCD_SetCursor( uint16_t x, uint16_t y ) -{ - /* GRAM Horizontal/Vertical Address Set (R20h, R21h) */ - LCD_WriteReg( ILI9325_R20H, x ) ; /* column */ - LCD_WriteReg( ILI9325_R21H, y ) ; /* row */ -} - -extern void LCD_SetWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight ) -{ - /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */ - - /* Set Horizontal Address Start Position */ - LCD_WriteReg( ILI9325_R50H, (uint16_t)dwX ) ; - - /* Set Horizontal Address End Position */ - LCD_WriteReg( ILI9325_R51H, (uint16_t)dwX+dwWidth-1 ) ; - - /* Set Vertical Address Start Position */ - LCD_WriteReg( ILI9325_R52H, (uint16_t)dwY ) ; - - /* Set Vertical Address End Position */ - LCD_WriteReg( ILI9325_R53H, (uint16_t)dwY+dwHeight-1 ) ; -} - -extern void LCD_SetDisplayLandscape( uint32_t dwRGB ) -{ - uint16_t dwValue ; - - /* When AM = “1”, the address is updated in vertical writing direction. */ - /* DFM Set the mode of transferring data to the internal RAM when TRI = “1”. */ - /* When TRI = “1”, data are transferred to the internal RAM in 8-bit x 3 transfers mode via the 8-bit interface. */ - /* Use the high speed write mode (HWM=1) */ - /* ORG = “1”: The original address “00000h” moves according to the I/D[1:0] setting. */ - /* I/D[1:0] = 00 Horizontal : decrement Vertical : decrement, AM=0:Horizontal */ - dwValue = ILI9325_R03H_AM | ILI9325_R03H_DFM | ILI9325_R03H_TRI | ILI9325_R03H_HWM | ILI9325_R03H_ORG ; - - if ( dwRGB == 0 ) - { - /* BGR=”1”: Swap the RGB data to BGR in writing into GRAM. */ - dwValue |= ILI9325_R03H_BGR ; - } - LCD_WriteReg( ILI9325_R03H, dwValue ) ; - - // LCD_WriteReg( ILI9325_R60H, (0x1d<<8)|0x00 ) ; /*Gate Scan Control */ - - LCD_SetWindow( 0, 0, BOARD_LCD_HEIGHT, BOARD_LCD_WIDTH ) ; -} - -extern void LCD_SetDisplayPortrait( uint32_t dwRGB ) -{ - uint16_t dwValue ; - - /* Use the high speed write mode (HWM=1) */ - /* When TRI = “1”, data are transferred to the internal RAM in 8-bit x 3 transfers mode via the 8-bit interface. */ - /* DFM Set the mode of transferring data to the internal RAM when TRI = “1”. */ - /* I/D[1:0] = 11 Horizontal : increment Vertical : increment, AM=0:Horizontal */ - dwValue = ILI9325_R03H_HWM | ILI9325_R03H_TRI | ILI9325_R03H_DFM | ILI9325_R03H_ID1 | ILI9325_R03H_ID0 ; - - if ( dwRGB == 0 ) - { - /* BGR=”1”: Swap the RGB data to BGR in writing into GRAM. */ - dwValue |= ILI9325_R03H_BGR ; - } - LCD_WriteReg( ILI9325_R03H, dwValue ) ; - /* Gate Scan Control (R60h, R61h, R6Ah) */ - /* SCN[5:0] = 00 */ - /* NL[5:0]: Sets the number of lines to drive the LCD at an interval of 8 lines. */ - LCD_WriteReg( ILI9325_R60H, ILI9325_R60H_GS|(0x27<<8)|0x00 ) ; -} - - -extern void LCD_VerticalScroll( uint16_t wY ) -{ - /* Gate Scan Control (R60h, R61h, R6Ah) */ - /* Enables the grayscale inversion of the image by setting REV=1. */ - /* VLE: Vertical scroll display enable bit */ - LCD_WriteReg( ILI9325_R61H, 3 ) ; - LCD_WriteReg( ILI9325_R6AH, wY ) ; -} - - -extern void LCD_SetPartialImage1( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd ) -{ - assert( dwStart <= dwEnd ) ; - - /* Partial Image 1 Display Position (R80h) */ - LCD_WriteReg( ILI9325_R80H, dwDisplayPos&0x1ff ) ; - /* Partial Image 1 RAM Start/End Address (R81h, R82h) */ - LCD_WriteReg( ILI9325_R81H, dwStart&0x1ff ) ; - LCD_WriteReg( ILI9325_R82H, dwEnd&0x1ff ) ; -} - -extern void LCD_SetPartialImage2( uint32_t dwDisplayPos, uint32_t dwStart, uint32_t dwEnd ) -{ - assert( dwStart <= dwEnd ) ; - - /* Partial Image 2 Display Position (R83h) */ - LCD_WriteReg( ILI9325_R83H, dwDisplayPos&0x1ff ) ; - /* Partial Image 2 RAM Start/End Address (R84h, R85h) */ - LCD_WriteReg( ILI9325_R84H, dwStart&0x1ff ) ; - LCD_WriteReg( ILI9325_R85H, dwEnd&0x1ff ) ; -} - -/** - * \brief Draw a LcdColor_t on LCD of given color. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - */ -extern uint32_t LCD_DrawPixel( uint32_t x, uint32_t y ) -{ - if( (x >= BOARD_LCD_WIDTH) || (y >= BOARD_LCD_HEIGHT) ) - { - return 1; - } - - /* Set cursor */ - LCD_SetCursor( x, y ); - - /* Prepare to write in GRAM */ - LCD_WriteRAM_Prepare(); - LCD_WriteRAM( *gLcdPixelCache ); - - return 0; -} - - - -extern void LCD_TestPattern( uint32_t dwRGB ) -{ - uint32_t dwLine ; - uint32_t dw ; - - LCD_SetWindow( 10, 10, 100, 20 ) ; - LCD_SetCursor( 10, 10 ) ; - LCD_WriteRAM_Prepare() ; - - for ( dwLine=0 ; dwLine < 20 ; dwLine++ ) - { - /* Draw White bar */ - for ( dw=0 ; dw < 20 ; dw++ ) - { - LCD_D() = 0xff ; - LCD_D() = 0xff ; - LCD_D() = 0xff ; - } - /* Draw Red bar */ - for ( dw=0 ; dw < 20 ; dw++ ) - { - if ( dwRGB == 0 ) - { - LCD_D() = 0xff ; - LCD_D() = 0x00 ; - LCD_D() = 0x00 ; - } - else - { - LCD_D() = 0x00 ; - LCD_D() = 0x00 ; - LCD_D() = 0xff ; - } - } - /* Draw Green bar */ - for ( dw=0 ; dw < 20 ; dw++ ) - { - LCD_D() = 0x00 ; - LCD_D() = 0xff ; - LCD_D() = 0x00 ; - } - /* Draw Blue bar */ - for ( dw=0 ; dw < 20 ; dw++ ) - { - if ( dwRGB == 0 ) - { - LCD_D() = 0x00 ; - LCD_D() = 0x00 ; - LCD_D() = 0xff ; - } - else - { - LCD_D() = 0xff ; - LCD_D() = 0x00 ; - LCD_D() = 0x00 ; - } - } - /* Draw Black bar */ - for ( dw=0 ; dw < 20 ; dw++ ) - { - LCD_D() = 0x00 ; - LCD_D() = 0x00 ; - LCD_D() = 0x00 ; - } - } - - LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ; -} - - -/** - * \brief Write several pixels with the same color to LCD GRAM. - * - * LcdColor_t color is set by the LCD_SetColor() function. - * This function is optimized using an sram buffer to transfer block instead of - * individual pixels in order to limit the number of SPI interrupts. - * \param dwX1 X-coordinate of upper-left corner on LCD. - * \param dwY1 Y-coordinate of upper-left corner on LCD. - * \param dwX2 X-coordinate of lower-right corner on LCD. - * \param dwY2 Y-coordinate of lower-right corner on LCD. - */ -extern uint32_t LCD_DrawFilledRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - uint32_t size, blocks; - - /* Swap coordinates if necessary */ - CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2); - - /* Determine the refresh window area */ - /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */ - LCD_WriteReg(ILI9325_R50H, (uint16_t)dwX1); - LCD_WriteReg(ILI9325_R51H, (uint16_t)dwX2); - LCD_WriteReg(ILI9325_R52H, (uint16_t)dwY1); - LCD_WriteReg(ILI9325_R53H, (uint16_t)dwY2); - - /* Set cursor */ - LCD_SetCursor( dwX1, dwY1 ); - - /* Prepare to write in GRAM */ - LCD_WriteRAM_Prepare(); - - size = (dwX2 - dwX1 + 1) * (dwY2 - dwY1 + 1); - /* Send pixels blocks => one SPI IT / block */ - blocks = size / LCD_DATA_CACHE_SIZE; - while (blocks--) - { - LCD_WriteRAMBuffer(gLcdPixelCache, LCD_DATA_CACHE_SIZE); - } - /* Send remaining pixels */ - LCD_WriteRAMBuffer(gLcdPixelCache, size % LCD_DATA_CACHE_SIZE); - - /* Reset the refresh window area */ - /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */ - LCD_WriteReg(ILI9325_R50H, (uint16_t)0 ) ; - LCD_WriteReg(ILI9325_R51H, (uint16_t)BOARD_LCD_WIDTH - 1 ) ; - LCD_WriteReg(ILI9325_R52H, (uint16_t)0) ; - LCD_WriteReg(ILI9325_R53H, (uint16_t)BOARD_LCD_HEIGHT - 1 ) ; - - return 0 ; -} - -/** - * \brief Write several pixels pre-formatted in a bufer to LCD GRAM. - * - * \param dwX1 X-coordinate of upper-left corner on LCD. - * \param dwY1 Y-coordinate of upper-left corner on LCD. - * \param dwX2 X-coordinate of lower-right corner on LCD. - * \param dwY2 Y-coordinate of lower-right corner on LCD. - * \param pBuffer LcdColor_t buffer area. - */ -extern uint32_t LCD_DrawPicture( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2, const LcdColor_t *pBuffer ) -{ - uint32_t size, blocks; - LcdColor_t currentColor; - - /* Swap coordinates if necessary */ - CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2); - - /* Determine the refresh window area */ - /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */ - LCD_WriteReg(ILI9325_R50H, (uint16_t)dwX1 ) ; - LCD_WriteReg(ILI9325_R51H, (uint16_t)dwX2 ) ; - LCD_WriteReg(ILI9325_R52H, (uint16_t)dwY1 ) ; - LCD_WriteReg(ILI9325_R53H, (uint16_t)dwY2 ) ; - - /* Set cursor */ - LCD_SetCursor( dwX1, dwY1 ); - - /* Prepare to write in GRAM */ - LCD_WriteRAM_Prepare(); - - size = (dwX2 - dwX1 + 1) * (dwY2 - dwY1 + 1); - - /* Check if the buffer is within the SRAM */ - if ((IRAM_ADDR <= (uint32_t)pBuffer) && ((uint32_t)pBuffer < (IRAM_ADDR+IRAM_SIZE))) - { - LCD_WriteRAMBuffer(pBuffer, size); - } - /* If the buffer is not in SRAM, transfer it in SRAM first before transfer */ - else - { - /* Use color buffer as a cache */ - currentColor = gLcdPixelCache[0]; - /* Send pixels blocks => one SPI IT / block */ - blocks = size / LCD_DATA_CACHE_SIZE; - while (blocks--) - { - memcpy(gLcdPixelCache, pBuffer, LCD_DATA_CACHE_SIZE * sizeof(LcdColor_t)); - LCD_WriteRAMBuffer(gLcdPixelCache, LCD_DATA_CACHE_SIZE); - pBuffer += LCD_DATA_CACHE_SIZE; - } - /* Send remaining pixels */ - memcpy(gLcdPixelCache, pBuffer, (size % LCD_DATA_CACHE_SIZE) * sizeof(LcdColor_t)); - LCD_WriteRAMBuffer(gLcdPixelCache, size % LCD_DATA_CACHE_SIZE); - - /* Restore the color cache */ - LCD_SetColor(currentColor); - } - - /* Reset the refresh window area */ - /* Horizontal and Vertical RAM Address Position (R50h, R51h, R52h, R53h) */ - LCD_WriteReg(ILI9325_R50H, (uint16_t)0 ) ; - LCD_WriteReg(ILI9325_R51H, (uint16_t)BOARD_LCD_WIDTH - 1 ) ; - LCD_WriteReg(ILI9325_R52H, (uint16_t)0 ) ; - LCD_WriteReg(ILI9325_R53H, (uint16_t)BOARD_LCD_HEIGHT - 1 ) ; - - return 0 ; -} - -/* - * \brief Draw a line on LCD, which is not horizontal or vertical. - * - * \param x X-coordinate of line start. - * \param y Y-coordinate of line start. - * \param length line length. - * \param direction line direction: 0 - horizontal, 1 - vertical. - * \param color LcdColor_t color. - */ -static uint32_t DrawLineBresenham( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - int dx, dy ; - int i ; - int xinc, yinc, cumul ; - int x, y ; - - x = dwX1 ; - y = dwY1 ; - dx = dwX2 - dwX1 ; - dy = dwY2 - dwY1 ; - - xinc = ( dx > 0 ) ? 1 : -1 ; - yinc = ( dy > 0 ) ? 1 : -1 ; - dx = ( dx > 0 ) ? dx : -dx ; - dy = ( dy > 0 ) ? dy : -dy ; - - LCD_DrawPixel( x, y ) ; - - if ( dx > dy ) - { - cumul = dx / 2 ; - for ( i = 1 ; i <= dx ; i++ ) - { - x += xinc ; - cumul += dy ; - - if ( cumul >= dx ) - { - cumul -= dx ; - y += yinc ; - } - LCD_DrawPixel( x, y ) ; - } - } - else - { - cumul = dy / 2 ; - for ( i = 1 ; i <= dy ; i++ ) - { - y += yinc ; - cumul += dx ; - - if ( cumul >= dy ) - { - cumul -= dy ; - x += xinc ; - } - - LCD_DrawPixel( x, y ) ; - } - } - - return 0 ; -} - -/* - * \brief Draw a line on LCD, horizontal and vertical line are supported. - * - * \param dwX1 X-coordinate of line start. - * \param dwY1 Y-coordinate of line start. - * \param dwX2 X-coordinate of line end. - * \param dwY2 Y-coordinate of line end. - */ -extern uint32_t LCD_DrawLine ( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - /* Optimize horizontal or vertical line drawing */ - if (( dwY1 == dwY2 ) || (dwX1 == dwX2)) - { - LCD_DrawFilledRectangle( dwX1, dwY1, dwX2, dwY2 ); - } - else - { - DrawLineBresenham( dwX1, dwY1, dwX2, dwY2 ) ; - } - - return 0 ; -} - -/** - * \brief Draws a circle on LCD, at the given coordinates. - * - * \param dwX X-coordinate of circle center. - * \param dwY Y-coordinate of circle center. - * \param dwR circle radius. -*/ -extern uint32_t LCD_DrawCircle( uint32_t dwX, uint32_t dwY, uint32_t dwR ) -{ - int32_t d; /* Decision Variable */ - uint32_t curX; /* Current X Value */ - uint32_t curY; /* Current Y Value */ - - if (dwR == 0) - { - return 0; - } - d = 3 - (dwR << 1); - curX = 0; - curY = dwR; - - while (curX <= curY) - { - LCD_DrawPixel(dwX + curX, dwY + curY); - LCD_DrawPixel(dwX + curX, dwY - curY); - LCD_DrawPixel(dwX - curX, dwY + curY); - LCD_DrawPixel(dwX - curX, dwY - curY); - LCD_DrawPixel(dwX + curY, dwY + curX); - LCD_DrawPixel(dwX + curY, dwY - curX); - LCD_DrawPixel(dwX - curY, dwY + curX); - LCD_DrawPixel(dwX - curY, dwY - curX); - - if (d < 0) - { - d += (curX << 2) + 6; - } - else - { - d += ((curX - curY) << 2) + 10; - curY--; - } - curX++; - } - return 0; -} - -extern uint32_t LCD_DrawFilledCircle( uint32_t dwX, uint32_t dwY, uint32_t dwRadius) -{ - signed int d ; /* Decision Variable */ - uint32_t dwCurX ; /* Current X Value */ - uint32_t dwCurY ; /* Current Y Value */ - uint32_t dwXmin, dwYmin; - - if (dwRadius == 0) - { - return 0; - } - d = 3 - (dwRadius << 1) ; - dwCurX = 0 ; - dwCurY = dwRadius ; - - while ( dwCurX <= dwCurY ) - { - dwXmin = (dwCurX > dwX) ? 0 : dwX-dwCurX; - dwYmin = (dwCurY > dwY) ? 0 : dwY-dwCurY; - LCD_DrawFilledRectangle( dwXmin, dwYmin, dwX+dwCurX, dwYmin ) ; - LCD_DrawFilledRectangle( dwXmin, dwY+dwCurY, dwX+dwCurX, dwY+dwCurY ) ; - dwXmin = (dwCurY > dwX) ? 0 : dwX-dwCurY; - dwYmin = (dwCurX > dwY) ? 0 : dwY-dwCurX; - LCD_DrawFilledRectangle( dwXmin, dwYmin, dwX+dwCurY, dwYmin ) ; - LCD_DrawFilledRectangle( dwXmin, dwY+dwCurX, dwX+dwCurY, dwY+dwCurX ) ; - - if ( d < 0 ) - { - d += (dwCurX << 2) + 6 ; - } - else - { - d += ((dwCurX - dwCurY) << 2) + 10; - dwCurY-- ; - } - - dwCurX++ ; - } - - return 0 ; -} - -extern uint32_t LCD_DrawRectangle( uint32_t dwX1, uint32_t dwY1, uint32_t dwX2, uint32_t dwY2 ) -{ - CheckBoxCoordinates(&dwX1, &dwY1, &dwX2, &dwY2); - - LCD_DrawFilledRectangle( dwX1, dwY1, dwX2, dwY1 ) ; - LCD_DrawFilledRectangle( dwX1, dwY2, dwX2, dwY2 ) ; - - LCD_DrawFilledRectangle( dwX1, dwY1, dwX1, dwY2 ) ; - LCD_DrawFilledRectangle( dwX2, dwY1, dwX2, dwY2 ) ; - - return 0 ; -} - - -/** - * \brief Set the backlight of the LCD (AAT3155). - * - * \param level Backlight brightness level [1..16], 1 means maximum brightness. - */ -extern void LCD_SetBacklight (uint32_t level) -{ - uint32_t i; - const Pin pPins[] = {BOARD_BACKLIGHT_PIN}; - - /* Ensure valid level */ - level = (level < 1) ? 1 : level; - level = (level > 16) ? 16 : level; - - /* Enable pins */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Switch off backlight */ - PIO_Clear(pPins); - i = 600 * (BOARD_MCK / 1000000); /* wait for at least 500us */ - while(i--); - - /* Set new backlight level */ - for (i = 0; i < level; i++) - { - PIO_Clear(pPins); - PIO_Clear(pPins); - PIO_Clear(pPins); - - PIO_Set(pPins); - PIO_Set(pPins); - PIO_Set(pPins); - } -} - -#endif diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_draw.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_draw.c deleted file mode 100644 index 2756365b..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_draw.c +++ /dev/null @@ -1,405 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of draw function on LCD, Include draw text, image - * and basic shapes (line, rectangle, circle). - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Fills the given LCD buffer with a particular color. - * - * \param color Fill color. - */ -void LCDD_Fill( uint32_t dwColor ) -{ - uint32_t dw ; - - LCD_SetCursor( 0, 0 ) ; - LCD_WriteRAM_Prepare() ; - - for ( dw = BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT; dw > 0; dw-- ) - { - LCD_WriteRAM( dwColor ) ; - } -} - -/** - * \brief Draw a pixel on LCD of given color. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - * \param color Pixel color. - */ -extern void LCDD_DrawPixel( uint32_t x, uint32_t y, uint32_t color ) -{ - LCD_SetCursor( x, y ) ; - LCD_WriteRAM_Prepare() ; - LCD_WriteRAM( color ) ; -} - -/** - * \brief Read a pixel from LCD. - * - * \param x X-coordinate of pixel. - * \param y Y-coordinate of pixel. - * - * \return color Readed pixel color. - */ -extern uint32_t LCDD_ReadPixel( uint32_t x, uint32_t y ) -{ - uint32_t color; - - LCD_SetCursor(x, y); - LCD_ReadRAM_Prepare(); - color = LCD_ReadRAM(); - - return color; -} - -/* - * \brief Draw a line on LCD, horizontal and vertical line are supported. - * - * \param x X-coordinate of line start. - * \param y Y-coordinate of line start. - * \param length line length. - * \param direction line direction: 0 - horizontal, 1 - vertical. - * \param color Pixel color. - */ -extern void LCDD_DrawLine( uint32_t x, uint32_t y, uint32_t length, uint32_t direction, uint32_t color ) -{ - uint32_t i = 0 ; - - LCD_SetCursor( x, y ) ; - - if ( direction == DIRECTION_HLINE ) - { - LCD_WriteRAM_Prepare() ; - for ( i = 0; i < length; i++ ) - { - LCD_WriteRAM( color ) ; - } - } - else - { - for ( i = 0; i < length; i++ ) - { - LCD_WriteRAM_Prepare() ; - LCD_WriteRAM( color ) ; - y++ ; - LCD_SetCursor( x, y ) ; - } - } -} - -/* - * \brief Draws a rectangle on LCD, at the given coordinates. - * - * \param x X-coordinate of upper-left rectangle corner. - * \param y Y-coordinate of upper-left rectangle corner. - * \param width Rectangle width in pixels. - * \param height Rectangle height in pixels. - * \param color Rectangle color. - */ -extern void LCDD_DrawRectangle( uint32_t x, uint32_t y, uint32_t width, uint32_t height, uint32_t color ) -{ - LCDD_DrawLine(x, y, width, DIRECTION_HLINE, color); - LCDD_DrawLine(x, (y + height), width, DIRECTION_HLINE, color); - - LCDD_DrawLine(x, y, height, DIRECTION_VLINE, color); - LCDD_DrawLine((x + width), y, height, DIRECTION_VLINE, color); -} - -/* - * \brief Draws a rectangle with fill inside on LCD, at the given coordinates. - * - * \param x X-coordinate of upper-left rectangle corner. - * \param y Y-coordinate of upper-left rectangle corner. - * \param width Rectangle width in pixels. - * \param height Rectangle height in pixels. - * \param color Rectangle color. - */ -extern void LCDD_DrawRectangleWithFill( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) -{ - uint32_t i ; - - LCD_SetWindow( dwX, dwY, dwWidth, dwHeight ) ; - LCD_SetCursor( dwX, dwY ) ; - LCD_WriteRAM_Prepare() ; - - for ( i = dwWidth * dwHeight; i > 0; i-- ) - { - LCD_WriteRAM( dwColor ) ; - } - LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ; - LCD_SetCursor( 0, 0 ) ; -} - -/** - * \brief Draws a circle on LCD, at the given coordinates. - * - * \param x X-coordinate of circle center. - * \param y Y-coordinate of circle center. - * \param r circle radius. - * \param color circle color. - */ -extern void LCDD_DrawCircle( uint32_t x, uint32_t y, uint32_t r, uint32_t color ) -{ - signed int d; /* Decision Variable */ - uint32_t curX; /* Current X Value */ - uint32_t curY; /* Current Y Value */ - - d = 3 - (r << 1); - curX = 0; - curY = r; - - while (curX <= curY) - { - LCDD_DrawPixel(x + curX, y + curY, color); - LCDD_DrawPixel(x + curX, y - curY, color); - LCDD_DrawPixel(x - curX, y + curY, color); - LCDD_DrawPixel(x - curX, y - curY, color); - LCDD_DrawPixel(x + curY, y + curX, color); - LCDD_DrawPixel(x + curY, y - curX, color); - LCDD_DrawPixel(x - curY, y + curX, color); - LCDD_DrawPixel(x - curY, y - curX, color); - - if (d < 0) { - d += (curX << 2) + 6; - } - else { - d += ((curX - curY) << 2) + 10; - curY--; - } - curX++; - } -} - -/** - * \brief Draws a string inside a LCD buffer, at the given coordinates. Line breaks - * will be honored. - * - * \param x X-coordinate of string top-left corner. - * \param y Y-coordinate of string top-left corner. - * \param pString String to display. - * \param color String color. - */ -extern void LCDD_DrawString( uint32_t x, uint32_t y, const uint8_t *pString, uint32_t color ) -{ - uint32_t xorg = x ; - - while ( *pString != 0 ) - { - if ( *pString == '\n' ) - { - y += gFont.height + 2 ; - x = xorg ; - } - else - { - LCDD_DrawChar( x, y, *pString, color ) ; - x += gFont.width + 2 ; - } - - pString++ ; - } -} - -/** - * \brief Draws a string inside a LCD buffer, at the given coordinates - * with given background color. Line breaks will be honored. - * - * \param x X-coordinate of string top-left corner. - * \param y Y-coordinate of string top-left corner. - * \param pString String to display. - * \param fontColor String color. - * \param bgColor Background color. - */ -extern void LCDD_DrawStringWithBGColor( uint32_t x, uint32_t y, const char *pString, uint32_t fontColor, uint32_t bgColor ) -{ - unsigned xorg = x; - - while ( *pString != 0 ) - { - if ( *pString == '\n' ) - { - y += gFont.height + 2 ; - x = xorg ; - } - else - { - LCDD_DrawCharWithBGColor( x, y, *pString, fontColor, bgColor ) ; - x += gFont.width + 2; - } - - pString++; - } -} - -/** - * \brief Returns the width & height in pixels that a string will occupy on the screen - * if drawn using LCDD_DrawString. - * - * \param pString String. - * \param pWidth Pointer for storing the string width (optional). - * \param pHeight Pointer for storing the string height (optional). - * - * \return String width in pixels. - */ -extern void LCDD_GetStringSize( const uint8_t *pString, uint32_t *pWidth, uint32_t *pHeight ) -{ - uint32_t width = 0; - uint32_t height = gFont.height; - - while ( *pString != 0 ) - { - if ( *pString == '\n' ) - { - height += gFont.height + 2 ; - } - else - { - width += gFont.width + 2 ; - } - - pString++ ; - } - - if ( width > 0 ) - { - width -= 2; - } - - if ( pWidth != NULL ) - { - *pWidth = width; - } - - if ( pHeight != NULL ) - { - *pHeight = height ; - } -} - -/* - * \brief Draw a raw image at given position on LCD. - * - * \param x X-coordinate of image start. - * \param y Y-coordinate of image start. - * \param pImage Image buffer. - * \param width Image width. - * \param height Image height. - */ -void LCDD_DrawImage( uint32_t dwX, uint32_t dwY, const uint8_t *pImage, uint32_t dwWidth, uint32_t dwHeight ) -{ - uint32_t dwCursor ; - - LCD_SetWindow( dwX, dwY, dwWidth, dwHeight ) ; - LCD_SetCursor( dwX, dwY ) ; - LCD_WriteRAM_Prepare() ; - - for ( dwCursor=dwWidth*dwHeight; dwCursor != 0; dwCursor-- ) - { - LCD_D() = *pImage++ ; - LCD_D() = *pImage++ ; - LCD_D() = *pImage++ ; - } - - LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ; -} - -/* - * \brief Draw a raw image at given position on LCD. - * - * \param dwX X-coordinate of image start. - * \param dwY Y-coordinate of image start. - * \param pGIMPImage Image data. - */ -void LCDD_DrawGIMPImage( uint32_t dwX, uint32_t dwY, const SGIMPImage* pGIMPImage ) -{ - uint32_t dw ; - register uint32_t dwLength ; - uint8_t* pucData ; - - // Draw raw RGB bitmap - LCD_SetWindow( dwX, dwY, pGIMPImage->dwWidth, pGIMPImage->dwHeight ) ; - LCD_SetCursor( dwX, dwY ) ; - - LCD_WriteRAM_Prepare() ; - - dwLength = pGIMPImage->dwWidth*pGIMPImage->dwHeight ; - pucData = pGIMPImage->pucPixel_data ; - for ( dw=0; dw < dwLength; dw++ ) - { - LCD_D() = (*pucData++) ; - LCD_D() = (*pucData++) ; - LCD_D() = (*pucData++) ; - } - - LCD_SetWindow( 0, 0, BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT ) ; -} - -/* - * \brief Clear a window with an color. - * - * \param dwX X-coordinate of the window. - * \param dwY Y-coordinate of the window. - * \param dwWidth window width. - * \param dwHeight window height. - * \param dwColor background color - */ -extern void LCDD_ClearWindow( uint32_t dwX, uint32_t dwY, uint32_t dwWidth, uint32_t dwHeight, uint32_t dwColor ) -{ - uint32_t dw ; - - LCD_SetCursor( dwX, dwY) ; - LCD_WriteRAM_Prepare() ; - - for ( dw = dwWidth * dwHeight; dw > 0; dw-- ) - { - LCD_WriteRAM( dwColor ) ; - } -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_font.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_font.c deleted file mode 100644 index a3a2be0b..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_font.c +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of draw font on LCD. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#include -#include - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Global variable describing the font being instancied. */ -const Font gFont = {10, 14}; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Draws an ASCII character on LCD. - * - * \param x X-coordinate of character upper-left corner. - * \param y Y-coordinate of character upper-left corner. - * \param c Character to output. - * \param color Character color. - */ -extern void LCDD_DrawChar( uint32_t x, uint32_t y, uint8_t c, uint32_t color ) -{ - uint32_t row, col ; - - assert( (c >= 0x20) && (c <= 0x7F) ) ; - - for ( col = 0 ; col < 10 ; col++ ) - { - for ( row = 0 ; row < 8 ; row++ ) - { - if ( (pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1 ) - { - LCDD_DrawPixel( x+col, y+row, color ) ; - } - } - - for (row = 0; row < 6; row++ ) - { - if ((pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1) - { - LCDD_DrawPixel( x+col, y+row+8, color ) ; - } - } - } -} - -/** - * \brief Draws an ASCII character on LCD with given background color. - * - * \param x X-coordinate of character upper-left corner. - * \param y Y-coordinate of character upper-left corner. - * \param c Character to output. - * \param fontColor Character color. - * \param bgColor Background color. - */ -extern void LCDD_DrawCharWithBGColor( uint32_t x, uint32_t y, uint8_t c, uint32_t fontColor, uint32_t bgColor ) -{ - uint32_t row, col ; - - assert( (c >= 0x20) && (c <= 0x7F) ) ; - - for (col = 0; col < 10; col++) - { - for (row = 0 ; row < 8 ; row++) - { - if ( (pCharset10x14[((c - 0x20) * 20) + col * 2] >> (7 - row)) & 0x1 ) - { - LCDD_DrawPixel( x+col, y+row, fontColor ) ; - } - else - { - LCDD_DrawPixel( x+col, y+row, bgColor ) ; - } - } - - for ( row = 0 ; row < 6 ; row++ ) - { - if ( (pCharset10x14[((c - 0x20) * 20) + col * 2 + 1] >> (7 - row)) & 0x1 ) - { - LCDD_DrawPixel( x+col, y+row+8, fontColor ) ; - } - else - { - LCDD_DrawPixel( x+col, y+row+8, bgColor ) ; - } - } - } -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_font10x14.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_font10x14.c deleted file mode 100644 index a627355d..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcd_font10x14.c +++ /dev/null @@ -1,233 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - /** - * \file - * - * Font 10x14 table definition. - * - */ - -#include "board.h" - -/** Char set of font 10x14 */ -const uint8_t pCharset10x14[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xCC, - 0xFF, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, - 0x00, 0x00, 0xF0, 0x00, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0xC0, 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, - 0x0C, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x0C, 0xC0, 0x0C, 0xC0, - 0x0C, 0x60, 0x1E, 0x70, 0x3F, 0x30, 0x33, 0x30, 0xFF, 0xFC, - 0xFF, 0xFC, 0x33, 0x30, 0x33, 0xF0, 0x39, 0xE0, 0x18, 0xC0, - 0x60, 0x00, 0xF0, 0x0C, 0xF0, 0x3C, 0x60, 0xF0, 0x03, 0xC0, - 0x0F, 0x00, 0x3C, 0x18, 0xF0, 0x3C, 0xC0, 0x3C, 0x00, 0x18, - 0x3C, 0xF0, 0x7F, 0xF8, 0xC3, 0x1C, 0xC7, 0x8C, 0xCF, 0xCC, - 0xDC, 0xEC, 0x78, 0x78, 0x30, 0x30, 0x00, 0xFC, 0x00, 0xCC, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x00, 0xEC, 0x00, - 0xF8, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0F, 0xC0, 0x3F, 0xF0, 0x78, 0x78, - 0x60, 0x18, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0x60, 0x18, - 0x78, 0x78, 0x3F, 0xF0, 0x0F, 0xC0, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x60, 0x0E, 0xE0, 0x07, 0xC0, 0x03, 0x80, 0x3F, 0xF8, - 0x3F, 0xF8, 0x03, 0x80, 0x07, 0xC0, 0x0E, 0xE0, 0x0C, 0x60, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x3F, 0xF0, - 0x3F, 0xF0, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x00, 0x44, 0x00, 0xEC, 0x00, 0xF8, 0x00, 0x70, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, - 0x00, 0x18, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x18, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x0C, 0x00, 0x3C, 0x00, 0xF0, 0x03, 0xC0, - 0x0F, 0x00, 0x3C, 0x00, 0xF0, 0x00, 0xC0, 0x00, 0x00, 0x00, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0xFC, 0xC1, 0xCC, 0xC3, 0x8C, - 0xC7, 0x0C, 0xCE, 0x0C, 0xFC, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, - 0x00, 0x00, 0x00, 0x00, 0x30, 0x0C, 0x70, 0x0C, 0xFF, 0xFC, - 0xFF, 0xFC, 0x00, 0x0C, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, - 0x30, 0x0C, 0x70, 0x1C, 0xE0, 0x3C, 0xC0, 0x7C, 0xC0, 0xEC, - 0xC1, 0xCC, 0xC3, 0x8C, 0xE7, 0x0C, 0x7E, 0x0C, 0x3C, 0x0C, - 0x30, 0x30, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x1C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x03, 0xC0, 0x07, 0xC0, 0x0E, 0xC0, 0x1C, 0xC0, 0x38, 0xC0, - 0x70, 0xC0, 0xFF, 0xFC, 0xFF, 0xFC, 0x00, 0xC0, 0x00, 0xC0, - 0xFC, 0x30, 0xFC, 0x38, 0xCC, 0x1C, 0xCC, 0x0C, 0xCC, 0x0C, - 0xCC, 0x0C, 0xCC, 0x0C, 0xCE, 0x1C, 0xC7, 0xF8, 0xC3, 0xF0, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE3, 0x1C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE3, 0x9C, 0x71, 0xF8, 0x30, 0xF0, - 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC3, 0xFC, - 0xC7, 0xFC, 0xCE, 0x00, 0xDC, 0x00, 0xF8, 0x00, 0xF0, 0x00, - 0x3C, 0xF0, 0x7F, 0xF8, 0xE7, 0x9C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x3C, 0x00, 0x7E, 0x00, 0xE7, 0x0C, 0xC3, 0x0C, 0xC3, 0x1C, - 0xC3, 0x38, 0xC3, 0x70, 0xE7, 0xE0, 0x7F, 0xC0, 0x3F, 0x80, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x60, 0x3C, 0xF0, - 0x3C, 0xF0, 0x18, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x44, 0x3C, 0xEC, - 0x3C, 0xF8, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x0F, 0xC0, 0x1C, 0xE0, - 0x38, 0x70, 0x70, 0x38, 0xE0, 0x1C, 0xC0, 0x0C, 0x00, 0x00, - 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, - 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, - 0x00, 0x00, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x38, 0x70, - 0x1C, 0xE0, 0x0F, 0xC0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00, - 0x30, 0x00, 0x70, 0x00, 0xE0, 0x00, 0xC0, 0x00, 0xC1, 0xEC, - 0xC3, 0xEC, 0xC3, 0x00, 0xE6, 0x00, 0x7E, 0x00, 0x3C, 0x00, - 0x30, 0xF0, 0x71, 0xF8, 0xE3, 0x9C, 0xC3, 0x0C, 0xC3, 0xFC, - 0xC3, 0xFC, 0xC0, 0x0C, 0xE0, 0x1C, 0x7F, 0xF8, 0x3F, 0xF0, - 0x3F, 0xFC, 0x7F, 0xFC, 0xE0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, - 0xC0, 0xC0, 0xC0, 0xC0, 0xE0, 0xC0, 0x7F, 0xFC, 0x3F, 0xFC, - 0xFF, 0xFC, 0xFF, 0xFC, 0xC3, 0x0C, 0xC3, 0x0C, 0xC3, 0x0C, - 0xC3, 0x0C, 0xC3, 0x0C, 0xE7, 0x9C, 0x7F, 0xF8, 0x3C, 0xF0, - 0x3F, 0xF0, 0x7F, 0xF8, 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, - 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, 0x70, 0x38, 0x30, 0x30, - 0xFF, 0xFC, 0xFF, 0xFC, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, - 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0x00, 0xF8, 0x00, 0x1C, 0x00, 0x1C, 0x0F, 0xF8, 0x0F, 0xF0, - 0x0C, 0x0C, 0x0E, 0x1C, 0x07, 0x38, 0x03, 0xF0, 0x01, 0xE0, - 0x01, 0xE0, 0x03, 0xF0, 0x07, 0x38, 0x0E, 0x1C, 0x0C, 0x0C, - 0x0C, 0x00, 0x0E, 0x00, 0x07, 0x0C, 0x03, 0x9C, 0x01, 0xF8, - 0x01, 0xF0, 0x03, 0x80, 0x07, 0x00, 0x0E, 0x00, 0x0C, 0x00, - 0x0C, 0x0C, 0x0C, 0x1C, 0x0C, 0x3C, 0x0C, 0x7C, 0x0C, 0xEC, - 0x0D, 0xCC, 0x0F, 0x8C, 0x0F, 0x0C, 0x0E, 0x0C, 0x0C, 0x0C, - 0x00, 0x00, 0x03, 0x00, 0x07, 0x80, 0x3F, 0xF0, 0x7C, 0xF8, - 0xE0, 0x1C, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0x00, 0x00, - 0x03, 0x0C, 0x03, 0x0C, 0x3F, 0xFC, 0x7F, 0xFC, 0xE3, 0x0C, - 0xC3, 0x0C, 0xC0, 0x0C, 0xE0, 0x0C, 0x70, 0x0C, 0x30, 0x0C, - 0x00, 0x00, 0xC0, 0x0C, 0xC0, 0x0C, 0xC0, 0x0C, 0xE0, 0x1C, - 0x7C, 0xF8, 0x3F, 0xF0, 0x07, 0x80, 0x03, 0x00, 0x00, 0x00, - 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, - 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, 0xC0, 0x00, - 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, - 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC, 0xFF, 0xFC -} ; diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcdd.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcdd.c deleted file mode 100644 index 49172f24..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/lcdd.c +++ /dev/null @@ -1,140 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of LCD driver, Include LCD initialization, - * LCD on/off and LCD backlight control. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "board.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the LCD controller. - * Configure SMC to access LCD controller at 64MHz MCK. - */ -extern void LCDD_Initialize( void ) -{ - const Pin pPins[] = {BOARD_LCD_PINS}; - Smc *pSmc = SMC; - - /* Enable pins */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Enable peripheral clock */ - PMC_EnablePeripheral( ID_SMC ) ; - - /* EBI SMC Configuration */ - pSmc->SMC_CS_NUMBER[1].SMC_SETUP = SMC_SETUP_NWE_SETUP(2) - | SMC_SETUP_NCS_WR_SETUP(2) - | SMC_SETUP_NRD_SETUP(2) - | SMC_SETUP_NCS_RD_SETUP(2); - - pSmc->SMC_CS_NUMBER[1].SMC_PULSE = SMC_PULSE_NWE_PULSE(4) - | SMC_PULSE_NCS_WR_PULSE(4) - | SMC_PULSE_NRD_PULSE(10) - | SMC_PULSE_NCS_RD_PULSE(10); - - pSmc->SMC_CS_NUMBER[1].SMC_CYCLE = SMC_CYCLE_NWE_CYCLE(10) - | SMC_CYCLE_NRD_CYCLE(22); - - pSmc->SMC_CS_NUMBER[1].SMC_MODE = SMC_MODE_READ_MODE - | SMC_MODE_WRITE_MODE - | SMC_MODE_DBW_8_BIT; - - /* Initialize LCD controller */ - LCD_Initialize() ; - - /* Initialize LCD controller */ - LCD_SetDisplayPortrait( 0 ) ; - - /* Set LCD backlight */ - LCDD_SetBacklight( 2 ) ; -} - -/** - * \brief Turn on the LCD. - */ -void LCDD_On(void) -{ - LCD_On(); -} - -/** - * \brief Turn off the LCD. - */ -void LCDD_Off(void) -{ - LCD_Off(); -} - -/** - * \brief Set the backlight of the LCD. - * - * \param level Backlight brightness level [1..16], 1 means maximum brightness. - */ -void LCDD_SetBacklight (uint32_t level) -{ - uint32_t i; - const Pin pPins[] = {BOARD_BACKLIGHT_PIN}; - - /* Ensure valid level */ - level = (level < 1) ? 1 : level; - level = (level > 16) ? 16 : level; - - /* Enable pins */ - PIO_Configure(pPins, PIO_LISTSIZE(pPins)); - - /* Switch off backlight */ - PIO_Clear(pPins); - i = 600 * (BOARD_MCK / 1000000); /* wait for at least 500us */ - while(i--); - - /* Set new backlight level */ - for (i = 0; i < level; i++) { - PIO_Clear(pPins); - PIO_Clear(pPins); - PIO_Clear(pPins); - - PIO_Set(pPins); - PIO_Set(pPins); - PIO_Set(pPins); - } -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/math.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/math.c deleted file mode 100644 index 2121f02d..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/math.c +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "board.h" - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Returns the minimum value between two integers. - * - * \param a First integer to compare. - * \param b Second integer to compare. - */ -extern uint32_t min( uint32_t dwA, uint32_t dwB ) -{ - if ( dwA < dwB ) - { - return dwA ; - } - else - { - return dwB ; - } -} - -/*------------------------------------------------------------------------------ - * Returns the absolute value of an integer. - * - * \param value Integer value. - * - * \note Do not call this function "abs", problem with gcc ! - */ -extern uint32_t absv( int32_t lValue ) -{ - if ( lValue < 0 ) - { - return -lValue ; - } - else - { - return lValue ; - } -} - -/*------------------------------------------------------------------------------ - * Computes and returns x power of y. - * - * \param x Value. - * \param y Power. - */ -extern uint32_t power( uint32_t dwX, uint32_t dwY ) -{ - uint32_t dwResult = 1 ; - - while ( dwY > 0 ) - { - dwResult *= dwX ; - dwY-- ; - } - - return dwResult ; -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/rand.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/rand.c deleted file mode 100644 index 371ea187..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/rand.c +++ /dev/null @@ -1,61 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#include "board.h" - -/*------------------------------------------------------------------------------ - * Global Variables - *------------------------------------------------------------------------------*/ - -static uint32_t _dwRandNext=1 ; - -/*------------------------------------------------------------------------------ - * Exported Functions - *------------------------------------------------------------------------------*/ - -/** - * Initialize the seed for rand generator. - * - * \param seed rand initiation seed - */ -extern void srand( uint32_t dwSeed ) -{ - _dwRandNext = dwSeed ; -} - -/** - * Return a random number, maxinum assumed to be 65536 - */ -extern int rand( void ) -{ - _dwRandNext = _dwRandNext * 1103515245 + 12345 ; - - return (uint32_t)(_dwRandNext/131072) % 65536 ; -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/retarget.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/retarget.c deleted file mode 100644 index cf441e5c..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/retarget.c +++ /dev/null @@ -1,86 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/* - * This file Configures the target-dependent low level functions for character I/O. - */ - -#include "board.h" -#include - -/* Disable semihosting */ -#pragma import(__use_no_semihosting_swi) - -struct __FILE { int handle;} ; -FILE __stdout; -FILE __stderr; - -/*------------------------------------------------------------------------------ - * Outputs a character. - *------------------------------------------------------------------------------*/ -int fputc(int ch, FILE *f) -{ - if ((f == stdout) || (f == stderr)) - { - UART_PutChar( ch ) ; - return ch ; - } - else - { - return EOF ; - } -} - -/*------------------------------------------------------------------------------ - * Returns the error status accumulated during file I/O. - *------------------------------------------------------------------------------*/ -int ferror( FILE *f ) -{ - return EOF ; -} - - -void _ttywrch( int ch ) -{ - UART_PutChar( (uint8_t)ch ) ; -} - -void _sys_exit(int return_code) -{ - while ( 1 ) ; /* endless loop */ -} - -/*------------------------------------------------------------------------------ - * Low level functions I/O for assert(). - *------------------------------------------------------------------------------*/ -void __assert_puts(const char *str) -{ - printf("%s", str); -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/timetick.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/timetick.c deleted file mode 100644 index f0f3c27c..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/timetick.c +++ /dev/null @@ -1,117 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * Implement simple system tick usage. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Tick Counter united by ms */ -static volatile uint32_t _dwTickCount=0 ; - -/*---------------------------------------------------------------------------- - * Exported Functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Handler for Sytem Tick interrupt. - */ -extern void TimeTick_Increment( void ) -{ - _dwTickCount++ ; -} - -/** - * \brief Configures the SAM3 SysTick & reset tickCount. - * Systick interrupt handler will generates 1ms interrupt and increase a - * tickCount. - * \param new_mck Current master clock. - */ -extern uint32_t TimeTick_Configure( uint32_t new_mck ) -{ - _dwTickCount = 0 ; - return SysTick_Config( new_mck/1000 ) ; -} - -/** - * \brief Get current Tick Count, in ms. - */ -extern uint32_t GetTickCount( void ) -{ - return _dwTickCount ; -} - -/** - * \brief Sync Wait for several ms - */ -extern void Wait( volatile uint32_t dwMs ) -{ - uint32_t dwStart ; - uint32_t dwCurrent ; - - dwStart = _dwTickCount ; - do - { - dwCurrent = _dwTickCount ; - } while ( dwCurrent - dwStart < dwMs ) ; -} - -/** - * \brief Sync Sleep for several ms - */ -extern void Sleep( volatile uint32_t dwMs ) -{ - uint32_t dwStart ; - uint32_t dwCurrent ; - - dwStart = _dwTickCount ; - - do - { - dwCurrent = _dwTickCount ; - - if ( dwCurrent - dwStart > dwMs ) - { - break ; - } - - __WFI() ; - } while( 1 ) ; -} - diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/trace.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/trace.c deleted file mode 100644 index 362539df..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/trace.c +++ /dev/null @@ -1,59 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "board.h" - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** Trace level can be set at applet initialization */ -#if !defined(NOTRACE) && (DYN_TRACES == 1) - uint32_t dwTraceLevel = TRACE_LEVEL ; -#endif - -/** - * Initializes the U(S)ART Console - * - * \param dwBaudRate U(S)ART baudrate. - * \param dwMCk Master clock frequency. - */ -extern void TRACE_CONFIGURE( uint32_t dwBaudRate, uint32_t dwMCk ) -{ - const Pin pinsUART0[] = { PINS_UART } ; - - PIO_Configure( pinsUART0, PIO_LISTSIZE( pinsUART0 ) ) ; - - UART_Configure( dwBaudRate, dwMCk ) ; -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/tsd_ads7843.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/tsd_ads7843.c deleted file mode 100644 index 54838ff0..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/tsd_ads7843.c +++ /dev/null @@ -1,317 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of ADS7843 driver. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#ifdef BOARD_TSC_ADS7843 - -#include -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Delay for pushbutton debouncing (the time-base is 10 ms). */ -#define DEBOUNCE_TIME 6 /* 10 * 6 = 60 ms */ - -/** Color of calibration points. */ -#define POINTS_COLOR 0x0000FF - -/** Size in pixels of calibration points. */ -#define POINTS_SIZE 4 - -/** Maximum difference in pixels between the test point and the measured point. */ -#define POINTS_MAX_ERROR 5 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** pen state */ -typedef enum { - STATE_PEN_RELEASED = 0, - STATE_PEN_PRESSED = 1, - STATE_PEN_DEBOUNCE = 2 -} e_pen_state; - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -/** Pins used by Interrupt Signal for Touch Screen Controller */ -static const Pin pinPenIRQ = PIN_TSC_IRQ; - -/** Global timestamp in milliseconds since start of application. */ -static volatile uint32_t timestamp = 0; - -/** last time when the pen is pressed on the touchscreen */ -static volatile uint32_t timePress = 0; - -/** last time when the pen is released */ -static volatile uint32_t timeRelease = 0; - -/** pen state */ -static volatile e_pen_state penState = STATE_PEN_RELEASED; - -/** Touch screen initiallized flag */ -static uint32_t tsInitFlag = 0; - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Timer handler for touch screen. Increments the timestamp counter. - * Determine the state "Pen Pressed" or "Pen Released". To change state, - * the penIRQ has to keep the same value during DEBOUNCE_TIME. - * - * \note External timer interrupt should call it per 10ms. - */ -void TSD_TimerHandler( void ) -{ - uint32_t data[2]; - uint32_t timeKeep; - static uint32_t point[2]; - - if (!tsInitFlag) return; - - timestamp++; - /* Get the current position of the pen if penIRQ has low value (pen pressed) */ - if ( PIO_Get(&pinPenIRQ) == 0 ) - { - /* Get the current position of the pressed pen */ - if ( TSDCom_IsCalibrationOk() ) - { - TSD_GetRawMeasurement(data); - TSDCom_InterpolateMeasurement(data, point); - } - - /* call the callback function */ - if ( penState == STATE_PEN_PRESSED ) - { - if(TSDCom_IsCalibrationOk()) - { - TSD_PenMoved(point[0], point[1]); - } - } - } - - /* Determine the pen state */ - if ( PIO_Get( &pinPenIRQ ) == 0 ) - { - /* reinit the last time when release */ - timeRelease = timestamp; - - if ( penState == STATE_PEN_DEBOUNCE ) - { - timeKeep = timestamp; - timeKeep -= timePress; - if(timeKeep > DEBOUNCE_TIME) - { - /* pen is pressed during an enough time : the state change */ - penState = STATE_PEN_PRESSED; - /* call the callback function */ - if ( TSDCom_IsCalibrationOk() ) - { - TSD_PenPressed(point[0], point[1]); - } - } - } - } - else - { - /* reinit the last time when release */ - timePress = timestamp; - - if ( penState == STATE_PEN_DEBOUNCE ) - { - timeKeep = timestamp; - timeKeep -= timeRelease; - if ( timeKeep > DEBOUNCE_TIME ) - { - /* pen is released during an enough time : the state change */ - penState = STATE_PEN_RELEASED; - /* call the callback function */ - if ( TSDCom_IsCalibrationOk() ) - { - TSD_PenReleased(point[0], point[1]); - } - } - } - } -} - -/** - * \breif Interrupt handler for Touchscreen. - */ -static void ISR_PenIRQ( void ) -{ - /* Check if the pen has been pressed */ - if ( !PIO_Get( &pinPenIRQ ) ) - { - if ( penState == STATE_PEN_RELEASED ) - { - timePress = timestamp; - penState = STATE_PEN_DEBOUNCE; - } - } - else - { - if ( penState == STATE_PEN_PRESSED ) - { - timeRelease = timestamp; - penState = STATE_PEN_DEBOUNCE; - } - } -} - -/** - * \brief Configure PENIRQ for interrupt. - * - * \note Be sure the PIO interrupt management has been initialized by - * PIO_InitializeInterrupts() before call this function. - */ -static void ConfigurePenIRQ( void ) -{ - /* Configure pios */ - PIO_Configure(&pinPenIRQ, PIO_LISTSIZE(pinPenIRQ)); - - /* Initialize interrupts */ - PIO_ConfigureIt(&pinPenIRQ, (void (*)(const Pin *)) ISR_PenIRQ); - - /* Enable the interrupt */ - PIO_EnableIt(&pinPenIRQ); -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Reads and store a touchscreen measurement in the provided array. - * - * \param pData Array where the measurements will be stored - */ -extern void TSD_GetRawMeasurement( uint32_t* pdwData ) -{ - /* Get the current position of the pressed pen */ - PIO_DisableIt( &pinPenIRQ ) ; - ADS7843_GetPosition( &pdwData[0], &pdwData[1] ) ; - PIO_EnableIt( &pinPenIRQ ) ; -} - -/** - * \brief Wait pen pressed. - */ -extern void TSD_WaitPenPressed( void ) -{ - /* Wait for touch & end of conversion */ - while ( penState != STATE_PEN_RELEASED ) ; - - /* while (penState != STATE_PEN_PRESSED); */ - while ( penState != STATE_PEN_PRESSED ) - { - } -} - -/** - * \brief Wait pen released. - */ -extern void TSD_WaitPenReleased( void ) -{ - /* Wait for contact loss */ - while (penState != STATE_PEN_PRESSED); - while (penState != STATE_PEN_RELEASED); -} - -/** - * \brief Do calibration. - * - * \return 1 if calibration is Ok, 0 else. - */ -extern uint8_t TSD_Calibrate( void ) -{ - uint8_t ret = 0 ; - - /* Calibration is done only once */ - if ( TSDCom_IsCalibrationOk() ) - { - return 1; - } - - /* Do calibration */ - ret = TSDCom_Calibrate(); - - return ret; -} - -/** - * \brief Initializes the touchscreen driver and starts the calibration process. When - * finished, the touchscreen is operational. - * - * \note Important: the LCD driver must have been initialized prior to calling this - * function. - */ -extern void TSD_Initialize( int8_t calEn ) -{ - ADS7843_Initialize(); - ConfigurePenIRQ(); - - tsInitFlag = 1; - - /* Calibration */ - if(calEn) { - while (!TSD_Calibrate()); - } -} - -/** - * \brief Stop the Touchscreen, disable interrupt. - */ -extern void TSD_Reset( void ) -{ - /* Disable SPI 0 */ - ADS7843_Reset() ; - - /* Disable the interrupt */ - PIO_DisableIt( &pinPenIRQ ) ; -} - -#endif /* #ifdef BOARD_TSC_ADS7843 */ diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/tsd_com.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/tsd_com.c deleted file mode 100644 index 5c41cf64..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/tsd_com.c +++ /dev/null @@ -1,369 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of touchscreen driver device irrelevance code. - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** Size in pixels of calibration points. */ -#define POINTS_SIZE 4 -/** Maximum difference in pixels between the test point and the measured point. */ -#define POINTS_MAX_ERROR 8 - -/** Delay at the end of calibartion for result display */ -#define DELAY_RESULT_DISPLAY 4000000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** \brief Point used during the touchscreen calibration process. */ -typedef struct _CalibrationPoint { - - /** Coordinate of point along the X-axis of the screen. */ - uint32_t x; - /** Coordinate of point along the Y-axis of the screen. */ - uint32_t y; - /** Calibration data of point. */ - uint32_t data[2]; - -} CalibrationPoint; - -/*---------------------------------------------------------------------------- - * Variables - *----------------------------------------------------------------------------*/ - -/** indicates if the touch screen has been calibrated. */ -/** If not, Callback functions are not called. */ -static volatile uint8_t bCalibrationOk = 0; -/** Slope for interpoling touchscreen measurements along the X-axis. */ -static int32_t xSlope; -/** Slope for interpoling touchscreen measurements along the Y-axis. */ -static int32_t ySlope; - -/** Calibration points. */ -static CalibrationPoint calibrationPoints[] = { - - /* Top-left corner calibration point */ - { - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Top-right corner calibration point */ - { - BOARD_LCD_WIDTH - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Bottom-right corner calibration point */ - { - BOARD_LCD_WIDTH - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT - BOARD_LCD_HEIGHT / 10, - {0, 0} - }, - /* Bottom-left corner calibration point */ - { - BOARD_LCD_WIDTH / 10, - BOARD_LCD_HEIGHT - BOARD_LCD_HEIGHT / 10, - {0, 0} - } -}; - -/** Test point */ -static const CalibrationPoint testPoint = { - BOARD_LCD_WIDTH / 2, - BOARD_LCD_HEIGHT / 2, - {0, 0} -}; - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Display a calibration point on the given buffer. - * - * \param pPoint Calibration point to display. - */ -static void DrawCalibrationPoint(const CalibrationPoint *pPoint) -{ - LCDD_DrawRectangleWithFill(pPoint->x - POINTS_SIZE / 2, - pPoint->y - POINTS_SIZE / 2, - POINTS_SIZE, - POINTS_SIZE, - COLOR_RED); -} - -/** - * \brief Clears a calibration point from the given buffer. - * - * \param pPoint Calibration point to clear. - */ -static void ClearCalibrationPoint(const CalibrationPoint *pPoint) -{ - LCDD_DrawRectangleWithFill(pPoint->x - POINTS_SIZE / 2, - pPoint->y - POINTS_SIZE / 2, - POINTS_SIZE, - POINTS_SIZE, - COLOR_WHITE); -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Indicates if the calibration of the touch screen is Ok. - * - * \return 1 calibration Ok, 0 if not. - */ -uint8_t TSDCom_IsCalibrationOk(void) -{ - if (bCalibrationOk == 1) { - return 1; - } else { - return 0; - } -} - -/** - * \brief Interpolates the provided raw measurements using the previously calculated - * slope. The resulting x and y coordinates are stored in an array. - * - * \param pData Raw measurement data, as returned by TSD_GetRawMeasurement(). - * \param pPoint Array in which x and y will be stored. - */ -void TSDCom_InterpolateMeasurement(const uint32_t *pData, uint32_t *pPoint) -{ - pPoint[0] = calibrationPoints[0].x - - (((int32_t) calibrationPoints[0].data[0] - (int32_t) pData[0]) * 1024) - / xSlope; - - pPoint[1] = calibrationPoints[0].y - - (((int32_t) calibrationPoints[0].data[1] - (int32_t) pData[1]) * 1024) - / ySlope; - - if(pPoint[0] & 0x80000000) /* Is pPoint[0] negative ? */ - { - pPoint[0] = 0; - } - - if(pPoint[0] > BOARD_LCD_WIDTH) /* Is pPoint[0] bigger than the LCD width ? */ - { - pPoint[0] = BOARD_LCD_WIDTH; - } - - if(pPoint[1] & 0x80000000) /* Is pPoint[1] negative ? */ - { - pPoint[1] = 0; - } - - if(pPoint[1] > BOARD_LCD_HEIGHT) /* Is pPoint[1] bigger than the LCD width ? */ - { - pPoint[1] = BOARD_LCD_HEIGHT; - } -} - -/** - * \brief Performs the calibration process using the provided buffer to display - * information. - * - * \return True if calibration was successful; otherwise false. - */ -uint8_t TSDCom_Calibrate(void) -{ - volatile uint32_t i; /* to keep the tempo with gcc code optimisation */ - int32_t slope1, slope2; - CalibrationPoint measuredPoint; - uint8_t xOk, yOk; - int32_t xDiff, yDiff; - - /* Calibration setup */ - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(1, 140, (uint8_t *)"Touch the dots to\ncalibrate the screen", COLOR_DARKBLUE); - - /* Calibration points */ - for (i=0; i < 4; i++) { - - DrawCalibrationPoint(&calibrationPoints[i]); - - /* Wait for touch & end of conversion */ - TSD_WaitPenPressed(); - TSD_GetRawMeasurement(calibrationPoints[i].data); - ClearCalibrationPoint(&calibrationPoints[i]); - - /* Wait for contact loss */ - TSD_WaitPenReleased(); - } - - /** - * Calculate slopes using the calibration data - * Theory behind those calculations: - * - We suppose the touchscreen measurements are linear, so the following equations are true (simple - * linear regression) for any two 'a' and 'b' points of the screen: - * dx = (a.data[0] - b.data[0]) / (a.x - b.x) - * dy = (a.data[1] - b.data[1]) / (a.y - b.y) - * - * - We calculate dx and dy (called xslope and yslope here) using the calibration points. - * - * - We can then use dx and dy to infer the position of a point 'p' given the measurements performed - * by the touchscreen ('c' is any of the calibration points): - * dx = (p.data[0] - c.data[0]) / (p.x - c.x) - * dy = (p.data[1] - c.data[1]) / (p.y - c.y) - * Thus: - * p.x = c.x - (p.data[0] - c.data[0]) / dx - * p.y = c.y - (p.data[1] - c.data[1]) / dy - * - * - Since there are four calibration points, dx and dy can be calculated twice, so we average - * the two values. - */ - slope1 = ((int32_t) calibrationPoints[0].data[0]) - ((int32_t) calibrationPoints[1].data[0]); - slope1 *= 1024; - slope1 /= ((int32_t) calibrationPoints[0].x) - ((int32_t) calibrationPoints[1].x); - slope2 = ((int32_t) calibrationPoints[2].data[0]) - ((int32_t) calibrationPoints[3].data[0]); - slope2 *= 1024; - slope2 /= ((int32_t) calibrationPoints[2].x) - ((int32_t) calibrationPoints[3].x); - xSlope = (slope1 + slope2) / 2; - - slope1 = ((int32_t) calibrationPoints[0].data[1]) - ((int32_t) calibrationPoints[2].data[1]); - slope1 *= 1024; - slope1 /= ((int32_t) calibrationPoints[0].y) - ((int32_t) calibrationPoints[2].y); - slope2 = ((int32_t) calibrationPoints[1].data[1]) - ((int32_t) calibrationPoints[3].data[1]); - slope2 *= 1024; - slope2 /= ((int32_t) calibrationPoints[1].y) - ((int32_t) calibrationPoints[3].y); - ySlope = (slope1 + slope2) / 2; - - /* Test point */ - LCDD_Fill(0xFFFFFF); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(1, 100, (uint8_t *)" Touch the point to\nvalidate calibration", COLOR_DARKBLUE); - DrawCalibrationPoint(&testPoint); - - /* Wait for touch & end of conversion */ - TSD_WaitPenPressed(); - - TSD_GetRawMeasurement(measuredPoint.data); - TSDCom_InterpolateMeasurement(measuredPoint.data, (uint32_t *) &measuredPoint); - DrawCalibrationPoint(&measuredPoint); - - /* Check resulting x and y */ - xDiff = (int32_t) measuredPoint.x - (int32_t) testPoint.x; - yDiff = (int32_t) measuredPoint.y - (int32_t) testPoint.y; - xOk = (xDiff >= -POINTS_MAX_ERROR) && (xDiff <= POINTS_MAX_ERROR); - yOk = (yDiff >= -POINTS_MAX_ERROR) && (yDiff <= POINTS_MAX_ERROR); - - /* Wait for contact loss */ - TSD_WaitPenReleased(); - - /* Check calibration result */ - if (xOk && yOk) { - - bCalibrationOk = 1; - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(80, 140, (uint8_t *)"Success !", COLOR_GREEN); - - } - else { - - bCalibrationOk = 0; - LCDD_Fill(COLOR_WHITE); - LCDD_DrawString(30, 50, (uint8_t *)"LCD calibration", COLOR_BLACK); - LCDD_DrawString(40, 140, (uint8_t *)"Error too big", COLOR_RED); - } - - /* Slight delay */ - for (i = 0; i < DELAY_RESULT_DISPLAY; i++); - - return (xOk && yOk); -} - -/** - * \brief Read calibrate data to buffer. - * - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - */ -void TSDCom_ReadCalibrateData(void *pBuffer, uint32_t size) -{ - uint8_t *pDest = (uint8_t *)pBuffer; - - assert( (sizeof(bCalibrationOk) + sizeof(xSlope) + - sizeof(ySlope) + sizeof(calibrationPoints[0].data)) < size ) ; - - memcpy(pDest, (void const *)&bCalibrationOk, sizeof(bCalibrationOk)); - pDest += sizeof(bCalibrationOk); - memcpy(pDest, &xSlope, sizeof(xSlope)); - pDest += sizeof(xSlope); - memcpy(pDest, &ySlope, sizeof(ySlope)); - pDest += sizeof(ySlope); - memcpy(pDest, &calibrationPoints[0].data, sizeof(calibrationPoints[0].data)); - pDest += sizeof(calibrationPoints[0].data); -} - -/** - * \brief Restore calibrate data with buffer data. - * - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - */ -void TSDCom_RestoreCalibrateData(void *pBuffer, uint32_t size) -{ - uint8_t *pSrc = (uint8_t *)pBuffer; - - assert( (sizeof(bCalibrationOk) + sizeof(xSlope) + - sizeof(ySlope) + sizeof(calibrationPoints[0].data)) < size ) ; - - memcpy((void *)&bCalibrationOk, pSrc, sizeof(bCalibrationOk)); - pSrc += sizeof(bCalibrationOk); - memcpy(&xSlope, pSrc, sizeof(xSlope)); - pSrc += sizeof(xSlope); - memcpy(&ySlope, pSrc, sizeof(ySlope)); - pSrc += sizeof(ySlope); - memcpy(&calibrationPoints[0].data, pSrc, sizeof(calibrationPoints[0].data)); - pSrc += sizeof(calibrationPoints[0].data); -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/wav.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/wav.c deleted file mode 100644 index be3947bd..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/wav.c +++ /dev/null @@ -1,90 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -#include - -/*---------------------------------------------------------------------------- - * Definiation - *----------------------------------------------------------------------------*/ - -/* WAV letters "RIFF" */ -#define WAV_CHUNKID 0x46464952 -/* WAV letters "WAVE"*/ -#define WAV_FORMAT 0x45564157 -/* WAV letters "fmt "*/ -#define WAV_SUBCHUNKID 0x20746D66 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Check if the header of a Wav file is valid ot not. - * - * \param file Buffer holding the file to examinate. - * \return 1 if the header of a Wav file is valid; otherwise returns 0. - */ -unsigned char WAV_IsValid(const WavHeader *header) -{ - return ((header->chunkID == WAV_CHUNKID) - && (header->format == WAV_FORMAT) - && (header->subchunk1Size == 0x10)); -} - -/** - * \brief Display the information of the WAV file (sample rate, stereo/mono - * and frame size). - * - * \param header Wav head information. - */ - -void WAV_DisplayInfo(const WavHeader *header) -{ - printf( "Wave file header information\n\r"); - printf( "--------------------------------\n\r"); - printf( " - Chunk ID = 0x%08X\n\r", header->chunkID); - printf( " - Chunk Size = %u\n\r", header->chunkSize); - printf( " - Format = 0x%08X\n\r", header->format); - printf( " - SubChunk ID = 0x%08X\n\r", header->subchunk1ID); - printf( " - Subchunk1 Size = %u\n\r", header->subchunk1Size); - printf( " - Audio Format = 0x%04X\n\r", header->audioFormat); - printf( " - Num. Channels = %d\n\r", header->numChannels); - printf( " - Sample Rate = %u\n\r", header->sampleRate); - printf( " - Byte Rate = %u\n\r", header->byteRate); - printf( " - Block Align = %d\n\r", header->blockAlign); - printf( " - Bits Per Sample = %d\n\r", header->bitsPerSample); - printf( " - Subchunk2 ID = 0x%08X\n\r", header->subchunk2ID); - printf( " - Subchunk2 Size = %u\n\r", header->subchunk2Size); -} diff --git a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/wm8731.c b/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/wm8731.c deleted file mode 100644 index 784d1c9e..00000000 --- a/firmware/atmel_softpack_libraries/libboard_sam3s-ek/source/wm8731.c +++ /dev/null @@ -1,139 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -/** - * \file - * - * Implementation WM8731 driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Read data from WM8731 Register. - * - * \param pTwid Pointer to twi driver structure - * \param device Twi slave address. - * \param regAddr Register address to read. - * \return value in the given register. - */ -uint16_t WM8731_Read(Twid *pTwid, - uint32_t device, - uint32_t regAddr) -{ - uint16_t bitsDataRegister; - uint8_t Tdata[2]={0,0}; - - TWID_Read(pTwid, device, regAddr, 0, Tdata, 2, 0); - bitsDataRegister = (Tdata[0] << 8) | Tdata[1]; - return bitsDataRegister; -} - -/** - * \brief Write data to WM8731 Register. - * - * \param pTwid Pointer to twi driver structure - * \param device Twi slave address. - * \param regAddr Register address to read. - * \param data Data to write - */ -void WM8731_Write(Twid *pTwid, - uint32_t device, - uint32_t regAddr, - uint16_t data) -{ - uint8_t tmpData[2]; - uint16_t tmp; - tmp = ((regAddr & 0x7f) << 9) | (data & 0x1ff); - - tmpData[0] = (tmp & 0xff00) >> 8; - tmpData[1] = tmp & 0xff; - TWID_Write(pTwid, device, regAddr, 0, tmpData, 2, 0); -} - -/** - * \brief Init WM8731 to DAC mode. - * - * \param pTwid Pointer to twi driver structure - * \param device Twi slave address. - * \return 0. - */ -uint8_t WM8731_DAC_Init(Twid *pTwid, - uint32_t device) -{ - /* reset */ - WM8731_Write(pTwid, device, WM8731_REG_RESET, 0); - - /* analogue audio path control */ - WM8731_Write(pTwid, device, WM8731_REG_ANALOGUE_PATH_CTRL, 0x12); - - /* digital audio path control*/ - WM8731_Write(pTwid, device, WM8731_REG_DIGITAL_PATH_CTRL, 0x00); - - /* power down control */ - WM8731_Write(pTwid, device, WM8731_REG_PWDOWN_CTRL, 0x7); - - /* Active control*/ - WM8731_Write(pTwid, device, WM8731_REG_ACTIVE_CTRL, 0x01); - - return 0; -} - -/** - * \brief Set WM8731 volume - * - * \param pTwid Pointer to twi driver structure - * \param device Twi slave address. - * \param value Register value, valid value is between 0x30 to 0x7f - * \return 0. - */ -uint8_t WM8731_VolumeSet(Twid *pTwid, - uint32_t device, - uint16_t value) -{ - uint16_t regValue; - - value &= WM8731_LHPVOL_BITS; - regValue = WM8731_LRHPBOTH_BIT | WM8731_LZCEN_BIT | value; - WM8731_Write(pTwid, device, WM8731_REG_LEFT_HPOUT, regValue); - regValue = WM8731_RZCEN_BIT | WM8731_RLHPBOTH_BIT | value; - WM8731_Write(pTwid, device, WM8731_REG_RIGHT_HPOUT, value); - return 0; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/chip.h b/firmware/atmel_softpack_libraries/libchip_sam3s/chip.h index a22c84e1..ae11f55d 100644 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/chip.h +++ b/firmware/atmel_softpack_libraries/libchip_sam3s/chip.h @@ -42,27 +42,11 @@ /* * Peripherals */ -#include "acc.h" -#include "adc.h" -#include "async.h" -#include "crccu.h" -#include "dacc.h" -#include "efc.h" -#include "flashd.h" -#include "hsmci.h" #include "pio.h" #include "pio_it.h" #include "pio_capture.h" #include "pmc.h" -#include "pwmc.h" -#include "rtc.h" -#include "rtt.h" -#include "spi.h" -#include "spi_pdc.h" -#include "ssc.h" #include "tc.h" -#include "twi.h" -#include "twid.h" #include "usart.h" //#include "USBD_Config.h" diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/USBD_LEDs.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/USBD_LEDs.h deleted file mode 100644 index 06a6225c..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/USBD_LEDs.h +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Collection of LEDs for using the USB device controller on AT91 - * microcontrollers. - */ - -#ifndef USBDLEDS_H -#define USBDLEDS_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -/** \addtogroup usbd_hal - *@{ - */ -/*---------------------------------------------------------------------------- - * Constants - *----------------------------------------------------------------------------*/ - -/** \addtogroup usbd_leds USB Device LEDs - * @{ - * This page lists the LEDs used in the USB %device driver. - * - * - USBD_LEDPOWER - * - USBD_LEDUSB - * - USBD_LEDOTHER - */ - -/** LED for indicating that the device is powered. */ -#define USBD_LEDPOWER 0 -/** LED for indicating USB activity. */ -#define USBD_LEDUSB 1 -/** LED for custom usage. */ -#define USBD_LEDOTHER 2 -/** @}*/ - -/**@}*/ - -#endif //#ifndef USBDLEDS_H - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/acc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/acc.h deleted file mode 100644 index 31733544..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/acc.h +++ /dev/null @@ -1,151 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ACC) peripheral. - * - * \section Usage - * - * -# Configurate the pins for ACC - * -# Initialize the ACC with ACC_Initialize(). - * -# Select the active channel using ACC_EnableChannel() - * -# Start the conversion with ACC_StartConversion() - * -# Wait the end of the conversion by polling status with ACC_GetStatus() - * -# Finally, get the converted data using ACC_GetConvertedData() - * - */ -#ifndef _ACC_ -#define _ACC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define ACC_SELPLUS_AD12B0 0 -#define ACC_SELPLUS_AD12B1 1 -#define ACC_SELPLUS_AD12B2 2 -#define ACC_SELPLUS_AD12B3 3 -#define ACC_SELPLUS_AD12B4 4 -#define ACC_SELPLUS_AD12B5 5 -#define ACC_SELPLUS_AD12B6 6 -#define ACC_SELPLUS_AD12B7 7 -#define ACC_SELMINUS_TS 0 -#define ACC_SELMINUS_ADVREF 1 -#define ACC_SELMINUS_DAC0 2 -#define ACC_SELMINUS_DAC1 3 -#define ACC_SELMINUS_AD12B0 4 -#define ACC_SELMINUS_AD12B1 5 -#define ACC_SELMINUS_AD12B2 6 -#define ACC_SELMINUS_AD12B3 7 - -#ifdef __cplusplus - extern "C" { -#endif - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define ACC_CfgModeReg(pAcc, mode) { \ - (pAcc)->ACC_MR = (mode);\ - } - -#define ACC_GetModeReg( pAcc ) ((pAcc)->ACC_MR) - -#define ACC_StartConversion( pAcc ) ((pAcc)->ACC_CR = ACC_CR_START) - -#define ACC_SoftReset( pAcc ) ((pAcc)->ACC_CR = ACC_CR_SWRST) - -#define ACC_EnableChannel( pAcc, dwChannel ) {\ - assert( dwChannel < 16 ) ;\ - (pAcc)->ACC_CHER = (1 << (dwChannel));\ - } - -#define ACC_DisableChannel( pAcc, dwChannel ) {\ - assert( dwChannel < 16 ) ;\ - (pAcc)->ACC_CHDR = (1 << (dwChannel));\ - } - -#define ACC_EnableIt( pAcc, dwMode ) {\ - assert( ((dwMode)&0xFFF00000)== 0 ) ;\ - (pAcc)->ACC_IER = (dwMode);\ - } - -#define ACC_DisableIt( pAcc, dwMode ) {\ - assert( ((dwMode)&0xFFF00000)== 0 ) ;\ - (pAcc)->ACC_IDR = (dwMode);\ - } - -#define ACC_EnableDataReadyIt( pAcc ) ((pAcc)->ACC_IER = AT91C_ACC_DRDY) - -#define ACC_GetStatus( pAcc ) ((pAcc)->ACC_ISR) - -#define ACC_GetChannelStatus( pAcc ) ((pAcc)->ACC_CHSR) - -#define ACC_GetInterruptMaskStatus( pAcc ) ((pAcc)->ACC_IMR) - -#define ACC_GetLastConvertedData( pAcc ) ((pAcc)->ACC_LCDR) - -#define ACC_CfgAnalogCtrlReg( pAcc, dwMode ) {\ - assert( ((dwMode) & 0xFFFCFF3C) == 0 ) ;\ - (pAcc)->ACC_ACR = (dwMode);\ - } - -#define ACC_CfgExtModeReg( pAcc, extmode ) {\ - assert( ((extmode) & 0xFF00FFFE) == 0 ) ;\ - (pAcc)->ACC_EMR = (extmode);\ - } - -#define ACC_GetAnalogCtrlReg( pAcc ) ((pAcc)->ACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void ACC_Configure( Acc *pAcc, uint8_t idAcc, uint8_t ucSelplus, uint8_t ucSelminus, - uint16_t wAc_en, uint16_t wEdge, uint16_t wInvert ) ; - -extern void ACC_SetComparisionPair( Acc *pAcc, uint8_t ucSelplus, uint8_t ucSelminus ) ; - -extern uint32_t ACC_GetComparisionResult( Acc* pAcc, uint32_t dwStatus ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _ACC_ */ diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/adc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/adc.h deleted file mode 100644 index fc7000e3..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/adc.h +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ADC) peripheral. - * - * \section Usage - * - * -# Configurate the pins for ADC - * -# Initialize the ADC with ADC_Initialize(). - * -# Select the active channel using ADC_EnableChannel() - * -# Start the conversion with ADC_StartConversion() - * -# Wait the end of the conversion by polling status with ADC_GetStatus() - * -# Finally, get the converted data using ADC_GetConvertedData() - * -*/ -#ifndef _ADC_ -#define _ADC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -/* SAM3S */ -#define ADC_FREQ_MAX 20000000 -#define ADC_FREQ_MIN 1000000 - -#define ADC_STARTUP_NORM 40 -#define ADC_STARTUP_FAST 12 - -#define ADC_CHANNEL_0 0 -#define ADC_CHANNEL_1 1 -#define ADC_CHANNEL_2 2 -#define ADC_CHANNEL_3 3 -#define ADC_CHANNEL_4 4 -#define ADC_CHANNEL_5 5 -#define ADC_CHANNEL_6 6 -#define ADC_CHANNEL_7 7 -#define ADC_CHANNEL_8 8 -#define ADC_CHANNEL_9 9 -#define ADC_CHANNEL_10 10 -#define ADC_CHANNEL_11 11 -#define ADC_CHANNEL_12 12 -#define ADC_CHANNEL_13 13 -#define ADC_CHANNEL_14 14 -#define ADC_CHANNEL_15 15 - -#ifdef __cplusplus - extern "C" { -#endif - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ - -#define ADC_GetModeReg( pAdc ) ((pAdc)->ADC_MR) - -#define ADC_StartConversion( pAdc ) ((pAdc)->ADC_CR = ADC_CR_START) - - -#define ADC_EnableChannel( pAdc, channel ) {\ - assert( channel < 16 ) ;\ - (pAdc)->ADC_CHER = (1 << (channel));\ - } - -#define ADC_DisableChannel(pAdc, channel) {\ - assert( (channel) < 16 ) ;\ - (pAdc)->ADC_CHDR = (1 << (channel));\ - } - -#define ADC_EnableIt(pAdc, dwMode) {\ - (pAdc)->ADC_IER = (dwMode);\ - } - -#define ADC_DisableIt(pAdc, dwMode) {\ - (pAdc)->ADC_IDR = (dwMode);\ - } - -#define ADC_EnableTS(pAdc,dwMode) {\ - (pAdc)->ADC_ACR |= dwMode;\ - } - -#define ADC_EnableDataReadyIt(pAdc) ((pAdc)->ADC_IER = AT91C_ADC_DRDY) - -#define ADC_GetStatus(pAdc) ((pAdc)->ADC_ISR) - -#define ADC_GetCompareMode(pAdc) (((pAdc)->ADC_EMR)& (ADC_EMR_CMPMODE_Msk)) - -#define ADC_GetChannelStatus(pAdc) ((pAdc)->ADC_CHSR) - -#define ADC_GetInterruptMaskStatus(pAdc) ((pAdc)->ADC_IMR) - -#define ADC_GetLastConvertedData(pAdc) ((pAdc)->ADC_LCDR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void ADC_Initialize( Adc* pAdc, uint32_t idAdc ); -extern void ADC_CfgTiming( Adc* pAdc, uint32_t tracking, uint32_t settling, uint32_t transfer ); -extern void ADC_cfgFrequency( Adc* pAdc, uint32_t startup, uint32_t prescal ); -extern void ADC_CfgTrigering( Adc* pAdc, uint32_t trgEn, uint32_t trgSel, uint32_t freeRun ); -extern void ADC_CfgLowRes( Adc* pAdc, uint32_t resolution ); -extern void ADC_CfgPowerSave( Adc* pAdc, uint32_t sleep, uint32_t fwup ); -extern void ADC_CfgChannelMode( Adc* pAdc, uint32_t useq, uint32_t anach ); -extern void ADC_check( Adc* pAdc, uint32_t mck_freq ); - -extern uint32_t ADC_GetConvertedData( Adc* pAdc, uint32_t dwChannel ) ; -extern void ADC_SetCompareChannel( Adc* pAdc, uint32_t dwChannel ) ; -extern void ADC_SetCompareMode( Adc* pAdc, uint32_t dwMode ) ; -extern void ADC_SetComparisonWindow( Adc* pAdc, uint32_t dwHi_Lo ) ; -extern uint32_t ADC_IsInterruptMasked( Adc* pAdc, uint32_t dwFlag ) ; -extern uint32_t ADC_IsStatusSet( Adc* pAdc, uint32_t dwFlag ) ; -extern uint32_t ADC_IsChannelInterruptStatusSet( uint32_t adc_sr, uint32_t dwChannel ) ; -extern uint32_t ADC_ReadBuffer( Adc* pADC, int16_t *pwBuffer, uint32_t dwSize ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _ADC_ */ diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/async.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/async.h deleted file mode 100644 index 6faad51f..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/async.h +++ /dev/null @@ -1,80 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Provide a routine for asynchronous transfer. - * - */ - -#ifndef _ASYNC_ -#define _ASYNC_ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ -/** Transfer is still pending.*/ -#define ASYNC_STATUS_PENDING 0xFF - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Type - *----------------------------------------------------------------------------*/ -/** \brief Asynchronous transfer descriptor. */ -typedef struct _Async -{ - /** Asynchronous transfer status.*/ - volatile uint8_t status ; - /** Callback function to invoke when transfer completes or fails.*/ - void *callback ; - /** Driver storage area; do not use.*/ - uint32_t pStorage[4] ; -} Async ; - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ -extern uint32_t ASYNC_IsFinished( Async* pAsync ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _ASYNC_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/crccu.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/crccu.h deleted file mode 100644 index a49b249a..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/crccu.h +++ /dev/null @@ -1,65 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Cyclic Redundancy Check Calculation Unit (CRCCU). - */ - -#ifndef _CRCCU_ -#define _CRCCU_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -typedef struct -{ - uint32_t TR_ADDR ; - uint32_t TR_CTRL ; -} CrcDscr ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void CRCCU_ResetCrcValue( Crccu* pCrccu ) ; -extern void CRCCU_Configure( Crccu* pCrccu, uint32_t dwDscrAddr, uint32_t dwMode ) ; -extern uint32_t CRCCU_ComputeCrc( Crccu* pCrccu ) ; - -#endif /* #ifndef _CRCCU_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/dacc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/dacc.h deleted file mode 100644 index 5fb280cb..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/dacc.h +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Analog-to-Digital Converter (DACC) peripheral. - * - * \section Usage - * - * -# Configurate the pins for DACC - * -# Initialize the DACC with DACC_Initialize(). - * -# Select the active channel using DACC_EnableChannel() - * -# Start the conversion with DACC_StartConversion() - * -# Wait the end of the conversion by polling status with DACC_GetStatus() - * -# Finally, get the converted data using DACC_GetConvertedData() - * -*/ -#ifndef _DACC_ -#define _DACC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define DACC_CHANNEL_0 0 -#define DACC_CHANNEL_1 1 - -#ifdef __cplusplus - extern "C" { -#endif - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define DACC_CfgModeReg(pDACC, mode) { \ - (pDACC)->DACC_MR = (mode);\ - } - -#define DACC_GetModeReg(pDACC) ((pDACC)->DACC_MR) - -#define DACC_StartConversion(pDACC) ((pDACC)->DACC_CR = DACC_CR_START) - -#define DACC_SoftReset(pDACC) ((pDACC)->DACC_CR = DACC_CR_SWRST) - -#define DACC_EnableChannel(pDACC, channel) {\ - (pDACC)->DACC_CHER = (1 << (channel));\ - } - -#define DACC_DisableChannel(pDACC, channel) {\ - (pDACC)->DACC_CHDR = (1 << (channel));\ - } - -#define DACC_EnableIt(pDACC, mode) {\ - assert( ((mode)&0xFFF00000)== 0 ) ;\ - (pDACC)->DACC_IER = (mode);\ - } - -#define DACC_DisableIt(pDACC, mode) {\ - assert( ((mode)&0xFFF00000)== 0 ) ;\ - (pDACC)->DACC_IDR = (mode);\ - } - -#define DACC_EnableDataReadyIt(pDACC) ((pDACC)->DACC_IER = AT91C_DACC_DRDY) - -#define DACC_GetStatus(pDACC) ((pDACC)->DACC_ISR) - -#define DACC_GetChannelStatus(pDACC) ((pDACC)->DACC_CHSR) - -#define DACC_GetInterruptMaskStatus(pDACC) ((pDACC)->DACC_IMR) - -#define DACC_GetLastConvertedData(pDACC) ((pDACC)->DACC_LCDR) - -#define DACC_CfgAnalogCtrlReg(pDACC,mode) {\ - assert( ((mode) & 0xFFFCFF3C)==0 ) ;\ - (pDACC)->DACC_ACR = (mode);\ - } - -#define DACC_CfgExtModeReg(pDACC, extmode) {\ - assert( ((extmode) & 0xFF00FFFE)==0 ) ;\ - (pDACC)->DACC_EMR = (extmode);\ - } - -#define DACC_GetAnalogCtrlReg(pDACC) ((pDACC)->DACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void DACC_Initialize( Dacc* pDACC, - uint8_t idDACC, - uint8_t trgEn, - uint8_t trgSel, - uint8_t word, - uint8_t sleepMode, - uint32_t mck, - uint8_t refresh,/*refresh period*/ - uint8_t user_sel,/*user channel selection*/ - uint32_t tag_mode,/*using tag for channel number*/ - uint32_t startup - ); - - -extern void DACC_SetConversionData( Dacc* pDACC, uint32_t dwData ) ; - -extern uint32_t DACC_WriteBuffer( Dacc* pDACC, uint16_t* pwBuffer, uint32_t dwSize ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _DACC_ */ diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/efc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/efc.h deleted file mode 100644 index faafd477..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/efc.h +++ /dev/null @@ -1,113 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Enhanced Embedded Flash Controller (EEFC) peripheral. - * - * \section Usage - * - * -# Enable/disable %flash ready interrupt sources using EFC_EnableFrdyIt() - * and EFC_DisableFrdyIt(). - * -# Translates the given address into which EEFC, page and offset values - * for difference density %flash memory using EFC_TranslateAddress(). - * -# Computes the address of a %flash access given the EFC, page and offset - * for difference density %flash memory using EFC_ComputeAddress(). - * -# Start the executing command with EFC_StartCommand() - * -# Retrieve the current status of the EFC using EFC_GetStatus(). - * -# Retrieve the result of the last executed command with EFC_GetResult(). - */ - -#ifndef _EEFC_ -#define _EEFC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -/* EFC command */ -#define EFC_FCMD_GETD 0x00 -#define EFC_FCMD_WP 0x01 -#define EFC_FCMD_WPL 0x02 -#define EFC_FCMD_EWP 0x03 -#define EFC_FCMD_EWPL 0x04 -#define EFC_FCMD_EA 0x05 -#define EFC_FCMD_SLB 0x08 -#define EFC_FCMD_CLB 0x09 -#define EFC_FCMD_GLB 0x0A -#define EFC_FCMD_SFB 0x0B -#define EFC_FCMD_CFB 0x0C -#define EFC_FCMD_GFB 0x0D -#define EFC_FCMD_STUI 0x0E /* Start unique ID */ -#define EFC_FCMD_SPUI 0x0F /* Stop unique ID */ - -/* The IAP function entry addreass */ -#define CHIP_FLASH_IAP_ADDRESS (0x00800008) - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void EFC_EnableFrdyIt( Efc* efc ) ; - -extern void EFC_DisableFrdyIt( Efc* efc ) ; - -extern void EFC_SetWaitState( Efc* efc, uint8_t cycles ) ; - -extern void EFC_TranslateAddress( Efc** pEfc, uint32_t dwAddress, uint16_t *pwPage, uint16_t *pwOffset ) ; - -extern void EFC_ComputeAddress( Efc* efc, uint16_t wPage, uint16_t wOffset, uint32_t *pdwAddress ) ; - -extern void EFC_StartCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument ) ; - -extern uint32_t EFC_PerformCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument, uint32_t dwUseIAP ) ; - -extern uint32_t EFC_GetStatus( Efc* efc ) ; - -extern uint32_t EFC_GetResult( Efc* efc ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _EEFC_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/flashd.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/flashd.h deleted file mode 100644 index f4bece4c..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/flashd.h +++ /dev/null @@ -1,79 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- -*/ - -/** - * \file - * - * The flash driver provides the unified interface for flash program operations. - * - */ - -#ifndef _FLASHD_ -#define _FLASHD_ - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void FLASHD_Initialize( uint32_t dwMCk, uint32_t dwUseIAP ) ; - -extern uint32_t FLASHD_Erase( uint32_t dwAddress ) ; - -extern uint32_t FLASHD_Write( uint32_t dwAddress, const void *pvBuffer, uint32_t dwSize ) ; - -extern uint32_t FLASHD_Lock( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd ) ; - -extern uint32_t FLASHD_Unlock( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd ) ; - -extern uint32_t FLASHD_IsLocked( uint32_t dwStart, uint32_t dwEnd ) ; - -extern uint32_t FLASHD_SetGPNVM( uint8_t gpnvm ) ; - -extern uint32_t FLASHD_ClearGPNVM( uint8_t gpnvm ) ; - -extern uint32_t FLASHD_IsGPNVMSet( uint8_t gpnvm ) ; - -#define FLASHD_IsSecurityBitSet() FLASHD_IsGPNVMSet( 0 ) - -#define FLASHD_SetSecurityBit() FLASHD_SetGPNVM( 0 ) - -extern uint32_t FLASHD_ReadUniqueID( uint32_t* pdwUniqueID ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _FLASHD_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/pwmc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/pwmc.h deleted file mode 100644 index 15c9e141..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/pwmc.h +++ /dev/null @@ -1,127 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for configuration the Pulse Width Modulation Controller (PWM) peripheral. - * - * \par Usage - * - * -# Configures PWM clocks A & B to run at the given frequencies using - * \ref PWMC_ConfigureClocks(). - * -# Configure PWMC channel using \ref PWMC_ConfigureChannel(), \ref PWMC_ConfigureChannelExt() - * \ref PWMC_SetPeriod(), \ref PWMC_SetDutyCycle() and \ref PWMC_SetDeadTime(). - * -# Enable & disable channel using \ref PWMC_EnableChannel() and - * \ref PWMC_DisableChannel(). - * -# Enable & disable the period interrupt for the given PWM channel using - * \ref PWMC_EnableChannelIt() and \ref PWMC_DisableChannelIt(). - * -# Enable & disable the selected interrupts sources on a PWMC peripheral - * using \ref PWMC_EnableIt() and \ref PWMC_DisableIt(). - * -# Control syncronous channel using \ref PWMC_ConfigureSyncChannel(), - * \ref PWMC_SetSyncChannelUpdatePeriod() and \ref PWMC_SetSyncChannelUpdateUnlock(). - * -# Control PWM override output using \ref PWMC_SetOverrideValue(), - * \ref PWMC_EnableOverrideOutput() and \ref PWMC_DisableOverrideOutput(). - * -# Send data through the transmitter using \ref PWMC_WriteBuffer(). - * - */ - -#ifndef _PWMC_ -#define _PWMC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void PWMC_ConfigureChannel( - Pwm* pPwm, - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity); -extern void PWMC_ConfigureChannelExt( - Pwm* pPwm, - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity, - uint32_t countEventSelect, - uint32_t DTEnable, - uint32_t DTHInverte, - uint32_t DTLInverte); -extern void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck); -extern void PWMC_SetPeriod( Pwm* pPwm, uint8_t channel, uint16_t period); -extern void PWMC_SetDutyCycle( Pwm* pPwm, uint8_t channel, uint16_t duty); -extern void PWMC_SetDeadTime( Pwm* pPwm, uint8_t channel, uint16_t timeH, uint16_t timeL); -extern void PWMC_ConfigureSyncChannel( Pwm* pPwm, - uint32_t channels, - uint32_t updateMode, - uint32_t requestMode, - uint32_t requestComparisonSelect); -extern void PWMC_SetSyncChannelUpdatePeriod( Pwm* pPwm, uint8_t period); -extern void PWMC_SetSyncChannelUpdateUnlock( Pwm* pPwm ); -extern void PWMC_EnableChannel( Pwm* pPwm, uint8_t channel); -extern void PWMC_DisableChannel( Pwm* pPwm, uint8_t channel); -extern void PWMC_EnableChannelIt( Pwm* pPwm, uint8_t channel); -extern void PWMC_DisableChannelIt( Pwm* pPwm, uint8_t channel); -extern void PWMC_EnableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2); -extern void PWMC_DisableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2); -extern uint8_t PWMC_WriteBuffer(Pwm *pwmc, - void *buffer, - uint32_t length); -extern void PWMC_SetOverrideValue( Pwm* pPwm, uint32_t value); -extern void PWMC_EnableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync); -extern void PWMC_DisableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync); -extern void PWMC_SetFaultMode( Pwm* pPwm, uint32_t mode); -extern void PWMC_FaultClear( Pwm* pPwm, uint32_t fault); -extern void PWMC_SetFaultProtectionValue( Pwm* pPwm, uint32_t value); -extern void PWMC_EnableFaultProtection( Pwm* pPwm, uint32_t value); -extern void PWMC_ConfigureComparisonUnit( Pwm* pPwm, uint32_t x, uint32_t value, uint32_t mode); -extern void PWMC_ConfigureEventLineMode( Pwm* pPwm, uint32_t x, uint32_t mode); - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _PWMC_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/rtc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/rtc.h deleted file mode 100644 index 0a5af3fd..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/rtc.h +++ /dev/null @@ -1,97 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Real Time Clock (RTC) controller. - * - */ - -#ifndef _RTC_ -#define _RTC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -#define RTC_HOUR_BIT_LEN_MASK 0x3F -#define RTC_MIN_BIT_LEN_MASK 0x7F -#define RTC_SEC_BIT_LEN_MASK 0x7F -#define RTC_CENT_BIT_LEN_MASK 0x7F -#define RTC_YEAR_BIT_LEN_MASK 0xFF -#define RTC_MONTH_BIT_LEN_MASK 0x1F -#define RTC_DATE_BIT_LEN_MASK 0x3F -#define RTC_WEEK_BIT_LEN_MASK 0x07 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -#ifdef __cplusplus - extern "C" { -#endif - -extern void RTC_SetHourMode( Rtc* pRtc, uint32_t dwMode ) ; - -extern uint32_t RTC_GetHourMode( Rtc* pRtc ) ; - -extern void RTC_EnableIt( Rtc* pRtc, uint32_t dwSources ) ; - -extern void RTC_DisableIt( Rtc* pRtc, uint32_t dwSources ) ; - -extern int RTC_SetTime( Rtc* pRtc, uint8_t ucHour, uint8_t ucMinute, uint8_t ucSecond ) ; - -extern void RTC_GetTime( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ; - -extern int RTC_SetTimeAlarm( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ; - -extern void RTC_GetDate( Rtc* pRtc, uint16_t *pwYear, uint8_t *pucMonth, uint8_t *pucDay, uint8_t *pucWeek ) ; - -extern int RTC_SetDate( Rtc* pRtc, uint16_t wYear, uint8_t ucMonth, uint8_t ucDay, uint8_t ucWeek ) ; - -extern int RTC_SetDateAlarm( Rtc* pRtc, uint8_t *pucMonth, uint8_t *pucDay ) ; - -extern void RTC_ClearSCCR( Rtc* pRtc, uint32_t dwMask ) ; - -extern uint32_t RTC_GetSR( Rtc* pRtc, uint32_t dwMask ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _RTC_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/rtt.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/rtt.h deleted file mode 100644 index 6d2b0fdf..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/rtt.h +++ /dev/null @@ -1,82 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for Real Time Timer (RTT) controller. - * - * \par Usage - * - * -# Changes the prescaler value of the given RTT and restarts it - * using \ref RTT_SetPrescaler(). - * -# Get current value of the RTT using \ref RTT_GetTime(). - * -# Enables the specified RTT interrupt using \ref RTT_EnableIT(). - * -# Get the status register value of the given RTT using \ref RTT_GetStatus(). - * -# Configures the RTT to generate an alarm at the given time - * using \ref RTT_SetAlarm(). - */ - -#ifndef _RTT_ -#define _RTT_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -#ifdef __cplusplus - extern "C" { -#endif - -extern void RTT_SetPrescaler( Rtt* pRtt, uint16_t wPrescaler ) ; - -extern uint32_t RTT_GetTime( Rtt* pRtt ) ; - -extern void RTT_EnableIT( Rtt* pRtt, uint32_t dwSources ) ; - -extern uint32_t RTT_GetStatus( Rtt *pRtt ) ; - -extern void RTT_SetAlarm( Rtt *pRtt, uint32_t dwTime ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef RTT_H */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/spi_pdc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/spi_pdc.h deleted file mode 100644 index 8a6f755c..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/spi_pdc.h +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of SPI PDC driver. - * - */ - -#ifndef _SPI_PDC_ -#define _SPI_PDC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** An unspecified error has occured.*/ -#define SPID_ERROR 1 - -/** SPI driver is currently in use.*/ -#define SPID_ERROR_LOCK 2 - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** Calculates the value of the SCBR field of the Chip Select Register given MCK and SPCK.*/ -#define SPID_CSR_SCBR(mck, spck) (SPI_CSR_SCBR(((mck) / (spck))) ) - -/** Calculates the value of the DLYBS field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBS(mck, delay) ( SPI_CSR_DLYBS(((((delay) * ((mck) / 1000000)) / 1000) + 1)) ) - -/** Calculates the value of the DLYBCT field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBCT(mck, delay) ( SPI_CSR_DLYBCT((((delay) / 32 * ((mck) / 1000000)) / 1000) + 1) ) - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** SPI transfer complete callback. */ -typedef void (*SpidCallback)( uint8_t, void* ) ; - -/** \brief Spi Transfer Request prepared by the application upper layer. - * - * This structure is sent to the SPI_SendCommand function to start the transfer. - * At the end of the transfer, the callback is invoked by the interrupt handler. - */ -typedef struct _SpidCmd -{ - /** Pointer to the command data. */ - uint8_t *pCmd; - /** Command size in bytes. */ - uint8_t cmdSize; - /** Pointer to the data to be sent. */ - uint8_t *pData; - /** Data size in bytes. */ - unsigned short dataSize; - /** SPI chip select. */ - uint8_t spiCs; - /** Callback function invoked at the end of transfer. */ - SpidCallback callback; - /** Callback arguments. */ - void *pArgument; -} SpidCmd ; - -/** Constant structure associated with SPI port. This structure prevents - client applications to have access in the same time. */ -typedef struct _Spid -{ - /** Pointer to SPI Hardware registers */ - Spi* pSpiHw ; - /** SPI Id as defined in the product datasheet */ - char spiId ; - /** Current SpiCommand being processed */ - SpidCmd *pCurrentCommand ; - /** Mutual exclusion semaphore. */ - volatile char semaphore ; -} Spid ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint32_t SPID_Configure( Spid* pSpid, Spi* pSpiHw, uint8_t spiId ) ; - -extern void SPID_ConfigureCS( Spid* pSpid, uint32_t dwCS, uint32_t dwCsr ) ; - -extern uint32_t SPID_SendCommand( Spid* pSpid, SpidCmd* pCommand ) ; - -extern void SPID_Handler( Spid* pSpid ) ; - -extern uint32_t SPID_IsBusy( const Spid* pSpid ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _SPI_PDC_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/ssc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/ssc.h deleted file mode 100644 index 722d68f8..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/ssc.h +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Synchronous Serial (SSC) controller. - * - */ - -#ifndef _SSC_ -#define _SSC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void SSC_Configure(uint32_t bitRate, uint32_t masterClock); -extern void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr); -extern void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr); -extern void SSC_EnableTransmitter(void); -extern void SSC_DisableTransmitter(void); -extern void SSC_EnableReceiver(void); -extern void SSC_DisableReceiver(void); -extern void SSC_EnableInterrupts(uint32_t sources); -extern void SSC_DisableInterrupts(uint32_t sources); -extern void SSC_Write(uint32_t frame); -extern uint32_t SSC_Read(void); -extern uint8_t SSC_WriteBuffer(void *buffer, uint32_t length); -extern uint8_t SSC_ReadBuffer(void *buffer, uint32_t length); - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _SSC_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/supc.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/supc.h deleted file mode 100644 index ba268214..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/supc.h +++ /dev/null @@ -1,78 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _SUPC_ -#define _SUPC_ - -#include "chip.h" - -#include - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -extern -#ifdef __ICCARM__ -__ramfunc /* IAR */ -#endif -void SUPC_EnableFlash( Supc* pSupc, uint32_t dwTime ) ; - -extern -#ifdef __ICCARM__ -__ramfunc /* IAR */ -#endif -void SUPC_DisableFlash( Supc* pSupc ) ; - -extern void SUPC_SetVoltageOutput( Supc* pSupc, uint32_t dwVoltage ) ; - -extern void SUPC_EnableDeepMode( Supc* pSupc ) ; - -extern void SUPC_EnableSram( Supc* pSupc ) ; - -extern void SUPC_DisableSram( Supc* pSupc ) ; - -extern void SUPC_EnableRtc( Supc* pSupc ) ; - -extern void SUPC_DisableRtc( Supc* pSupc ) ; - -extern void SUPC_SetBodSampling( Supc* pSupc, uint32_t dwMode ) ; - -extern void SUPC_DisableDeepMode( Supc* pSupc ) ; - -extern void SUPC_DisableVoltageRegulator( Supc* pSupc ) ; - -extern void SUPC_Shutdown( Supc* pSupc ) ; - -extern void SUPC_SetWakeUpSources( Supc* pSupc, uint32_t dwSources ) ; - -extern void SUPC_SetWakeUpInputs( Supc* pSupc, uint32_t dwInputs ) ; - -#endif /* #ifndef _SUPC_ */ - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/twi.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/twi.h deleted file mode 100644 index 62e385fc..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/twi.h +++ /dev/null @@ -1,111 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for configuration the Two Wire Interface (TWI) peripheral. - * - */ - -#ifndef _TWI_ -#define _TWI_ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ -/* Returns 1 if the TXRDY bit (ready to transmit data) is set in the given status register value.*/ -#define TWI_STATUS_TXRDY(status) ((status & TWI_SR_TXRDY) == TWI_SR_TXRDY) - -/* Returns 1 if the RXRDY bit (ready to receive data) is set in the given status register value.*/ -#define TWI_STATUS_RXRDY(status) ((status & TWI_SR_RXRDY) == TWI_SR_RXRDY) - -/* Returns 1 if the TXCOMP bit (transfer complete) is set in the given status register value.*/ -#define TWI_STATUS_TXCOMP(status) ((status & TWI_SR_TXCOMP) == TWI_SR_TXCOMP) - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * External function - *----------------------------------------------------------------------------*/ - -extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck); - -extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress); - -extern void TWI_Stop(Twi *pTwi); - -extern void TWI_StartRead( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize); - -extern uint8_t TWI_ReadByte(Twi *pTwi); - -extern void TWI_WriteByte(Twi *pTwi, uint8_t byte); - -extern void TWI_StartWrite( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t byte); - -extern uint8_t TWI_ByteReceived(Twi *pTwi); - -extern uint8_t TWI_ByteSent(Twi *pTwi); - -extern uint8_t TWI_TransferComplete(Twi *pTwi); - -extern void TWI_EnableIt(Twi *pTwi, uint32_t sources); - -extern void TWI_DisableIt(Twi *pTwi, uint32_t sources); - -extern uint32_t TWI_GetStatus(Twi *pTwi); - -extern uint32_t TWI_GetMaskedStatus(Twi *pTwi); - -extern void TWI_SendSTOPCondition(Twi *pTwi); - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _TWI_ */ diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/include/twid.h b/firmware/atmel_softpack_libraries/libchip_sam3s/include/twid.h deleted file mode 100644 index 661883c7..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/include/twid.h +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _TWID_ -#define _TWID_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ - -/** TWI driver is currently busy. */ -#define TWID_ERROR_BUSY 1 - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** \brief TWI driver structure. Holds the internal state of the driver.*/ -typedef struct _Twid -{ - /** Pointer to the underlying TWI peripheral.*/ - Twi *pTwi ; - /** Current asynchronous transfer being processed.*/ - Async *pTransfer ; -} Twid; - -/*---------------------------------------------------------------------------- - * Export functions - *----------------------------------------------------------------------------*/ -extern void TWID_Initialize( Twid *pTwid, Twi *pTwi ) ; - -extern void TWID_Handler( Twid *pTwid ) ; - -extern uint8_t TWID_Read( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -extern uint8_t TWID_Write( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -#ifdef __cplusplus -} -#endif - -#endif //#ifndef TWID_H - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/acc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/acc.c deleted file mode 100644 index 76f4e47d..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/acc.c +++ /dev/null @@ -1,162 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup acc_module Working with ACC - * The ACC driver provides the interface to configure and use the ACC peripheral.\n - * - * It applies comparison on two inputs and gives a compare output. - * - * To Enable a ACC Comparison,the user has to follow these few steps: - *
    - *
  • Enable ACC peripheral clock by setting the corresponding bit in PMC_PCER1 - * (PMC Peripheral Clock Enable Register 1) - *
    • - *
  • Reset the controller by asserting ACC_CR_SWRST in ACC_CR(ACC Control Register) -
    • - *
  • Configure the mode as following steps:
    • - * -# Select inputs for SELMINUS and SELPLUS in ACC_MR (ACC Mode Register). - * -# Enable Analog Comparator by setting ACEN in ACC_MR. - * -# Configure Edge Type to detect different compare output. - * - *
  • Wait until the automatic mask period expires by polling MASK bit in - * ACC_ISR. - *
- * - * For more accurate information, please look at the ACC section of the - * Datasheet. - * - * Related files :\n - * \ref acc.c\n - * \ref acc.h\n - */ -/*@{*/ -/*@}*/ -/** - * \file - * - * Implementation of Analog Comparator Controller (ACC). - * - */ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the ACC controller - * - * \param pAcc Pointer to an Acc instance. - * \param idAcc ACC identifier - * \param ucSelplus input connected to inp, 0~7 - * \param ucSelminus input connected to inm,0~7 - * \param wAc_en Analog comprator enabled/disabled - * \param wEdge CF flag triggering mode - * \param wInvert INVert comparator output,use pattern defined in the device header file - */ -extern void ACC_Configure( Acc *pAcc, uint8_t idAcc, uint8_t ucSelplus, uint8_t ucSelminus, - uint16_t wAc_en, uint16_t wEdge, uint16_t wInvert ) -{ - /* Enable peripheral clock*/ - PMC->PMC_PCER1 = 1 << (idAcc - 32) ; - - /* Reset the controller */ - pAcc->ACC_CR |= ACC_CR_SWRST ; - - /* Write to the MR register */ - ACC_CfgModeReg( pAcc, - ( (ucSelplus<ACC_ACR = (ACC_ACR_ISEL_HISP | ((0x01 << ACC_ACR_HYST_Pos) & ACC_ACR_HYST_Msk)); - - /* Automatic Output Masking Period*/ - while ( pAcc->ACC_ISR & (uint32_t)ACC_ISR_MASK ) ; -} - -/** - * Return the Channel Converted Data - * \param pAcc Pointer to an Acc instance. - * \param selplus input applied on ACC SELPLUS - * \param selminus input applied on ACC SELMINUS - */ -extern void ACC_SetComparisionPair( Acc *pAcc, uint8_t ucSelplus, uint8_t ucSelminus ) -{ - uint32_t dwTemp ; - - assert( ucSelplus < 8 && ucSelminus < 8 ) ; - - dwTemp = pAcc->ACC_MR ; - - pAcc->ACC_MR = dwTemp & (uint32_t) ((~ACC_MR_SELMINUS_Msk) & (~ACC_MR_SELPLUS_Msk)); - - pAcc->ACC_MR |= ( ((ucSelplus << ACC_MR_SELPLUS_Pos) & ACC_MR_SELPLUS_Msk) | - ((ucSelminus << ACC_MR_SELMINUS_Pos) & ACC_MR_SELMINUS_Msk) ) ; - -} -/** - * Return Comparison Result - * \param pAcc Pointer to an Acc instance. - * \param status value of ACC_ISR - */ -extern uint32_t ACC_GetComparisionResult( Acc *pAcc, uint32_t dwStatus ) -{ - uint32_t dwTemp = pAcc->ACC_MR ; - - if ( (dwTemp & ACC_MR_INV) == ACC_MR_INV ) - { - if ( dwStatus & ACC_ISR_SCO ) - { - return 0 ; /* inn>inp*/ - } - else - { - return 1 ;/* inp>inn*/ - } - } - else - { - if ( dwStatus & ACC_ISR_SCO ) - { - return 1 ; /* inp>inn*/ - } - else - { - return 0 ;/* inn>inp*/ - } - } -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/adc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/adc.c deleted file mode 100644 index 95c9d5b2..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/adc.c +++ /dev/null @@ -1,417 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup adc_module Working with ADC - * The ADC driver provides the interface to configure and use the ADC peripheral. - * \n - * - * It converts the analog input to digital format. The converted result could be - * 12bit or 10bit. The ADC supports up to 16 analog lines. - * - * To Enable a ADC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the ADC according to its requirements and special needs,which - * could be broken down into several parts: - * -# Select the resolution by setting or clearing ADC_MR_LOWRES bit in - * ADC_MR (Mode Register) - * -# Set ADC clock by setting ADC_MR_PRESCAL bits in ADC_MR, the clock is - * calculated with ADCClock = MCK / ( (PRESCAL+1) * 2 ) - * -# Set Startup Time,Tracking Clock cycles and Transfer Clock respectively - * in ADC_MR. -
    • - *
  • Start conversion by setting ADC_CR_START in ADC_CR.
    • - *
- * - * For more accurate information, please look at the ADC section of the - * Datasheet. - * - * Related files :\n - * \ref adc.c\n - * \ref adc.h\n - */ -/*@{*/ -/*@}*/ -/** - * \file - * - * Implementation of Analog-to-Digital Converter (ADC). - * - */ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the ADC controller - * - * \param pAdc Pointer to an Adc instance. - * \param idAdc ADC Index - * \param trgEn trigger mode, software or Hardware - * \param trgSel hardware trigger selection - * \param sleepMode sleep mode selection - * \param resolution resolution selection 10 bits or 12 bits - * \param mckClock value of MCK in Hz - * \param adcClock value of the ADC clock in Hz - * \param startup value of the start up time (in ADCClock) (see datasheet) - * \param tracking Tracking Time (in ADCClock cycle) - */ -extern void ADC_Initialize( Adc* pAdc, uint32_t idAdc ) -{ - /* Enable peripheral clock*/ - PMC->PMC_PCER0 = 1 << idAdc; - - /* Reset the controller */ - pAdc->ADC_CR = ADC_CR_SWRST; - - /* Reset Mode Register set to default */ - /* TrackTime set to 0 */ - /* Transfer set to 1 */ - /* settling set to 3 */ - pAdc->ADC_MR = ADC_MR_TRANSFER(1) | ADC_MR_TRACKTIM(0) | ADC_MR_SETTLING(3); -} - -/** - * \brief Initialize the ADC Timing - */ -extern void ADC_CfgTiming( Adc* pAdc, uint32_t tracking, uint32_t settling, uint32_t transfer ) -{ - pAdc->ADC_MR = ADC_MR_TRANSFER( transfer ) - | ADC_MR_SETTLING( settling ) - | ADC_MR_TRACKTIM( tracking ) ; -} - -/** - * \brief Initialize the ADC Timing - */ -extern void ADC_cfgFrequency( Adc* pAdc, uint32_t startup, uint32_t prescal ) -{ - pAdc->ADC_MR |= ADC_MR_PRESCAL( prescal ) - | ( (startup<ADC_MR |= ((trgEn<<0) & ADC_MR_TRGEN) - | ((trgSel<ADC_MR |= (resolution<<4) & ADC_MR_LOWRES; -} - -/** - * \brief Initialize the ADC PowerSave - */ -extern void ADC_CfgPowerSave( Adc* pAdc, uint32_t sleep, uint32_t fwup ) -{ - pAdc->ADC_MR |= ( ((sleep<<5) & ADC_MR_SLEEP) - | ((fwup<<6) & ADC_MR_FWUP) ); -} - -/** - * \brief Initialize the ADC Channel Mode - */ -extern void ADC_CfgChannelMode( Adc* pAdc, uint32_t useq, uint32_t anach ) -{ - pAdc->ADC_MR |= ( ((anach<<23) & ADC_MR_ANACH) - | ((useq <<31) & (uint32_t)ADC_MR_USEQ) ); -} - - -/** - * \brief calcul_startup - */ -static uint32_t calcul_startup( uint32_t startup ) -{ - uint32_t startup_value=0; - - if( startup == 0 ) - startup_value = 0; - else if( startup == 1 ) - startup_value = 8; - else if( startup == 2 ) - startup_value = 16; - else if( startup == 3 ) - startup_value = 24; - else if( startup == 4 ) - startup_value = 64; - else if( startup == 5 ) - startup_value = 80; - else if( startup == 6 ) - startup_value = 96; - else if( startup == 7 ) - startup_value = 112; - else if( startup == 8 ) - startup_value = 512; - else if( startup == 9 ) - startup_value = 576; - else if( startup == 10 ) - startup_value = 640; - else if( startup == 11 ) - startup_value = 704; - else if( startup == 12 ) - startup_value = 768; - else if( startup == 13 ) - startup_value = 832; - else if( startup == 14 ) - startup_value = 896; - else if( startup == 15 ) - startup_value = 960; - - return startup_value; -} - -/** - * \brief ADC check - */ -extern void ADC_check( Adc* pAdc, uint32_t mck_freq ) -{ - uint32_t adc_freq; - uint32_t prescal; - uint32_t startup; - - /* ADCClock = MCK / ( (PRESCAL+1) * 2 ) */ - prescal = (( pAdc->ADC_MR & ADC_MR_PRESCAL_Msk) >> ADC_MR_PRESCAL_Pos); - adc_freq = mck_freq / ((prescal+1)*2); - printf("ADC clock frequency = %d Hz\r\n", (int)adc_freq ); - - if( adc_freq < ADC_FREQ_MIN ) - { - printf("adc frequency too low (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MIN); - } - if( adc_freq > ADC_FREQ_MAX ) - { - printf("adc frequency too high (out of specification: %d Hz)\r\n", (int)ADC_FREQ_MAX); - } - - startup = (( pAdc->ADC_MR & ADC_MR_STARTUP_Msk) >> ADC_MR_STARTUP_Pos); - if( !(pAdc->ADC_MR & ADC_MR_SLEEP_SLEEP) ) - { - /* 40µs */ - if( ADC_STARTUP_NORM * adc_freq / 1000000 > calcul_startup(startup) ) - { - printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * adc_freq / 1000000), (int)calcul_startup(startup)); - } - } - else - { - if(pAdc->ADC_MR & ADC_MR_FREERUN_ON) - { - printf("FreeRun forbidden in sleep mode\n\r"); - } - if( !(pAdc->ADC_MR & ADC_MR_FWUP_ON) ) - { - /* Sleep 40µs */ - if( ADC_STARTUP_NORM * adc_freq / 1000000 > calcul_startup(startup) ) - { - printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * adc_freq / 1000000), (int)(calcul_startup(startup))); - } - } - else - { - if( pAdc->ADC_MR & ADC_MR_FWUP_ON ) - { - /* Fast Wake Up Sleep Mode: 12µs */ - if( ADC_STARTUP_FAST * adc_freq / 1000000 > calcul_startup(startup) ) - { - printf("Startup time too small: %d, programmed: %d\r\n", (int)(ADC_STARTUP_NORM * adc_freq / 1000000), (int)(calcul_startup(startup))); - } - } - } - } - - - - -} - - - -/** - * Return the Channel Converted Data - * - * \param pAdc Pointer to an Adc instance. - * \param channel channel to get converted value - */ -extern uint32_t ADC_GetConvertedData( Adc* pAdc, uint32_t dwChannel ) -{ - uint32_t dwData = 0; - - assert( dwChannel < 16 ) ; - - if ( 15 >= dwChannel ) - { - dwData=*(pAdc->ADC_CDR+dwChannel) ; - } - - return dwData ; -} -/** - * Set compare channel - * - * \param pAdc Pointer to an Adc instance. - * \param channel channel number to be set,16 for all channels - */ -extern void ADC_SetCompareChannel( Adc* pAdc, uint32_t dwChannel ) -{ - assert( dwChannel <= 16 ) ; - - if ( dwChannel < 16 ) - { - pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPALL); - pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPSEL_Msk); - pAdc->ADC_EMR |= (dwChannel << ADC_EMR_CMPSEL_Pos); - } - else - { - pAdc->ADC_EMR |= ADC_EMR_CMPALL; - } -} -/** - * Set compare mode - * - * \param pAdc Pointer to an Adc instance. - * \param mode compare mode - */ -extern void ADC_SetCompareMode( Adc* pAdc, uint32_t dwMode ) -{ - pAdc->ADC_EMR &= (uint32_t)~(ADC_EMR_CMPMODE_Msk); - pAdc->ADC_EMR |= (dwMode & ADC_EMR_CMPMODE_Msk) ; -} -/** - * Set comparsion window,one thereshold each time - * - * \param pAdc Pointer to an Adc instance. - * \param hi_lo Comparison Window - */ -extern void ADC_SetComparisonWindow( Adc* pAdc, uint32_t dwHi_Lo ) -{ - pAdc->ADC_CWR = dwHi_Lo ; -} - -/**---------------------------------------------------------------------------- - * Test if ADC Interrupt is Masked - * - * \param pAdc Pointer to an Adc instance. - * \param flag flag to be tested - * - * \return 1 if interrupt is masked, otherwise 0 - */ -uint32_t ADC_IsInterruptMasked( Adc* pAdc, uint32_t dwFlag ) -{ - return (ADC_GetInterruptMaskStatus( pAdc ) & dwFlag) ; -} - -/**---------------------------------------------------------------------------- - * Test if ADC Status is Set - * - * \param pAdc Pointer to an Adc instance. - * \param flag flag to be tested - * - * \return 1 if the staus is set; 0 otherwise - */ -extern uint32_t ADC_IsStatusSet( Adc* pAdc, uint32_t dwFlag ) -{ - return (ADC_GetStatus( pAdc ) & dwFlag) ; -} - -/**---------------------------------------------------------------------------- - * Test if ADC channel interrupt Status is Set - * - * \param adc_sr Value of SR register - * \param channel Channel to be tested - * - * \return 1 if interrupt status is set, otherwise 0 - */ -extern uint32_t ADC_IsChannelInterruptStatusSet( uint32_t dwAdc_sr, uint32_t dwChannel ) -{ - uint32_t dwStatus ; - - if ( (dwAdc_sr & ((uint32_t)1 << dwChannel)) == ((uint32_t)1 << dwChannel) ) - { - dwStatus = 1 ; - } - else - { - dwStatus = 0 ; - } - - return dwStatus ; -} - -/** - * \brief Read converted data through PDC channel - * - * \param pADC the pointer of adc peripheral - * \param pBuffer the destination buffer - * \param dwSize the size of the buffer - */ -extern uint32_t ADC_ReadBuffer( Adc* pADC, int16_t *pwBuffer, uint32_t dwSize ) -{ - /* Check if the first PDC bank is free*/ - if ( (pADC->ADC_RCR == 0) && (pADC->ADC_RNCR == 0) ) - { - pADC->ADC_RPR = (uint32_t)pwBuffer ; - pADC->ADC_RCR = dwSize ; - pADC->ADC_PTCR = ADC_PTCR_RXTEN; - - return 1; - } - /* Check if the second PDC bank is free*/ - else - { - if ( pADC->ADC_RNCR == 0 ) - { - pADC->ADC_RNPR = (uint32_t)pwBuffer ; - pADC->ADC_RNCR = dwSize ; - - return 1 ; - } - else - { - return 0 ; - } - } -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/async.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/async.c deleted file mode 100644 index b202be22..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/async.c +++ /dev/null @@ -1,53 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Provide a routine for asynchronos transfer. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ - /** - * \brief Returns 1 if the given transfer has ended; otherwise returns 0. - * \param pAsync Pointer to an Async instance. - */ -uint32_t ASYNC_IsFinished( Async* pAsync ) -{ - return (pAsync->status != ASYNC_STATUS_PENDING) ; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/crccu.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/crccu.c deleted file mode 100644 index d356cf17..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/crccu.c +++ /dev/null @@ -1,112 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup crccu_module Working with CRCCU - * The CRCCU driver provides the interface to configure and use the CRCCU - * peripheral. - * - * It performs a CRC computation on a Memory Area. CRC computation is performed - * from the LSB to MSB bit. Three different polynomials are available: - * CCIT802.3, CASTAGNOLI and CCIT16. - * - * To computes CRC of a buffer, the user has to follow these few steps: - *
    - *
  • Reset initial CRC by setting RESET bit in CRCCU_CRC_CR,
    • - *
  • Configure CRC descriptor and working mode,
    • - *
  • Start to compute CRC by setting DMAEN in CRCCU_DMA_EN,
    • - *
  • Get CRC value in CRCCU_CRC_SR.
    • - *
- * - * For more accurate information, please look at the CRCCU section of the - * Datasheet. - * - * Related files :\n - * \ref crccu.c\n - * \ref crccu.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Cyclic Redundancy Check Calculation Unit (CRCCU). - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -#define CRCCU_TIMEOUT 0xFFFFFFFF - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -/** - * \brief Reset initial CRC to 0xFFFFFFFF. - */ -extern void CRCCU_ResetCrcValue( Crccu* pCrccu ) -{ - pCrccu->CRCCU_CR = CRCCU_CR_RESET; -} - -/** - * \brief Configure the CRCCU. - * - * \param dscrAddr CRC decscriptor address. - * \param mode CRC work mode - */ -extern void CRCCU_Configure( Crccu* pCrccu, uint32_t dwDscrAddr, uint32_t dwMode ) -{ - pCrccu->CRCCU_DSCR = dwDscrAddr ; - pCrccu->CRCCU_MR = dwMode ; -} - -/** - * \brief Start to compute the CRC of a buffer. - * - * \return The CRC of the buffer. - */ -extern uint32_t CRCCU_ComputeCrc( Crccu* pCrccu ) -{ - uint32_t dwTimeout = 0 ; - - pCrccu->CRCCU_DMA_EN = CRCCU_DMA_EN_DMAEN ; - - while ( ((pCrccu->CRCCU_DMA_SR & CRCCU_DMA_SR_DMASR) == CRCCU_DMA_SR_DMASR) && - (dwTimeout++ < CRCCU_TIMEOUT) ) ; - - return (pCrccu->CRCCU_SR) ; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/dacc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/dacc.c deleted file mode 100644 index ae460dfc..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/dacc.c +++ /dev/null @@ -1,183 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup dacc_module Working with DACC - * The DACC driver provides the interface to configure and use the DACC peripheral.\n - * - * The DACC(Digital-to-Analog Converter Controller) converts digital code to analog output. - * The data to be converted are sent in a common register for all channels. It offers up to 2 - * analog outputs.The output voltage ranges from (1/6)ADVREF to (5/6)ADVREF. - * - * To Enable a DACC conversion,the user has to follow these few steps: - *
    - *
  • Select an appropriate reference voltage on ADVREF
    • - *
  • Configure the DACC according to its requirements and special needs,which could be - broken down into several parts: - * -# Enable DACC in free running mode by clearing TRGEN in DACC_MR; - * -# Configure Startup Time and Refresh Period through setting STARTUP and REFRESH fields - * in DACC_MR; The refresh mechanism is used to protect the output analog value from - * decreasing. - * -# Enable channels and write digital code to DACC_CDR,in free running mode, the conversion - * is started right after at least one channel is enabled and data is written . -
    • - *
- * - * For more accurate information, please look at the DACC section of the - * Datasheet. - * - * Related files :\n - * \ref DACC.c\n - * \ref DACC.h\n -*/ -/*@{*/ -/*@}*/ -/** - * \file - * - * Implementation of Digital-to-Analog Converter Controller (DACC). - * - */ -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initialize the DACC controller - * \param pDACC Pointer to an DACC instance. - * \param idDACC identifier of DAC peripheral - * \param trgEn trigger mode, free running mode or external Hardware trigger - * \param word transfer size,word or half word - * \param trgSel hardware trigger selection - * \param sleepMode sleep mode selection - * \param mck value of MCK in Hz - * \param refresh refresh period - * \param user_sel user channel selection ,0 or 1 - * \param tag_mode tag for channel number - * \param startup value of the start up time (in DACCClock) (see datasheet) -*/ -extern void DACC_Initialize( Dacc* pDACC, - uint8_t idDACC, - uint8_t trgEn, - uint8_t trgSel, - uint8_t word, - uint8_t sleepMode, - uint32_t mck, - uint8_t refresh, /* refresh period */ - uint8_t user_sel, /* user channel selection */ - uint32_t tag_mode, /* using tag for channel number */ - uint32_t startup - ) -{ - assert( 1024*refresh*1000/(mck>>1) < 20 ) ; - - /* Enable peripheral clock*/ - PMC->PMC_PCER0 = 1 << idDACC; - - /* Reset the controller */ - DACC_SoftReset(pDACC); - - /* Write to the MR register */ - DACC_CfgModeReg( pDACC, - ( (trgEn<<0) & DACC_MR_TRGEN) - | DACC_MR_TRGSEL(trgSel) - | ( (word<<4) & DACC_MR_WORD) - | ( (sleepMode<<5) & DACC_MR_SLEEP) - | DACC_MR_REFRESH(refresh) - | ( (user_sel<DACC_MR ; - - if ( dwMR & DACC_MR_WORD ) - { - pDACC->DACC_CDR = dwData ; - } - else - { - pDACC->DACC_CDR = (dwData&0xFFFF) ; - } -} - - -/** - * \brief Write converted data through PDC channel - * \param pDACC the pointer of DACC peripheral - * \param pBuffer the destination buffer - * \param size the size of the buffer -*/ -extern uint32_t DACC_WriteBuffer( Dacc* pDACC, uint16_t *pwBuffer, uint32_t dwSize ) -{ - - /* Check if the first PDC bank is free*/ - if ( (pDACC->DACC_TCR == 0) && (pDACC->DACC_TNCR == 0) ) - { - pDACC->DACC_TPR = (uint32_t)pwBuffer ; - pDACC->DACC_TCR = dwSize ; - pDACC->DACC_PTCR = DACC_PTCR_TXTEN ; - - return 1 ; - } - /* Check if the second PDC bank is free*/ - else - { - if (pDACC->DACC_TNCR == 0) - { - pDACC->DACC_TNPR = (uint32_t)pwBuffer ; - pDACC->DACC_TNCR = dwSize ; - - return 1 ; - } - else - { - return 0 ; - } - } - -} - - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/efc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/efc.c deleted file mode 100644 index 97104d5e..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/efc.c +++ /dev/null @@ -1,289 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup efc_module Working with EEFC - * The EEFC driver provides the interface to configure and use the EEFC - * peripheral. - * - * The user needs to set the number of wait states depending on the frequency used.\n - * Configure number of cycles for flash read/write operations in the FWS field of EEFC_FMR. - * - * It offers a function to send flash command to EEFC and waits for the - * flash to be ready. - * - * To send flash command, the user could do in either of following way: - *
    - *
  • Write a correct key, command and argument in EEFC_FCR.
    • - *
  • Or, Use IAP (In Application Programming) function which is executed from - * ROM directly, this allows flash programming to be done by code running in flash.
    • - *
  • Once the command is achieved, it can be detected even by polling EEFC_FSR or interrupt. - *
- * - * The command argument could be a page number,GPNVM number or nothing, it depends on - * the command itself. Some useful functions in this driver could help user tranlate physical - * flash address into a page number and vice verse. - * - * For more accurate information, please look at the EEFC section of the - * Datasheet. - * - * Related files :\n - * \ref efc.c\n - * \ref efc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Enhanced Embedded Flash Controller (EEFC). - * - */ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Enables the flash ready interrupt source on the EEFC peripheral. - * - * \param efc Pointer to a Efc instance - */ -extern void EFC_EnableFrdyIt( Efc* efc ) -{ - efc->EEFC_FMR |= EEFC_FMR_FRDY ; -} - -/** - * \brief Disables the flash ready interrupt source on the EEFC peripheral. - * - * \param efc Pointer to a Efc instance - */ - -extern void EFC_DisableFrdyIt( Efc* efc ) -{ - efc->EEFC_FMR &= ~((uint32_t)EEFC_FMR_FRDY) ; -} - - -/** - * \brief Set read/write wait state on the EEFC perpherial. - * - * \param efc Pointer to a Efc instance - * \param cycles the number of wait states in cycle. - */ - -extern void EFC_SetWaitState( Efc* efc, uint8_t ucCycles ) -{ - uint32_t dwValue ; - - dwValue = efc->EEFC_FMR ; - dwValue &= ~((uint32_t)EEFC_FMR_FWS_Msk) ; - dwValue |= EEFC_FMR_FWS(ucCycles); - efc->EEFC_FMR = dwValue ; -} - -/** - * \brief Returns the current status of the EEFC. - * - * \note Keep in mind that this function clears the value of some status bits (LOCKE, PROGE). - * - * \param efc Pointer to a Efc instance - */ -extern uint32_t EFC_GetStatus( Efc* efc ) -{ - return efc->EEFC_FSR ; -} - -/** - * \brief Returns the result of the last executed command. - * - * \param efc Pointer to a Efc instance - */ -extern uint32_t EFC_GetResult( Efc* efc ) -{ - return efc->EEFC_FRR ; -} - -/** - * \brief Translates the given address page and offset values. - * \note The resulting values are stored in the provided variables if they are not null. - * - * \param efc Pointer to a Efc instance - * \param address Address to translate. - * \param pPage First page accessed. - * \param pOffset Byte offset in first page. - */ -extern void EFC_TranslateAddress( Efc** ppEfc, uint32_t dwAddress, uint16_t* pwPage, uint16_t* pwOffset ) -{ - Efc *pEfc ; - uint16_t wPage ; - uint16_t wOffset ; - - assert( dwAddress >= IFLASH_ADDR ) ; - assert( dwAddress <= (IFLASH_ADDR + IFLASH_SIZE) ) ; - - pEfc = EFC ; - wPage = (dwAddress - IFLASH_ADDR) / IFLASH_PAGE_SIZE; - wOffset = (dwAddress - IFLASH_ADDR) % IFLASH_PAGE_SIZE; - - TRACE_DEBUG( "Translated 0x%08X to page=%d and offset=%d\n\r", dwAddress, wPage, wOffset ) ; - /* Store values */ - if ( pEfc ) - { - *ppEfc = pEfc ; - } - - if ( pwPage ) - { - *pwPage = wPage ; - } - - if ( pwOffset ) - { - *pwOffset = wOffset ; - } -} - -/** - * \brief Computes the address of a flash access given the page and offset. - * - * \param efc Pointer to a Efc instance - * \param page Page number. - * \param offset Byte offset inside page. - * \param pAddress Computed address (optional). - */ -extern void EFC_ComputeAddress( Efc *efc, uint16_t wPage, uint16_t wOffset, uint32_t *pdwAddress ) -{ - uint32_t dwAddress ; - - assert( efc ) ; - assert( wPage <= IFLASH_NB_OF_PAGES ) ; - assert( wOffset < IFLASH_PAGE_SIZE ) ; - - /* Compute address */ - dwAddress = IFLASH_ADDR + wPage * IFLASH_PAGE_SIZE + wOffset ; - - /* Store result */ - if ( pdwAddress != NULL ) - { - *pdwAddress = dwAddress ; - } -} - -/** - * \brief Starts the executing the given command on the EEFC and returns as soon as the command is started. - * - * \note It does NOT set the FMCN field automatically. - * \param efc Pointer to a Efc instance - * \param command Command to execute. - * \param argument Command argument (should be 0 if not used). - */ -extern void EFC_StartCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument ) -{ - /* Check command & argument */ - switch ( dwCommand ) - { - case EFC_FCMD_WP: - case EFC_FCMD_WPL: - case EFC_FCMD_EWP: - case EFC_FCMD_EWPL: - case EFC_FCMD_SLB: - case EFC_FCMD_CLB: - assert( dwArgument < IFLASH_NB_OF_PAGES ) ; - break ; - - case EFC_FCMD_SFB: - case EFC_FCMD_CFB: - assert( dwArgument < 2 ) ; - break; - - case EFC_FCMD_GETD: - case EFC_FCMD_EA: - case EFC_FCMD_GLB: - case EFC_FCMD_GFB: - case EFC_FCMD_STUI: - assert( dwArgument == 0 ) ; - break; - - default: assert( 0 ) ; - } - - /* Start command Embedded flash */ - assert( (efc->EEFC_FSR & EEFC_FMR_FRDY) == EEFC_FMR_FRDY ) ; - efc->EEFC_FCR = EEFC_FCR_FKEY(0x5A) | EEFC_FCR_FARG(dwArgument) | EEFC_FCR_FCMD(dwCommand) ; -} - -/** - * \brief Performs the given command and wait until its completion (or an error). - * - * \param efc Pointer to a Efc instance - * \param command Command to perform. - * \param argument Optional command argument. - * - * \return 0 if successful, otherwise returns an error code. - */ - -extern uint32_t EFC_PerformCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument, uint32_t dwUseIAP ) -{ - if ( dwUseIAP != 0 ) - { - /* Pointer on IAP function in ROM */ - static uint32_t (*IAP_PerformCommand)( uint32_t, uint32_t ) ; - - IAP_PerformCommand = (uint32_t (*)( uint32_t, uint32_t )) *((uint32_t*)CHIP_FLASH_IAP_ADDRESS ) ; - IAP_PerformCommand( 0, EEFC_FCR_FKEY(0x5A) | EEFC_FCR_FARG(dwArgument) | EEFC_FCR_FCMD(dwCommand) ) ; - - return (efc->EEFC_FSR & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE)) ; - } - else - { - uint32_t dwStatus ; - - efc->EEFC_FCR = EEFC_FCR_FKEY(0x5A) | EEFC_FCR_FARG(dwArgument) | EEFC_FCR_FCMD(dwCommand) ; - do - { - dwStatus = efc->EEFC_FSR ; - } - while ( (dwStatus & EEFC_FSR_FRDY) != EEFC_FSR_FRDY ) ; - - return ( dwStatus & (EEFC_FSR_FLOCKE | EEFC_FSR_FCMDE) ) ; - } -} - - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/flashd.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/flashd.c deleted file mode 100644 index 7dc7276c..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/flashd.c +++ /dev/null @@ -1,512 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup flashd_module Flash Memory Interface - * The flash driver manages the programming, erasing, locking and unlocking sequences - * with dedicated commands. - * - * To implement flash programing operation, the user has to follow these few steps : - *
    - *
  • Configue flash wait states to initializes the flash.
    • - *
  • Checks whether a region to be programmed is locked.
    • - *
  • Unlocks the user region to be programmed if the region have locked before.
    • - *
  • Erases the user page before program (optional).
    • - *
  • Writes the user page from the page buffer.
    • - *
  • Locks the region of programmed area if any.
    • - *
- * - * Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption. - * A check of this validity and padding for 32-bit alignment should be done in write algorithm. - - * Lock/unlock range associated with the user address range is automatically translated. - * - * This security bit can be enabled through the command "Set General Purpose NVM Bit 0". - * - * A 128-bit factory programmed unique ID could be read to serve several purposes. - * - * The driver accesses the flash memory by calling the lowlevel module provided in \ref efc_module. - * For more accurate information, please look at the EEFC section of the Datasheet. - * - * Related files :\n - * \ref flashd.c\n - * \ref flashd.h.\n - * \ref efc.c\n - * \ref efc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * The flash driver provides the unified interface for flash program operations. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include -#include - -/*---------------------------------------------------------------------------- - * Local variables - *----------------------------------------------------------------------------*/ - -//static NO_INIT uint8_t _aucPageBuffer[IFLASH_PAGE_SIZE] ; -static NO_INIT uint32_t _adwPageBuffer[IFLASH_PAGE_SIZE/4] ; -static uint8_t* _aucPageBuffer = (uint8_t*)_adwPageBuffer; -static NO_INIT uint32_t _dwUseIAP ; - -/*---------------------------------------------------------------------------- - * Local macros - *----------------------------------------------------------------------------*/ - -#define min( a, b ) (((a) < (b)) ? (a) : (b)) - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - - -/** - * \brief Computes the lock range associated with the given address range. - * - * \param dwStart Start address of lock range. - * \param dwEnd End address of lock range. - * \param pdwActualStart Actual start address of lock range. - * \param pdwActualEnd Actual end address of lock range. - */ -static void ComputeLockRange( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd ) -{ - Efc* pStartEfc ; - Efc* pEndEfc ; - uint16_t wStartPage ; - uint16_t wEndPage ; - uint16_t wNumPagesInRegion ; - uint16_t wActualStartPage ; - uint16_t wActualEndPage ; - - // Convert start and end address in page numbers - EFC_TranslateAddress( &pStartEfc, dwStart, &wStartPage, 0 ) ; - EFC_TranslateAddress( &pEndEfc, dwEnd, &wEndPage, 0 ) ; - - // Find out the first page of the first region to lock - wNumPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE ; - wActualStartPage = wStartPage - (wStartPage % wNumPagesInRegion) ; - wActualEndPage = wEndPage ; - - if ( (wEndPage % wNumPagesInRegion) != 0 ) - { - wActualEndPage += wNumPagesInRegion - (wEndPage % wNumPagesInRegion) ; - } - // Store actual page numbers - EFC_ComputeAddress( pStartEfc, wActualStartPage, 0, pdwActualStart ) ; - EFC_ComputeAddress( pEndEfc, wActualEndPage, 0, pdwActualEnd ) ; - TRACE_DEBUG( "Actual lock range is 0x%06X - 0x%06X\n\r", *pdwActualStart, *pdwActualEnd ) ; -} - - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the flash driver. - * - * \param mck Master clock frequency in Hz. - */ - -extern void FLASHD_Initialize( uint32_t dwMCk, uint32_t dwUseIAP ) -{ - EFC_DisableFrdyIt( EFC ) ; - - if ( (dwMCk/1000000) >= 64 ) - { - EFC_SetWaitState( EFC, 2 ) ; - } - else - { - if ( (dwMCk/1000000) >= 50 ) - { - EFC_SetWaitState( EFC, 1 ) ; - } - else - { - EFC_SetWaitState( EFC, 0 ) ; - } - } - - _dwUseIAP=dwUseIAP ; -} - -/** - * \brief Erases the entire flash. - * - * \param address Flash start address. - * \return 0 if successful; otherwise returns an error code. - */ -extern uint32_t FLASHD_Erase( uint32_t dwAddress ) -{ - Efc* pEfc ; - uint16_t wPage ; - uint16_t wOffset ; - uint32_t dwError ; - - assert( (dwAddress >=IFLASH_ADDR) || (dwAddress <= (IFLASH_ADDR + IFLASH_SIZE)) ) ; - - // Translate write address - EFC_TranslateAddress( &pEfc, dwAddress, &wPage, &wOffset ) ; - dwError = EFC_PerformCommand( pEfc, EFC_FCMD_EA, 0, _dwUseIAP ) ; - - return dwError ; -} - -/** - * \brief Writes a data buffer in the internal flash - * - * \note This function works in polling mode, and thus only returns when the - * data has been effectively written. - * \param address Write address. - * \param pBuffer Data buffer. - * \param size Size of data buffer in bytes. - * \return 0 if successful, otherwise returns an error code. - */ -extern uint32_t FLASHD_Write( uint32_t dwAddress, const void *pvBuffer, uint32_t dwSize ) -{ - Efc* pEfc ; - uint16_t page ; - uint16_t offset ; - uint32_t writeSize ; - uint32_t pageAddress ; - uint16_t padding ; - uint32_t dwError ; - uint32_t sizeTmp ; - uint32_t *pAlignedDestination ; - uint32_t *pAlignedSource ; - - assert( pvBuffer ) ; - assert( dwAddress >=IFLASH_ADDR ) ; - assert( (dwAddress + dwSize) <= (IFLASH_ADDR + IFLASH_SIZE) ) ; - - /* Translate write address */ - EFC_TranslateAddress( &pEfc, dwAddress, &page, &offset ) ; - - /* Write all pages */ - while ( dwSize > 0 ) - { - /* Copy data in temporary buffer to avoid alignment problems */ - writeSize = min((uint32_t)IFLASH_PAGE_SIZE - offset, dwSize ) ; - EFC_ComputeAddress(pEfc, page, 0, &pageAddress ) ; - padding = IFLASH_PAGE_SIZE - offset - writeSize ; - - /* Pre-buffer data */ - memcpy( _aucPageBuffer, (void *) pageAddress, offset); - - /* Buffer data */ - memcpy( _aucPageBuffer + offset, pvBuffer, writeSize); - - /* Post-buffer data */ - memcpy( _aucPageBuffer + offset + writeSize, (void *) (pageAddress + offset + writeSize), padding); - - /* Write page - * Writing 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption - */ - pAlignedDestination = (uint32_t*)pageAddress ; - pAlignedSource = (uint32_t*)_adwPageBuffer ; - sizeTmp = IFLASH_PAGE_SIZE ; - - while ( sizeTmp >= 4 ) - { - *pAlignedDestination++ = *pAlignedSource++; - sizeTmp -= 4; - } - - /* Send writing command */ - dwError = EFC_PerformCommand( pEfc, EFC_FCMD_EWP, page, _dwUseIAP ) ; - if ( dwError ) - { - return dwError ; - } - - /* Progression */ - dwAddress += IFLASH_PAGE_SIZE ; - pvBuffer = (void *)((uint32_t) pvBuffer + writeSize) ; - dwSize -= writeSize ; - page++; - offset = 0; - } - - return 0 ; -} -/** - * \brief Locks all the regions in the given address range. The actual lock range is - * reported through two output parameters. - * - * \param start Start address of lock range. - * \param end End address of lock range. - * \param pActualStart Start address of the actual lock range (optional). - * \param pActualEnd End address of the actual lock range (optional). - * \return 0 if successful, otherwise returns an error code. - */ -extern uint32_t FLASHD_Lock( uint32_t start, uint32_t end, uint32_t *pActualStart, uint32_t *pActualEnd ) -{ - Efc *pEfc ; - uint32_t actualStart, actualEnd ; - uint16_t startPage, endPage ; - uint32_t dwError ; - uint16_t numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE; - - /* Compute actual lock range and store it */ - ComputeLockRange( start, end, &actualStart, &actualEnd ) ; - if ( pActualStart != NULL ) - { - *pActualStart = actualStart ; - } - if ( pActualEnd != NULL ) - { - *pActualEnd = actualEnd; - } - - /* Compute page numbers */ - EFC_TranslateAddress( &pEfc, actualStart, &startPage, 0 ) ; - EFC_TranslateAddress( 0, actualEnd, &endPage, 0 ) ; - - /* Lock all pages */ - while ( startPage < endPage ) - { - dwError = EFC_PerformCommand( pEfc, EFC_FCMD_SLB, startPage, _dwUseIAP ) ; - if ( dwError ) - { - return dwError ; - } - startPage += numPagesInRegion; - } - - return 0 ; -} - -/** - * \brief Unlocks all the regions in the given address range. The actual unlock range is - * reported through two output parameters. - * \param start Start address of unlock range. - * \param end End address of unlock range. - * \param pActualStart Start address of the actual unlock range (optional). - * \param pActualEnd End address of the actual unlock range (optional). - * \return 0 if successful, otherwise returns an error code. - */ -extern uint32_t FLASHD_Unlock( uint32_t start, uint32_t end, uint32_t *pActualStart, uint32_t *pActualEnd ) -{ - Efc* pEfc ; - uint32_t actualStart, actualEnd ; - uint16_t startPage, endPage ; - uint32_t dwError ; - uint16_t numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE; - - // Compute actual unlock range and store it - ComputeLockRange(start, end, &actualStart, &actualEnd); - if ( pActualStart != NULL ) - { - *pActualStart = actualStart ; - } - if ( pActualEnd != NULL ) - { - *pActualEnd = actualEnd ; - } - - // Compute page numbers - EFC_TranslateAddress( &pEfc, actualStart, &startPage, 0 ) ; - EFC_TranslateAddress( 0, actualEnd, &endPage, 0 ) ; - - // Unlock all pages - while ( startPage < endPage ) - { - dwError = EFC_PerformCommand( pEfc, EFC_FCMD_CLB, startPage, _dwUseIAP ) ; - if ( dwError ) - { - return dwError ; - } - startPage += numPagesInRegion ; - } - return 0 ; -} - -/** - * \brief Returns the number of locked regions inside the given address range. - * - * \param start Start address of range - * \param end End address of range. - */ -extern uint32_t FLASHD_IsLocked( uint32_t start, uint32_t end ) -{ - Efc *pEfc ; - uint16_t startPage, endPage ; - uint8_t startRegion, endRegion ; - uint32_t numPagesInRegion ; - uint32_t status ; - uint32_t dwError ; - uint32_t numLockedRegions = 0 ; - - assert( end >= start ) ; - assert( (start >=IFLASH_ADDR) && (end <= IFLASH_ADDR + IFLASH_SIZE) ) ; - - // Compute page numbers - EFC_TranslateAddress( &pEfc, start, &startPage, 0 ) ; - EFC_TranslateAddress( 0, end, &endPage, 0 ) ; - - // Compute region numbers - numPagesInRegion = IFLASH_LOCK_REGION_SIZE / IFLASH_PAGE_SIZE ; - startRegion = startPage / numPagesInRegion ; - endRegion = endPage / numPagesInRegion ; - if ((endPage % numPagesInRegion) != 0) - { - endRegion++ ; - } - - // Retrieve lock status - dwError = EFC_PerformCommand( pEfc, EFC_FCMD_GLB, 0, _dwUseIAP ) ; - assert( !dwError ) ; - status = EFC_GetResult( pEfc ) ; - - // Check status of each involved region - while ( startRegion < endRegion ) - { - if ( (status & (1 << startRegion)) != 0 ) - { - numLockedRegions++ ; - } - startRegion++ ; - } - - return numLockedRegions ; -} - -/** - * \brief Check if the given GPNVM bit is set or not. - * - * \param gpnvm GPNVM bit index. - * \returns 1 if the given GPNVM bit is currently set; otherwise returns 0. - */ -extern uint32_t FLASHD_IsGPNVMSet( uint8_t ucGPNVM ) -{ - uint32_t dwError ; - uint32_t dwStatus ; - - assert( ucGPNVM < 2 ) ; - - /* Get GPNVMs status */ - dwError = EFC_PerformCommand( EFC, EFC_FCMD_GFB, 0, _dwUseIAP ) ; - assert( !dwError ) ; - dwStatus = EFC_GetResult( EFC ) ; - - /* Check if GPNVM is set */ - if ( (dwStatus & (1 << ucGPNVM)) != 0 ) - { - return 1 ; - } - else - { - return 0 ; - } -} - -/** - * \brief Sets the selected GPNVM bit. - * - * \param gpnvm GPNVM bit index. - * \returns 0 if successful; otherwise returns an error code. - */ -extern uint32_t FLASHD_SetGPNVM( uint8_t ucGPNVM ) -{ - assert( ucGPNVM < 2 ) ; - - if ( !FLASHD_IsGPNVMSet( ucGPNVM ) ) - { - return EFC_PerformCommand( EFC, EFC_FCMD_SFB, ucGPNVM, _dwUseIAP ) ; - } - else - { - return 0 ; - } -} - -/** - * \brief Clears the selected GPNVM bit. - * - * \param gpnvm GPNVM bit index. - * \returns 0 if successful; otherwise returns an error code. - */ -extern uint32_t FLASHD_ClearGPNVM( uint8_t ucGPNVM ) -{ - assert( ucGPNVM < 2 ) ; - - if ( FLASHD_IsGPNVMSet( ucGPNVM ) ) - { - return EFC_PerformCommand( EFC, EFC_FCMD_CFB, ucGPNVM, _dwUseIAP ) ; - } - else - { - return 0 ; - } -} -/** - * \brief Read the unique ID. - * - * \param uniqueID pointer on a 4bytes char containing the unique ID value. - * \returns 0 if successful; otherwise returns an error code. - */ -extern uint32_t FLASHD_ReadUniqueID( uint32_t* pdwUniqueID ) -{ - uint32_t dwError ; - - assert( pdwUniqueID != NULL ) ; - - pdwUniqueID[0] = 0 ; - pdwUniqueID[1] = 0 ; - pdwUniqueID[2] = 0 ; - pdwUniqueID[3] = 0 ; - - EFC_StartCommand( EFC, EFC_FCMD_STUI, 0 ) ; - - pdwUniqueID[0] = *(uint32_t*) IFLASH_ADDR; - pdwUniqueID[1] = *(uint32_t*)(IFLASH_ADDR + 4) ; - pdwUniqueID[2] = *(uint32_t*)(IFLASH_ADDR + 8) ; - pdwUniqueID[3] = *(uint32_t*)(IFLASH_ADDR + 12) ; - - dwError = EFC_PerformCommand( EFC, EFC_FCMD_SPUI, 0, _dwUseIAP ) ; - if ( dwError ) - { - return dwError ; - } - - return 0 ; -} diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci.c deleted file mode 100644 index bcc811b9..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci.c +++ /dev/null @@ -1,262 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of High Speed MultiMedia Card Interface (HSMCI) controller, - * not using PDC nor DMA to transfer data. - * - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ -#include "chip.h" - -#include - - -/*--------------------------------------------------------------------------- - * Local macros - *---------------------------------------------------------------------------*/ - -/** Reset MCI */ -#define MCI_RESET(pMciHw) (pMciHw->HSMCI_CR = HSMCI_CR_SWRST) - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Enable MCI - * \param pMciHw Pointer to a MCI peripheral. - */ -void MCI_Enable(Hsmci *pMciHw) -{ - pMciHw->HSMCI_CR = HSMCI_CR_MCIEN; -} - -/** - * Disable MCI - * \param pMciHw Pointer to a MCI peripheral. - */ -void MCI_Disable(Hsmci *pMciHw) -{ - pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS; -} - -/** - * Initializes a MCI driver instance and the underlying peripheral. - * \param pMci Pointer to a MCI driver instance. - * \param pMciHw Pointer to a MCI peripheral. - * \param mciId MCI peripheral identifier. - */ -void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk ) -{ - unsigned short clkDiv; - - /* Initialize the MCI driver structure */ - pMci->pMciHw = pMciHw; - pMci->mciId = mciId; - pMci->semaphore = 1; - pMci->pCommand = NULL; - - /* Enable the MCI peripheral */ - PMC_EnablePeripheral( mciId ) ; - - /* Reset the MCI */ - pMciHw->HSMCI_CR = HSMCI_CR_SWRST; - - /* Disable the MCI */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS; - - /* Disable all the interrupts */ - pMciHw->HSMCI_IDR = 0xFFFFFFFF; - - /* Set the Data Timeout Register */ - pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ; - /* CSTOR ? */ - pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ; - - /* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */ - clkDiv = (dwMCk / (MCI_INITIAL_SPEED * 2)) - 1; - pMciHw->HSMCI_MR = (clkDiv | (HSMCI_MR_PWSDIV( 0x07 )) ) ; - - /* Set the SDCard Register 1-bit, slot A */ - pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ; - - /* Enable the MCI and the Power Saving */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIEN; - - /* Configure MCI */ - pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE - | ((1 << 4) & HSMCI_CFG_FERRCTRL); - - /* Disable the MCI peripheral clock. */ - PMC_DisablePeripheral(mciId); -} - -/** - * Configure the MCI CLKDIV in the MCI_MR register. The max. for MCI clock is - * MCK/2 and corresponds to CLKDIV = 0 - * \param pMci Pointer to the low level MCI driver. - * \param mciSpeed MCI clock speed in Hz, 0 will not change current speed. - * \param mck MCK to generate MCI Clock, in Hz - * \return The actual speed used, 0 for fail. - */ -uint32_t MCI_SetSpeed( Mcid* pMci, uint32_t mciSpeed, uint32_t mck ) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t mciMr; - uint32_t clkdiv; - uint8_t mciDis; - - assert(pMci); - assert(pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - mciMr = pMciHw->HSMCI_MR & (~(uint32_t)HSMCI_MR_CLKDIV_Msk); - /* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) - * divided by (2*(CLKDIV+1)) - * mciSpeed = MCK / (2*(CLKDIV+1)) */ - if (mciSpeed > 0) - { - clkdiv = (mck / 2 / mciSpeed); - /* Speed should not bigger than expired one */ - if (mciSpeed < mck/2/clkdiv) - { - clkdiv ++; - } - - if ( clkdiv > 0 ) - { - clkdiv -= 1; - } - assert( (clkdiv & 0xFFFFFF00) == 0 ) ; /* "mciSpeed too small" */ - } - else - { - clkdiv = 0 ; - } - - /* Actual MCI speed */ - mciSpeed = mck / 2 / (clkdiv + 1); - /* Modify MR */ - pMciHw->HSMCI_MR = mciMr | clkdiv; - if ( mciDis ) - { - PMC_DisablePeripheral( pMci->mciId ) ; - } - - return (mciSpeed); -} - -/** - * Configure the MCI_CFG to enable the HS mode - * \param pMci Pointer to the low level MCI driver. - * \param hsEnable 1 to enable, 0 to disable HS mode. - */ -uint8_t MCI_EnableHsMode(Mcid* pMci, uint8_t hsEnable) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t cfgr; - uint8_t mciDis; - uint8_t rc = 0; - - assert(pMci); - assert(pMci->pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - cfgr = pMciHw->HSMCI_CFG; - if (hsEnable == 1) - { - cfgr |= HSMCI_CFG_HSMODE; - } - else - { - if (hsEnable == 0) - { - cfgr &= ~(uint32_t)HSMCI_CFG_HSMODE; - } - else - { - rc = ((cfgr & HSMCI_CFG_HSMODE) != 0); - } - } - - pMciHw->HSMCI_CFG = cfgr; - if (mciDis) - { - PMC_DisablePeripheral(pMci->mciId); - } - - return rc; -} - -/** - * Configure the MCI SDCBUS in the MCI_SDCR register. Only two modes available - * - * \param pMci Pointer to the low level MCI driver. - * \param busWidth MCI bus width mode. 00: 1-bit, 10: 4-bit, 11: 8-bit. - */ -uint32_t MCI_SetBusWidth(Mcid*pMci, uint32_t busWidth) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t mciSdcr; - uint8_t mciDis; - - assert(pMci); - assert(pMci->pMciHw); - - if( (busWidth != HSMCI_SDCR_SDCBUS_1) && (busWidth != HSMCI_SDCR_SDCBUS_4) && (busWidth != HSMCI_SDCR_SDCBUS_8) ) - { - return (uint32_t)-1; - } - - busWidth &= HSMCI_SDCR_SDCBUS_Msk ; - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - mciSdcr = (pMciHw->HSMCI_SDCR & ~(uint32_t)(HSMCI_SDCR_SDCBUS_Msk)); - pMciHw->HSMCI_SDCR = mciSdcr | busWidth; - - if (mciDis) - { - PMC_DisablePeripheral(pMci->mciId); - } - - return 0; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci_pdc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci_pdc.c deleted file mode 100644 index 9f794cce..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/hsmci_pdc.c +++ /dev/null @@ -1,305 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of High Speed MultiMedia Card Interface (HSMCI) controller, - * using PDC to transfer data. - * - */ -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*--------------------------------------------------------------------------- - * Local macros - *---------------------------------------------------------------------------*/ - -/** Reset MCI */ -#define MCI_RESET(pMciHw) (pMciHw->HSMCI_CR = HSMCI_CR_SWRST) - - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Enable MCI - * \param pMciHw Pointer to a MCI peripheral. - */ -void MCI_Enable(Hsmci *pMciHw) -{ - pMciHw->HSMCI_CR = HSMCI_CR_MCIEN; -} - -/** - * Disable MCI - * \param pMciHw Pointer to a MCI peripheral. - */ -void MCI_Disable(Hsmci *pMciHw) -{ - pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS; -} - -/** - * Initializes a MCI driver instance and the underlying peripheral. - * \param pMci Pointer to a MCI driver instance. - * \param pMciHw Pointer to a MCI peripheral. - * \param mciId MCI peripheral identifier. - */ -void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk ) -{ - unsigned short clkDiv; - - /* Initialize the MCI driver structure */ - pMci->pMciHw = pMciHw; - pMci->mciId = mciId; - pMci->semaphore = 1; - pMci->pCommand = NULL; - - /* Enable the MCI peripheral */ - PMC_EnablePeripheral( mciId ) ; - - /* Reset the MCI */ - pMciHw->HSMCI_CR = HSMCI_CR_SWRST; - - /* Disable the MCI */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIDIS | HSMCI_CR_PWSDIS; - - /* Disable all the interrupts */ - pMciHw->HSMCI_IDR = 0xFFFFFFFF; - - /* Set the Data Timeout Register */ - pMciHw->HSMCI_DTOR = HSMCI_DTOR_DTOCYC_Msk | HSMCI_DTOR_DTOMUL_Msk ; - /* CSTOR ? */ - pMciHw->HSMCI_CSTOR = HSMCI_CSTOR_CSTOCYC_Msk | HSMCI_CSTOR_CSTOMUL_Msk ; - - /* Set the Mode Register: 400KHz for MCK = 48MHz (CLKDIV = 58) */ - clkDiv = (dwMCk / (MCI_INITIAL_SPEED * 2)) - 1; - pMciHw->HSMCI_MR = (clkDiv | (HSMCI_MR_PWSDIV( 0x07 )) ) ; - - /* Set the SDCard Register 1-bit, slot A */ - pMciHw->HSMCI_SDCR = HSMCI_SDCR_SDCSEL_SLOTA | HSMCI_SDCR_SDCBUS_1 ; - - /* Enable the MCI and the Power Saving */ - pMciHw->HSMCI_CR = HSMCI_CR_MCIEN; - - /* Configure MCI */ - pMciHw->HSMCI_CFG = HSMCI_CFG_FIFOMODE - | ((1 << 4) & HSMCI_CFG_FERRCTRL); - - /* Disable the MCI peripheral clock. */ - PMC_DisablePeripheral(mciId); -} - -/** - * Reset MCI HW interface and disable it. - * \param keepSettings Keep old register settings, including - * _MR, _SDCR, _DTOR, _CSTOR, _DMA and _CFG. - */ -void MCI_Reset(Mcid *pMci, uint8_t keepSettings) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint8_t mciDis; - - assert(pMci); - assert(pMci->pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - if (keepSettings) - { - uint32_t mr, sdcr, dtor, cstor; - uint32_t cfg; - mr = pMciHw->HSMCI_MR; - sdcr = pMciHw->HSMCI_SDCR; - dtor = pMciHw->HSMCI_DTOR; - cstor = pMciHw->HSMCI_CSTOR; - cfg = pMciHw->HSMCI_CFG; - MCI_RESET(pMciHw); - MCI_Disable(pMciHw); - pMciHw->HSMCI_MR = mr; - pMciHw->HSMCI_SDCR = sdcr; - pMciHw->HSMCI_DTOR = dtor; - pMciHw->HSMCI_CSTOR = cstor; - pMciHw->HSMCI_CFG = cfg; - } - else - { - MCI_RESET(pMciHw); - MCI_Disable(pMciHw); - } - if ( mciDis ) - { - PMC_DisablePeripheral( pMci->mciId ) ; - } -} - -/** - * Configure the MCI CLKDIV in the MCI_MR register. The max. for MCI clock is - * MCK/2 and corresponds to CLKDIV = 0 - * \param pMci Pointer to the low level MCI driver. - * \param mciSpeed MCI clock speed in Hz, 0 will not change current speed. - * \param mck MCK to generate MCI Clock, in Hz - * \return The actual speed used, 0 for fail. - */ -uint32_t MCI_SetSpeed( Mcid* pMci, uint32_t mciSpeed, uint32_t mck ) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t mciMr; - uint32_t clkdiv; - uint8_t mciDis; - - assert(pMci); - assert(pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - mciMr = pMciHw->HSMCI_MR & (~(uint32_t)HSMCI_MR_CLKDIV_Msk); - /* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK) - * divided by (2*(CLKDIV+1)) - * mciSpeed = MCK / (2*(CLKDIV+1)) */ - if (mciSpeed > 0) - { - clkdiv = (mck / 2 / mciSpeed); - /* Speed should not bigger than expired one */ - if (mciSpeed < mck/2/clkdiv) - { - clkdiv ++; - } - - if ( clkdiv > 0 ) - { - clkdiv -= 1; - } - assert( (clkdiv & 0xFFFFFF00) == 0 ) ; /* "mciSpeed too small" */ - } - else - { - clkdiv = 0 ; - } - - /* Actual MCI speed */ - mciSpeed = mck / 2 / (clkdiv + 1); - /* Modify MR */ - pMciHw->HSMCI_MR = mciMr | clkdiv; - if ( mciDis ) - { - PMC_DisablePeripheral( pMci->mciId ) ; - } - - return (mciSpeed); -} - -/** - * Configure the MCI_CFG to enable the HS mode - * \param pMci Pointer to the low level MCI driver. - * \param hsEnable 1 to enable, 0 to disable HS mode. - */ -uint8_t MCI_EnableHsMode(Mcid* pMci, uint8_t hsEnable) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t cfgr; - uint8_t mciDis; - uint8_t rc = 0; - - assert(pMci); - assert(pMci->pMciHw); - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - cfgr = pMciHw->HSMCI_CFG; - if (hsEnable == 1) - { - cfgr |= HSMCI_CFG_HSMODE; - } - else - { - if (hsEnable == 0) - { - cfgr &= ~(uint32_t)HSMCI_CFG_HSMODE; - } - else - { - rc = ((cfgr & HSMCI_CFG_HSMODE) != 0); - } - } - - pMciHw->HSMCI_CFG = cfgr; - if (mciDis) - { - PMC_DisablePeripheral(pMci->mciId); - } - - return rc; -} - -/** - * Configure the MCI SDCBUS in the MCI_SDCR register. Only two modes available - * - * \param pMci Pointer to the low level MCI driver. - * \param busWidth MCI bus width mode. 00: 1-bit, 10: 4-bit, 11: 8-bit. - */ -uint32_t MCI_SetBusWidth(Mcid*pMci, uint32_t busWidth) -{ - Hsmci *pMciHw = pMci->pMciHw; - uint32_t mciSdcr; - uint8_t mciDis; - - assert(pMci); - assert(pMci->pMciHw); - - if( (busWidth != HSMCI_SDCR_SDCBUS_1) && (busWidth != HSMCI_SDCR_SDCBUS_4) && (busWidth != HSMCI_SDCR_SDCBUS_8) ) - { - return (uint32_t)-1; - } - - busWidth &= HSMCI_SDCR_SDCBUS_Msk ; - - PMC_EnablePeripheral(pMci->mciId); - mciDis = PMC_IsPeriphEnabled(pMci->mciId); - - mciSdcr = (pMciHw->HSMCI_SDCR & ~(uint32_t)(HSMCI_SDCR_SDCBUS_Msk)); - pMciHw->HSMCI_SDCR = mciSdcr | busWidth; - - if (mciDis) - { - PMC_DisablePeripheral(pMci->mciId); - } - - return 0; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/pwmc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/pwmc.c deleted file mode 100644 index 6e367951..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/pwmc.c +++ /dev/null @@ -1,608 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup pwm_module Working with PWM - * The PWM driver provides the interface to configure and use the PWM - * peripheral. - * - * The PWM macrocell controls square output waveforms of 4 channels. - * Characteristics of output waveforms such as period, duty-cycle, - * dead-time can be configured.\n - * Some of PWM channels can be linked together as synchronous channel and - * duty-cycle of synchronous channels can be updated by PDC automaticly. - * - * Before enabling the channels, they must have been configured first. - * The main settings include: - *
    - *
  • Configuration of the clock generator.
    • - *
  • Selection of the clock for each channel.
    • - *
  • Configuration of output waveform characteristics, such as period, duty-cycle etc.
    • - *
  • Configuration for synchronous channels if needed.
    • - * - Selection of the synchronous channels. - * - Selection of the moment when the WRDY flag and the corresponding PDC - * transfer request are set (PTRM and PTRCS in the PWM_SCM register). - * - Configuration of the update mode (UPDM in the PWM_SCM register). - * - Configuration of the update period (UPR in the PWM_SCUP register). - *
- * - * After the channels is enabled, the user must use respective update registers - * to change the wave characteristics to prevent unexpected output waveform. - * i.e. PWM_CDTYUPDx register should be used if user want to change duty-cycle - * when the channel is enabled. - * - * For more accurate information, please look at the PWM section of the - * Datasheet. - * - * Related files :\n - * \ref pwmc.c\n - * \ref pwmc.h.\n - */ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of the Pulse Width Modulation Controller (PWM) peripheral. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include -#include - -/*---------------------------------------------------------------------------- - * Local functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Finds a prescaler/divisor couple to generate the desired frequency - * from MCK. - * - * Returns the value to enter in PWM_CLK or 0 if the configuration cannot be - * met. - * - * \param frequency Desired frequency in Hz. - * \param mck Master clock frequency in Hz. - */ -static uint16_t FindClockConfiguration( - uint32_t frequency, - uint32_t mck) -{ - uint32_t divisors[11] = {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024}; - uint8_t divisor = 0; - uint32_t prescaler; - - assert(frequency < mck); - - /* Find prescaler and divisor values */ - prescaler = (mck / divisors[divisor]) / frequency; - while ((prescaler > 255) && (divisor < 11)) { - - divisor++; - prescaler = (mck / divisors[divisor]) / frequency; - } - - /* Return result */ - if ( divisor < 11 ) - { - TRACE_DEBUG( "Found divisor=%u and prescaler=%u for freq=%uHz\n\r", divisors[divisor], prescaler, frequency ) ; - - return prescaler | (divisor << 8) ; - } - else - { - return 0 ; - } -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures PWM a channel with the given parameters, basic configure function. - * - * The PWM controller must have been clocked in the PMC prior to calling this - * function. - * Beware: this function disables the channel. It waits until disable is effective. - * - * \param channel Channel number. - * \param prescaler Channel prescaler. - * \param alignment Channel alignment. - * \param polarity Channel polarity. - */ -void PWMC_ConfigureChannel( - Pwm* pPwm, - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity) -{ - pPwm->PWM_CH_NUM[0].PWM_CMR = 1; - -// assert(prescaler < PWM_CMR0_CPRE_MCKB); - assert((alignment & (uint32_t)~PWM_CMR_CALG) == 0); - assert((polarity & (uint32_t)~PWM_CMR_CPOL) == 0); - - /* Disable channel (effective at the end of the current period) */ - if ((pPwm->PWM_SR & (1 << channel)) != 0) { - pPwm->PWM_DIS = 1 << channel; - while ((pPwm->PWM_SR & (1 << channel)) != 0); - } - - /* Configure channel */ - pPwm->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity; -} - -/** - * \brief Configures PWM a channel with the given parameters, extend configure function. - * - * The PWM controller must have been clocked in the PMC prior to calling this - * function. - * Beware: this function disables the channel. It waits until disable is effective. - * - * \param channel Channel number. - * \param prescaler Channel prescaler. - * \param alignment Channel alignment. - * \param polarity Channel polarity. - * \param countEventSelect Channel counter event selection. - * \param DTEnable Channel dead time generator enable. - * \param DTHInverte Channel Dead-Time PWMHx output Inverted. - * \param DTLInverte Channel Dead-Time PWMHx output Inverted. - */ -void PWMC_ConfigureChannelExt( - Pwm* pPwm, - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity, - uint32_t countEventSelect, - uint32_t DTEnable, - uint32_t DTHInverte, - uint32_t DTLInverte) -{ -// assert(prescaler < PWM_CMR0_CPRE_MCKB); - assert((alignment & (uint32_t)~PWM_CMR_CALG) == 0); - assert((polarity & (uint32_t)~PWM_CMR_CPOL) == 0); - assert((countEventSelect & (uint32_t)~PWM_CMR_CES) == 0); - assert((DTEnable & (uint32_t)~PWM_CMR_DTE) == 0); - assert((DTHInverte & (uint32_t)~PWM_CMR_DTHI) == 0); - assert((DTLInverte & (uint32_t)~PWM_CMR_DTLI) == 0); - - /* Disable channel (effective at the end of the current period) */ - if ((pPwm->PWM_SR & (1 << channel)) != 0) { - pPwm->PWM_DIS = 1 << channel; - while ((pPwm->PWM_SR & (1 << channel)) != 0); - } - - /* Configure channel */ - pPwm->PWM_CH_NUM[channel].PWM_CMR = prescaler | alignment | polarity | - countEventSelect | DTEnable | DTHInverte | DTLInverte; -} - -/** - * \brief Configures PWM clocks A & B to run at the given frequencies. - * - * This function finds the best MCK divisor and prescaler values automatically. - * - * \param clka Desired clock A frequency (0 if not used). - * \param clkb Desired clock B frequency (0 if not used). - * \param mck Master clock frequency. - */ -void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck) -{ - uint32_t mode = 0; - uint32_t result; - - /* Clock A */ - if (clka != 0) { - - result = FindClockConfiguration(clka, mck); - assert( result != 0 ) ; - mode |= result; - } - - /* Clock B */ - if (clkb != 0) { - - result = FindClockConfiguration(clkb, mck); - assert( result != 0 ) ; - mode |= (result << 16); - } - - /* Configure clocks */ - TRACE_DEBUG( "Setting PWM_CLK = 0x%08X\n\r", mode ) ; - PWM->PWM_CLK = mode; -} - -/** - * \brief Sets the period value used by a PWM channel. - * - * This function writes directly to the CPRD register if the channel is disabled; - * otherwise, it uses the update register CPRDUPD. - * - * \param channel Channel number. - * \param period Period value. - */ -void PWMC_SetPeriod( Pwm* pPwm, uint8_t channel, uint16_t period) -{ - /* If channel is disabled, write to CPRD */ - if ((pPwm->PWM_SR & (1 << channel)) == 0) { - - pPwm->PWM_CH_NUM[channel].PWM_CPRD = period; - } - /* Otherwise use update register */ - else { - - pPwm->PWM_CH_NUM[channel].PWM_CPRDUPD = period; - } -} - -/** - * \brief Sets the duty cycle used by a PWM channel. - * This function writes directly to the CDTY register if the channel is disabled; - * otherwise it uses the update register CDTYUPD. - * Note that the duty cycle must always be inferior or equal to the channel - * period. - * - * \param channel Channel number. - * \param duty Duty cycle value. - */ -void PWMC_SetDutyCycle( Pwm* pPwm, uint8_t channel, uint16_t duty) -{ - assert(duty <= pPwm->PWM_CH_NUM[channel].PWM_CPRD); - - /* If channel is disabled, write to CDTY */ - if ((pPwm->PWM_SR & (1 << channel)) == 0) { - - pPwm->PWM_CH_NUM[channel].PWM_CDTY = duty; - } - /* Otherwise use update register */ - else { - - pPwm->PWM_CH_NUM[channel].PWM_CDTYUPD = duty; - } -} - -/** - * \brief Sets the dead time used by a PWM channel. - * This function writes directly to the DT register if the channel is disabled; - * otherwise it uses the update register DTUPD. - * Note that the dead time must always be inferior or equal to the channel - * period. - * - * \param channel Channel number. - * \param timeH Dead time value for PWMHx output. - * \param timeL Dead time value for PWMLx output. - */ -void PWMC_SetDeadTime( Pwm* pPwm, uint8_t channel, uint16_t timeH, uint16_t timeL) -{ - assert(timeH <= pPwm->PWM_CH_NUM[channel].PWM_CPRD); - assert(timeL <= pPwm->PWM_CH_NUM[channel].PWM_CPRD); - - /* If channel is disabled, write to DT */ - if ((pPwm->PWM_SR & (1 << channel)) == 0) { - - pPwm->PWM_CH_NUM[channel].PWM_DT = timeH | (timeL << 16); - } - /* Otherwise use update register */ - else { - pPwm->PWM_CH_NUM[channel].PWM_DTUPD = timeH | (timeL << 16); - } -} - -/** - * \brief Configures Syncronous channel with the given parameters. - * Beware: At this time, the channels should be disabled. - * - * \param channels Bitwise OR of Syncronous channels. - * \param updateMode Syncronous channel update mode. - * \param requestMode PDC transfer request mode. - * \param requestComparisonSelect PDC transfer request comparison selection. - */ -void PWMC_ConfigureSyncChannel( Pwm* pPwm, - uint32_t channels, - uint32_t updateMode, - uint32_t requestMode, - uint32_t requestComparisonSelect) -{ - pPwm->PWM_SCM = channels | updateMode | requestMode | requestComparisonSelect; -} - -/** - * \brief Sets the update period of the synchronous channels. - * This function writes directly to the SCUP register if the channel #0 is disabled; - * otherwise it uses the update register SCUPUPD. - * - * \param period update period. - */ -void PWMC_SetSyncChannelUpdatePeriod( Pwm* pPwm, uint8_t period) -{ - /* If channel is disabled, write to SCUP */ - if ((pPwm->PWM_SR & (1 << 0)) == 0) { - - pPwm->PWM_SCUP = period; - } - /* Otherwise use update register */ - else { - - pPwm->PWM_SCUPUPD = period; - } -} - -/** - * \brief Sets synchronous channels update unlock. - * - * Note: If the UPDM field is set to 0, writing the UPDULOCK bit to 1 - * triggers the update of the period value, the duty-cycle and - * the dead-time values of synchronous channels at the beginning - * of the next PWM period. If the field UPDM is set to 1 or 2, - * writing the UPDULOCK bit to 1 triggers only the update of - * the period value and of the dead-time values of synchronous channels. - * This bit is automatically reset when the update is done. - */ -void PWMC_SetSyncChannelUpdateUnlock( Pwm* pPwm ) -{ - pPwm->PWM_SCUC = PWM_SCUC_UPDULOCK; -} - -/** - * \brief Enables the given PWM channel. - * - * This does NOT enable the corresponding pin;this must be done in the user code. - * - * \param channel Channel number. - */ -void PWMC_EnableChannel( Pwm* pPwm, uint8_t channel) -{ - pPwm->PWM_ENA = 1 << channel; -} - -/** - * \brief Disables the given PWM channel. - * - * Beware, channel will be effectively disabled at the end of the current period. - * Application can check channel is disabled using the following wait loop: - * while ((PWM->PWM_SR & (1 << channel)) != 0); - * - * \param channel Channel number. - */ -void PWMC_DisableChannel( Pwm* pPwm, uint8_t channel) -{ - pPwm->PWM_DIS = 1 << channel; -} - -/** - * \brief Enables the period interrupt for the given PWM channel. - * - * \param channel Channel number. - */ -void PWMC_EnableChannelIt( Pwm* pPwm, uint8_t channel) -{ - pPwm->PWM_IER1 = 1 << channel; -} - -/** - * \brief Disables the period interrupt for the given PWM channel. - * - * \param channel Channel number. - */ -void PWMC_DisableChannelIt( Pwm* pPwm, uint8_t channel) -{ - pPwm->PWM_IDR1 = 1 << channel; -} - -/** - * \brief Enables the selected interrupts sources on a PWMC peripheral. - * - * \param sources1 Bitwise OR of selected interrupt sources of PWM_IER1. - * \param sources2 Bitwise OR of selected interrupt sources of PWM_IER2. - */ -void PWMC_EnableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2) -{ - pPwm->PWM_IER1 = sources1; - pPwm->PWM_IER2 = sources2; -} - -/** - * \brief Disables the selected interrupts sources on a PWMC peripheral. - * - * \param sources1 Bitwise OR of selected interrupt sources of PWM_IDR1. - * \param sources2 Bitwise OR of selected interrupt sources of PWM_IDR2. - */ -void PWMC_DisableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2) -{ - pPwm->PWM_IDR1 = sources1; - pPwm->PWM_IDR2 = sources2; -} - -/** - * \brief Sends the contents of buffer through a PWMC peripheral, using the PDC to - * take care of the transfer. - * - * Note: Duty cycle of syncronous channels can update by PDC - * when the field UPDM (Update Mode) in the PWM_SCM register is set to 2. - * - * \param pwmc Pointer to an Pwm instance. - * \param buffer Data buffer to send. - * \param length Length of the data buffer. - */ -uint8_t PWMC_WriteBuffer(Pwm *pwmc, - void *buffer, - uint32_t length) -{ - /* Check if first bank is free */ - if (pwmc->PWM_TCR == 0) { - - pwmc->PWM_TPR = (uint32_t) buffer; - pwmc->PWM_TCR = length; - pwmc->PWM_PTCR = PERIPH_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free */ - else if (pwmc->PWM_TNCR == 0) { - - pwmc->PWM_TNPR = (uint32_t) buffer; - pwmc->PWM_TNCR = length; - return 1; - } - - /* No free banks */ - return 0; -} - -/** - * \brief Set PWM output override value. - * - * \param value Bitwise OR of output override value. - */ -void PWMC_SetOverrideValue( Pwm* pPwm, uint32_t value) -{ - pPwm->PWM_OOV = value; -} - -/** - * \brief Enalbe override output. - * - * \param value Bitwise OR of output selection. - * \param sync 0: enable the output asyncronously, 1: enable it syncronously - */ -void PWMC_EnableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync) -{ - if (sync) { - - pPwm->PWM_OSSUPD = value; - } else { - - pPwm->PWM_OSS = value; - } -} - -/** - * \brief Disalbe override output. - * - * \param value Bitwise OR of output selection. - * \param sync 0: enable the output asyncronously, 1: enable it syncronously - */ -void PWMC_DisableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync) -{ - if (sync) { - - pPwm->PWM_OSCUPD = value; - } else { - - pPwm->PWM_OSC = value; - } -} - -/** - * \brief Set PWM fault mode. - * - * \param mode Bitwise OR of fault mode. - */ -void PWMC_SetFaultMode( Pwm* pPwm, uint32_t mode) -{ - pPwm->PWM_FMR = mode; -} - -/** - * \brief PWM fault clear. - * - * \param fault Bitwise OR of fault to clear. - */ -void PWMC_FaultClear( Pwm* pPwm, uint32_t fault) -{ - pPwm->PWM_FCR = fault; -} - -/** - * \brief Set PWM fault protection value. - * - * \param value Bitwise OR of fault protection value. - */ -void PWMC_SetFaultProtectionValue( Pwm* pPwm, uint32_t value) -{ - pPwm->PWM_FPV = value; -} - -/** - * \brief Enable PWM fault protection. - * - * \param value Bitwise OR of FPEx[y]. - */ -void PWMC_EnableFaultProtection( Pwm* pPwm, uint32_t value) -{ - pPwm->PWM_FPE = value; -} - -/** - * \brief Configure comparison unit. - * - * \param x comparison x index - * \param value comparison x value. - * \param mode comparison x mode - */ -void PWMC_ConfigureComparisonUnit( Pwm* pPwm, uint32_t x, uint32_t value, uint32_t mode) -{ - assert(x < 8); - - /* If channel is disabled, write to CMPxM & CMPxV */ - if ((pPwm->PWM_SR & (1 << 0)) == 0) { - pPwm->PWM_CMP[x].PWM_CMPxM = mode; - pPwm->PWM_CMP[x].PWM_CMPxV = value; - } - /* Otherwise use update register */ - else { - pPwm->PWM_CMP[x].PWM_CMPxMUPD = mode; - pPwm->PWM_CMP[x].PWM_CMPxVUPD = value; - } -} - -/** - * \brief Configure event line mode. - * - * \param x Line x - * \param mode Bitwise OR of line mode selection - */ -void PWMC_ConfigureEventLineMode( Pwm* pPwm, uint32_t x, uint32_t mode) -{ - assert(x < 2); - - if (x == 0) { - pPwm->PWM_ELxMR[0] = mode; - } else if (x == 1) { - pPwm->PWM_ELxMR[1] = mode; - } -} diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/rtc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/rtc.c deleted file mode 100644 index 60ab3ef2..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/rtc.c +++ /dev/null @@ -1,464 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup rtc_module Working with RTC - * The RTC driver provides the interface to configure and use the RTC - * peripheral. - * - * It manages date, time, and alarms.\n - * This timer is clocked by the 32kHz system clock, and is not impacted by - * power management settings (PMC). To be accurate, it is better to use an - * external 32kHz crystal instead of the internal 32kHz RC.\n - * - * It uses BCD format, and time can be set in AM/PM or 24h mode through a - * configuration bit in the mode register.\n - * - * To update date or time, the user has to follow these few steps : - *
    - *
  • Set UPDTIM and/or UPDCAL bit(s) in RTC_CR,
    • - *
  • Polling or IRQ on the ACKUPD bit of RTC_CR,
    • - *
  • Clear ACKUPD bit in RTC_SCCR,
    • - *
  • Update Time and/or Calendar values in RTC_TIMR/RTC_CALR (BCD format),
    • - *
  • Clear UPDTIM and/or UPDCAL bit in RTC_CR.
    • - *
- * An alarm can be set to happen on month, date, hours, minutes or seconds, - * by setting the proper "Enable" bit of each of these fields in the Time and - * Calendar registers. - * This allows a large number of configurations to be available for the user. - * Alarm occurence can be detected even by polling or interrupt. - * - * A check of the validity of the date and time format and values written by the user is automatically done. - * Errors are reported through the Valid Entry Register. - * - * For more accurate information, please look at the RTC section of the - * Datasheet. - * - * Related files :\n - * \ref rtc.c\n - * \ref rtc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Real Time Clock (RTC) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Sets the RTC in either 12 or 24 hour mode. - * - * \param mode Hour mode. - */ -extern void RTC_SetHourMode( Rtc* pRtc, uint32_t dwMode ) -{ - assert((dwMode & 0xFFFFFFFE) == 0); - - pRtc->RTC_MR = dwMode ; -} - -/** - * \brief Gets the RTC mode. - * - * \return Hour mode. - */ -extern uint32_t RTC_GetHourMode( Rtc* pRtc ) -{ - uint32_t dwMode ; - - TRACE_DEBUG( "RTC_SetHourMode()\n\r" ) ; - - dwMode = pRtc->RTC_MR; - dwMode &= 0xFFFFFFFE; - - return dwMode ; -} - -/** - * \brief Enables the selected interrupt sources of the RTC. - * - * \param sources Interrupt sources to enable. - */ -extern void RTC_EnableIt( Rtc* pRtc, uint32_t dwSources ) -{ - assert((dwSources & (uint32_t)(~0x1F)) == 0); - - TRACE_DEBUG( "RTC_EnableIt()\n\r" ) ; - - pRtc->RTC_IER = dwSources ; -} - -/** -* \brief Disables the selected interrupt sources of the RTC. -* -* \param sources Interrupt sources to disable. -*/ -extern void RTC_DisableIt( Rtc* pRtc, uint32_t dwSources ) -{ - assert((dwSources & (uint32_t)(~0x1F)) == 0); - - TRACE_DEBUG( "RTC_DisableIt()\n\r" ) ; - - pRtc->RTC_IDR = dwSources ; -} - -/** - * \brief Sets the current time in the RTC. - * - * \note In successive update operations, the user must wait at least one second - * after resetting the UPDTIM/UPDCAL bit in the RTC_CR before setting these - * bits again. Please look at the RTC section of the datasheet for detail. - * - * \param ucHour Current hour in 12 or 24 hour mode. - * \param ucMinute Current minute. - * \param ucSecond Current second. - * - * \return 0 sucess, 1 fail to set - */ -extern int RTC_SetTime( Rtc* pRtc, uint8_t ucHour, uint8_t ucMinute, uint8_t ucSecond ) -{ - uint32_t dwTime=0 ; - uint8_t ucHour_bcd ; - uint8_t ucMin_bcd ; - uint8_t ucSec_bcd ; - - TRACE_DEBUG( "RTC_SetTime(%02d:%02d:%02d)\n\r", ucHour, ucMinute, ucSecond ) ; - - /* if 12-hour mode, set AMPM bit */ - if ( (pRtc->RTC_MR & RTC_MR_HRMOD) == RTC_MR_HRMOD ) - { - if ( ucHour > 12 ) - { - ucHour -= 12 ; - dwTime |= RTC_TIMR_AMPM ; - } - } - ucHour_bcd = (ucHour%10) | ((ucHour/10)<<4) ; - ucMin_bcd = (ucMinute%10) | ((ucMinute/10)<<4) ; - ucSec_bcd = (ucSecond%10) | ((ucSecond/10)<<4) ; - - /* value overflow */ - if ( (ucHour_bcd & (uint8_t)(~RTC_HOUR_BIT_LEN_MASK)) | - (ucMin_bcd & (uint8_t)(~RTC_MIN_BIT_LEN_MASK)) | - (ucSec_bcd & (uint8_t)(~RTC_SEC_BIT_LEN_MASK))) - { - return 1 ; - } - - dwTime = ucSec_bcd | (ucMin_bcd << 8) | (ucHour_bcd<<16) ; - - pRtc->RTC_CR |= RTC_CR_UPDTIM ; - while ((pRtc->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD) ; - pRtc->RTC_SCCR = RTC_SCCR_ACKCLR ; - pRtc->RTC_TIMR = dwTime ; - pRtc->RTC_CR &= (uint32_t)(~RTC_CR_UPDTIM) ; - pRtc->RTC_SCCR |= RTC_SCCR_SECCLR ; - - return (int)(pRtc->RTC_VER & RTC_VER_NVTIM) ; -} - -/** - * \brief Retrieves the current time as stored in the RTC in several variables. - * - * \param pucHour If not null, current hour is stored in this variable. - * \param pucMinute If not null, current minute is stored in this variable. - * \param pucSecond If not null, current second is stored in this variable. - */ -extern void RTC_GetTime( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) -{ - uint32_t dwTime ; - - TRACE_DEBUG( "RTC_GetTime()\n\r" ) ; - - /* Get current RTC time */ - dwTime = pRtc->RTC_TIMR ; - while ( dwTime != pRtc->RTC_TIMR ) - { - dwTime = pRtc->RTC_TIMR ; - } - - /* Hour */ - if ( pucHour ) - { - *pucHour = ((dwTime & 0x00300000) >> 20) * 10 - + ((dwTime & 0x000F0000) >> 16); - - if ( (dwTime & RTC_TIMR_AMPM) == RTC_TIMR_AMPM ) - { - *pucHour += 12 ; - } - } - - /* Minute */ - if ( pucMinute ) - { - *pucMinute = ((dwTime & 0x00007000) >> 12) * 10 - + ((dwTime & 0x00000F00) >> 8); - } - - /* Second */ - if ( pucSecond ) - { - *pucSecond = ((dwTime & 0x00000070) >> 4) * 10 - + (dwTime & 0x0000000F); - } -} - -/** - * \brief Sets a time alarm on the RTC. - * The match is performed only on the provided variables; - * Setting all pointers to 0 disables the time alarm. - * - * \note In AM/PM mode, the hour value must have bit #7 set for PM, cleared for - * AM (as expected in the time registers). - * - * \param pucHour If not null, the time alarm will hour-match this value. - * \param pucMinute If not null, the time alarm will minute-match this value. - * \param pucSecond If not null, the time alarm will second-match this value. - * - * \return 0 success, 1 fail to set - */ -extern int RTC_SetTimeAlarm( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) -{ - uint32_t dwAlarm=0 ; - - TRACE_DEBUG( "RTC_SetTimeAlarm()\n\r" ) ; - - /* Hour */ - if ( pucHour ) - { - dwAlarm |= RTC_TIMALR_HOUREN | ((*pucHour / 10) << 20) | ((*pucHour % 10) << 16); - } - - /* Minute */ - if ( pucMinute ) - { - dwAlarm |= RTC_TIMALR_MINEN | ((*pucMinute / 10) << 12) | ((*pucMinute % 10) << 8); - } - - /* Second */ - if ( pucSecond ) - { - dwAlarm |= RTC_TIMALR_SECEN | ((*pucSecond / 10) << 4) | (*pucSecond % 10); - } - - pRtc->RTC_TIMALR = dwAlarm ; - - return (int)(pRtc->RTC_VER & RTC_VER_NVTIMALR) ; -} - -/** - * \brief Retrieves the current year, month and day from the RTC. - * Month, day and week values are numbered starting at 1. - * - * \param pYwear Current year (optional). - * \param pucMonth Current month (optional). - * \param pucDay Current day (optional). - * \param pucWeek Current day in current week (optional). - */ -extern void RTC_GetDate( Rtc* pRtc, uint16_t *pwYear, uint8_t *pucMonth, uint8_t *pucDay, uint8_t *pucWeek ) -{ - uint32_t dwDate ; - - /* Get current date (multiple reads are necessary to insure a stable value) */ - do - { - dwDate = pRtc->RTC_CALR ; - } - while ( dwDate != pRtc->RTC_CALR ) ; - - /* Retrieve year */ - if ( pwYear ) - { - *pwYear = (((dwDate >> 4) & 0x7) * 1000) - + ((dwDate & 0xF) * 100) - + (((dwDate >> 12) & 0xF) * 10) - + ((dwDate >> 8) & 0xF); - } - - /* Retrieve month */ - if ( pucMonth ) - { - *pucMonth = (((dwDate >> 20) & 1) * 10) + ((dwDate >> 16) & 0xF); - } - - /* Retrieve day */ - if ( pucDay ) - { - *pucDay = (((dwDate >> 28) & 0x3) * 10) + ((dwDate >> 24) & 0xF); - } - - /* Retrieve week */ - if ( pucWeek ) - { - *pucWeek = ((dwDate >> 21) & 0x7); - } -} - -/** - * \brief Sets the current year, month and day in the RTC. - * Month, day and week values must be numbered starting from 1. - * - * \note In successive update operations, the user must wait at least one second - * after resetting the UPDTIM/UPDCAL bit in the RTC_CR before setting these - * bits again. Please look at the RTC section of the datasheet for detail. - * - * \param wYear Current year. - * \param ucMonth Current month. - * \param ucDay Current day. - * \param ucWeek Day number in current week. - * - * \return 0 success, 1 fail to set - */ -extern int RTC_SetDate( Rtc* pRtc, uint16_t wYear, uint8_t ucMonth, uint8_t ucDay, uint8_t ucWeek ) -{ - uint32_t wDate ; - uint8_t ucCent_bcd ; - uint8_t ucYear_bcd ; - uint8_t ucMonth_bcd ; - uint8_t ucDay_bcd ; - uint8_t ucWeek_bcd ; - - ucCent_bcd = ((wYear/100)%10) | ((wYear/1000)<<4); - ucYear_bcd = (wYear%10) | (((wYear/10)%10)<<4); - ucMonth_bcd = ((ucMonth%10) | (ucMonth/10)<<4); - ucDay_bcd = ((ucDay%10) | (ucDay/10)<<4); - ucWeek_bcd = ((ucWeek%10) | (ucWeek/10)<<4); - - /* value over flow */ - if ( (ucCent_bcd & (uint8_t)(~RTC_CENT_BIT_LEN_MASK)) | - (ucYear_bcd & (uint8_t)(~RTC_YEAR_BIT_LEN_MASK)) | - (ucMonth_bcd & (uint8_t)(~RTC_MONTH_BIT_LEN_MASK)) | - (ucWeek_bcd & (uint8_t)(~RTC_WEEK_BIT_LEN_MASK)) | - (ucDay_bcd & (uint8_t)(~RTC_DATE_BIT_LEN_MASK)) - ) - { - return 1 ; - } - - - /* Convert values to date register value */ - wDate = ucCent_bcd | - (ucYear_bcd << 8) | - (ucMonth_bcd << 16) | - (ucWeek_bcd << 21) | - (ucDay_bcd << 24); - - /* Update calendar register */ - pRtc->RTC_CR |= RTC_CR_UPDCAL ; - while ((pRtc->RTC_SR & RTC_SR_ACKUPD) != RTC_SR_ACKUPD) ; - - pRtc->RTC_SCCR = RTC_SCCR_ACKCLR; - pRtc->RTC_CALR = wDate ; - pRtc->RTC_CR &= (uint32_t)(~RTC_CR_UPDCAL) ; - pRtc->RTC_SCCR |= RTC_SCCR_SECCLR; /* clear SECENV in SCCR */ - - return (int)(pRtc->RTC_VER & RTC_VER_NVCAL) ; -} - -/** - * \brief Sets a date alarm in the RTC. - * The alarm will match only the provided values; - * Passing a null-pointer disables the corresponding field match. - * - * \param pucMonth If not null, the RTC alarm will month-match this value. - * \param pucDay If not null, the RTC alarm will day-match this value. - * - * \return 0 success, 1 fail to set - */ -extern int RTC_SetDateAlarm( Rtc* pRtc, uint8_t *pucMonth, uint8_t *pucDay ) -{ - uint32_t dwAlarm ; - - dwAlarm = ((pucMonth) || (pucDay)) ? (0) : (0x01010000); - - TRACE_DEBUG( "RTC_SetDateAlarm()\n\r" ) ; - - /* Compute alarm field value */ - if ( pucMonth ) - { - dwAlarm |= RTC_CALALR_MTHEN | ((*pucMonth / 10) << 20) | ((*pucMonth % 10) << 16); - } - - if ( pucDay ) - { - dwAlarm |= RTC_CALALR_DATEEN | ((*pucDay / 10) << 28) | ((*pucDay % 10) << 24); - } - - /* Set alarm */ - pRtc->RTC_CALALR = dwAlarm ; - - return (int)(pRtc->RTC_VER & RTC_VER_NVCALALR) ; -} - -/** - * \brief Clear flag bits of status clear command register in the RTC. - * - * \param mask Bits mask of cleared events - */ -extern void RTC_ClearSCCR( Rtc* pRtc, uint32_t dwMask ) -{ - /* Clear all flag bits in status clear command register */ - dwMask &= RTC_SCCR_ACKCLR | RTC_SCCR_ALRCLR | RTC_SCCR_SECCLR | RTC_SCCR_TIMCLR | RTC_SCCR_CALCLR ; - - pRtc->RTC_SCCR = dwMask ; -} - -/** - * \brief Get flag bits of status register in the RTC. - * - * \param mask Bits mask of Status Register - * - * \return Status register & mask - */ -extern uint32_t RTC_GetSR( Rtc* pRtc, uint32_t dwMask ) -{ - uint32_t dwEvent ; - - dwEvent = pRtc->RTC_SR ; - - return (dwEvent & dwMask) ; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/rtt.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/rtt.c deleted file mode 100644 index 516a196c..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/rtt.c +++ /dev/null @@ -1,132 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup rtt_module Working with RTT - * The RTT driver provides the interface to configure and use the RTT - * peripheral. - * - * The Real-time Timer is used to count elapsed seconds.\n - * This timer is clocked by the 32kHz system clock divided by a programmable - * 16-bit balue. To be accurate, it is better to use an - * external 32kHz crystal instead of the internal 32kHz RC.\n - * - * To count elapsed seconds, the user could follow these few steps: - *
    - *
  • Programming PTPRES in RTT_MR to feeding the timer with a 1Hz signal.
    • - *
  • Writing the bit RTTRST in RTT_MR to restart the timer with new settings.
    • - *
- * - * An alarm can be set to happen on second by setting alarm value in RTT_AR. - * Alarm occurence can be detected by polling or interrupt. - * - * For more accurate information, please look at the RTT section of the - * Datasheet. - * - * Related files :\n - * \ref rtt.c\n - * \ref rtt.h.\n - */ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Real Time Timer (RTT) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Changes the prescaler value of the given RTT and restarts it. - * - * \note This function disables RTT interrupt sources. - * - * \param rtt Pointer to a Rtt instance. - * \param prescaler Prescaler value for the RTT. - */ -void RTT_SetPrescaler(Rtt *rtt, uint16_t prescaler) -{ - rtt->RTT_MR = (prescaler | RTT_MR_RTTRST); -} - -/** - * \brief Returns the current value of the RTT timer value. - * - * \param rtt Pointer to a Rtt instance. - */ -uint32_t RTT_GetTime(Rtt *rtt) -{ - return rtt->RTT_VR; -} - -/** - * \brief Enables the specified RTT interrupt sources. - * - * \param rtt Pointer to a Rtt instance. - * \param sources Bitmask of interrupts to enable. - */ -void RTT_EnableIT(Rtt *rtt, uint32_t sources) -{ - assert( (sources & 0x0004FFFF) == 0 ) ; - rtt->RTT_MR |= sources; -} - -/** - * \brief Returns the status register value of the given RTT. - * - * \param rtt Pointer to an Rtt instance. - */ -uint32_t RTT_GetStatus(Rtt *rtt) -{ - return rtt->RTT_SR; -} - -/** - * \brief Configures the RTT to generate an alarm at the given time. - * - * \param pRtt Pointer to an Rtt instance. - * \param time Alarm time. - */ -void RTT_SetAlarm(Rtt *pRtt, uint32_t time) -{ - assert(time > 0); - - pRtt->RTT_AR = time - 1; -} diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/spi_pdc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/spi_pdc.c deleted file mode 100644 index eea16ba8..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/spi_pdc.c +++ /dev/null @@ -1,251 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup spi_pdc_module SPI PDC driver - * \ingroup spi_at45_module - * The Spi driver is a low level spi driver which performs SPI device Initializes, - * spi transfer and receive. It can be used by upper SPI driver such as AT45 - * driver and AT26 driver. - * - * \section Usage - *
    - *
  • Initializes a SPI instance and the corresponding SPI hardware, - * Configure SPI in Master Mode using SPID_Configure().
    • - *
  • Configures the SPI characteristics (such as Clock Polarity, Phase, - * transfers delay and Baud Rate) for the device corresponding to the - * chip select using SPID_ConfigureCS().
    • - *
  • Starts a SPI master transfer using SPID_SendCommand(). - * The transfer is performed using the PDC channels.
    • - *
  • It enable the SPI clock.
    • - *
  • Set the corresponding peripheral chip select.
    • - *
  • Initialize the two SPI PDC buffers.
    • - *
  • Initialize SPI_TPR and SPI_TCR with SPI command data and size - * to send command data first.
    • - *
  • Initialize SPI_RPR and SPI_RCR with SPI command data and size - * as dummy value.
    • - *
  • Initialize SPI_TNPR and SPI_TNCR with rest of the data to be - * transfered.(if the data specified in cmd structure)
    • - *
  • Initialize SPI_RNPR and SPI_RNCR with rest of the data to be - * received.(if the data specified in cmd structure)
    • - *
  • Initialize the callback function if specified.
    • - *
  • Enable transmitter and receiver.
    • - *
  • Example for sending a command to the dataflash through the SPI.
    • - * \code - * /// Build command to be sent. - * ... - * // Send Command and data through the SPI - * if (SPID_SendCommand(pAt45->pSpid, pCommand)) { - * return AT45_ERROR_SPI; - * } - * \endcode - *
  • The SPI_Handler() must be called by the SPI Interrupt Service Routine - * with the corresponding Spi instance. It is invokes to check for pending - * interrupts.
    • - *
  • Example for initializing SPI interrupt handler in upper application.
    • - * \code - * AIC_ConfigureIT(AT91C_ID_SPI, 0, SPI_Handler); - * \endcode - *
- * Related files :\n - * \ref spi_pdc.c\n - * \ref spi_pdc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of SPI PDC driver. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Initializes the Spid structure and the corresponding SPI hardware. - * - * \param pSpid Pointer to a Spid instance. - * \param pSpiHw Associated SPI peripheral. - * \param spiId SPI peripheral identifier. - * \return 0. - */ -extern uint32_t SPID_Configure( Spid* pSpid, Spi* pSpiHw, uint8_t spiId ) -{ - /* Initialize the SPI structure*/ - pSpid->pSpiHw = pSpiHw ; - pSpid->spiId = spiId ; - pSpid->semaphore = 1 ; - pSpid->pCurrentCommand = 0 ; - - /* Enable the SPI clock*/ - PMC_EnablePeripheral( pSpid->spiId ) ; - - /* Configure SPI in Master Mode with No CS selected !!! */ - SPI_Configure( pSpiHw, pSpid->spiId, SPI_MR_MSTR | SPI_MR_MODFDIS | SPI_MR_PCS_Msk ) ; - - /* Enable the SPI */ - SPI_Enable( pSpiHw ) ; - - /* Disable the SPI clock */ - PMC_DisablePeripheral( pSpid->spiId ) ; - - return 0 ; -} - -/** - * \brief Configures the parameters for the device corresponding to the cs. - * - * \param pSpid Pointer to a Spid instance. - * \param cs number corresponding to the SPI chip select. - * \param csr SPI_CSR value to setup. - */ -extern void SPID_ConfigureCS( Spid* pSpid, uint32_t dwCS, uint32_t dwCSR ) -{ - SPI_ConfigureNPCS( pSpid->pSpiHw, dwCS, dwCSR ) ; -} - -/** - * \brief Starts a SPI master transfer. This is a non blocking function. It will - * return as soon as the transfer is started. - * - * \param pSpid Pointer to a Spid instance. - * \param pCommand Pointer to the SPI command to execute. - * \return 0 if the transfer has been started successfully; otherwise returns - * SPID_ERROR_LOCK is the driver is in use, or SPID_ERROR if the command is not - * valid. - */ -extern uint32_t SPID_SendCommand( Spid* pSpid, SpidCmd* pCommand ) -{ - Spi* pSpiHw = pSpid->pSpiHw ; - uint32_t dwSpiMr ; - - /* Try to get the dataflash semaphore */ - if ( pSpid->semaphore == 0 ) - { - return SPID_ERROR_LOCK ; - } - pSpid->semaphore-- ; - - /* Enable the SPI clock */ - PMC_EnablePeripheral( pSpid->spiId ) ; - - /* Disable transmitter and receiver*/ - SPI_PdcDisableRx( pSpiHw ) ; - SPI_PdcDisableTx( pSpiHw ) ; - - /* Write to the MR register*/ - dwSpiMr = pSpiHw->SPI_MR ; - dwSpiMr |= SPI_MR_PCS_Msk ; - dwSpiMr &= ~((1 << pCommand->spiCs) << 16 ) ; - pSpiHw->SPI_MR=dwSpiMr ; - - /* Initialize the two SPI PDC buffer*/ - SPI_PdcSetRx( pSpiHw, pCommand->pCmd, pCommand->cmdSize, pCommand->pData, pCommand->dataSize ) ; - SPI_PdcSetTx( pSpiHw, pCommand->pCmd, pCommand->cmdSize, pCommand->pData, pCommand->dataSize ) ; - - /* Initialize the callback*/ - pSpid->pCurrentCommand = pCommand ; - - /* Enable transmitter and receiver*/ - SPI_PdcEnableRx( pSpiHw ) ; - SPI_PdcEnableTx( pSpiHw ) ; - - /* Enable buffer complete interrupt*/ - SPI_EnableIt( pSpiHw, SPI_IER_RXBUFF ) ; - - return 0 ; -} - -/** - * \brief The SPI_Handler must be called by the SPI Interrupt Service Routine with the - * corresponding Spi instance. - * - * \note The SPI_Handler will unlock the Spi semaphore and invoke the upper application - * callback. - * \param pSpid Pointer to a Spid instance. - */ -extern void SPID_Handler( Spid* pSpid ) -{ - SpidCmd *pSpidCmd = pSpid->pCurrentCommand ; - Spi *pSpiHw = pSpid->pSpiHw ; - volatile uint32_t spiSr ; - - /* Read the status register*/ - spiSr = pSpiHw->SPI_SR ; - if ( spiSr & SPI_SR_RXBUFF ) - { - /* Disable transmitter and receiver */ - SPI_PdcDisableRx( pSpiHw ) ; - SPI_PdcDisableTx( pSpiHw ) ; - - /* Disable the SPI clock*/ - PMC_DisablePeripheral( pSpid->spiId ) ; - - /* Disable buffer complete interrupt */ - SPI_DisableIt( pSpiHw, SPI_IDR_RXBUFF ) ; - - /* Release the dataflash semaphore*/ - pSpid->semaphore++ ; - - /* Invoke the callback associated with the current command*/ - if ( pSpidCmd && pSpidCmd->callback ) - { - pSpidCmd->callback( 0, pSpidCmd->pArgument ) ; - } - - /* Nothing must be done after. A new DF operation may have been started - in the callback function.*/ - } -} - -/** - * \brief Returns 1 if the SPI driver is currently busy executing a command; otherwise - * returns 0. - * \param pSpid Pointer to a Spid instance. - */ -extern uint32_t SPID_IsBusy( const Spid* pSpid ) -{ - if ( pSpid->semaphore == 0 ) - { - return 1 ; - } - else - { - return 0 ; - } -} diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/ssc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/ssc.c deleted file mode 100644 index 44c7256a..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/ssc.c +++ /dev/null @@ -1,247 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup ssc_module Working with SSC - * The SSC driver provides the interface to configure and use the SSC - * peripheral. - * - * !Usage - * - * -# Enable the SSC interface pins. - * -# Configure the SSC to operate at a specific frequency by calling - * SSC_Configure(). This function enables the peripheral clock of the SSC, - * but not its PIOs. - * -# Configure the transmitter and/or the receiver using the - * SSC_ConfigureTransmitter() and SSC_ConfigureEmitter() functions. - * -# Enable the PIOs or the transmitter and/or the received. - * -# Enable the transmitter and/or the receiver using SSC_EnableTransmitter() - * and SSC_EnableReceiver() - * -# Send data through the transmitter using SSC_Write() and SSC_WriteBuffer() - * -# Receive data from the receiver using SSC_Read() and SSC_ReadBuffer() - * -# Disable the transmitter and/or the receiver using SSC_DisableTransmitter() - * and SSC_DisableReceiver() - * - * For more accurate information, please look at the RTC section of the - * Datasheet. - * - * Related files :\n - * \ref ssc.c\n - * \ref ssc.h.\n -*/ -/*@{*/ -/*@}*/ - - -/** - * \file - * - * Implementation of Synchronous Serial (SSC) controller. - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures a SSC peripheral.If the divided clock is not used, the master - * clock frequency can be set to 0. - * \note The emitter and transmitter are disabled by this function. - * \param bitRate bit rate. - * \param masterClock master clock. - */ -void SSC_Configure(uint32_t bitRate, uint32_t masterClock) -{ - /* Enable SSC peripheral clock */ - PMC->PMC_PCER0 = 1 << ID_SSC; - - /* Reset, disable receiver & transmitter */ - SSC->SSC_CR = SSC_CR_RXDIS | SSC_CR_TXDIS | SSC_CR_SWRST; - - SSC->SSC_PTCR = SSC_PTCR_RXTDIS | SSC_PTCR_TXTDIS; - /* Configure clock frequency */ - if (bitRate != 0) { - - SSC->SSC_CMR = masterClock / (2 * bitRate); - } - else { - - SSC->SSC_CMR = 0; - } -} - -/** - * \brief Configures the transmitter of a SSC peripheral. - * \param tcmr Transmit Clock Mode Register value. - * \param tfmr Transmit Frame Mode Register value. - */ -void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr) -{ - SSC->SSC_TCMR = tcmr; - SSC->SSC_TFMR = tfmr; -} - -/** - * \brief Configures the receiver of a SSC peripheral. - * \param rcmr Receive Clock Mode Register value. - * \param rfmr Receive Frame Mode Register value. - */ -void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr) -{ - SSC->SSC_RCMR = rcmr; - SSC->SSC_RFMR = rfmr; -} - -/** - * \brief Enables the transmitter of a SSC peripheral. - */ -void SSC_EnableTransmitter(void) -{ - SSC->SSC_CR = SSC_CR_TXEN; -} - -/** - * \brief Disables the transmitter of a SSC peripheral. - */ -void SSC_DisableTransmitter(void) -{ - SSC->SSC_CR = SSC_CR_TXDIS; -} - -/** - * \brief Enables the receiver of a SSC peripheral. - */ -void SSC_EnableReceiver(void) -{ - SSC->SSC_CR = SSC_CR_RXEN; -} - -/** - * \brief Disables the receiver of a SSC peripheral. - */ -void SSC_DisableReceiver(void) -{ - SSC->SSC_CR = SSC_CR_RXDIS; -} - -/** - * \brief Enables one or more interrupt sources of a SSC peripheral. - * \param sources Bitwise OR of selected interrupt sources. - */ -void SSC_EnableInterrupts(uint32_t sources) -{ - SSC->SSC_IER = sources; -} - -/** - * \brief Disables one or more interrupt sources of a SSC peripheral. - * \param sources Bitwise OR of selected interrupt sources. - */ -void SSC_DisableInterrupts(uint32_t sources) -{ - SSC->SSC_IDR = sources; -} - -/** - * \brief Sends one data frame through a SSC peripheral. If another frame is currently - * being sent, this function waits for the previous transfer to complete. - * \param frame Data frame to send. - */ -void SSC_Write(uint32_t frame) -{ - while ((SSC->SSC_SR & SSC_SR_TXRDY) == 0); - SSC->SSC_THR = frame; -} - -/** - * \brief Waits until one frame is received on a SSC peripheral, and returns it. - */ -uint32_t SSC_Read(void) -{ - while ((SSC->SSC_SR & SSC_SR_RXRDY) == 0); - return SSC->SSC_RHR; -} - -/** - * \brief Sends the contents of a data buffer a SSC peripheral, using the PDC. - * \param buffer Data buffer to send. - * \param length Size of the data buffer. - * \return 1 if the buffer has been queued for transmission; otherwise returns 0. - */ -uint8_t SSC_WriteBuffer(void *buffer, uint32_t length) -{ - /* Check if first bank is free*/ - if (SSC->SSC_TCR == 0) { - - SSC->SSC_TPR = (uint32_t) buffer; - SSC->SSC_TCR = length; - SSC->SSC_PTCR = SSC_PTCR_TXTEN; - return 1; - } - /* Check if second bank is free*/ - else if (SSC->SSC_TNCR == 0) { - - SSC->SSC_TNPR = (uint32_t) buffer; - SSC->SSC_TNCR = length; - return 1; - } - return 0; -} - -/** - * \brief Reads data coming from a SSC peripheral receiver and stores it into the - * giving buffer with PDC. - * \param buffer ata buffer used for reception. - * \param length Size of the data buffer. - * \return 1 if the buffer has been queued for reception; otherwise returns 0. - */ -uint8_t SSC_ReadBuffer(void *buffer, uint32_t length) -{ - /* Check if the first bank is free*/ - if (SSC->SSC_RCR == 0) { - - SSC->SSC_RPR = (uint32_t) buffer; - SSC->SSC_RCR = length; - SSC->SSC_PTCR = SSC_PTCR_RXTEN; - return 1; - } - /* Check if second bank is free*/ - else if (SSC->SSC_RNCR == 0) { - SSC->SSC_RNPR = (uint32_t) buffer; - SSC->SSC_RNCR = length; - return 1; - } - return 0; -} diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/supc.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/supc.c deleted file mode 100644 index 340bbd60..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/supc.c +++ /dev/null @@ -1,196 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -//------------------------------------------------------------------------------ -// Headers -//------------------------------------------------------------------------------ - -#include "chip.h" - -#include - -//------------------------------------------------------------------------------ -// Local definitions -//------------------------------------------------------------------------------ - -/// Key value for the SUPC_MR register. -#define SUPC_KEY ((uint32_t) (0xA5 << 24)) - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -#if !defined(__ICCARM__) -__attribute__ ((section (".ramfunc"))) // GCC -#endif -//------------------------------------------------------------------------------ -/// Enables the flash power supply with the given wake-up setting. -/// \param time Wake-up time. -//------------------------------------------------------------------------------ -void SUPC_EnableFlash( Supc* pSupc, uint32_t dwTime ) -{ - pSupc->SUPC_FWUTR = dwTime ; - pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_FLASHON ; - - while ((pSupc->SUPC_SR & AT91C_SUPC_FLASHS) != AT91C_SUPC_FLASHS) ; -} - -#if !defined(__ICCARM__) -__attribute__ ((section (".ramfunc"))) // GCC -#endif -//------------------------------------------------------------------------------ -/// Disables the flash power supply. -//------------------------------------------------------------------------------ -void SUPC_DisableFlash( Supc* pSupc ) -{ - pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_FLASHON) ; - - while ((pSupc->SUPC_SR & AT91C_SUPC_FLASHS) == AT91C_SUPC_FLASHS) ; -} - -//------------------------------------------------------------------------------ -/// Sets the voltage regulator output voltage. -/// \param voltage Voltage to set. -//------------------------------------------------------------------------------ -void SUPC_SetVoltageOutput( Supc* pSupc, uint32_t dwVoltage ) -{ - assert( (voltage & ~AT91C_SUPC_VRVDD) == 0 ) ; - - pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_VRVDD) | dwVoltage ; -} - -//------------------------------------------------------------------------------ -/// Puts the voltage regulator in deep mode. -//------------------------------------------------------------------------------ -void SUPC_EnableDeepMode( Supc* pSupc ) -{ - pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_VRDEEP ; -} - -//------------------------------------------------------------------------------ -/// Puts the voltage regulator in normal mode. -//------------------------------------------------------------------------------ -void SUPC_DisableDeepMode( Supc* pSupc ) -{ - pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_VRDEEP) ; -} - -//----------------------------------------------------------------------------- -/// Enables the backup SRAM power supply, so its data is saved while the device -/// is in backup mode. -//----------------------------------------------------------------------------- -void SUPC_EnableSram( Supc* pSupc ) -{ - pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_SRAMON ; -} - -//----------------------------------------------------------------------------- -/// Disables the backup SRAM power supply. -//----------------------------------------------------------------------------- -void SUPC_DisableSram( Supc* pSupc ) -{ - pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_SRAMON) ; -} - -//----------------------------------------------------------------------------- -/// Enables the RTC power supply. -//----------------------------------------------------------------------------- -void SUPC_EnableRtc( Supc* pSupc ) -{ - pSupc->SUPC_MR = SUPC_KEY | pSupc->SUPC_MR | AT91C_SUPC_RTCON ; - - while ((pSupc->SUPC_SR & AT91C_SUPC_RTS) != AT91C_SUPC_RTS) ; -} - -//----------------------------------------------------------------------------- -/// Disables the RTC power supply. -//----------------------------------------------------------------------------- -void SUPC_DisableRtc( Supc* pSupc ) -{ - pSupc->SUPC_MR = SUPC_KEY | (pSupc->SUPC_MR & ~AT91C_SUPC_RTCON) ; - - while ((pSupc->SUPC_SR & AT91C_SUPC_RTS) == AT91C_SUPC_RTS); -} - -//----------------------------------------------------------------------------- -/// Sets the BOD sampling mode (or disables it). -/// \param mode BOD sampling mode. -//----------------------------------------------------------------------------- -void SUPC_SetBodSampling( Supc* pSupc, uint32_t dwMode ) -{ - assert( (dwMode & ~AT91C_SUPC_BODSMPL) == 0 ) ; - - pSupc->SUPC_BOMR &= ~AT91C_SUPC_BODSMPL; - pSupc->SUPC_BOMR |= dwMode ; -} - -//------------------------------------------------------------------------------ -/// Disables the voltage regulator, which makes the device enter backup mode. -//------------------------------------------------------------------------------ -void SUPC_DisableVoltageRegulator( Supc* pSupc ) -{ - pSupc->SUPC_CR = SUPC_KEY | AT91C_SUPC_VROFF ; - - while ( 1 ) ; -} - -//------------------------------------------------------------------------------ -/// Shuts the device down so it enters Off mode. -//------------------------------------------------------------------------------ -void SUPC_Shutdown( Supc* pSupc ) -{ - pSupc->SUPC_CR = SUPC_KEY | AT91C_SUPC_SHDW ; - - while (1); -} - -//------------------------------------------------------------------------------ -/// Sets the wake-up sources when in backup mode. -/// \param sources Wake-up sources to enable. -//------------------------------------------------------------------------------ -void SUPC_SetWakeUpSources( Supc* pSupc, uint32_t dwSources ) -{ - assert( (dwSources & ~0x0000000B) == 0 ) ; - - pSupc->SUPC_WUMR &= ~0x0000000B; - pSupc->SUPC_WUMR |= dwSources ; -} - -//------------------------------------------------------------------------------ -/// Sets the wake-up inputs when in backup mode. -/// \param inputs Wake up inputs to enable. -//------------------------------------------------------------------------------ -void SUPC_SetWakeUpInputs( Supc* pSupc, uint32_t dwInputs ) -{ - assert( (dwInputs & ~0xFFFF) == 0 ) ; - - pSupc->SUPC_WUIR &= ~0xFFFF ; - pSupc->SUPC_WUIR |= dwInputs ; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/twi.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/twi.c deleted file mode 100644 index c2fec947..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/twi.c +++ /dev/null @@ -1,380 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup twi_module Working with TWI - * The TWI driver provides the interface to configure and use the TWI - * peripheral. - * - * \section Usage - *
    - *
  • Configures a TWI peripheral to operate in master mode, at the given - * frequency (in Hz) using TWI_Configure().
    • - *
  • Sends a STOP condition on the TWI using TWI_Stop().
    • - *
  • Starts a read operation on the TWI bus with the specified slave using - * TWI_StartRead(). Data must then be read using TWI_ReadByte() whenever - * a byte is available (poll using TWI_ByteReceived()).
    • - *
  • Starts a write operation on the TWI to access the selected slave using - * TWI_StartWrite(). A byte of data must be provided to start the write; - * other bytes are written next.
    • - *
  • Sends a byte of data to one of the TWI slaves on the bus using TWI_WriteByte(). - * This function must be called once before TWI_StartWrite() with the first byte of data - * to send, then it shall be called repeatedly after that to send the remaining bytes.
    • - *
  • Check if a byte has been received and can be read on the given TWI - * peripheral using TWI_ByteReceived().< - * Check if a byte has been sent using TWI_ByteSent().
    • - *
  • Check if the current transmission is complete (the STOP has been sent) - * using TWI_TransferComplete().
    • - *
  • Enables & disable the selected interrupts sources on a TWI peripheral - * using TWI_EnableIt() and TWI_DisableIt().
    • - *
  • Get current status register of the given TWI peripheral using - * TWI_GetStatus(). Get current status register of the given TWI peripheral, but - * masking interrupt sources which are not currently enabled using - * TWI_GetMaskedStatus().
    • - *
- * For more accurate information, please look at the TWI section of the - * Datasheet. - * - * Related files :\n - * \ref twi.c\n - * \ref twi.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - * - * Implementation of Two Wire Interface (TWI). - * - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * \brief Configures a TWI peripheral to operate in master mode, at the given - * frequency (in Hz). The duty cycle of the TWI clock is set to 50%. - * \param pTwi Pointer to an Twi instance. - * \param twck Desired TWI clock frequency. - * \param mck Master clock frequency. - */ -void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk ) -{ - uint32_t dwCkDiv = 0 ; - uint32_t dwClDiv ; - uint32_t dwOk = 0 ; - - TRACE_DEBUG( "TWI_ConfigureMaster()\n\r" ) ; - assert( pTwi ) ; - - /* SVEN: TWI Slave Mode Enabled */ - pTwi->TWI_CR = TWI_CR_SVEN ; - /* Reset the TWI */ - pTwi->TWI_CR = TWI_CR_SWRST ; - pTwi->TWI_RHR ; - - /* TWI Slave Mode Disabled, TWI Master Mode Disabled. */ - pTwi->TWI_CR = TWI_CR_SVDIS ; - pTwi->TWI_CR = TWI_CR_MSDIS ; - - /* Set master mode */ - pTwi->TWI_CR = TWI_CR_MSEN ; - - /* Configure clock */ - while ( !dwOk ) - { - dwClDiv = ((dwMCk / (2 * dwTwCk)) - 4) / (1<TWI_CWGR = 0 ; - pTwi->TWI_CWGR = (dwCkDiv << 16) | (dwClDiv << 8) | dwClDiv ; -} - -/** - * \brief Configures a TWI peripheral to operate in slave mode. - * \param pTwi Pointer to an Twi instance. - * \param slaveAddress Slave address. - */ -void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress) -{ - uint32_t i; - - /* TWI software reset */ - pTwi->TWI_CR = TWI_CR_SWRST; - pTwi->TWI_RHR; - - /* Wait at least 10 ms */ - for (i=0; i < 1000000; i++); - - /* TWI Slave Mode Disabled, TWI Master Mode Disabled*/ - pTwi->TWI_CR = TWI_CR_SVDIS | TWI_CR_MSDIS; - - /* Configure slave address. */ - pTwi->TWI_SMR = 0; - pTwi->TWI_SMR = TWI_SMR_SADR(slaveAddress); - - /* SVEN: TWI Slave Mode Enabled */ - pTwi->TWI_CR = TWI_CR_SVEN; - - /* Wait at least 10 ms */ - for (i=0; i < 1000000; i++); - assert( (pTwi->TWI_CR & TWI_CR_SVDIS)!= TWI_CR_SVDIS ) ; -} - -/** - * \brief Sends a STOP condition on the TWI. - * \param pTwi Pointer to an Twi instance. - */ -void TWI_Stop( Twi *pTwi ) -{ - assert( pTwi != NULL ) ; - - pTwi->TWI_CR = TWI_CR_STOP; -} - -/** - * \brief Starts a read operation on the TWI bus with the specified slave, it returns - * immediately. Data must then be read using TWI_ReadByte() whenever a byte is - * available (poll using TWI_ByteReceived()). - * \param pTwi Pointer to an Twi instance. - * \param address Slave address on the bus. - * \param iaddress Optional internal address bytes. - * \param isize Number of internal address bytes. - */ -void TWI_StartRead( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize) -{ - assert( pTwi != NULL ) ; - assert( (address & 0x80) == 0 ) ; - assert( (iaddress & 0xFF000000) == 0 ) ; - assert( isize < 4 ) ; - - /* Set slave address and number of internal address bytes. */ - pTwi->TWI_MMR = 0; - pTwi->TWI_MMR = (isize << 8) | TWI_MMR_MREAD | (address << 16); - - /* Set internal address bytes */ - pTwi->TWI_IADR = 0; - pTwi->TWI_IADR = iaddress; - - /* Send START condition */ - pTwi->TWI_CR = TWI_CR_START; -} - -/** - * \brief Reads a byte from the TWI bus. The read operation must have been started - * using TWI_StartRead() and a byte must be available (check with TWI_ByteReceived()). - * \param pTwi Pointer to an Twi instance. - * \return byte read. - */ -uint8_t TWI_ReadByte(Twi *pTwi) -{ - assert( pTwi != NULL ) ; - - return pTwi->TWI_RHR; -} - -/** - * \brief Sends a byte of data to one of the TWI slaves on the bus. - * \note This function must be called once before TWI_StartWrite() with - * the first byte of data to send, then it shall be called repeatedly - * after that to send the remaining bytes. - * \param pTwi Pointer to an Twi instance. - * \param byte Byte to send. - */ -void TWI_WriteByte(Twi *pTwi, uint8_t byte) -{ - assert( pTwi != NULL ) ; - - pTwi->TWI_THR = byte; -} - -/** - * \brief Starts a write operation on the TWI to access the selected slave, then - * returns immediately. A byte of data must be provided to start the write; - * other bytes are written next. - * after that to send the remaining bytes. - * \param pTwi Pointer to an Twi instance. - * \param address Address of slave to acccess on the bus. - * \param iaddress Optional slave internal address. - * \param isize Number of internal address bytes. - * \param byte First byte to send. - */ -void TWI_StartWrite( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t byte) -{ - assert( pTwi != NULL ) ; - assert( (address & 0x80) == 0 ) ; - assert( (iaddress & 0xFF000000) == 0 ) ; - assert( isize < 4 ) ; - - /* Set slave address and number of internal address bytes. */ - pTwi->TWI_MMR = 0; - pTwi->TWI_MMR = (isize << 8) | (address << 16); - - /* Set internal address bytes. */ - pTwi->TWI_IADR = 0; - pTwi->TWI_IADR = iaddress; - - /* Write first byte to send.*/ - TWI_WriteByte(pTwi, byte); -} - -/** - * \brief Check if a byte have been receiced from TWI. - * \param pTwi Pointer to an Twi instance. - * \return 1 if a byte has been received and can be read on the given TWI - * peripheral; otherwise, returns 0. This function resets the status register. - */ -uint8_t TWI_ByteReceived(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_RXRDY) == TWI_SR_RXRDY); -} - -/** - * \brief Check if a byte have been sent to TWI. - * \param pTwi Pointer to an Twi instance. - * \return 1 if a byte has been sent so another one can be stored for - * transmission; otherwise returns 0. This function clears the status register. - */ -uint8_t TWI_ByteSent(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_TXRDY) == TWI_SR_TXRDY); -} - -/** - * \brief Check if current transmission is complet. - * \param pTwi Pointer to an Twi instance. - * \return 1 if the current transmission is complete (the STOP has been sent); - * otherwise returns 0. - */ -uint8_t TWI_TransferComplete(Twi *pTwi) -{ - return ((pTwi->TWI_SR & TWI_SR_TXCOMP) == TWI_SR_TXCOMP); -} - -/** - * \brief Enables the selected interrupts sources on a TWI peripheral. - * \param pTwi Pointer to an Twi instance. - * \param sources Bitwise OR of selected interrupt sources. - */ -void TWI_EnableIt(Twi *pTwi, uint32_t sources) -{ - assert( pTwi != NULL ) ; - assert( (sources & 0xFFFFF088) == 0 ) ; - - pTwi->TWI_IER = sources; -} - -/** - * \brief Disables the selected interrupts sources on a TWI peripheral. - * \param pTwi Pointer to an Twi instance. - * \param sources Bitwise OR of selected interrupt sources. - */ -void TWI_DisableIt(Twi *pTwi, uint32_t sources) -{ - assert( pTwi != NULL ) ; - assert( (sources & 0xFFFFF088) == 0 ) ; - - pTwi->TWI_IDR = sources; -} - -/** - * \brief Get the current status register of the given TWI peripheral. - * \note This resets the internal value of the status register, so further - * read may yield different values. - * \param pTwi Pointer to an Twi instance. - * \return TWI status register. - */ -uint32_t TWI_GetStatus(Twi *pTwi) -{ - assert( pTwi != NULL ) ; - - return pTwi->TWI_SR; -} - -/** - * \brief Returns the current status register of the given TWI peripheral, but - * masking interrupt sources which are not currently enabled. - * \note This resets the internal value of the status register, so further - * read may yield different values. - * \param pTwi Pointer to an Twi instance. - */ -uint32_t TWI_GetMaskedStatus(Twi *pTwi) -{ - uint32_t status; - - assert( pTwi != NULL ) ; - - status = pTwi->TWI_SR; - status &= pTwi->TWI_IMR; - - return status; -} - -/** - * \brief Sends a STOP condition. STOP Condition is sent just after completing - * the current byte transmission in master read mode. - * \param pTwi Pointer to an Twi instance. - */ -void TWI_SendSTOPCondition(Twi *pTwi) -{ - assert( pTwi != NULL ) ; - - pTwi->TWI_CR |= TWI_CR_STOP; -} - diff --git a/firmware/atmel_softpack_libraries/libchip_sam3s/source/twid.c b/firmware/atmel_softpack_libraries/libchip_sam3s/source/twid.c deleted file mode 100644 index a7dcdfdd..00000000 --- a/firmware/atmel_softpack_libraries/libchip_sam3s/source/twid.c +++ /dev/null @@ -1,342 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ -#define TWITIMEOUTMAX 50000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** TWI driver callback function.*/ -typedef void (*TwiCallback)(Async *); - -/** \brief TWI asynchronous transfer descriptor.*/ -typedef struct _AsyncTwi { - - /** Asynchronous transfer status. */ - volatile uint8_t status; - // Callback function to invoke when transfer completes or fails.*/ - TwiCallback callback; - /** Pointer to the data buffer.*/ - uint8_t *pData; - /** Total number of bytes to transfer.*/ - uint32_t num; - /** Number of already transferred bytes.*/ - uint32_t transferred; - -} AsyncTwi; - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ -/** - * \brief Initializes a TWI driver instance, using the given TWI peripheral. - * \note The peripheral must have been initialized properly before calling this function. - * \param pTwid Pointer to the Twid instance to initialize. - * \param pTwi Pointer to the TWI peripheral to use. - */ -void TWID_Initialize(Twid *pTwid, Twi *pTwi) -{ - TRACE_DEBUG( "TWID_Initialize()\n\r" ) ; - assert( pTwid != NULL ) ; - assert( pTwi != NULL ) ; - - /* Initialize driver. */ - pTwid->pTwi = pTwi; - pTwid->pTransfer = 0; -} - - -/** - * \brief Interrupt handler for a TWI peripheral. Manages asynchronous transfer - * occuring on the bus. This function MUST be called by the interrupt service - * routine of the TWI peripheral if asynchronous read/write are needed. - * \param pTwid Pointer to a Twid instance. - */ -void TWID_Handler( Twid *pTwid ) -{ - uint8_t status; - AsyncTwi *pTransfer ; - Twi *pTwi ; - - assert( pTwid != NULL ) ; - - pTransfer = (AsyncTwi*)pTwid->pTransfer ; - assert( pTransfer != NULL ) ; - pTwi = pTwid->pTwi ; - assert( pTwi != NULL ) ; - - /* Retrieve interrupt status */ - status = TWI_GetMaskedStatus(pTwi); - - /* Byte received */ - if (TWI_STATUS_RXRDY(status)) { - - pTransfer->pData[pTransfer->transferred] = TWI_ReadByte(pTwi); - pTransfer->transferred++; - - /* check for transfer finish */ - if (pTransfer->transferred == pTransfer->num) { - - TWI_DisableIt(pTwi, TWI_IDR_RXRDY); - TWI_EnableIt(pTwi, TWI_IER_TXCOMP); - } - /* Last byte? */ - else if (pTransfer->transferred == (pTransfer->num - 1)) { - - TWI_Stop(pTwi); - } - } - /* Byte sent*/ - else if (TWI_STATUS_TXRDY(status)) { - - /* Transfer finished ? */ - if (pTransfer->transferred == pTransfer->num) { - - TWI_DisableIt(pTwi, TWI_IDR_TXRDY); - TWI_EnableIt(pTwi, TWI_IER_TXCOMP); - TWI_SendSTOPCondition(pTwi); - } - /* Bytes remaining */ - else { - - TWI_WriteByte(pTwi, pTransfer->pData[pTransfer->transferred]); - pTransfer->transferred++; - } - } - /* Transfer complete*/ - else if (TWI_STATUS_TXCOMP(status)) { - - TWI_DisableIt(pTwi, TWI_IDR_TXCOMP); - pTransfer->status = 0; - if (pTransfer->callback) { - - pTransfer->callback((Async *) pTransfer); - } - pTwid->pTransfer = 0; - } -} - -/** - * \brief Asynchronously reads data from a slave on the TWI bus. An optional - * callback function is triggered when the transfer is complete. - * \param pTwid Pointer to a Twid instance. - * \param address TWI slave address. - * \param iaddress Optional slave internal address. - * \param isize Internal address size in bytes. - * \param pData Data buffer for storing received bytes. - * \param num Number of bytes to read. - * \param pAsync Asynchronous transfer descriptor. - * \return 0 if the transfer has been started; otherwise returns a TWI error code. - */ -uint8_t TWID_Read( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync) -{ - Twi *pTwi; - AsyncTwi *pTransfer; - uint32_t timeout; - - assert( pTwid != NULL ) ; - pTwi = pTwid->pTwi; - pTransfer = (AsyncTwi *) pTwid->pTransfer; - - assert( (address & 0x80) == 0 ) ; - assert( (iaddress & 0xFF000000) == 0 ) ; - assert( isize < 4 ) ; - - /* Check that no transfer is already pending*/ - if (pTransfer) { - - TRACE_ERROR("TWID_Read: A transfer is already pending\n\r"); - return TWID_ERROR_BUSY; - } - - /* Set STOP signal if only one byte is sent*/ - if (num == 1) { - - TWI_Stop(pTwi); - } - - /* Asynchronous transfer*/ - if (pAsync) { - - /* Update the transfer descriptor */ - pTwid->pTransfer = pAsync; - pTransfer = (AsyncTwi *) pAsync; - pTransfer->status = ASYNC_STATUS_PENDING; - pTransfer->pData = pData; - pTransfer->num = num; - pTransfer->transferred = 0; - - /* Enable read interrupt and start the transfer */ - TWI_EnableIt(pTwi, TWI_IER_RXRDY); - TWI_StartRead(pTwi, address, iaddress, isize); - } - /* Synchronous transfer*/ - else { - - /* Start read*/ - TWI_StartRead(pTwi, address, iaddress, isize); - - /* Read all bytes, setting STOP before the last byte*/ - while (num > 0) { - - /* Last byte ?*/ - if (num == 1) { - - TWI_Stop(pTwi); - } - - /* Wait for byte then read and store it*/ - timeout = 0; - while( !TWI_ByteReceived(pTwi) && (++timeoutpTwi; - AsyncTwi *pTransfer = (AsyncTwi *) pTwid->pTransfer; - uint32_t timeout; - - assert( pTwi != NULL ) ; - assert( (address & 0x80) == 0 ) ; - assert( (iaddress & 0xFF000000) == 0 ) ; - assert( isize < 4 ) ; - - /* Check that no transfer is already pending */ - if (pTransfer) { - - TRACE_ERROR("TWI_Write: A transfer is already pending\n\r"); - return TWID_ERROR_BUSY; - } - - /* Asynchronous transfer */ - if (pAsync) { - - /* Update the transfer descriptor */ - pTwid->pTransfer = pAsync; - pTransfer = (AsyncTwi *) pAsync; - pTransfer->status = ASYNC_STATUS_PENDING; - pTransfer->pData = pData; - pTransfer->num = num; - pTransfer->transferred = 1; - - /* Enable write interrupt and start the transfer */ - TWI_StartWrite(pTwi, address, iaddress, isize, *pData); - TWI_EnableIt(pTwi, TWI_IER_TXRDY); - } - /* Synchronous transfer*/ - else { - - // Start write - TWI_StartWrite(pTwi, address, iaddress, isize, *pData++); - num--; - - /* Send all bytes */ - while (num > 0) { - - /* Wait before sending the next byte */ - timeout = 0; - while( !TWI_ByteSent(pTwi) && (++timeout> 8) & 0xFF); -} - -/** - * Returns the channel number of a Feature unit which should be altered by the - * given request. - * \param request Pointer to a USBGenericRequest instance. - */ -uint8_t AUDFeatureUnitRequest_GetChannel(const USBGenericRequest *request) -{ - return (USBGenericRequest_GetValue(request) & 0xFF); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/common/audio/AUDGenericRequest.c b/firmware/atmel_softpack_libraries/usb/common/audio/AUDGenericRequest.c deleted file mode 100644 index 4a691afd..00000000 --- a/firmware/atmel_softpack_libraries/usb/common/audio/AUDGenericRequest.c +++ /dev/null @@ -1,67 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * This file implements functions for USB AUDIO class requests. - */ - -/** \addtogroup usb_audio - *@{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "AUDRequests.h" - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * Returns the ID of the unit or terminal targetted by an USB audio request. - * \param request Pointer to a USBGenericRequest instance. - */ -uint8_t AUDGenericRequest_GetEntity(const USBGenericRequest *request) -{ - return ((USBGenericRequest_GetIndex(request) >> 8) & 0xFF); -} - -/** - * Returns the ID of the interface targetted by an USB audio request. - * \param request Pointer to a USBGenericRequest instance. - */ -uint8_t AUDGenericRequest_GetInterface(const USBGenericRequest *request) -{ - return (USBGenericRequest_GetIndex(request) & 0xFF); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/common/cdc/CDCLineCoding.c b/firmware/atmel_softpack_libraries/usb/common/cdc/CDCLineCoding.c deleted file mode 100644 index 0f28220d..00000000 --- a/firmware/atmel_softpack_libraries/usb/common/cdc/CDCLineCoding.c +++ /dev/null @@ -1,71 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - Implementation of the CDCLineCoding class. - */ -/** \addtogroup usb_cdc - *@{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * Initializes the bitrate, number of stop bits, parity checking and - * number of data bits of a CDCLineCoding object. - * \param lineCoding Pointer to a CDCLineCoding instance. - * \param bitrate Bitrate of the virtual COM connection. - * \param stopbits Number of stop bits - * (\ref usb_cdc_stop CDC LineCoding StopBits). - * \param parity Parity check type - * (\ref usb_cdc_parity CDC LineCoding ParityChecking). - * \param databits Number of data bits. - */ -void CDCLineCoding_Initialize(CDCLineCoding *lineCoding, - uint32_t bitrate, - uint8_t stopbits, - uint8_t parity, - uint8_t databits) -{ - lineCoding->dwDTERate = bitrate; - lineCoding->bCharFormat = stopbits; - lineCoding->bParityType = parity; - lineCoding->bDataBits = databits; -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/common/cdc/CDCSetControlLineStateRequest.c b/firmware/atmel_softpack_libraries/usb/common/cdc/CDCSetControlLineStateRequest.c deleted file mode 100644 index f11db275..00000000 --- a/firmware/atmel_softpack_libraries/usb/common/cdc/CDCSetControlLineStateRequest.c +++ /dev/null @@ -1,87 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * Implementation of the CDCSetControlLineStateRequest class. - */ - -/** \addtogroup usb_cdc - *@{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * Notifies if the given request indicates that the DTE signal is present. - * \param request Pointer to a USBGenericRequest instance. - * \return 1 if the DTE signal is present, otherwise 0. - */ -uint8_t CDCSetControlLineStateRequest_IsDtePresent( - const USBGenericRequest *request) -{ - if ((USBGenericRequest_GetValue(request) & 0x0001) != 0) { - - return 1; - } - else { - - return 0; - } -} - -/** - * Notifies if the given request indicates that the device carrier should - * be activated. - * \param request Pointer to a USBGenericRequest instance. - * \return 1 is the device should activate its carrier, 0 otherwise. - */ -uint8_t CDCSetControlLineStateRequest_ActivateCarrier( - const USBGenericRequest *request) -{ - if ((USBGenericRequest_GetValue(request) & 0x0002) != 0) { - - return 1; - } - else { - - return 0; - } -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/common/hid/HIDIdleRequest.c b/firmware/atmel_softpack_libraries/usb/common/hid/HIDIdleRequest.c deleted file mode 100644 index c4e83e13..00000000 --- a/firmware/atmel_softpack_libraries/usb/common/hid/HIDIdleRequest.c +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - Title: HIDIdleRequest implementation - - About: Purpose - Implementation of the HIDIdleRequest methods. -*/ - -/**\addtogroup usb_hid - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "HIDRequests.h" - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Indicates the ID of the report targetted by a SET_IDLE or GET_IDLE - * request. This value should be 0 if report IDs are not used. - * \param request Pointer to a USBGenericRequest instance. - * \return Requested report ID. - */ -uint8_t HIDIdleRequest_GetReportId(const USBGenericRequest *request) -{ - return (USBGenericRequest_GetValue(request) & 0xFF); -} - -/** - * Retrieves the Idle rate (in milliseconds) indicated by a SET_IDLE - * request. - * \param request Pointer to a USBGenericRequest instance. - * \return New idle rate for the report. - */ -uint8_t HIDIdleRequest_GetIdleRate(const USBGenericRequest *request) -{ - return ((USBGenericRequest_GetValue(request) >> 8) & 0xFF); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/common/hid/HIDKeypad.c b/firmware/atmel_softpack_libraries/usb/common/hid/HIDKeypad.c deleted file mode 100644 index 898c1a6c..00000000 --- a/firmware/atmel_softpack_libraries/usb/common/hid/HIDKeypad.c +++ /dev/null @@ -1,61 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - Title: HIDKeypad implementation - - About: Purpose - Implementation of HID keypad usage page methods. -*/ - -/**\addtogroup usb_hid - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "HIDUsages.h" - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Indicates if the given key code is associated with a modified key. - * \param key Key code. - * \return 1 if the key code represents a modifier key; otherwise 0. - */ -uint8_t HIDKeypad_IsModifierKey(uint8_t key) -{ - return ((key >= HIDKeypad_LEFTCONTROL) && (key <= HIDKeypad_RIGHTGUI)); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/common/hid/HIDReportRequest.c b/firmware/atmel_softpack_libraries/usb/common/hid/HIDReportRequest.c deleted file mode 100644 index 4f1e8e99..00000000 --- a/firmware/atmel_softpack_libraries/usb/common/hid/HIDReportRequest.c +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - Title: HIDReportRequest implementation - - About: Purpose - Implementation of the HIDReportRequest methods. -*/ - -/**\addtogroup usb_hid - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "HIDRequests.h" - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Indicates the type of report targetted by a SET_REPORT or GET_REPORT - * request. - * \param request Pointer to a USBGenericRequest instance. - * \return Requested report type (see "HID Report Types"). - */ -uint8_t HIDReportRequest_GetReportType(const USBGenericRequest *request) -{ - return ((USBGenericRequest_GetValue(request) >> 8) & 0xFF); -} - -/** - * Indicates the ID of the report targetted by a SET_REPORT or GET_REPORT - * request. This value should be 0 if report IDs are not used. - * \param request Pointer to a USBGenericRequest instance. - * \return Requested report ID. - */ -uint8_t HIDReportRequest_GetReportId(const USBGenericRequest *request) -{ - return (USBGenericRequest_GetValue(request) & 0xFF); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/audio-speaker/AUDDSpeakerDriver.c b/firmware/atmel_softpack_libraries/usb/device/audio-speaker/AUDDSpeakerDriver.c deleted file mode 100644 index d3178aab..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/audio-speaker/AUDDSpeakerDriver.c +++ /dev/null @@ -1,234 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_audio_speaker - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include - -#include - -#include - -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Internal types - *----------------------------------------------------------------------------*/ - -/** - * \brief Audio speaker driver struct. - */ -typedef struct _AUDDSpeakerDriver { - /** Speaker & Phone function */ - AUDDSpeakerPhone fun; - /** Stream instance for speaker */ - AUDDStream speaker; - /** Array for storing the current setting of each interface */ - uint8_t bAltInterfaces[AUDDSpeakerDriver_NUMINTERFACES]; -} AUDDSpeakerDriver; - -/*---------------------------------------------------------------------------- - * Internal variables - *----------------------------------------------------------------------------*/ - -/** Global USB audio speaker driver instance. */ -static AUDDSpeakerDriver auddSpeakerDriver; - -/*---------------------------------------------------------------------------- - * Dummy callbacks - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - * Internal functions - *----------------------------------------------------------------------------*/ - -/** - * Callback triggerred after the mute or volume status of the channel has been - * changed. - * \param ec Event code. - * \param channel Channel number. - * \param pArg Pointer to AUDDStream instance. - */ -static void AUDDSpeaker_EventCallback(uint32_t ec, - uint8_t channel, - AUDDStream *pArg) -{ - if (ec == AUDD_EC_MuteChanged) { - if (AUDDSpeakerDriver_MuteChanged) - AUDDSpeakerDriver_MuteChanged(channel, pArg->bmMute); - } - else if (ec == AUDD_EC_VolumeChanged) { - /* Not supported now */ - } -} - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -/** - * Initializes an USB audio speaker device driver, as well as the underlying - * USB controller. - */ -void AUDDSpeakerDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - AUDDSpeakerDriver *pAudd = &auddSpeakerDriver; - AUDDSpeakerPhone *pAudf = &pAudd->fun; - AUDDStream *pAuds = &pAudd->speaker; - USBDDriver *pUsbd = USBD_GetDriver(); - - AUDDSpeakerPhone_InitializeStream( - pAuds, AUDDSpeakerDriver_NUMCHANNELS, 0, - (AUDDStreamEventCallback)AUDDSpeaker_EventCallback, pAuds); - - AUDDSpeakerPhone_Initialize( - pAudf, pUsbd, pAuds, 0); - - /* Initialize the USB driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - pAudd->bAltInterfaces); - USBD_Init(); -} - -/** - * Invoked whenever the active configuration of device is changed by the - * host. - * \param cfgnum Configuration number. - */ -void AUDDSpeakerDriver_ConfigurationChangeHandler(uint8_t cfgnum) -{ - AUDDSpeakerDriver *pAudd = &auddSpeakerDriver; - AUDDSpeakerPhone *pAudf = &pAudd->fun; - const USBDDriverDescriptors *pDescriptors = pAudf->pUsbd->pDescriptors; - USBConfigurationDescriptor *pDesc; - - if (cfgnum > 0) { - - /* Parse endpoints for data & notification */ - if (USBD_HAL_IsHighSpeed() && pDescriptors->pHsConfiguration) - pDesc = (USBConfigurationDescriptor*)pDescriptors->pHsConfiguration; - else - pDesc = (USBConfigurationDescriptor*)pDescriptors->pFsConfiguration[0]; - - AUDDSpeakerPhone_ParseInterfaces(pAudf, - (USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Invoked whenever the active setting of an interface is changed by the - * host. Changes the status of the third LED accordingly. - * \param interface Interface number. - * \param setting Newly active setting. - */ -void AUDDSpeakerDriver_InterfaceSettingChangedHandler(uint8_t interface, - uint8_t setting) -{ - AUDDSpeakerDriver *pSpeakerd = &auddSpeakerDriver; - AUDDSpeakerPhone *pAudf = &pSpeakerd->fun; - - if (setting == 0) { - AUDDSpeakerPhone_CloseStream(pAudf, interface); - } - - if (AUDDSpeakerDriver_StreamSettingChanged) - AUDDSpeakerDriver_StreamSettingChanged(setting); -} - -/** - * Handles audio-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void AUDDSpeakerDriver_RequestHandler(const USBGenericRequest *request) -{ - AUDDSpeakerDriver *pAudd = &auddSpeakerDriver; - AUDDSpeakerPhone *pAudf = &pAudd->fun; - USBDDriver *pUsbd = pAudf->pUsbd; - - TRACE_INFO_WP("NewReq "); - - /* Handle Audio Class requests */ - if (AUDDSpeakerPhone_RequestHandler(pAudf, request) == USBRC_SUCCESS) { - return; - } - - /* Handle STD requests */ - if (USBGenericRequest_GetType(request) == USBGenericRequest_STANDARD) { - - USBDDriver_RequestHandler(pUsbd, request); - } - /* Unsupported request */ - else { - - TRACE_WARNING( - "AUDDSpeakerDriver_RequestHandler: Unsupported request (%d,%x)\n\r", - USBGenericRequest_GetType(request), - USBGenericRequest_GetRequest(request)); - USBD_Stall(0); - } -} - -/** - * Reads incoming audio data sent by the USB host into the provided - * buffer. When the transfer is complete, an optional callback function is - * invoked. - * \param buffer Pointer to the data storage buffer. - * \param length Size of the buffer in bytes. - * \param callback Optional callback function. - * \param argument Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the transfer is started successfully; - * otherwise an error code. - */ -uint8_t AUDDSpeakerDriver_Read(void *buffer, - uint32_t length, - TransferCallback callback, - void *argument) -{ - AUDDSpeakerDriver *pAudd = &auddSpeakerDriver; - AUDDSpeakerPhone *pAudf = &pAudd->fun; - return USBD_Read(pAudf->pSpeaker->bEndpointOut, - buffer, length, - callback, argument); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/audio-speaker/AUDDSpeakerDriver_Callbacks.c b/firmware/atmel_softpack_libraries/usb/device/audio-speaker/AUDDSpeakerDriver_Callbacks.c deleted file mode 100644 index 5f2cec73..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/audio-speaker/AUDDSpeakerDriver_Callbacks.c +++ /dev/null @@ -1,74 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Default callbacks implement for Audio Speaker Driver. - */ - -/** \addtogroup usbd_audio_speaker - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 - by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "AUDDSpeakerDriver.h" - -/*------------------------------------------------------------------------------ - * Default WEAK Callbacks - *------------------------------------------------------------------------------*/ - -/** - * Invoked when an audio channel get muted or unmuted. Mutes/unmutes the - * channel at the DAC level. - * \param channel Channel number that changed. - * \param muted Indicates the new mute status of the channel. - */ -WEAK void AUDDSpeakerDriver_MuteChanged(uint8_t channel,uint8_t muted) -{ - /* Do nothing */ -} - -/** - * Invoked when an audio streaming interface setting changed. Actually control - * streaming rate. - * \param newSetting New stream (interface) setting. - */ -WEAK void AUDDSpeakerDriver_StreamSettingChanged(uint8_t newSetting) -{ - /* Do nothing */ -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDSpeakerPhoneDriver.c b/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDSpeakerPhoneDriver.c deleted file mode 100644 index 8d8a617d..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDSpeakerPhoneDriver.c +++ /dev/null @@ -1,468 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_audio_speakerphone - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include - -#include - -/*------------------------------------------------------------------------------ - * Internal types - *------------------------------------------------------------------------------*/ - -/** - * Structs of USB Audio Stream Function Interface. - */ -typedef struct _AUDDStream { - - /* -- USB Interface settings -- */ - /** Audio Control Interface Number */ - uint8_t bAcInterface; - /** Audio Streaming Interface Number */ - uint8_t bAsInterface; - /** Audio Streaming endpoint address */ - uint8_t bEpNum; - /** Audio Control Unit ID */ - uint8_t bUnitID; - - /* -- Channel settings -- */ - /** Number of channels (including master 0, max 32) */ - uint16_t bNumChannels; - /** Mute Controls bitmap */ - uint16_t bmMuteControls; - /** Volume Controls (Master,L,R..) array */ - uint16_t *pVolumes; -} AUDDStream; - -/** - * \brief Audio SpeakerPhone driver internal state. - */ -typedef struct _AUDDSpeakerPhoneDriver { - - /** Pointer to USBDDriver instance */ - USBDDriver * pUsbd; - /** Intermediate storage variable for the mute status of a stream */ - uint8_t muted; - /** Array for storing the current setting of each interface. */ - uint8_t interfaces[3]; - /** Audio Speaker interface */ - AUDDStream speaker; - /** Audio Microphone interface */ - AUDDStream mic; -} AUDDSpeakerPhoneDriver; - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** Global USB audio SpeakerPhone driver instance. */ -static AUDDSpeakerPhoneDriver auddSpeakerPhoneDriver; - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/** - * Parse descriptors: Interrupt IN, Bulk EP IN/OUT. - * \param desc Pointer to descriptor. - * \param arg Argument, pointer to AUDDSpeakerPhoneDriver instance. - */ -static uint32_t AUDDSpeakerPhone_Parse(USBGenericDescriptor* desc, - AUDDSpeakerPhoneDriver* arg) -{ - /* Not a valid descriptor */ - if (desc->bLength == 0) { - return USBD_STATUS_INVALID_PARAMETER; - } - /* Parse endpoint descriptor */ - if (desc->bDescriptorType == USBGenericDescriptor_ENDPOINT) { - USBEndpointDescriptor *pEP = (USBEndpointDescriptor*)desc; - if (pEP->bmAttributes == USBEndpointDescriptor_ISOCHRONOUS) { - if (pEP->bEndpointAddress & 0x80) - arg->mic.bEpNum = pEP->bEndpointAddress & 0x7F; - else - arg->speaker.bEpNum = pEP->bEndpointAddress; - } - } - return 0; -} - -/** - * Callback triggered after the new mute status of a channel has been read - * by AUDDSpeakerPhoneDriver_SetFeatureCurrentValue. Changes the mute status - * of the given channel accordingly. - * \param channel Number of the channel whose mute status has changed. - */ -static void AUDDSpeakerPhone_MuteReceived(uint32_t channel) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - AUDDStream *pAuds; - - if ((uint8_t)(channel >> 8) == - AUDDSpeakerPhoneDriverDescriptors_OUTPUTTERMINAL_REC) { - pAuds = &pAudd->mic; - } - else { - pAuds = &pAudd->speaker; - } - - if (pAudd->muted != pAuds->bmMuteControls) { - pAuds->bmMuteControls = pAudd->muted; - AUDDSpeakerPhoneDriver_MuteChanged(0, channel, pAudd->muted); - } - USBD_Write(0, 0, 0, 0, 0); -} - -/** - * Handle the SET_CUR request. - * \param pReq Pointer to USBGenericRequest instance. - */ -static void AUDDSpeakerPhone_SetCUR(const USBGenericRequest* pReq) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - uint8_t bIf = AUDGenericRequest_GetInterface(pReq); - uint8_t bEntity = AUDGenericRequest_GetEntity(pReq); - uint8_t bLength = USBGenericRequest_GetLength(pReq); - uint8_t bCh = AUDFeatureUnitRequest_GetChannel(pReq); - uint8_t bCtrl = AUDFeatureUnitRequest_GetControl(pReq); - uint8_t bSet = 0; - AUDDStream *pAuds = 0; - - TRACE_INFO_WP("sCUR "); - TRACE_DEBUG("\b(E%d, CtlS%d, Ch%d, L%d) ", bEntity, bCtrl, bCh, bLength); - /* Only AC.FeatureUnit accepted */ - if (bCtrl == AUDFeatureUnitRequest_MUTE - && bLength == 1) { - - if (bEntity == pAudd->speaker.bUnitID) - pAuds = &pAudd->speaker; - else if (bEntity == pAudd->mic.bUnitID) - pAuds = &pAudd->mic; - - if (pAuds != 0 - && bIf == pAuds->bAcInterface - && bCh <= pAuds->bNumChannels) { - bSet = 1; - } - } - - if (bSet) { - - uint32_t argument = bCh | (bEntity << 8); - USBD_Read(0, /* Endpoint #0 */ - &pAudd->muted, - sizeof(uint8_t), - (TransferCallback) AUDDSpeakerPhone_MuteReceived, - (void *) argument); - } - else { - - USBD_Stall(0); - } - -} - -/** - * Handle the GET_CUR request. - * \param pReq Pointer to USBGenericRequest instance. - */ -static void AUDDSpeakerPhone_GetCUR(const USBGenericRequest *pReq) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - uint8_t bIf = AUDGenericRequest_GetInterface(pReq); - uint8_t bEntity = AUDGenericRequest_GetEntity(pReq); - uint8_t bLength = USBGenericRequest_GetLength(pReq); - uint8_t bCh = AUDFeatureUnitRequest_GetChannel(pReq); - uint8_t bCtrl = AUDFeatureUnitRequest_GetControl(pReq); - uint8_t bGet = 0; - AUDDStream *pAuds = 0; - - TRACE_INFO_WP("gCUR "); - TRACE_DEBUG("\b(E%d, CtlS%d, Ch%d, L%d) ", bEntity, bCtrl, bCh, bLength); - /* Only AC.FeatureUnit accepted */ - if (bCtrl == AUDFeatureUnitRequest_MUTE - && bLength == 1) { - - if (bEntity == pAudd->speaker.bUnitID) - pAuds = &pAudd->speaker; - else if (bEntity == pAudd->mic.bUnitID) - pAuds = &pAudd->mic; - - if (pAuds != 0 - && bIf == pAuds->bAcInterface - && bCh <= pAuds->bNumChannels) { - bGet = 1; - } - } - - if (bGet) { - - pAudd->muted = pAuds->bmMuteControls; - USBD_Write(0, &pAudd->muted, sizeof(uint8_t), 0, 0); - } - else { - - USBD_Stall(0); - } -} - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes an USB audio SpeakerPhone device driver, as well as the underlying - * USB controller. - */ -void AUDDSpeakerPhoneDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - USBDDriver *pUsbd = USBD_GetDriver(); - - pAudd->pUsbd = pUsbd; - - /* Initialize SpeakerPhone channels */ - pAudd->speaker.bNumChannels = 3; - pAudd->speaker.bmMuteControls = 0; - pAudd->speaker.pVolumes = 0; - - pAudd->mic.bNumChannels = 1; - pAudd->mic.bmMuteControls = 0; - pAudd->mic.pVolumes = 0; - - pAudd->mic.bAcInterface = AUDDSpeakerPhoneDriverDescriptors_CONTROL; - pAudd->mic.bAsInterface = AUDDSpeakerPhoneDriverDescriptors_STREAMINGIN; - pAudd->mic.bEpNum = 5;//AUDDSpeakerPhoneDriverDescriptors_DATAIN; - pAudd->mic.bUnitID = AUDDSpeakerPhoneDriverDescriptors_FEATUREUNIT_REC; - - pAudd->speaker.bAcInterface = AUDDSpeakerPhoneDriverDescriptors_CONTROL; - pAudd->speaker.bAsInterface = AUDDSpeakerPhoneDriverDescriptors_STREAMING; - pAudd->speaker.bEpNum = 4;//AUDDSpeakerPhoneDriverDescriptors_DATAOUT; - pAudd->speaker.bUnitID = AUDDSpeakerPhoneDriverDescriptors_FEATUREUNIT; - - /* Initialize the USB driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - pAudd->interfaces); - USBD_Init(); - -} - -/** - * Invoked whenever the active configuration of device is changed by the - * host. - * \param cfgnum Configuration number. - */ -void AUDDSpeakerPhoneDriver_ConfigurationChangeHandler(uint8_t cfgnum) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - const USBDDriverDescriptors *pDescriptors = pAudd->pUsbd->pDescriptors; - USBConfigurationDescriptor *pDesc; - - if (cfgnum > 0) { - - /* Parse endpoints for data & notification */ - if (USBD_HAL_IsHighSpeed() && pDescriptors->pHsConfiguration) - pDesc = (USBConfigurationDescriptor*)pDescriptors->pHsConfiguration; - else - pDesc = (USBConfigurationDescriptor*)pDescriptors->pFsConfiguration[0]; - - USBGenericDescriptor_Parse((USBGenericDescriptor*)pDesc, pDesc->wTotalLength, - (USBDescriptorParseFunction)AUDDSpeakerPhone_Parse, pAudd); - } -} - -/** - * Invoked whenever the active setting of an interface is changed by the - * host. Changes the status of the third LED accordingly. - * \param interface Interface number. - * \param setting Newly active setting. - */ -void AUDDSpeakerPhoneDriver_InterfaceSettingChangedHandler(uint8_t interface, - uint8_t setting) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - - if (interface == pAudd->speaker.bAsInterface) { - /* reset ISO OUT ep */ - if (setting == 0 && pAudd->speaker.bEpNum) { - USBD_HAL_ResetEPs(1 << pAudd->speaker.bEpNum, - USBD_STATUS_CANCELED, 1); - } - AUDDSpeakerPhoneDriver_StreamSettingChanged(0, setting); - } - if (interface == pAudd->mic.bAsInterface) { - /* reset ISO IN ep */ - if (setting == 0 && pAudd->mic.bEpNum) { - USBD_HAL_ResetEPs(1 << pAudd->mic.bEpNum, - USBD_STATUS_CANCELED, 1); - } - AUDDSpeakerPhoneDriver_StreamSettingChanged(1, setting); - } -} - - -/** - * Handles audio-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void AUDDSpeakerPhoneDriver_RequestHandler(const USBGenericRequest *request) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - USBDDriver *pUsbd = pAudd->pUsbd; - - TRACE_INFO_WP("NewReq "); - - /* Check if this is a class request */ - if (USBGenericRequest_GetType(request) == USBGenericRequest_CLASS) { - - /* Check if the request is supported */ - switch (USBGenericRequest_GetRequest(request)) { - - case AUDGenericRequest_SETCUR: - - AUDDSpeakerPhone_SetCUR(request); - break; - - case AUDGenericRequest_GETCUR: - - AUDDSpeakerPhone_GetCUR(request); - break; - - default: - - TRACE_WARNING( - "AUDDSpeakerPhoneDriver_RequestHandler: Unsupported request (%d)\n\r", - USBGenericRequest_GetRequest(request)); - USBD_Stall(0); - } - } - /* Check if this is a standard request */ - else if (USBGenericRequest_GetType(request) == USBGenericRequest_STANDARD) { - - /* Forward request to the standard handler */ - USBDDriver_RequestHandler(pUsbd, request); - } - /* Unsupported request type */ - else { - - TRACE_WARNING( - "AUDDSpeakerPhoneDriver_RequestHandler: Unsupported request type (%d)\n\r", - USBGenericRequest_GetType(request)); - USBD_Stall(0); - } -} - -/** - * Reads incoming audio data sent by the USB host into the provided - * buffer. When the transfer is complete, an optional callback function is - * invoked. - * \param buffer Pointer to the data storage buffer. - * \param length Size of the buffer in bytes. - * \param callback Optional callback function. - * \param argument Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the transfer is started successfully; - * otherwise an error code. - */ -uint8_t AUDDSpeakerPhoneDriver_Read(void *buffer, - uint32_t length, - TransferCallback callback, - void *argument) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - return USBD_Read(pAudd->speaker.bEpNum, - buffer, - length, - callback, - argument); -} - -/** - * Initialize Frame List for sending audio data. - * - * \param pListInit Pointer to the allocated list for audio write. - * \param pDmaInit Pointer to the allocated DMA descriptors for autio write - * (if DMA supported). - * \param listSize Circular list size. - * \param delaySize Start transfer after delaySize frames filled in. - * \param callback Optional callback function for transfer. - * \param argument Optional callback argument. - * \return USBD_STATUS_SUCCESS if setup successfully; otherwise an error code. - */ -uint8_t AUDDSpeakerPhoneDriver_SetupWrite(void * pListInit, - void * pDmaInit, - uint16_t listSize, - uint16_t delaySize, - TransferCallback callback, - void * argument) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - uint8_t error; - - if (pAudd->mic.bEpNum == 0) - return USBRC_STATE_ERR; - - error = USBD_HAL_SetupMblTransfer(pAudd->mic.bEpNum, - pListInit, - listSize, - delaySize); - if (error) return error; - error = USBD_HAL_SetTransferCallback( - pAudd->mic.bEpNum, - callback, argument); - return error; -} - -/** - * Add frame buffer to audio sending list. - * \buffer Pointer to data frame to send. - * \length Frame size in bytes. - * \return USBD_STATUS_SUCCESS if the transfer is started successfully; - * otherwise an error code. - */ -uint8_t AUDDSpeakerPhoneDriver_Write(void* buffer, uint16_t length) -{ - AUDDSpeakerPhoneDriver *pAudd = &auddSpeakerPhoneDriver; - - return USBD_HAL_Write(pAudd->mic.bEpNum, - buffer, length); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDSpeakerPhoneDriver_Callbacks.c b/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDSpeakerPhoneDriver_Callbacks.c deleted file mode 100644 index ee061f92..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDSpeakerPhoneDriver_Callbacks.c +++ /dev/null @@ -1,76 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Default callbacks implement for Audio SpeakerPhone Driver. - */ - -/** \addtogroup usbd_audio_speakerphone - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 - by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "AUDDSpeakerPhoneDriver.h" - -/*------------------------------------------------------------------------------ - * Default WEAK Callbacks - *------------------------------------------------------------------------------*/ - -/** - * Invoked when an audio channel get muted or unmuted. Mutes/unmutes the - * channel at the DAC level. - * \param mic Microphone/Speaker stream changed. - * \param channel Channel number that changed. - * \param muted Indicates the new mute status of the channel. - */ -WEAK void AUDDSpeakerPhoneDriver_MuteChanged(uint8_t mic,uint8_t channel,uint8_t muted) -{ - /* Do nothing */ -} - -/** - * Invoked when an audio streaming interface setting changed. Actually control - * streaming rate. - * \param mic Microphone/Speaker stream changed. - * \param newSetting New stream (interface) setting. - */ -WEAK void AUDDSpeakerPhoneDriver_StreamSettingChanged(uint8_t mic,uint8_t newSetting) -{ - /* Do nothing */ -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDStream.c b/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDStream.c deleted file mode 100644 index 07c76ca8..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/audio-speakerphone/AUDDStream.c +++ /dev/null @@ -1,770 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * USB Audio Device Streaming interface with controls. - * (3 channels supported). - */ - -/** \addtogroup usbd_audio_speakerphone - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include -#include -#include -#include - -#include - -#include - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** Parse data extention for descriptor parsing */ -typedef struct _AUDDParseData { - /** Pointer to AUDDSpeakerPhone instance */ - AUDDSpeakerPhone * pAudf; - /** Pointer to found interface descriptor */ - USBInterfaceDescriptor * pIfDesc; - -} AUDDParseData; - -/** Transfer callback extention */ -typedef struct _AUDDXfrExt { - /** Pointer to AUDDStream instance */ - AUDDStream *pStream; - /** Buffer for USB device to get data from host */ - uint16_t usbBuffer; - /** Additional information: Entity */ - uint8_t bEntity; - /** Additional information: Channel */ - uint8_t bCh; -} AUDDXfrExt; - -/*------------------------------------------------------------------------------ - * Internal Variable - *------------------------------------------------------------------------------*/ - -/** Transfer data extension */ -static AUDDXfrExt auddXfrData; - -/*------------------------------------------------------------------------------ - * Internal Functions - *------------------------------------------------------------------------------*/ - -/** - * Parse descriptors: Interface, ISO IN/OUT, Feature Unit IDs. - * \param desc Pointer to descriptor list. - * \param arg Argument, pointer to AUDDParseData instance. - */ -static uint32_t AUDDSpeakerPhone_Parse(USBGenericDescriptor *pDesc, - AUDDParseData * pArg) -{ - AUDDStream *pSpeaker = pArg->pAudf->pSpeaker; - AUDDStream *pMic = pArg->pAudf->pMicrophone; - USBEndpointDescriptor* pEp = (USBEndpointDescriptor*)pDesc; - uint8_t bSpeakerDone = 0, bMicDone = 0; - - /* Validate descriptor */ - if (pDesc->bLength == 0) - return USBRC_PARAM_ERR; - - /* Log current interface */ - if (pDesc->bDescriptorType == USBGenericDescriptor_INTERFACE) { - USBInterfaceDescriptor* pIf = (USBInterfaceDescriptor*)pDesc; - /* AudioControl interface */ - if (pIf->bInterfaceClass == - AUDControlInterfaceDescriptor_CLASS - && pIf->bInterfaceSubClass == - AUDControlInterfaceDescriptor_SUBCLASS) { - pArg->pIfDesc = pIf; - - if (pSpeaker) pSpeaker->bAcInterface = pIf->bInterfaceNumber; - if (pMic) pMic->bAcInterface = pIf->bInterfaceNumber; - } - /* AudioStreaming interface with endpoint */ - else if (pIf->bInterfaceClass == - AUDStreamingInterfaceDescriptor_CLASS - && pIf->bInterfaceSubClass == - AUDStreamingInterfaceDescriptor_SUBCLASS) { - pArg->pIfDesc = pIf; - } - /* Not Audio interface, force end */ - else if (pArg->pIfDesc){ - return USBRC_PARTIAL_DONE; - } - } - - if (pArg->pIfDesc) { - /* Find Control Interface */ - /* Find Entities */ - /* Find Streaming Interface & Endpoints */ - if (pDesc->bDescriptorType == USBGenericDescriptor_ENDPOINT - && (pEp->bmAttributes & 0x3) == USBEndpointDescriptor_ISOCHRONOUS) { - if (pEp->bEndpointAddress & 0x80 - && pMic) { - pMic->bEndpointIn = pEp->bEndpointAddress & 0x7F; - pMic->bAsInterface = pArg->pIfDesc->bInterfaceNumber; - /* Fixed FU */ - pMic->bFeatureUnitIn = AUDD_ID_MicrophoneFU; - } - else if (pSpeaker) { - pSpeaker->bEndpointOut = pEp->bEndpointAddress; - pSpeaker->bAsInterface = pArg->pIfDesc->bInterfaceNumber; - /* Fixed FU */ - pSpeaker->bFeatureUnitOut = AUDD_ID_SpeakerFU; - } - } - } - - if (pSpeaker) { - if (pSpeaker->bAcInterface != 0xFF - && pSpeaker->bAsInterface != 0xFF - && pSpeaker->bFeatureUnitOut != 0xFF - && pSpeaker->bEndpointOut != 0) { - bSpeakerDone = 1; - } - } - else bSpeakerDone = 1; - - if (pMic) { - if (pMic->bAcInterface != 0xFF - && pMic->bAsInterface != 0xFF - && pMic->bFeatureUnitIn != 0xFF - && pMic->bEndpointIn != 0) { - bMicDone = 1; - } - } - else bMicDone = 1; - - if (bSpeakerDone && bMicDone) - return USBRC_FINISHED; - - return USBRC_SUCCESS; -} - -/** - * Callback triggered after the new mute status of a channel has been read. - * Changes the mute status of the given channel accordingly. - * \param pData Pointer to AUDDXfrExt (transfer extension data). - */ -static void AUDD_MuteReceived(AUDDXfrExt *pData) -{ - AUDDStream_ChangeMute(pData->pStream, - pData->bCh, - (uint8_t)pData->usbBuffer); - USBD_Write(0, 0, 0, 0, 0); -} - -/** - * Callback triggered after the new volume status of a channel has been read. - * Changes the volume status of the given channel accordingly. - * \param pData Pointer to AUDDXfrExt (transfer extension data). - */ -static void AUDD_VolumeReceived(AUDDXfrExt *pData) -{ - AUDDStream_SetVolume(pData->pStream, - pData->bCh, - pData->usbBuffer); - USBD_Write(0, 0, 0, 0, 0); -} - -/** - * Get Target AUDDStream for control - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param bAcInterface Interface number - * \param bEntity Entity ID - * \param bChannel Channel number - * \return Pointer to AUDDStream instance - */ -static AUDDStream *AUDD_GetCtlStream( - AUDDSpeakerPhone *pAudf, - uint8_t bAcInterface, - uint8_t bEntity, - uint8_t bChannel) -{ - AUDDStream *pAuds = 0; - - if (bEntity == pAudf->pSpeaker->bFeatureUnitOut - || bEntity == pAudf->pSpeaker->bFeatureUnitIn) - pAuds = pAudf->pSpeaker; - else if (bEntity == pAudf->pMicrophone->bFeatureUnitIn - || bEntity == pAudf->pMicrophone->bFeatureUnitOut) - pAuds = pAudf->pMicrophone; - - if (pAuds != 0 - && bAcInterface == pAuds->bAcInterface - && bChannel <= pAuds->bNumChannels) { - return pAuds; - } - - return 0; -} - -/** - * Handle the SET_CUR request. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pReq Pointer to USBGenericRequest instance. - */ -static void AUDD_SetCUR( - AUDDSpeakerPhone *pAudf, - const USBGenericRequest* pReq) -{ - uint8_t bIf = AUDGenericRequest_GetInterface(pReq); - uint8_t bEntity = AUDGenericRequest_GetEntity(pReq); - uint8_t bLength = USBGenericRequest_GetLength(pReq); - uint8_t bCh = AUDFeatureUnitRequest_GetChannel(pReq); - uint8_t bCtrl = AUDFeatureUnitRequest_GetControl(pReq); - uint8_t bSet = 1; - AUDDStream *pAuds = AUDD_GetCtlStream(pAudf, bIf, bEntity, bCh); - TransferCallback fCallback; - - TRACE_INFO_WP("sCUR "); - TRACE_DEBUG("\b(E%d, CtlS%d, Ch%d, L%d) ", bEntity, bCtrl, bCh, bLength); - - /* Set Mute to AC, 1 byte */ - if (bCtrl == AUDFeatureUnitRequest_MUTE - && bLength == 1 - && pAuds) { - fCallback = (TransferCallback) AUDD_MuteReceived; - } - else if (bCtrl == AUDFeatureUnitRequest_VOLUME - && bLength == 2 - && pAuds && pAuds->pwVolumes) { - fCallback = (TransferCallback) AUDD_VolumeReceived; - } - else - bSet = 0; - - if (bSet) { - - auddXfrData.pStream = pAuds; - auddXfrData.bEntity = bEntity; - auddXfrData.bCh = bCh; - USBD_Read(0, - &auddXfrData.usbBuffer, - bLength, - fCallback, - (void *) &auddXfrData); - } - else { - - USBD_Stall(0); - } - -} - -/** - * Handle the GET_CUR request. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pReq Pointer to USBGenericRequest instance. - */ -static void AUDD_GetCUR( - AUDDSpeakerPhone *pAudf, - const USBGenericRequest *pReq) -{ - uint8_t bIf = AUDGenericRequest_GetInterface(pReq); - uint8_t bEntity = AUDGenericRequest_GetEntity(pReq); - uint8_t bLength = USBGenericRequest_GetLength(pReq); - uint8_t bCh = AUDFeatureUnitRequest_GetChannel(pReq); - uint8_t bCtrl = AUDFeatureUnitRequest_GetControl(pReq); - uint8_t bGet = 1; - AUDDStream *pAuds = AUDD_GetCtlStream(pAudf, bIf, bEntity, bCh); - - TRACE_INFO_WP("gCUR "); - TRACE_DEBUG("\b(E%d, CtlS%d, Ch%d, L%d) ", bEntity, bCtrl, bCh, bLength); - - /* Get Mute 1 byte */ - if (bCtrl == AUDFeatureUnitRequest_MUTE - && bLength == 1 - && pAuds) { - auddXfrData.usbBuffer = ((pAuds->bmMute & (1< 0); - } - else if (bCtrl == AUDFeatureUnitRequest_VOLUME - && bLength == 2 - && pAuds && pAuds->pwVolumes) { - auddXfrData.usbBuffer = pAuds->pwVolumes[bCh]; - } - else - bGet = 0; - - if (bGet) { - - USBD_Write(0, &auddXfrData.usbBuffer, bLength, 0, 0); - } - else { - - USBD_Stall(0); - } -} - -/*------------------------------------------------------------------------------ - * Exported Functions - *------------------------------------------------------------------------------*/ - -/** - * Initialize AUDDStream instance. - * Note the number of channels excludes the master control, so - * actual volume array size should be (1 + numChannels). - * \param pAuds Pointer to AUDDStream instance. - * \param numChannels Number of channels in the stream (<31). - * \param wChannelVolumes Data array for channel volume values. - * \param fCallback Callback function for stream events. - * \param pArg Pointer to event handler arguments. - */ -void AUDDStream_Initialize(AUDDStream *pAuds, - uint8_t numChannels, - uint16_t wChannelVolumes[], - AUDDStreamEventCallback fCallback, - void* pArg) -{ - pAuds->bAcInterface = 0xFF; - pAuds->bFeatureUnitOut = 0xFF; - pAuds->bFeatureUnitIn = 0xFF; - pAuds->bAsInterface = 0xFF; - pAuds->bEndpointOut = 0; - pAuds->bEndpointIn = 0; - - pAuds->bNumChannels = numChannels; - pAuds->bmMute = 0; - pAuds->pwVolumes = wChannelVolumes; - - pAuds->fCallback = fCallback; - pAuds->pArg = pArg; -} - -/** - * Check if the request is accepted. - * \param pAuds Pointer to AUDDStream instance. - * \param pReq Pointer to a USBGenericRequest instance. - * \return 1 if accepted. - */ -uint32_t AUDDStream_IsRequestAccepted( - AUDDStream *pAuds, - const USBGenericRequest *pReq) -{ - uint8_t bIf = AUDGenericRequest_GetInterface(pReq); - uint8_t bEntity = AUDGenericRequest_GetEntity(pReq); - uint8_t bCh = AUDFeatureUnitRequest_GetChannel(pReq); - /* AudioControl Interface */ - if (bIf == pAuds->bAcInterface) { - if (bCh > pAuds->bNumChannels) - return 0; - if (bEntity != pAuds->bFeatureUnitIn - && bEntity != pAuds->bFeatureUnitOut) - return 0; - } - /* AudioStream Interface not handled */ - else { - return 0; - } - return 1; -} - -/** - * Change Stream Mute status. - * \param pAuds Pointer to AUDDStream instance. - * \param bChannel Channel number. - * \param bmMute 1 to mute, 0 to unmute. - */ -uint32_t AUDDStream_ChangeMute(AUDDStream *pAuds, - uint8_t bChannel, - uint8_t bMute) -{ - uint8_t bmMute = (bMute << bChannel); - - if (pAuds->bNumChannels < bChannel) - return USBRC_PARAM_ERR; - - if (bMute) - pAuds->bmMute |= bmMute; - else - pAuds->bmMute &= ~bmMute; - - if (pAuds->fCallback) - pAuds->fCallback(AUDD_EC_MuteChanged, - bChannel, - pAuds->pArg); - - return USBRC_SUCCESS; -} - -/** - * Set Stream Volume status. - * \param pAuds Pointer to AUDDStream instance. - * \param bChannel Channel number. - * \param wVolume New volume value. - */ -uint32_t AUDDStream_SetVolume(AUDDStream *pAuds, - uint8_t bChannel, - uint16_t wVolume) -{ - if (pAuds->pwVolumes == 0) - return USBRC_PARAM_ERR; - if (bChannel > pAuds->bNumChannels) - return USBRC_PARAM_ERR; - - pAuds->pwVolumes[bChannel] = wVolume; - if (pAuds->fCallback) { - pAuds->fCallback(AUDD_EC_VolumeChanged, - bChannel, - pAuds->pArg); - } - - return USBRC_SUCCESS; -} - -/** - * Receives data from the host through the audio function (as speaker). - * This function behaves like USBD_Read. - * \param pAuds Pointer to AUDDStream instance. - * \param pData Pointer to the data buffer to put received data. - * \param dwSize Size of the data buffer in bytes. - * \param fCallback Optional callback function to invoke when the transfer - * finishes. - * \param pArg Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -uint32_t AUDDStream_Read( - AUDDStream *pAuds, - void * pData,uint32_t dwSize, - TransferCallback fCallback,void * pArg) -{ - if (pAuds->bEndpointOut == 0) - return USBRC_PARAM_ERR; - return USBD_Read(pAuds->bEndpointOut, - pData, dwSize, - fCallback, pArg); -} - -/** - * Initialize Frame List for sending audio data. - * \param pAuds Pointer to AUDDStream instance. - * \param pListInit Pointer to the allocated list for audio write. - * \param pDmaInit Pointer to the allocated DMA descriptors for autio write - * (if DMA supported). - * \param listSize Circular list size. - * \param delaySize Start transfer after delaySize frames filled in. - * \param callback Optional callback function for transfer. - * \param argument Optional callback argument. - * \return USBD_STATUS_SUCCESS if setup successfully; otherwise an error code. - */ -uint32_t AUDDStream_SetupWrite( - AUDDStream *pAuds, - void * pListInit, - void * pDmaInit, - uint16_t listSize, - uint16_t delaySize, - TransferCallback callback, - void * argument) -{ - uint32_t error; - - if (pAuds->bEndpointIn == 0) - return USBRC_STATE_ERR; - - error = USBD_HAL_SetupMblTransfer(pAuds->bEndpointIn, - pListInit, - listSize, - delaySize); - if (error) return error; - - error = USBD_HAL_SetTransferCallback(pAuds->bEndpointIn, - callback, argument); - return error; -} - - -/** - * Add frame buffer to audio sending list. - * \param pAuds Pointer to AUDDStream instance. - * \param pBuffer Pointer to data frame to send. - * \param wLength Frame size in bytes. - * \return USBD_STATUS_SUCCESS if the transfer is started successfully; - * otherwise an error code. - */ -uint32_t AUDDStream_Write(AUDDStream *pAuds, void* pBuffer, uint16_t wLength) -{ - if (pAuds->bEndpointIn == 0) - return USBRC_STATE_ERR; - - return USBD_HAL_Write(pAuds->bEndpointIn, - pBuffer, wLength); -} - -/** - * Close the stream. All pending transfers are canceled. - * \param pStream Pointer to AUDDStream instance. - */ -uint32_t AUDDStream_Close(AUDDStream *pStream) -{ - uint32_t bmEPs = 0; - - /* Close output stream */ - if (pStream->bEndpointIn) { - bmEPs |= 1 << pStream->bEndpointIn; - } - /* Close input stream */ - if (pStream->bEndpointOut) { - bmEPs |= 1 << pStream->bEndpointOut; - } - USBD_HAL_ResetEPs(bmEPs, USBRC_CANCELED, 1); - - return USBRC_SUCCESS; -} - -/* - * Audio Speakerphone functions - */ - -/** - * Initialize AUDDStream instance. - * Note the number of channels excludes the master control, so - * actual volume array size should be (1 + numChannels). - * \param pAuds Pointer to AUDDStream instance. - * \param numChannels Number of channels in the stream (excluding master,<31). - * \param wChannelVolumes Data array for channel volume values, - * must include master (1 + numChannels). - * \param fCallback Callback function for stream control events. - * \param pArg Pointer to event handler arguments. - */ -void AUDDSpeakerPhone_InitializeStream( - AUDDStream *pAuds, - uint8_t numChannels, - uint16_t wChannelVolumes[], - AUDDStreamEventCallback fCallback, - void* pArg) -{ - pAuds->bAcInterface = 0xFF; - pAuds->bFeatureUnitOut = 0xFF; - pAuds->bFeatureUnitIn = 0xFF; - pAuds->bAsInterface = 0xFF; - pAuds->bEndpointOut = 0; - pAuds->bEndpointIn = 0; - - pAuds->bNumChannels = numChannels; - pAuds->bmMute = 0; - pAuds->pwVolumes = wChannelVolumes; - - pAuds->fCallback = fCallback; - pAuds->pArg = pArg; -} - -/** - * Initialize AUDDSpeakerPhone instance. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pUsbd Pointer to USBDDriver instance. - * \param pSpeaker Pointer to speaker streaming interface. - * \param pMicrophone Pointer to microphone streaming interface. - */ -void AUDDSpeakerPhone_Initialize( - AUDDSpeakerPhone *pAudf, - USBDDriver *pUsbd, - AUDDStream *pSpeaker, - AUDDStream *pMicrophone) -{ - pAudf->pUsbd = pUsbd; - pAudf->pSpeaker = pSpeaker; - pAudf->pMicrophone = pMicrophone; -} - -/** - * Parse USB Audio streaming information for AUDDStream instance. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pDescriptors Pointer to descriptor list. - * \param dwLength Descriptor list size in bytes. - */ -USBGenericDescriptor *AUDDSpeakerPhone_ParseInterfaces( - AUDDSpeakerPhone *pAudf, - USBGenericDescriptor *pDescriptors, - uint32_t dwLength) -{ - AUDDParseData data; - - data.pAudf = pAudf; - data.pIfDesc = 0; - - return USBGenericDescriptor_Parse(pDescriptors, - dwLength, - (USBDescriptorParseFunction)AUDDSpeakerPhone_Parse, - (void*)&data); -} - -/** - * Close the stream. All pending transfers are canceled. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param bInterface Stream interface number - */ -uint32_t AUDDSpeakerPhone_CloseStream( - AUDDSpeakerPhone *pAudf, - uint32_t bInterface) -{ - if (pAudf->pSpeaker->bAsInterface == bInterface) { - USBD_HAL_ResetEPs(1 << pAudf->pSpeaker->bEndpointOut, - USBRC_CANCELED, - 1); - } - else if (pAudf->pMicrophone->bAsInterface == bInterface) { - USBD_HAL_ResetEPs(1 << pAudf->pMicrophone->bEndpointIn, - USBRC_CANCELED, - 1); - } - - return USBRC_SUCCESS; -} - -/** - * Handles audio-specific USB requests sent by the host - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pRequest Pointer to a USBGenericRequest instance. - * \return USBRC_PARAM_ERR if not handled. - */ -uint32_t AUDDSpeakerPhone_RequestHandler( - AUDDSpeakerPhone *pAudf, - const USBGenericRequest* pRequest) -{ - //USBDDriver *pUsbd = pAudf->pUsbd; - - if (USBGenericRequest_GetType(pRequest) != USBGenericRequest_CLASS) - return USBRC_PARAM_ERR; - - TRACE_INFO_WP("Aud "); - switch (USBGenericRequest_GetRequest(pRequest)) { - case AUDGenericRequest_SETCUR: - AUDD_SetCUR(pAudf, pRequest); - break; - case AUDGenericRequest_GETCUR: - AUDD_GetCUR(pAudf, pRequest); - break; - - default: - return USBRC_PARAM_ERR; - } - - return USBRC_SUCCESS; -} - -/** - * Receives data from the host through the audio function (as speaker). - * This function behaves like USBD_Read. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pData Pointer to the data buffer to put received data. - * \param dwSize Size of the data buffer in bytes. - * \param fCallback Optional callback function to invoke when the transfer - * finishes. - * \param pArg Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -uint32_t AUDDSpeakerPhone_Read( - AUDDSpeakerPhone *pAudf, - void * pData,uint32_t dwSize, - TransferCallback fCallback,void * pArg) -{ - if (pAudf->pSpeaker == 0) - return USBRC_PARAM_ERR; - if (pAudf->pSpeaker->bEndpointOut == 0) - return USBRC_PARAM_ERR; - return USBD_Read(pAudf->pSpeaker->bEndpointOut, - pData, dwSize, - fCallback, pArg); -} - -/** - * Initialize Frame List for sending audio data. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pListInit Pointer to the allocated list for audio write. - * \param pDmaInit Pointer to the allocated DMA descriptors for autio write - * (if DMA supported). - * \param listSize Circular list size. - * \param delaySize Start transfer after delaySize frames filled in. - * \param callback Optional callback function for transfer. - * \param argument Optional callback argument. - * \return USBD_STATUS_SUCCESS if setup successfully; otherwise an error code. - */ -uint32_t AUDDSpeakerPhone_SetupWrite( - AUDDSpeakerPhone *pAudf, - void * pListInit, - void * pDmaInit, - uint16_t listSize, - uint16_t delaySize, - TransferCallback callback, - void * argument) -{ - uint32_t error; - - if (pAudf->pMicrophone == 0) - return USBRC_PARAM_ERR; - if (pAudf->pMicrophone->bEndpointIn == 0) - return USBRC_STATE_ERR; - - error = USBD_HAL_SetupMblTransfer(pAudf->pMicrophone->bEndpointIn, - pListInit, - listSize, - delaySize); - if (error) return error; - - error = USBD_HAL_SetTransferCallback( - pAudf->pMicrophone->bEndpointIn, - callback, argument); - return error; -} - - -/** - * Add frame buffer to audio sending list. - * \param pAudf Pointer to AUDDSpeakerPhone instance. - * \param pBuffer Pointer to data frame to send. - * \param wLength Frame size in bytes. - * \return USBD_STATUS_SUCCESS if the transfer is started successfully; - * otherwise an error code. - */ -uint32_t AUDDSpeakerPhone_Write(AUDDSpeakerPhone *pAudf, void* pBuffer, uint16_t wLength) -{ - if (pAudf->pSpeaker == 0) - return USBRC_PARAM_ERR; - if (pAudf->pSpeaker->bEndpointIn == 0) - return USBRC_STATE_ERR; - - return USBD_HAL_Write(pAudf->pSpeaker->bEndpointIn, - pBuffer, wLength); -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerial.c b/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerial.c deleted file mode 100644 index 1b72d63f..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerial.c +++ /dev/null @@ -1,237 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * Implementation of a single CDC serial port function for USB device. - */ - -/** \addtogroup usbd_cdc - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "CDCDSerial.h" - -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** Serial Port instance list */ -static CDCDSerialPort cdcdSerial; - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/** - * USB CDC Serial Port Event Handler. - * \param event Event code. - * \param param Event parameter. - */ -static uint32_t CDCDSerial_EventHandler(uint32_t event, - uint32_t param) -{ - switch (event) { - case CDCDSerialPortEvent_SETCONTROLLINESTATE: - { - if (CDCDSerial_ControlLineStateChanged) { - CDCDSerial_ControlLineStateChanged( - (param & CDCControlLineState_DTR) > 0, - (param & CDCControlLineState_RTS) > 0); - } - } - break; - case CDCDSerialPortEvent_SETLINECODING: - { - if (CDCDSerial_LineCodingIsToChange) { - event = CDCDSerial_LineCodingIsToChange( - (CDCLineCoding*)param); - if (event != USBRC_SUCCESS) - return event; - } - } - break; - default: - return USBRC_SUCCESS; - } - - return USBRC_SUCCESS; -} - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes the USB Device CDC serial driver & USBD Driver. - * \param pUsbd Pointer to USBDDriver instance. - * \param bInterfaceNb Interface number for the function. - */ -void CDCDSerial_Initialize( - USBDDriver *pUsbd, uint8_t bInterfaceNb) -{ - CDCDSerialPort *pCdcd = &cdcdSerial; - - TRACE_INFO("CDCDSerial_Initialize\n\r"); - - /* Initialize serial port function */ - CDCDSerialPort_Initialize( - pCdcd, pUsbd, - (CDCDSerialPortEventHandler)CDCDSerial_EventHandler, - 0, - bInterfaceNb, 2); -} - -/** - * Invoked whenever the device is changed by the - * host. - * \pDescriptors Pointer to the descriptors for function configure. - * \wLength Length of descriptors in number of bytes. - */ -void CDCDSerial_ConfigureFunction(USBGenericDescriptor *pDescriptors, - uint16_t wLength) -{ - CDCDSerialPort *pCdcd = &cdcdSerial; - CDCDSerialPort_ParseInterfaces(pCdcd, - (USBGenericDescriptor*)pDescriptors, - wLength); -} - -/** - * Handles CDC-specific SETUP requests. Should be called from a - * re-implementation of USBDCallbacks_RequestReceived() method. - * \param request Pointer to a USBGenericRequest instance. - */ -uint32_t CDCDSerial_RequestHandler(const USBGenericRequest *request) -{ - CDCDSerialPort * pCdcd = &cdcdSerial; - - TRACE_INFO_WP("Cdcf "); - return CDCDSerialPort_RequestHandler(pCdcd, request); -} - -/** - * Receives data from the host through the virtual COM port created by - * the CDC device serial driver. This function behaves like USBD_Read. - * \param data Pointer to the data buffer to put received data. - * \param size Size of the data buffer in bytes. - * \param callback Optional callback function to invoke when the transfer - * finishes. - * \param argument Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -uint32_t CDCDSerial_Read(void *data, - uint32_t size, - TransferCallback callback, - void *argument) -{ - CDCDSerialPort * pCdcd = &cdcdSerial; - return CDCDSerialPort_Read(pCdcd, data, size, callback, argument); -} - -/** - * Sends a data buffer through the virtual COM port created by the CDC - * device serial driver. This function behaves exactly like USBD_Write. - * \param data Pointer to the data buffer to send. - * \param size Size of the data buffer in bytes. - * \param callback Optional callback function to invoke when the transfer - * finishes. - * \param argument Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -uint32_t CDCDSerial_Write(void *data, - uint32_t size, - TransferCallback callback, - void *argument) -{ - CDCDSerialPort * pCdcd = &cdcdSerial; - return CDCDSerialPort_Write(pCdcd, data, size, callback, argument); -} - -/** - * Returns the current control line state of the RS-232 line. - */ -uint8_t CDCDSerial_GetControlLineState(void) -{ - CDCDSerialPort * pCdcd = &cdcdSerial; - return CDCDSerialPort_GetControlLineState(pCdcd); -} - -/** - * Copy current line coding settings to pointered space. - * \param pLineCoding Pointer to CDCLineCoding instance. - */ -void CDCDSerial_GetLineCoding(CDCLineCoding* pLineCoding) -{ - CDCDSerialPort * pCdcd = &cdcdSerial; - CDCDSerialPort_GetLineCoding(pCdcd, pLineCoding); -} - -/** - * Returns the current status of the RS-232 line. - */ -uint16_t CDCDSerial_GetSerialState(void) -{ - CDCDSerialPort * pCdcd = &cdcdSerial; - return CDCDSerialPort_GetSerialState(pCdcd); -} - -/** - * Sets the current serial state of the device to the given value. - * \param serialState New device state. - */ -void CDCDSerial_SetSerialState(uint16_t serialState) -{ - CDCDSerialPort * pCdcd = &cdcdSerial; - CDCDSerialPort_SetSerialState(pCdcd, serialState); -} - -WEAK uint8_t CDCDSerial_LineCodingIsToChange(CDCLineCoding * pLineCoding) -{ - /* Nothing to do */ -} - -WEAK void CDCDSerial_ControlLineStateChanged(uint8_t DTR,uint8_t RTS) -{ - /* Nothing to do */ -} -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialDriver.c b/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialDriver.c deleted file mode 100644 index b96ce856..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialDriver.c +++ /dev/null @@ -1,116 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * Title: CDCDSerialDriver implementation - * - * About: Purpose - * Implementation of the CDCDSerialDriver class methods. - */ - -/** \addtogroup usbd_cdc - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "CDCDSerialDriver.h" - -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes the USB Device CDC serial driver & USBD Driver. - * \param pDescriptors Pointer to Descriptors list for CDC Serial Device. - */ -void CDCDSerialDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Initialize the standard driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - 0); /* Multiple settings for interfaces not supported */ - - CDCDSerial_Initialize(pUsbd, CDCDSerialDriver_CC_INTERFACE); - - /* Initialize the USB driver */ - USBD_Init(); -} - -/** - * Invoked whenever the active configuration of device is changed by the - * host. - * \param cfgnum Configuration number. - */ -void CDCDSerialDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBConfigurationDescriptor *pDesc; - if (cfgnum) { - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - CDCDSerial_ConfigureFunction((USBGenericDescriptor *)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Handles CDC-specific SETUP requests. Should be called from a - * re-implementation of USBDCallbacks_RequestReceived() method. - * \param request Pointer to a USBGenericRequest instance. - */ -void CDCDSerialDriver_RequestHandler(const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - TRACE_INFO_WP("NewReq "); - if (CDCDSerial_RequestHandler(request)) - USBDDriver_RequestHandler(pUsbd, request); -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialDriver_Callbacks.c b/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialDriver_Callbacks.c deleted file mode 100644 index 8821d04d..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialDriver_Callbacks.c +++ /dev/null @@ -1,67 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 - by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include "CDCDSerialDriver.h" - -/*--------------------------------------------------------------------------- - * Default callback functions - *---------------------------------------------------------------------------*/ - -/** - * Invoked when the CDC LineCoding is requested to changed - * \param port Port number. - * \param pLineCoding Pointer to new LineCoding settings. - */ -extern WEAK uint8_t CDCDSerialDriver_LineCodingIsToChange( - CDCLineCoding * pLineCoding) -{ - /* Accept any of linecoding settings */ - return USBD_STATUS_SUCCESS; -} - -/** - * Invoked when the CDC ControlLineState is changed - * \param port Port number. - * \param DTR New DTR value. - * \param RTS New RTS value. - */ -extern WEAK void CDCDSerialDriver_ControlLineStateChanged(uint8_t DTR, - uint8_t RTS) -{ - /* Do nothing */ -} - diff --git a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialPort.c b/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialPort.c deleted file mode 100644 index e2b188a1..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/cdc-serial/CDCDSerialPort.c +++ /dev/null @@ -1,455 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * Implementation of the CDCDSerialPort class methods. - */ - -/** \addtogroup usbd_cdc - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** Parse data extention for descriptor parsing */ -typedef struct _CDCDParseData { - /** Pointer to CDCDSerialPort instance */ - CDCDSerialPort * pCdcd; - /** Pointer to found interface descriptor */ - USBInterfaceDescriptor * pIfDesc; - -} CDCDParseData; - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** Line coding values */ -static CDCLineCoding lineCoding; - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/** - * Parse descriptors: Interface, Bulk IN/OUT, Interrupt IN. - * \param desc Pointer to descriptor list. - * \param arg Argument, pointer to AUDDParseData instance. - */ -static uint32_t _Interfaces_Parse(USBGenericDescriptor *pDesc, - CDCDParseData * pArg) -{ - CDCDSerialPort *pCdcd = pArg->pCdcd; - - /* Not a valid descriptor */ - if (pDesc->bLength == 0) - return USBRC_PARAM_ERR; - - /* Find interface descriptor */ - if (pDesc->bDescriptorType == USBGenericDescriptor_INTERFACE) { - USBInterfaceDescriptor *pIf = (USBInterfaceDescriptor*)pDesc; - - /* Obtain interface from descriptor */ - if (pCdcd->bInterfaceNdx == 0xFF) { - /* First interface is communication */ - if (pIf->bInterfaceClass == - CDCCommunicationInterfaceDescriptor_CLASS) { - pCdcd->bInterfaceNdx = pIf->bInterfaceNumber; - pCdcd->bNumInterface = 2; - } - /* Only data interface */ - else if(pIf->bInterfaceClass == CDCDataInterfaceDescriptor_CLASS) { - pCdcd->bInterfaceNdx = pIf->bInterfaceNumber; - pCdcd->bNumInterface = 1; - } - pArg->pIfDesc = pIf; - } - else if (pCdcd->bInterfaceNdx <= pIf->bInterfaceNumber - && pCdcd->bInterfaceNdx + pCdcd->bNumInterface - > pIf->bInterfaceNumber) { - pArg->pIfDesc = pIf; - } - } - - /* Parse valid interfaces */ - if (pArg->pIfDesc == 0) - return 0; - - /* Find endpoint descriptors */ - if (pDesc->bDescriptorType == USBGenericDescriptor_ENDPOINT) { - USBEndpointDescriptor *pEp = (USBEndpointDescriptor*)pDesc; - switch(pEp->bmAttributes & 0x3) { - case USBEndpointDescriptor_INTERRUPT: - if (pEp->bEndpointAddress & 0x80) - pCdcd->bIntInPIPE = pEp->bEndpointAddress & 0x7F; - break; - case USBEndpointDescriptor_BULK: - if (pEp->bEndpointAddress & 0x80) - pCdcd->bBulkInPIPE = pEp->bEndpointAddress & 0x7F; - else - pCdcd->bBulkOutPIPE = pEp->bEndpointAddress; - } - } - - if ( pCdcd->bInterfaceNdx != 0xFF - && pCdcd->bBulkInPIPE != 0 - && pCdcd->bBulkOutPIPE != 0) - return USBRC_FINISHED; - - return 0; -} - -/** - * Callback function which should be invoked after the data of a - * SetLineCoding request has been retrieved. Sends a zero-length packet - * to the host for acknowledging the request. - * \param pCdcd Pointer to CDCDSerialPort instance. - */ -static void _SetLineCodingCallback(CDCDSerialPort * pCdcd) -{ - uint32_t exec = 1; - if (pCdcd->fEventHandler) { - uint32_t rc = pCdcd->fEventHandler( - CDCDSerialPortEvent_SETLINECODING, - (uint32_t)(&lineCoding), - pCdcd->pArg); - if (rc == USBD_STATUS_SUCCESS) { - pCdcd->lineCoding.dwDTERate = lineCoding.dwDTERate; - pCdcd->lineCoding.bCharFormat = lineCoding.bCharFormat; - pCdcd->lineCoding.bParityType = lineCoding.bParityType; - pCdcd->lineCoding.bDataBits = lineCoding.bDataBits; - } - else - exec = 0; - } - if (exec) USBD_Write(0, 0, 0, 0, 0); - else USBD_Stall(0); -} - -/** - * Receives new line coding information from the USB host. - * \param pCdcd Pointer to CDCDSerialPort instance. - */ -static void _SetLineCoding(CDCDSerialPort * pCdcd) -{ - TRACE_INFO_WP("sLineCoding "); - - USBD_Read(0, - (void *) & (lineCoding), - sizeof(CDCLineCoding), - (TransferCallback)_SetLineCodingCallback, - (void*)pCdcd); -} - -/** - * Sends the current line coding information to the host through Control - * endpoint 0. - * \param pCdcd Pointer to CDCDSerialPort instance. - */ -static void _GetLineCoding(CDCDSerialPort * pCdcd) -{ - TRACE_INFO_WP("gLineCoding "); - - USBD_Write(0, - (void *) &(pCdcd->lineCoding), - sizeof(CDCLineCoding), - 0, - 0); -} - -/** - * Changes the state of the serial driver according to the information - * sent by the host via a SetControlLineState request, and acknowledges - * the request with a zero-length packet. - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param request Pointer to a USBGenericRequest instance. - */ -static void _SetControlLineState( - CDCDSerialPort * pCdcd, - const USBGenericRequest *request) -{ - uint8_t DTR, RTS; - - DTR = ((request->wValue & CDCControlLineState_DTR) > 0); - RTS = ((request->wValue & CDCControlLineState_RTS) > 0); - TRACE_INFO_WP("sControlLineState(%d, %d) ", DTR, RTS); - - pCdcd->bControlLineState = (uint8_t)request->wValue; - USBD_Write(0, 0, 0, 0, 0); - - if (pCdcd->fEventHandler) - pCdcd->fEventHandler(CDCDSerialPortEvent_SETCONTROLLINESTATE, - (uint32_t)pCdcd->bControlLineState, - pCdcd->pArg); -} - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes the USB Device CDC serial port function. - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param pUsbd Pointer to USBDDriver instance. - * \param fEventHandler Pointer to event handler function. - * \param firstInterface First interface index for the function - * (0xFF to parse from descriptors). - * \param numInterface Number of interfaces for the function. - */ -void CDCDSerialPort_Initialize(CDCDSerialPort * pCdcd, - USBDDriver * pUsbd, - CDCDSerialPortEventHandler fEventHandler, - void * pArg, - uint8_t firstInterface,uint8_t numInterface) -{ - TRACE_INFO("CDCDSerialPort_Initialize\n\r"); - - /* Initialize event handler */ - pCdcd->fEventHandler = fEventHandler; - pCdcd->pArg = pArg; - - /* Initialize USB Device Driver interface */ - pCdcd->pUsbd = pUsbd; - pCdcd->bInterfaceNdx = firstInterface; - pCdcd->bNumInterface = numInterface; - pCdcd->bIntInPIPE = 0; - pCdcd->bBulkInPIPE = 0; - pCdcd->bBulkOutPIPE = 0; - - /* Initialize Abstract Control Model attributes */ - pCdcd->bControlLineState = 0; - pCdcd->wSerialState = 0; - CDCLineCoding_Initialize(&(pCdcd->lineCoding), - 115200, - CDCLineCoding_ONESTOPBIT, - CDCLineCoding_NOPARITY, - 8); -} - -/** - * Parse CDC Serial Port information for CDCDSerialPort instance. - * Accepted interfaces: - * - Communication Interface + Data Interface - * - Data Interface ONLY - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param pDescriptors Pointer to descriptor list. - * \param dwLength Descriptor list size in bytes. - */ -USBGenericDescriptor *CDCDSerialPort_ParseInterfaces( - CDCDSerialPort *pCdcd, - USBGenericDescriptor *pDescriptors, - uint32_t dwLength) -{ - CDCDParseData parseData; - - parseData.pCdcd = pCdcd; - parseData.pIfDesc = 0; - - return USBGenericDescriptor_Parse( - pDescriptors, dwLength, - (USBDescriptorParseFunction)_Interfaces_Parse, - &parseData); -} - - -/** - * Handles CDC-specific SETUP requests. Should be called from a - * re-implementation of USBDCallbacks_RequestReceived() method. - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param request Pointer to a USBGenericRequest instance. - * \return USBRC_SUCCESS if request handled, otherwise error. - */ -uint32_t CDCDSerialPort_RequestHandler( - CDCDSerialPort *pCdcd, - const USBGenericRequest *request) -{ - if (USBGenericRequest_GetType(request) != USBGenericRequest_CLASS) - return USBRC_PARAM_ERR; - - TRACE_INFO_WP("Cdcs "); - - /* Validate interface */ - if (request->wIndex >= pCdcd->bInterfaceNdx && - request->wIndex < pCdcd->bInterfaceNdx + pCdcd->bNumInterface) { - } - else { - return USBRC_PARAM_ERR; - } - - /* Handle the request */ - switch (USBGenericRequest_GetRequest(request)) { - - case CDCGenericRequest_SETLINECODING: - - _SetLineCoding(pCdcd); - break; - - case CDCGenericRequest_GETLINECODING: - - _GetLineCoding(pCdcd); - break; - - case CDCGenericRequest_SETCONTROLLINESTATE: - - _SetControlLineState(pCdcd, request); - break; - - default: - - return USBRC_PARAM_ERR; - } - - return USBRC_SUCCESS; -} - -/** - * Receives data from the host through the virtual COM port created by - * the CDC device serial driver. This function behaves like USBD_Read. - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param pData Pointer to the data buffer to put received data. - * \param dwSize Size of the data buffer in bytes. - * \param fCallback Optional callback function to invoke when the transfer - * finishes. - * \param pArg Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -uint32_t CDCDSerialPort_Read(const CDCDSerialPort * pCdcd, - void * pData,uint32_t dwSize, - TransferCallback fCallback,void * pArg) -{ - if (pCdcd->bBulkOutPIPE == 0) - return USBRC_PARAM_ERR; - - return USBD_Read(pCdcd->bBulkOutPIPE, - pData, dwSize, - fCallback, pArg); -} - -/** - * Sends a data buffer through the virtual COM port created by the CDC - * device serial driver. This function behaves exactly like USBD_Write. - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param pData Pointer to the data buffer to send. - * \param dwSize Size of the data buffer in bytes. - * \param fCallback Optional callback function to invoke when the transfer - * finishes. - * \param pArg Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -uint32_t CDCDSerialPort_Write(const CDCDSerialPort * pCdcd, - void * pData, uint32_t dwSize, - TransferCallback fCallback, void * pArg) -{ - if (pCdcd->bBulkInPIPE == 0) - return USBRC_PARAM_ERR; - - return USBD_Write(pCdcd->bBulkInPIPE, - pData, dwSize, - fCallback, pArg); -} - -/** - * Returns the current control line state of the RS-232 line. - * \param pCdcd Pointer to CDCDSerialPort instance. - */ -uint8_t CDCDSerialPort_GetControlLineState(const CDCDSerialPort * pCdcd) -{ - return pCdcd->bControlLineState; -} - -/** - * Copy current line coding settings to pointered space. - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param pLineCoding Pointer to CDCLineCoding instance. - */ -void CDCDSerialPort_GetLineCoding(const CDCDSerialPort * pCdcd, - CDCLineCoding* pLineCoding) -{ - if (pLineCoding) { - pLineCoding->dwDTERate = pCdcd->lineCoding.dwDTERate; - pLineCoding->bCharFormat = pCdcd->lineCoding.bCharFormat; - pLineCoding->bParityType = pCdcd->lineCoding.bParityType; - pLineCoding->bDataBits = pCdcd->lineCoding.bDataBits; - } -} - -/** - * Returns the current status of the RS-232 line. - * \param pCdcd Pointer to CDCDSerialPort instance. - */ -uint16_t CDCDSerialPort_GetSerialState(const CDCDSerialPort * pCdcd) -{ - return pCdcd->wSerialState; -} - -/** - * Sets the current serial state of the device to the given value. - * \param pCdcd Pointer to CDCDSerialPort instance. - * \param wSerialState New device state. - */ -void CDCDSerialPort_SetSerialState(CDCDSerialPort * pCdcd, - uint16_t wSerialState) -{ - if (pCdcd->bIntInPIPE == 0) - return; - - /* If new state is different from previous one, send a notification to the - host */ - if (pCdcd->wSerialState != wSerialState) { - - pCdcd->wSerialState = wSerialState; - USBD_Write(pCdcd->bIntInPIPE, - &(pCdcd->wSerialState), - 2, - 0, - 0); - - /* Reset one-time flags */ - pCdcd->wSerialState &= ~(CDCSerialState_OVERRUN - | CDCSerialState_PARITY - | CDCSerialState_FRAMING - | CDCSerialState_RINGSIGNAL - | CDCSerialState_BREAK); - } -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/composite/AUDDFunction.c b/firmware/atmel_softpack_libraries/usb/device/composite/AUDDFunction.c deleted file mode 100644 index 9a3ebea4..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/composite/AUDDFunction.c +++ /dev/null @@ -1,235 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ -/** \file */ - -/** \addtogroup usbd_aud_fun - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include -#include - -#include - -#include -#include -#include - -/*---------------------------------------------------------------------------- - * Internal types - *----------------------------------------------------------------------------*/ - -/** - * \brief Audio speaker driver struct. - */ -typedef struct _AUDDFunction { - /** Speaker & Phone function */ - AUDDSpeakerPhone drv; - /** Stream instance for speaker */ - AUDDStream speaker; - /** Stream instance for microphone */ - AUDDStream mic; -} AUDDFunction; - -/*---------------------------------------------------------------------------- - * Internal variables - *----------------------------------------------------------------------------*/ - -/** Global USB audio function driver instance. */ -static AUDDFunction auddFunction; - -/*---------------------------------------------------------------------------- - * Internal functions - *----------------------------------------------------------------------------*/ - -/** - * Callback triggerred after the mute or volume status of the channel has been - * changed. - * \param ec Event code. - * \param channel Channel number. - * \param pArg Pointer to AUDDStream instance. - */ -static void AUDDFunction_EventCallback(uint32_t ec, - uint8_t channel, - AUDDStream *pArg) -{ - AUDDFunction *pAudf = &auddFunction; - uint8_t mic = ((uint32_t)pArg == (uint32_t)(&pAudf->mic)); - if (ec == AUDD_EC_MuteChanged) { - if (AUDDFunction_MuteChanged) - AUDDFunction_MuteChanged(mic, channel, pArg->bmMute); - } - else if (ec == AUDD_EC_VolumeChanged) { - /* Not supported now */ - } -} - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Initializes an USB audio speaker device driver, as well as the underlying - * USB controller. - */ -void AUDDFunction_Initialize(USBDDriver *pUsbd, uint8_t bInterface) -{ - AUDDFunction *pAudf = &auddFunction; - AUDDSpeakerPhone *pDrv = &pAudf->drv; - AUDDStream *pSpk = &pAudf->speaker; - AUDDStream *pMic = &pAudf->mic; - - /* 0: Speaker */ - AUDDSpeakerPhone_InitializeStream( - pSpk, AUDDFunction_MaxNumSpeakerChannels, 0, - (AUDDStreamEventCallback)AUDDFunction_EventCallback, - (void*)pSpk); - /* 1: Mic */ - AUDDSpeakerPhone_InitializeStream( - pMic, AUDDFunction_MaxNumMicrophoneChannels, 0, - (AUDDStreamEventCallback)AUDDFunction_EventCallback, - (void*)pMic); - /* Audio Driver initialize */ - AUDDSpeakerPhone_Initialize(pDrv, pUsbd, pSpk, pMic); - -} - -/** - * Configure function with expected descriptors and start functionality. - * Usually invoked when device is configured. - * \pDescriptors Pointer to the descriptors for function configure. - * \wLength Length of descriptors in number of bytes. - */ -void AUDDFunction_Configure(USBGenericDescriptor *pDescriptors, - uint16_t wLength) -{ - AUDDFunction *pAudf = &auddFunction; - AUDDSpeakerPhone *pDrv = &pAudf->drv; - AUDDSpeakerPhone_ParseInterfaces(pDrv, pDescriptors, wLength); -} - -/** - * Invoked whenever the active setting of an interface is changed by the - * host. Changes the status of the third LED accordingly. - * \param interface Interface number. - * \param setting Newly active setting. - */ -void AUDDFunction_InterfaceSettingChangedHandler(uint8_t interface, - uint8_t setting) -{ - AUDDFunction *pAudf = &auddFunction; - AUDDSpeakerPhone *pDrv = &pAudf->drv; - if (setting == 0) AUDDSpeakerPhone_CloseStream(pDrv, interface); - if (AUDDFunction_StreamSettingChanged) { - uint8_t mic = (interface == pDrv->pMicrophone->bAsInterface); - AUDDFunction_StreamSettingChanged(mic, setting); - } -} - -/** - * Handles AUDIO-specific USB requests sent by the host - * \param request Pointer to a USBGenericRequest instance. - * \return USBRC_SUCCESS if request is handled. - */ -uint32_t AUDDFunction_RequestHandler( - const USBGenericRequest *request) -{ - AUDDFunction *pAudf = &auddFunction; - AUDDSpeakerPhone *pDrv = &pAudf->drv; - return AUDDSpeakerPhone_RequestHandler(pDrv, request); -} - -/** - * Reads incoming audio data sent by the USB host into the provided buffer. - * When the transfer is complete, an optional callback function is invoked. - * \param buffer Pointer to the data storage buffer. - * \param length Size of the buffer in bytes. - * \param callback Optional callback function. - * \param argument Optional argument to the callback function. - * \return if the transfer is started successfully; - * otherwise an error code. - */ -uint8_t AUDDFunction_Read(void *buffer, - uint32_t length, - TransferCallback callback, - void *argument) -{ - AUDDFunction *pAudf = &auddFunction; - AUDDSpeakerPhone *pDrv = &pAudf->drv; - return AUDDSpeakerPhone_Read(pDrv, buffer, length, callback, argument); -} - -/** - * Initialize Frame List for sending audio data. - * - * \param pListInit Pointer to the allocated list for audio write. - * \param pDmaInit Pointer to the allocated DMA descriptors for autio write - * (if DMA supported). - * \param listSize Circular list size. - * \param delaySize Start transfer after delaySize frames filled in. - * \param callback Optional callback function for transfer. - * \param argument Optional callback argument. - * \return USBD_STATUS_SUCCESS if setup successfully; otherwise an error code. - */ -uint8_t AUDDFunction_SetupWrite(void * pListInit, - void * pDmaInit, - uint16_t listSize, - uint16_t delaySize, - TransferCallback callback, - void * argument) -{ - AUDDFunction *pAudf = &auddFunction; - AUDDSpeakerPhone *pDrv = &pAudf->drv; - return AUDDSpeakerPhone_SetupWrite(pDrv, - pListInit, pDmaInit, listSize, delaySize, - callback, argument); -} - -/** - * Add frame buffer to audio sending list. - * \buffer Pointer to data frame to send. - * \length Frame size in bytes. - * \return USBD_STATUS_SUCCESS if the transfer is started successfully; - * otherwise an error code. - */ -uint8_t AUDDFunction_Write(void* buffer, uint16_t length) -{ - AUDDFunction *pAudf = &auddFunction; - AUDDSpeakerPhone *pDrv = &pAudf->drv; - return AUDDSpeakerPhone_Write(pDrv, buffer, length); -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/composite/CDCAUDDDriver.c b/firmware/atmel_softpack_libraries/usb/device/composite/CDCAUDDDriver.c deleted file mode 100644 index c146052d..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/composite/CDCAUDDDriver.c +++ /dev/null @@ -1,139 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup usbd_composite_cdcaud - *@{ - */ -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include - -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Defines - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal variables - *---------------------------------------------------------------------------*/ - -/** Array for storing the current setting of each interface */ -static uint8_t bAltInterfaces[CDCAUDDDriverDescriptors_MaxNumInterfaces]; - -/*--------------------------------------------------------------------------- - * Internal functions - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Initializes the USB device composite device driver. - */ -void CDCAUDDDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Initialize the standard USB driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - bAltInterfaces); - - /* CDC */ - CDCDSerial_Initialize(pUsbd, CDCAUDDDriverDescriptors_CDC_INTERFACE); - /* Audio */ - AUDDFunction_Initialize(pUsbd, CDCAUDDDriverDescriptors_AUD_INTERFACE); - - /* Initialize the USB driver */ - USBD_Init(); -} - -/** - * Invoked whenever the configuration value of a device is changed by the host - * \param cfgnum Configuration number. - */ -void CDCAUDDDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBConfigurationDescriptor *pDesc; - if (cfgnum > 0) { - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - /* CDC */ - CDCDSerial_ConfigureFunction((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - /* AUD */ - AUDDFunction_Configure((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Invoked whenever the active setting of an interface is changed by the - * host. Changes the status of the third LED accordingly. - * \param interface Interface number. - * \param setting Newly active setting. - */ -void CDCAUDDDriver_InterfaceSettingChangedHandler(uint8_t interface, - uint8_t setting) -{ - AUDDFunction_InterfaceSettingChangedHandler(interface, setting); -} - -/** - * Handles composite-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void CDCAUDDDriver_RequestHandler(const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - TRACE_INFO_WP("NewReq "); - - if (CDCDSerial_RequestHandler(request) == USBRC_SUCCESS) - return; - - if (AUDDFunction_RequestHandler(request) == USBRC_SUCCESS) - return; - - USBDDriver_RequestHandler(pUsbd, request); -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/composite/CDCHIDDDriver.c b/firmware/atmel_softpack_libraries/usb/device/composite/CDCHIDDDriver.c deleted file mode 100644 index 45509432..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/composite/CDCHIDDDriver.c +++ /dev/null @@ -1,138 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup usbd_composite_cdchid - *@{ - */ -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include - -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Defines - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal variables - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal functions - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Initializes the USB device composite device driver. - */ -void CDCHIDDDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Initialize the standard USB driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - 0); - - /* CDC */ - CDCDSerial_Initialize(pUsbd, CDCHIDDDriverDescriptors_CDC_INTERFACE); - /* HID */ - HIDDKeyboard_Initialize(pUsbd, CDCHIDDDriverDescriptors_HID_INTERFACE); - - /* Initialize the USB driver */ - USBD_Init(); -} - -/** - * Invoked whenever the configuration value of a device is changed by the host - * \param cfgnum Configuration number. - */ -void CDCHIDDDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBConfigurationDescriptor *pDesc; - if (cfgnum > 0) { - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - /* CDC */ - CDCDSerial_ConfigureFunction((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - /* HID */ - HIDDKeyboard_ConfigureFunction((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Handles composite-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void CDCHIDDDriver_RequestHandler(const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - TRACE_INFO_WP("NewReq "); - - if (CDCDSerial_RequestHandler(request) == USBRC_SUCCESS) - return; - - if (HIDDKeyboard_RequestHandler(request) == USBRC_SUCCESS) - return; - - USBDDriver_RequestHandler(pUsbd, request); -} - -/** - * Starts a remote wake-up sequence if the host has explicitely enabled it - * by sending the appropriate SET_FEATURE request. - */ -void CDCHIDDDriver_RemoteWakeUp(void) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Remote wake-up has been enabled */ - if (USBDDriver_IsRemoteWakeUpEnabled(pUsbd)) { - - USBD_RemoteWakeUp(); - } -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/composite/CDCMSDDriver.c b/firmware/atmel_softpack_libraries/usb/device/composite/CDCMSDDriver.c deleted file mode 100644 index 55fe6fb5..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/composite/CDCMSDDriver.c +++ /dev/null @@ -1,128 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ -/** \file */ -/** \addtogroup usbd_composite_cdcmsd - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include - -#include - -#include -#include - -/*--------------------------------------------------------------------------- - * Defines - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal variables - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal functions - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Initializes the USB device CDCMSD device driver. - */ -void CDCMSDDriver_Initialize( - const USBDDriverDescriptors *pDescriptors, - MSDLun *pLuns, unsigned char numLuns) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Initialize the standard USB driver */ - USBDDriver_Initialize(pUsbd, pDescriptors, 0); - - /* CDC */ - CDCDSerial_Initialize(pUsbd, CDCMSDDriverDescriptors_CDC_INTERFACE); - - /* MSD */ - MSDFunction_Initialize(pUsbd, CDCMSDDriverDescriptors_MSD_INTERFACE, - pLuns, numLuns); - - /* Initialize the USB driver */ - USBD_Init(); -} - -/** - * Invoked whenever the configuration value of a device is changed by the host - * \param cfgnum Configuration number. - */ -void CDCMSDDriver_ConfigurationChangedHandler(unsigned char cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBConfigurationDescriptor *pDesc; - if (cfgnum > 0) { - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - /* CDC */ - CDCDSerial_ConfigureFunction((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - /* MSD */ - MSDFunction_Configure((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Handles CDCMSD-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void CDCMSDDriver_RequestHandler(const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - TRACE_INFO_WP("NewReq "); - - if (CDCDSerial_RequestHandler(request) == USBRC_SUCCESS) - return; - - if (MSDFunction_RequestHandler(request) == USBRC_SUCCESS) - return; - - USBDDriver_RequestHandler(pUsbd, request); -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/composite/DUALCDCDDriver.c b/firmware/atmel_softpack_libraries/usb/device/composite/DUALCDCDDriver.c deleted file mode 100644 index 7b441997..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/composite/DUALCDCDDriver.c +++ /dev/null @@ -1,194 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ -/** \file */ -/** \addtogroup usbd_composite_cdccdc - *@{ - */ -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -/* GENERAL */ -#include - -/* USB */ -#include -#include -#include - -/* - DUALCDC */ -#include - -/*--------------------------------------------------------------------------- - * Defines - *---------------------------------------------------------------------------*/ - -/** Number of CDC serial ports */ -#define NUM_PORTS 2 - -/** Interface setting spaces (4 byte aligned) */ -#define NUM_INTERFACES ((DUALCDCDDriverDescriptors_NUMINTERFACE+3)&0xFC) - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -/** Dual-CDC-Serial device driver struct */ -typedef struct _DualCdcdSerialDriver { - /** CDC Serial Port List */ - CDCDSerialPort cdcdSerialPort[NUM_PORTS]; -} DualCdcdSerialDriver; - -/*--------------------------------------------------------------------------- - * Internal variables - *---------------------------------------------------------------------------*/ - -/** Dual CDC Serial device driver instance */ -DualCdcdSerialDriver dualcdcdDriver; - -/*--------------------------------------------------------------------------- - * Internal functions - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Initializes the USB device composite device driver. - * \param pDescriptors Pointer to Descriptors list for CDC Serial Device. - */ -void DUALCDCDDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - CDCDSerialPort *pCdcd = &dualcdcdDriver.cdcdSerialPort[0]; - - TRACE_INFO("DUALCDCDDriver_Initialize\n\r"); - - pCdcd = &dualcdcdDriver.cdcdSerialPort[0]; - CDCDSerialPort_Initialize(pCdcd, pUsbd, - 0, - 0, - DUALCDCDDriverDescriptors_INTERFACENUM0, 2); - - pCdcd = &dualcdcdDriver.cdcdSerialPort[1]; - CDCDSerialPort_Initialize(pCdcd, pUsbd, - 0, - 0, - DUALCDCDDriverDescriptors_INTERFACENUM1, 2); - - /* Initialize the standard USB driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - 0); - /* Initialize the USB driver */ - USBD_Init(); -} - -/** - * Invoked whenever the active configuration of device is changed by the - * host. - * \param cfgnum Configuration number. - */ -void DUALCDCDDriver_ConfigurationChangeHandler(uint8_t cfgnum) -{ - CDCDSerialPort *pCdcd = &dualcdcdDriver.cdcdSerialPort[0]; - USBDDriver *pUsbd = pCdcd->pUsbd; - USBConfigurationDescriptor *pDesc; - USBGenericDescriptor *pD; - uint32_t i, len; - - if (cfgnum > 0) { - - /* Parse endpoints for data & notification */ - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - - pD = (USBGenericDescriptor *)pDesc; - len = pDesc->wTotalLength; - - for (i = 0; i < NUM_PORTS; i ++) { - pCdcd = &dualcdcdDriver.cdcdSerialPort[i]; - pD = CDCDSerialPort_ParseInterfaces(pCdcd, pD, len); - len = pDesc->wTotalLength - ((uint32_t)pD - (uint32_t)pDesc); - } - } -} - - -/** - * Handles composite-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void DUALCDCDDriver_RequestHandler(const USBGenericRequest *request) -{ - CDCDSerialPort *pCdcd = 0; - USBDDriver *pUsbd = 0; - uint32_t rc, i; - - TRACE_INFO_WP("NewReq "); - - for (i = 0; i < NUM_PORTS; i ++) { - pCdcd = &dualcdcdDriver.cdcdSerialPort[i]; - rc = CDCDSerialPort_RequestHandler(pCdcd, request); - if (rc == USBRC_SUCCESS) - break; - } - - /* Not handled by CDC Serial */ - if (rc != USBRC_SUCCESS) { - if (USBGenericRequest_GetType(request) == USBGenericRequest_STANDARD) { - pUsbd = pCdcd->pUsbd; - USBDDriver_RequestHandler(pUsbd, request); - } - else { - TRACE_WARNING( - "DUALCDCDDriver_RequestHandler: Unsupported request (%d,%d)\n\r", - USBGenericRequest_GetType(request), - USBGenericRequest_GetRequest(request)); - USBD_Stall(0); - } - } - -} - -/** - * Return CDCDSerialPort for serial port operations. - * \param port Port number. - */ -CDCDSerialPort *DUALCDCDDriver_GetSerialPort(uint32_t port) -{ - if (port < NUM_PORTS) - return &dualcdcdDriver.cdcdSerialPort[port]; - - return 0; -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/composite/HIDAUDDDriver.c b/firmware/atmel_softpack_libraries/usb/device/composite/HIDAUDDDriver.c deleted file mode 100644 index 95d56258..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/composite/HIDAUDDDriver.c +++ /dev/null @@ -1,139 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup usbd_composite_hidaud - *@{ - */ -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include - -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Defines - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal variables - *---------------------------------------------------------------------------*/ - -/** Array for storing the current setting of each interface */ -static uint8_t bAltInterfaces[HIDAUDDDriverDescriptors_NUMINTERFACE]; - -/*--------------------------------------------------------------------------- - * Internal functions - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Initializes the USB device composite device driver. - */ -void HIDAUDDDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Initialize the standard USB driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - bAltInterfaces); - - /* HID */ - HIDDKeyboard_Initialize(pUsbd, HIDAUDDDriverDescriptors_HID_INTERFACE); - /* Audio */ - AUDDFunction_Initialize(pUsbd, HIDAUDDDriverDescriptors_AUD_INTERFACE); - - /* Initialize the USB driver */ - USBD_Init(); -} - -/** - * Invoked whenever the configuration value of a device is changed by the host - * \param cfgnum Configuration number. - */ -void HIDAUDDDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBConfigurationDescriptor *pDesc; - if (cfgnum > 0) { - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - /* CDC */ - HIDDKeyboard_ConfigureFunction((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - /* AUD */ - AUDDFunction_Configure((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Invoked whenever the active setting of an interface is changed by the - * host. Changes the status of the third LED accordingly. - * \param interface Interface number. - * \param setting Newly active setting. - */ -void HIDAUDDDriver_InterfaceSettingChangedHandler(uint8_t interface, - uint8_t setting) -{ - AUDDFunction_InterfaceSettingChangedHandler(interface, setting); -} - -/** - * Handles composite-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void HIDAUDDDriver_RequestHandler(const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - TRACE_INFO_WP("NewReq "); - - if (HIDDKeyboard_RequestHandler(request) == USBRC_SUCCESS) - return; - - if (AUDDFunction_RequestHandler(request) == USBRC_SUCCESS) - return; - - USBDDriver_RequestHandler(pUsbd, request); -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/composite/HIDMSDDriver.c b/firmware/atmel_softpack_libraries/usb/device/composite/HIDMSDDriver.c deleted file mode 100644 index 18986220..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/composite/HIDMSDDriver.c +++ /dev/null @@ -1,153 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - */ - -/** \addtogroup usbd_composite_hidmsd - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include - -#include - -#include -#include - -/*--------------------------------------------------------------------------- - * Defines - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal variables - *---------------------------------------------------------------------------*/ - -/*--------------------------------------------------------------------------- - * Internal functions - *---------------------------------------------------------------------------*/ - - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/** - * Initializes the USB device HIDMSD device driver. - */ -void HIDMSDDriver_Initialize( - const USBDDriverDescriptors *pDescriptors, - MSDLun *pLuns, uint8_t numLuns) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Initialize the standard USB driver */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - 0); - - /* HID */ - HIDDKeyboard_Initialize(pUsbd, HIDMSDDriverDescriptors_HID_INTERFACE); - - /* MSD */ - MSDFunction_Initialize(pUsbd, HIDMSDDriverDescriptors_MSD_INTERFACE, - pLuns, numLuns); - - /* Initialize the USB driver */ - USBD_Init(); -} - -/** - * Invoked whenever the configuration value of a device is changed by the host - * \param cfgnum Configuration number. - */ -void HIDMSDDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBConfigurationDescriptor *pDesc; - if (cfgnum > 0) { - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - /* HID */ - HIDDKeyboard_ConfigureFunction((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - /* MSD */ - MSDFunction_Configure((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Handles HIDMSD-specific USB requests sent by the host, and forwards - * standard ones to the USB device driver. - * \param request Pointer to a USBGenericRequest instance. - */ -void HIDMSDDriver_RequestHandler(const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - TRACE_INFO_WP("NewReq "); - - if (HIDDKeyboard_RequestHandler(request) == USBRC_SUCCESS) - return; - - if (MSDFunction_RequestHandler(request) == USBRC_SUCCESS) - return; - - USBDDriver_RequestHandler(pUsbd, request); -} - -/** - * Starts a remote wake-up sequence if the host has explicitely enabled it - * by sending the appropriate SET_FEATURE request. - */ -void HIDMSDDriver_RemoteWakeUp(void) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - /* Remote wake-up has been enabled */ - if (USBDDriver_IsRemoteWakeUpEnabled(pUsbd)) { - - USBD_RemoteWakeUp(); - } - /* Remote wake-up NOT enabled */ - else { - - TRACE_WARNING("HIDMSDDDriver_RemoteWakeUp: not enabled\n\r"); - } -} -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboard.c b/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboard.c deleted file mode 100644 index 76a40a86..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboard.c +++ /dev/null @@ -1,374 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_hid_key - *@{ - * Implement HID Keyboard Function For USB Device. - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include - -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Internal types - *------------------------------------------------------------------------------*/ - -/** - * Extended struct for an HID Keyboard Input report, for transfer driver to - * send reports. - */ -typedef struct _KBDInputReport { - /** Callback when report done */ - HIDDReportEventCallback fCallback; - /** Callback arguments */ - void* pArg; - - /** Report size (ID + DATA) */ - uint16_t wMaxSize; - /** Transfered size */ - uint16_t wTransferred; - /** Report idle rate */ - uint8_t bIdleRate; - /** Delay count for Idle */ - uint8_t bDelay; - /** Report ID */ - uint8_t bID; - /** Input Report Data Block */ - HIDDKeyboardInputReport sReport; -} KBDInputReport; - -/** - * Extended struct for an HID Keyboard Output report, for transfer driver to - * polling reports. - */ -typedef struct _KBDOutputReport { - /** Callback when report done */ - HIDDReportEventCallback fCallback; - /** Callback arguments */ - void* pArg; - - /** Report size (ID + DATA) */ - uint16_t wMaxSize; - /** Transfered size */ - uint16_t wTransferred; - /** Report idle rate */ - uint8_t bIdleRate; - /** Delay count for Idle */ - uint8_t bDelay; - /** Report ID */ - uint8_t bID; - /** Output Report Data Block */ - HIDDKeyboardOutputReport sReport; -} KBDOutputReport; - -/** - * Driver structure for an HID device implementing keyboard functionalities. - */ -typedef struct _HIDDKeyboard { - - /** USB HID Functionn */ - HIDDFunction hidDrv; - /** Input report list */ - HIDDReport *inputReports[1]; - /** Output report list */ - HIDDReport *outputReports[1]; -} HIDDKeyboard; - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** HIDD Keyboard Input Report Instance */ -static KBDInputReport inputReport; - -/** HIDD Keyboard Output Report Instance */ -static KBDOutputReport outputReport; - -/** Static instance of the HIDD keyboard device driver. */ -static HIDDKeyboard hiddKeyboard; - -/** Report descriptor used by the driver. */ -const uint8_t hiddKeyboardReportDescriptor[] = { - - HIDReport_GLOBAL_USAGEPAGE + 1, HIDGenericDesktop_PAGEID, - HIDReport_LOCAL_USAGE + 1, HIDGenericDesktop_KEYBOARD, - HIDReport_COLLECTION + 1, HIDReport_COLLECTION_APPLICATION, - - /* Input report: modifier keys */ - HIDReport_GLOBAL_REPORTSIZE + 1, 1, - HIDReport_GLOBAL_REPORTCOUNT + 1, 8, - HIDReport_GLOBAL_USAGEPAGE + 1, HIDKeypad_PAGEID, - HIDReport_LOCAL_USAGEMINIMUM + 1, - HIDDKeyboardDescriptors_FIRSTMODIFIERKEY, - HIDReport_LOCAL_USAGEMAXIMUM + 1, - HIDDKeyboardDescriptors_LASTMODIFIERKEY, - HIDReport_GLOBAL_LOGICALMINIMUM + 1, 0, - HIDReport_GLOBAL_LOGICALMAXIMUM + 1, 1, - HIDReport_INPUT + 1, HIDReport_VARIABLE, - - /* Input report: standard keys */ - HIDReport_GLOBAL_REPORTCOUNT + 1, 3, - HIDReport_GLOBAL_REPORTSIZE + 1, 8, - HIDReport_GLOBAL_LOGICALMINIMUM + 1, - HIDDKeyboardDescriptors_FIRSTSTANDARDKEY, - HIDReport_GLOBAL_LOGICALMAXIMUM + 1, - HIDDKeyboardDescriptors_LASTSTANDARDKEY, - HIDReport_GLOBAL_USAGEPAGE + 1, HIDKeypad_PAGEID, - HIDReport_LOCAL_USAGEMINIMUM + 1, - HIDDKeyboardDescriptors_FIRSTSTANDARDKEY, - HIDReport_LOCAL_USAGEMAXIMUM + 1, - HIDDKeyboardDescriptors_LASTSTANDARDKEY, - HIDReport_INPUT + 1, 0 /* Data array */, - - /* Output report: LEDs */ - HIDReport_GLOBAL_REPORTCOUNT + 1, 3, - HIDReport_GLOBAL_REPORTSIZE + 1, 1, - HIDReport_GLOBAL_USAGEPAGE + 1, HIDLeds_PAGEID, - HIDReport_GLOBAL_LOGICALMINIMUM + 1, 0, - HIDReport_GLOBAL_LOGICALMAXIMUM + 1, 1, - HIDReport_LOCAL_USAGEMINIMUM + 1, HIDLeds_NUMLOCK, - HIDReport_LOCAL_USAGEMAXIMUM + 1, HIDLeds_SCROLLLOCK, - HIDReport_OUTPUT + 1, HIDReport_VARIABLE, - - /* Output report: padding */ - HIDReport_GLOBAL_REPORTCOUNT + 1, 1, - HIDReport_GLOBAL_REPORTSIZE + 1, 5, - HIDReport_OUTPUT + 1, HIDReport_CONSTANT, - - HIDReport_ENDCOLLECTION -}; - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/** - * Callback invoked when an output report has been received from the host. - * Forward the new status of the LEDs to the user program via the - * HIDDKeyboardCallbacks_LedsChanged callback. - */ -static void HIDDKeyboard_ReportReceived(void) -{ - HIDDKeyboardOutputReport *pOut = &outputReport.sReport; - - /* Trigger callback */ - if (HIDDKeyboardCallbacks_LedsChanged) { - HIDDKeyboardCallbacks_LedsChanged( - pOut->numLockStatus, - pOut->capsLockStatus, - pOut->scrollLockStatus); - } -} - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes the HID keyboard device driver SW. - * (Init USBDDriver .., Init function driver .., Init USBD ...) - * \param pUsbd Pointer to USBDDriver instance. - * \param bInterfaceNb Interface number for the function. - */ -void HIDDKeyboard_Initialize(USBDDriver* pUsbd, uint8_t bInterfaceNb) -{ - HIDDKeyboard *pKbd = &hiddKeyboard; - HIDDFunction *pHidd = &pKbd->hidDrv; - - /* One input report */ - pKbd->inputReports[0] = (HIDDReport*)&inputReport; - HIDDFunction_InitializeReport(pKbd->inputReports[0], - sizeof(HIDDKeyboardInputReport), - 0, - 0, 0); - /* One output report */ - pKbd->outputReports[0] = (HIDDReport*)&outputReport; - HIDDFunction_InitializeReport( - pKbd->outputReports[0], - sizeof(HIDDKeyboardOutputReport), - 0, - (HIDDReportEventCallback)HIDDKeyboard_ReportReceived, 0); - - /* Function initialize */ - HIDDFunction_Initialize(pHidd, - pUsbd, bInterfaceNb, - hiddKeyboardReportDescriptor, - pKbd->inputReports, 1, - pKbd->outputReports, 1); -} - -/** - * Configure function with expected descriptors and start functionality. - * Usually invoked when device is configured. - * \pDescriptors Pointer to the descriptors for function configure. - * \wLength Length of descriptors in number of bytes. - */ -void HIDDKeyboard_ConfigureFunction(USBGenericDescriptor *pDescriptors, - uint16_t wLength) -{ - HIDDKeyboard *pKbd = &hiddKeyboard; - HIDDFunction *pHidd = &pKbd->hidDrv; - USBGenericDescriptor * pDesc = pDescriptors; - - pDesc = HIDDFunction_ParseInterface(pHidd, - pDescriptors, - wLength); - - /* Start receiving output reports */ - HIDDFunction_StartPollingOutputs(pHidd); -} - -/** - * Handles HID-specific SETUP request sent by the host. - * \param request Pointer to a USBGenericRequest instance. - * \return USBRC_SUCCESS if request is handled. - */ -uint32_t HIDDKeyboard_RequestHandler(const USBGenericRequest *request) -{ - HIDDKeyboard *pKbd = &hiddKeyboard; - HIDDFunction *pHidd = &pKbd->hidDrv; - - TRACE_INFO_WP("Kbd "); - - /* Process HID requests */ - return HIDDFunction_RequestHandler(pHidd, request); -} - -/** - * Reports a change in which keys are currently pressed or release to the - * host. - * - * \param pressedKeys Pointer to an array of key codes indicating keys that have - * been pressed since the last call to - * HIDDKeyboardDriver_ChangeKeys(). - * \param pressedKeysSize Number of key codes in the pressedKeys array. - * \param releasedKeys Pointer to an array of key codes indicates keys that have - * been released since the last call to - * HIDDKeyboardDriver_ChangeKeys(). - * \param releasedKeysSize Number of key codes in the releasedKeys array. - * \return USBD_STATUS_SUCCESS if the report has been sent to the host; - * otherwise an error code. - */ -uint32_t HIDDKeyboard_ChangeKeys(uint8_t *pressedKeys, - uint8_t pressedKeysSize, - uint8_t *releasedKeys, - uint8_t releasedKeysSize) -{ - HIDDKeyboard *pKbd = &hiddKeyboard; - HIDDFunction *pHidd = &pKbd->hidDrv; - HIDDKeyboardInputReport *pReport = - (HIDDKeyboardInputReport *)pKbd->inputReports[0]->bData; - - /* Press keys */ - while (pressedKeysSize > 0) { - - /* Check if this is a standard or modifier key */ - if (HIDKeypad_IsModifierKey(*pressedKeys)) { - - /* Set the corresponding bit in the input report */ - HIDDKeyboardInputReport_PressModifierKey( - pReport, - *pressedKeys); - } - else { - - HIDDKeyboardInputReport_PressStandardKey( - pReport, - *pressedKeys); - } - - pressedKeysSize--; - pressedKeys++; - } - - /* Release keys */ - while (releasedKeysSize > 0) { - - /* Check if this is a standard or modifier key */ - if (HIDKeypad_IsModifierKey(*releasedKeys)) { - - /* Set the corresponding bit in the input report */ - HIDDKeyboardInputReport_ReleaseModifierKey( - pReport, - *releasedKeys); - } - else { - - HIDDKeyboardInputReport_ReleaseStandardKey( - pReport, - *releasedKeys); - } - - releasedKeysSize--; - releasedKeys++; - } - - /* Send input report through the interrupt IN endpoint */ - return USBD_Write(pHidd->bPipeIN, - pReport, - sizeof(HIDDKeyboardInputReport), - 0, - 0); -} - -/** - * Starts a remote wake-up sequence if the host has explicitely enabled it - * by sending the appropriate SET_FEATURE request. - */ -void HIDDKeyboard_RemoteWakeUp(void) -{ - HIDDKeyboard *pKbd = &hiddKeyboard; - HIDDFunction *pHidd = &pKbd->hidDrv; - USBDDriver *pUsbd = pHidd->pUsbd; - - /* Remote wake-up has been enabled */ - if (USBDDriver_IsRemoteWakeUpEnabled(pUsbd)) { - - USBD_RemoteWakeUp(); - } -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardCallbacks_LedsChanged.c b/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardCallbacks_LedsChanged.c deleted file mode 100644 index 3aaed0ad..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardCallbacks_LedsChanged.c +++ /dev/null @@ -1,66 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_hid_key - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "HIDDKeyboardDriver.h" -#include - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * For HID Keyboard Function. - * Indicates that the status of one or more LEDs has been changed by the - * host. - * \param numLockStatus Indicates the current status of the num. lock key. - * \param capsLockStatus Indicates the current status of the caps lock key. - * \param scrollLockStatus Indicates the current status of the scroll lock key. - */ -WEAK void HIDDKeyboardCallbacks_LedsChanged( - uint8_t numLockStatus, - uint8_t capsLockStatus, - uint8_t scrollLockStatus) -{ - TRACE_INFO( - "LEDs status: %d, %d, %d\n\r", - numLockStatus, - capsLockStatus, - scrollLockStatus); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardDriver.c b/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardDriver.c deleted file mode 100644 index 8b977235..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardDriver.c +++ /dev/null @@ -1,123 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_hid_key - *@{ - * Implement a USB device that only have HID Keyboard Function. - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include - -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Internal types - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes the HID keyboard device driver. - */ -void HIDDKeyboardDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBDDriver_Initialize(pUsbd, pDescriptors, 0); - HIDDKeyboard_Initialize(pUsbd, 0); - USBD_Init(); -} - -/** - * Handles configureation changed event. - * \param cfgnum New configuration number - */ -void HIDDKeyboardDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - const USBDDriverDescriptors * pDescriptors = pUsbd->pDescriptors; - USBConfigurationDescriptor *pDesc; - - if (cfgnum > 0) { - if (USBD_HAL_IsHighSpeed() && pDescriptors->pHsConfiguration) - pDesc = (USBConfigurationDescriptor*)pDescriptors->pHsConfiguration; - else - pDesc = (USBConfigurationDescriptor*)pDescriptors->pFsConfiguration[0]; - HIDDKeyboard_ConfigureFunction((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Handles HID-specific SETUP request sent by the host. - * \param request Pointer to a USBGenericRequest instance. - */ -void HIDDKeyboardDriver_RequestHandler(const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - - TRACE_INFO_WP("NewReq "); - - /* Process HID requests */ - if (USBRC_SUCCESS == HIDDKeyboard_RequestHandler(request)) { - return; - } - /* Process STD requests */ - else { - USBDDriver_RequestHandler(pUsbd, request); - } -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardInputReport.c b/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardInputReport.c deleted file mode 100644 index 99c04fca..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardInputReport.c +++ /dev/null @@ -1,147 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Implementation of the HIDDKeyboardInputReport class. - */ - -/** \addtogroup usbd_hid_key - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes a keyboard input report instance. - * \param report Pointer to a HIDDKeyboardInputReport instance. - */ -void HIDDKeyboardInputReport_Initialize(HIDDKeyboardInputReport *report) -{ - uint32_t i; - - report->bmModifierKeys = 0; - for (i = 0; i < HIDDKeyboardInputReport_MAXKEYPRESSES; i++) { - - report->pressedKeys[i] = 0; - } -} - -/** - * Reports a standard key as being pressed. - * \param report Pointer to a HIDDKeyboardInputReport instance. - * \param key Key code of the standard key. - */ -void HIDDKeyboardInputReport_PressStandardKey(HIDDKeyboardInputReport *report, - uint8_t key) -{ - /* Find first available slot */ - uint32_t i = 0; - uint8_t found = 0; - while ((i < HIDDKeyboardInputReport_MAXKEYPRESSES) && !found) { - - /* Free slot: no key referenced (code = 0) or ErrorRollOver */ - if ((report->pressedKeys[i] == 0) - || (report->pressedKeys[i] == HIDKeypad_ERRORROLLOVER)) { - - found = 1; - report->pressedKeys[i] = key; - } - - i++; - } - - /* Report ErrorRollOver in all fields if too many keys are pressed */ - if (!found) { - - for (i=0; i < HIDDKeyboardInputReport_MAXKEYPRESSES; i++) { - - report->pressedKeys[i] = HIDKeypad_ERRORROLLOVER; - } - } -} - -/** - * Reports a standard key as not being pressed anymore. - * \param report Pointer to a HIDDKeyboardInputReport instance. - * \param key Key code of the standard key - */ -void HIDDKeyboardInputReport_ReleaseStandardKey(HIDDKeyboardInputReport *report, - uint8_t key) -{ - /* Look for key in array */ - uint32_t i = 0; - uint8_t found = 0; - while ((i < HIDDKeyboardInputReport_MAXKEYPRESSES) && !found) { - - if (report->pressedKeys[i] == key) { - - found = 1; - report->pressedKeys[i] = 0; - } - - i++; - } -} - -/** - * Reports a modifier key as being currently pressed. - * \param report Pointer to a HIDDKeyboardInputReport instance. - * \param key Key code of the modifier key. - */ -void HIDDKeyboardInputReport_PressModifierKey(HIDDKeyboardInputReport *report, - uint8_t key) -{ - /* Set corresponding bit */ - uint8_t bit = key - HIDDKeyboardDescriptors_FIRSTMODIFIERKEY; - report->bmModifierKeys |= 1 << bit; -} - -/** - * Reports a modifier key as not being pressed anymore. - * \param report Pointer to a HIDDKeyboardInputReport instance. - * \param key Key code of the modifier key. - */ -void HIDDKeyboardInputReport_ReleaseModifierKey(HIDDKeyboardInputReport *report, - uint8_t key) -{ - /* Clear corresponding bit */ - uint8_t bit = key - HIDDKeyboardDescriptors_FIRSTMODIFIERKEY; - report->bmModifierKeys &= ~(1 << bit); -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardOutputReport.c b/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardOutputReport.c deleted file mode 100644 index adcd1037..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-keyboard/HIDDKeyboardOutputReport.c +++ /dev/null @@ -1,96 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Implementation of the HIDDKeyboardOutputReport class. - */ - -/** \addtogroup usbd_hid_key - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes a keyboard output report. - * \param report Pointer to a HIDDKeyboardOutputReport instance. - */ -void HIDDKeyboardOutputReport_Initialize(HIDDKeyboardOutputReport *report) -{ - report->numLockStatus = 0; - report->capsLockStatus = 0; - report->scrollLockStatus = 0; - report->padding = 0; -} - -/** - * Indicates the current status of the num. lock LED according to the - * given report. - * \param report Pointer to a HIDDKeyboardOutputReport instance. - * \return 1 if the num. lock LED is light on; otherwise 0. - */ -unsigned char HIDDKeyboardOutputReport_GetNumLockStatus( - const HIDDKeyboardOutputReport *report) -{ - return report->numLockStatus; -} - -/** - * Indicates the current status of the caps lock LED according to the - * given report. - * \param report Pointer to a HIDDKeyboardOutputReport instance. - * \return 1 if the caps lock LED is light on; otherwise 0. - */ -unsigned char HIDDKeyboardOutputReport_GetCapsLockStatus( - const HIDDKeyboardOutputReport *report) -{ - return report->capsLockStatus; -} - -/** - * Indicates the current status of the scroll lock LED according to the - * given report. - * \param report Pointer to a HIDDKeyboardOutputReport instance. - * \return 1 if the scroll lock LED is light on; otherwise 0. - */ -unsigned char HIDDKeyboardOutputReport_GetScrollLockStatus( - const HIDDKeyboardOutputReport *report) -{ - return report->scrollLockStatus; -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-mouse/HIDDMouseDriver.c b/firmware/atmel_softpack_libraries/usb/device/hid-mouse/HIDDMouseDriver.c deleted file mode 100644 index f42a8fa0..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-mouse/HIDDMouseDriver.c +++ /dev/null @@ -1,277 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_hid_mouse - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include - -#include -#include -#include - -#include - -/*------------------------------------------------------------------------------ - * Internal Defines - *------------------------------------------------------------------------------*/ - -/** Tag bit (Always 1) */ -#define HIDDMouse_TAG (1 << 3) -/** Xsign bit */ -#define HIDDMouse_Xsign (1 << 4) -/** Ysign bit */ -#define HIDDMouse_Ysign (1 << 5) - -/*------------------------------------------------------------------------------ - * Internal types - *------------------------------------------------------------------------------*/ - -/** - * Struct for an HID Mouse report. - */ -typedef struct _HIDDMouseReport { - /** Callback when report done */ - HIDDReportEventCallback fCallback; - /** Callback arguments */ - void* pArg; - - /** Report size (ID + DATA) */ - uint16_t wMaxSize; - /** Transfered size */ - uint16_t wTransferred; - /** Report idle rate */ - uint8_t bIdleRate; - /** Delay count for Idle */ - uint8_t bDelay; - /** Report ID */ - uint8_t bID; - /** Report data block */ - HIDDMouseInputReport report; -} HIDDMouseReport; - -/** - * Driver structure for an HID device implementing keyboard functionalities. - */ -typedef struct _HIDDMouseDriver { - - /** Mouse function instance */ - HIDDFunction hidDrv; - /** Mouse input report */ - HIDDReport *inputReports[1]; -} HIDDMouseDriver; - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** Static instance of the HID mouse device driver. */ -static HIDDMouseDriver hiddMouseDriver; -/** Input report */ -static HIDDMouseReport hiddInputReport; - -/** Report descriptor used by the driver. */ -static const uint8_t hiddReportDescriptor[] = { - - /* Global Usage Page */ - HIDReport_GLOBAL_USAGEPAGE + 1, HIDGenericDesktop_PAGEID, - /* Collection: Application */ - HIDReport_LOCAL_USAGE + 1, HIDGenericDesktop_MOUSE, - HIDReport_COLLECTION + 1, HIDReport_COLLECTION_APPLICATION, - /* Physical collection: Pointer */ - HIDReport_LOCAL_USAGE + 1, HIDGenericDesktop_POINTER, - HIDReport_COLLECTION + 1, HIDReport_COLLECTION_PHYSICAL, - - /* Input report: buttons */ - HIDReport_GLOBAL_USAGEPAGE + 1, HIDButton_PAGEID, - - HIDReport_GLOBAL_REPORTCOUNT + 1, 3, - HIDReport_GLOBAL_REPORTSIZE + 1, 1, - HIDReport_LOCAL_USAGEMINIMUM + 1, 1, - HIDReport_LOCAL_USAGEMAXIMUM + 1, 3, - HIDReport_GLOBAL_LOGICALMINIMUM + 1, 0, - HIDReport_GLOBAL_LOGICALMAXIMUM + 1, 1, - HIDReport_INPUT + 1, HIDReport_VARIABLE, /* 3 button bits */ - - /* Input report: padding */ - HIDReport_GLOBAL_REPORTCOUNT + 1, 1, - HIDReport_GLOBAL_REPORTSIZE + 1, 5, - HIDReport_INPUT + 1, HIDReport_CONSTANT, /* 5 bit padding */ - - /* Input report: pointer */ - HIDReport_GLOBAL_USAGEPAGE + 1, HIDGenericDesktop_PAGEID, - HIDReport_GLOBAL_REPORTSIZE + 1, 8, - HIDReport_GLOBAL_REPORTCOUNT + 1, 2, - HIDReport_LOCAL_USAGE + 1, HIDGenericDesktop_X, - HIDReport_LOCAL_USAGE + 1, HIDGenericDesktop_Y, - HIDReport_GLOBAL_LOGICALMINIMUM + 1, (uint8_t) -127, - HIDReport_GLOBAL_LOGICALMAXIMUM + 1, 127, - HIDReport_INPUT + 1, HIDReport_VARIABLE | HIDReport_RELATIVE, - - HIDReport_ENDCOLLECTION, - HIDReport_ENDCOLLECTION -}; - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes the HID Mouse %device driver. - * \param pDescriptors Pointer to descriptor list for the HID Mouse. - */ -void HIDDMouseDriver_Initialize(const USBDDriverDescriptors *pDescriptors) -{ - HIDDMouseDriver* pMouse = &hiddMouseDriver; - HIDDFunction* pHidd = &pMouse->hidDrv; - USBDDriver* pUsbd = USBD_GetDriver(); - - /* One input report */ - pMouse->inputReports[0] = (HIDDReport*)&hiddInputReport; - HIDDFunction_InitializeReport(pMouse->inputReports[0], - HIDDMouseDriver_REPORTDESCRIPTORSIZE, - 0, - 0, 0); - - /* Initialize USBD Driver instance */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - 0); /* Multiple interface settings not supported */ - /* Function initialize */ - HIDDFunction_Initialize(pHidd, - pUsbd, 0, - hiddReportDescriptor, - (HIDDReport**)(&pMouse->inputReports), 1, - 0, 0); - USBD_Init(); -} - -/** - * Handles configureation changed event. - * \param cfgnum New configuration number - */ -void HIDDMouseDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - HIDDMouseDriver * pMouse = &hiddMouseDriver; - HIDDFunction * pHidd = &pMouse->hidDrv; - USBDDriver * pUsbd = pHidd->pUsbd; - USBConfigurationDescriptor *pDesc; - - if (cfgnum > 0) { - - /* Parse endpoints for reports */ - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - HIDDFunction_ParseInterface(pHidd, - (USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Handles HID-specific SETUP request sent by the host. - * \param request Pointer to a USBGenericRequest instance - */ -void HIDDMouseDriver_RequestHandler(const USBGenericRequest *request) -{ - HIDDMouseDriver * pMouse = &hiddMouseDriver; - HIDDFunction * pHidd = &pMouse->hidDrv; - USBDDriver * pUsbd = pHidd->pUsbd; - - TRACE_INFO("NewReq "); - - /* Process HID requests */ - if (USBRC_SUCCESS == HIDDFunction_RequestHandler(pHidd, - request)) { - return; - } - /* Process STD requests */ - else { - - USBDDriver_RequestHandler(pUsbd, request); - } - -} - -/** - * Update the Mouse button status and location changes via input report - * to host - * \param bmButtons Bit map of the button status - * \param deltaX Movment on X direction - * \param deltaY Movment on Y direction - */ -uint8_t HIDDMouseDriver_ChangePoints(uint8_t bmButtons, - int8_t deltaX, - int8_t deltaY) -{ - HIDDMouseDriver * pMouse = &hiddMouseDriver; - HIDDFunction * pHidd = &pMouse->hidDrv; - HIDDMouseInputReport * pReport = &hiddInputReport.report; - - pReport->bmButtons = (bmButtons & 0x07) | HIDDMouse_TAG; - pReport->bX = deltaX; - pReport->bY = deltaY; - - /* Send input report through the interrupt IN endpoint */ - return USBD_Write(pHidd->bPipeIN, - (void*)pReport, - sizeof(HIDDMouseInputReport), - 0, - 0); -} - -/** - * Starts a remote wake-up sequence if the host has explicitely enabled it - * by sending the appropriate SET_FEATURE request. - */ -void HIDDMouseDriver_RemoteWakeUp(void) -{ - HIDDMouseDriver * pMouse = &hiddMouseDriver; - HIDDFunction * pHidd = &pMouse->hidDrv; - USBDDriver * pUsbd = pHidd->pUsbd; - - /* Remote wake-up has been enabled */ - if (USBDDriver_IsRemoteWakeUpEnabled(pUsbd)) { - - USBD_RemoteWakeUp(); - } -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-transfer/HIDDFunction.c b/firmware/atmel_softpack_libraries/usb/device/hid-transfer/HIDDFunction.c deleted file mode 100644 index 10ddd961..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-transfer/HIDDFunction.c +++ /dev/null @@ -1,695 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Implementation of the HIDDFunction class methods. - */ -/** \addtogroup usbd_hid - * @{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include -#include - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Macros - *------------------------------------------------------------------------------*/ - -/** - * Get byte pointer - */ -#define _PU8(v) ((uint8_t*)&(v)) - -/** - * Get word from un-aligned value - */ -#define _Word(a) (_PU8(a)[0] + (_PU8(a)[1] << 8)) - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** Parse data extention for descriptor parsing */ -typedef struct _HIDDParseData { - HIDDFunction * pHidd; - USBInterfaceDescriptor * pIfDesc; -} HIDDParseData; - -/** Parse data extension for HID descriptor */ - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/** - * Returns the descriptor requested by the host. - * \param pHidd Pointer to HIDDFunction instance - * \param bType Descriptor type. - * \param wLength Maximum number of bytes to send. - * \return USBRC_SUCCESS if the request has been handled by this function, - * otherwise USBRC_PARAM_ERR. - */ -static uint32_t HIDDFunction_GetDescriptor(HIDDFunction *pHidd, - uint8_t bType, - uint32_t wLength) -{ - HIDDescriptor1 *pHidDescriptor = (HIDDescriptor1 *)pHidd->pHidDescriptor; - uint16_t wDescriptorLength; - - TRACE_INFO_WP("gDesc{%x) ", bType); - - switch (bType) { - - case HIDGenericDescriptor_REPORT: - - /* Adjust length and send report descriptor */ - /* - wDescriptorLength = pHidDescriptor->bDescriptorLength0[0] - + pHidDescriptor->bDescriptorLength0[1]; - */ - wDescriptorLength = _Word(pHidDescriptor->wDescriptorLength0); - if (wLength > wDescriptorLength) - wLength = wDescriptorLength; - - TRACE_INFO_WP("Report(%d) ", wLength); - - USBD_Write(0, pHidd->pReportDescriptor, wLength, 0, 0); - break; - - case HIDGenericDescriptor_HID: - - /* Adjust length and send HID descriptor */ - if (wLength > sizeof(HIDDescriptor1)) - wLength = sizeof(HIDDescriptor1); - - TRACE_INFO_WP("HID(%d) ", wLength); - - USBD_Write(0, pHidDescriptor, wLength, 0, 0); - break; - - default: - return USBRC_PARAM_ERR; - } - - return USBRC_SUCCESS; -} - -/** - * Return expected report header pointer. - * \param pHidd Pointer to HIDDFunction instance - * \param bType Report type. - * \param bID Report ID. - */ -static HIDDReport* HIDDFunction_FindReport(const HIDDFunction *pHidd, - uint8_t bType, - uint8_t bID) -{ - HIDDReport** pReportList; - int32_t listSize, i; - switch(bType) { - case HIDReportRequest_INPUT: - pReportList = pHidd->pInputList; - listSize = pHidd->bInputListSize; - break; - case HIDReportRequest_OUTPUT: - pReportList = pHidd->pOutputList; - listSize = pHidd->bOutputListSize; - break; - /* No other reports supported */ - default: - TRACE_INFO("Report %x.%x not support\n\r", bType, bID); - return 0; - } - /* No list */ - if (pReportList == 0) - return 0; - /* Find report in the list */ - for (i = 0; i < listSize; i ++) { - if (bID == pReportList[i]->bID) - return pReportList[i]; - } - /* Not found */ - return 0; -} - -/** - * Sends the current Idle rate of the input report to the host. - * \param pHidd Pointer to HIDDFunction instance - * \param bID Report ID - */ -static void HIDDFunction_GetIdle(HIDDFunction *pHidd, - uint8_t bID) -{ - HIDDReport *pReport = HIDDFunction_FindReport(pHidd, - HIDReportRequest_INPUT, - bID); - TRACE_INFO_WP("gIdle(%x) ", bID); - if (pReport == 0) { - USBD_Stall(0); - return; - } - USBD_Write(0, &pReport->bIdleRate, 1, 0, 0); -} - -/** - * Retrieves the new idle rate of the input report from the USB host. - * \param pHidd Pointer to HIDDFunction instance - * \param bType Report type - * \param bID Report ID - * \param bIdleRate Report idle rate. - */ -static void HIDDFunction_SetIdle(HIDDFunction *pHidd, - uint8_t bID, - uint8_t bIdleRate) -{ - HIDDReport *pReport = HIDDFunction_FindReport(pHidd, - HIDReportRequest_INPUT, - bID); - TRACE_INFO_WP("sIdle(%x<%x) ", bID, bIdleRate); - if (pReport == 0) { - USBD_Stall(0); - return; - } - USBD_Write(0, 0, 0, 0, 0); -} - -/** - * Callback function when GetReport request data sent to host - * \param pReport Pointer to report information. - * \param status Result status - * \param transferred Number of bytes transferred - * \param remaining Number of bytes that are not transferred yet - */ -static void _GetReportCallback(HIDDReport *pReport, - uint8_t status, - uint32_t transferred, - uint32_t remaining) -{ - pReport->wTransferred = transferred; - if (pReport->fCallback) - pReport->fCallback(HIDD_EC_GETREPORT, pReport->pArg); - - USBD_Read(0, 0, 0, 0, 0); -} - -/** - * Sends the requested report to the host. - * \param pHidd Pointer to HIDDFunction instance - * \param bType Report type. - * \param bID Report ID. - * \param wLength Maximum number of bytes to send. - */ -static void HIDDFunction_GetReport(HIDDFunction *pHidd, - uint8_t bType, - uint8_t bID, - uint8_t wLength) -{ - HIDDReport *pReport = HIDDFunction_FindReport(pHidd, - bType, - bID); - TRACE_INFO_WP("gReport(%x.%x) ", bType, bID); - if (pReport == 0) { - USBD_Stall(0); - return; - } - if (wLength >= pReport->wMaxSize) { - wLength = pReport->wMaxSize; - } - USBD_Write(0, pReport->bData, wLength, - (TransferCallback)_GetReportCallback, pReport); -} - -/** - * Callback function when GetReport request data sent to host - * \param pReport Pointer to report information. - * \param status Result status - * \param transferred Number of bytes transferred - * \param remaining Number of bytes that are not transferred yet - */ -static void _SetReportCallback(HIDDReport *pReport, - uint8_t status, - uint32_t transferred, - uint32_t remaining) -{ - pReport->wTransferred = transferred; - if (pReport->fCallback) { - pReport->fCallback(HIDD_EC_SETREPORT, pReport->pArg); - } -} - -/** - * Reads the requested report from the host. - * \param pHidd Pointer to HIDDFunction instance - * \param bType Report type. - * \param bID Report ID. - * \param wLength Maximum number of bytes to read. - */ -static void HIDDFunction_SetReport(HIDDFunction *pHidd, - uint8_t bType, - uint8_t bID, - uint8_t wLength) -{ - HIDDReport *pReport = HIDDFunction_FindReport(pHidd, - bType, - bID); - TRACE_INFO_WP("sReport(%x.%x) ", bType, bID); - - if (pReport == 0) { - USBD_Stall(0); - return; - } - - if (wLength >= pReport->wMaxSize) { - wLength = pReport->wMaxSize; - } - USBD_Read(0, pReport->bData, wLength, - (TransferCallback)_SetReportCallback, pReport); -} - -/** - * Parse descriptors: Interface, Interrupt IN/OUT. - * \param desc Pointer to descriptor list. - * \param arg Argument, pointer to HIDDParseData instance. - */ -static uint32_t HIDDFunction_Parse(USBGenericDescriptor * pDesc, - HIDDParseData * pArg) -{ - /* Find HID Interface */ - if (pArg->pIfDesc == 0) { - if (pDesc->bDescriptorType == USBGenericDescriptor_INTERFACE) { - USBInterfaceDescriptor *pIf = (USBInterfaceDescriptor*)pDesc; - /* Right interface for HID: - HID Class + at least 1 endpoint */ - if (pIf->bInterfaceClass == HIDInterfaceDescriptor_CLASS - && pIf->bNumEndpoints >= 1) { - /* Obtain new interface setting */ - if (pArg->pHidd->bInterface == 0xFF) { - pArg->pHidd->bInterface = pIf->bInterfaceNumber; - pArg->pIfDesc = pIf; - } - /* Find specific interface setting */ - else if (pArg->pHidd->bInterface == pIf->bInterfaceNumber) { - pArg->pIfDesc = pIf; - } - } - } - } - /* Interface end */ - else { - /* Start another interface ? */ - if (pDesc->bDescriptorType == USBGenericDescriptor_INTERFACE) { - /* Terminate the parse */ - return USBRC_PARTIAL_DONE; - } - /* Parse HID descriptor */ - else if (pDesc->bDescriptorType == HIDGenericDescriptor_HID) { - pArg->pHidd->pHidDescriptor = (HIDDescriptor*)pDesc; - } - /* Parse endpoints */ - else if (pDesc->bDescriptorType == USBGenericDescriptor_ENDPOINT) { - USBEndpointDescriptor *pEp = (USBEndpointDescriptor*)pDesc; - if (pEp->bEndpointAddress & 0x80) - pArg->pHidd->bPipeIN = pEp->bEndpointAddress & 0x7F; - else - pArg->pHidd->bPipeOUT = pEp->bEndpointAddress; - } - - /* Check if all data is OK */ - if (pArg->pHidd->bInterface != 0xFF - && pArg->pHidd->bPipeIN != 0xFF - && pArg->pHidd->bPipeOUT != 0xFF) - return USBRC_FINISHED; - } - return 0; -} - -/** - * Callback function when interrupt OUT data received from host - * \param pHidd Pointer to HIDDFunction instance - * \param status Result status - * \param transferred Number of bytes transferred - * \param remaining Number of bytes that are not transferred yet - */ -static void HIDDFunction_ReportReceived(HIDDFunction *pHidd, - uint8_t status, - uint32_t transferred, - uint32_t remaining) -{ - HIDDReport *pOut = pHidd->pOutputList[pHidd->bCurrOutput]; - if (status != USBRC_SUCCESS) { - - TRACE_ERROR("HIDDFun::ReadReport: %x\n\r", status); - return; - } - - /* Transfered information */ - pOut->wTransferred = transferred; - - /* Data Change callback */ - if (pOut->fCallback) - pOut->fCallback(HIDD_EC_REPORTCHANGED, pOut->pArg); - - /* Proceed to next output report */ - pHidd->bCurrOutput ++; - if (pHidd->bCurrOutput >= pHidd->bOutputListSize) - pHidd->bCurrOutput = 0; - - /* Start reading a report */ - USBD_Read(pHidd->bPipeOUT, - pHidd->pOutputList[pHidd->bCurrOutput]->bData, - pHidd->pOutputList[pHidd->bCurrOutput]->wMaxSize, - (TransferCallback)HIDDFunction_ReportReceived, - (void*)pHidd); -} - -/** - * Callback function when interrupt IN data sent to host - * \param pHidd Pointer to HIDDFunction instance - * \param status Result status - * \param transferred Number of bytes transferred - * \param remaining Number of bytes that are not transferred yet - */ -static void HIDDFunction_ReportSent(HIDDFunction *pHidd, - uint8_t status, - uint32_t transferred, - uint32_t remaining) -{ - HIDDReport *pIn = pHidd->pInputList[pHidd->bCurrInput]; - if (status != USBRC_SUCCESS) { - - TRACE_ERROR("HIDDFun::WriteReport: %x\n\r", status); - return; - } - - /* Transfered information */ - pIn->wTransferred = transferred; - - /* Report Sent Callback */ - if (pIn->fCallback) - pIn->fCallback(HIDD_EC_REPORTSENT, pIn->pArg); - - /* Proceed to next output report */ - pHidd->bCurrInput ++; - if (pHidd->bCurrInput >= pHidd->bInputListSize) - pHidd->bCurrInput = 0; - - /* Start writing a report */ - USBD_Write(pHidd->bPipeIN, - pHidd->pInputList[pHidd->bCurrInput]->bData, - pHidd->pInputList[pHidd->bCurrInput]->wMaxSize, - (TransferCallback)HIDDFunction_ReportReceived, - (void*)pHidd); -} - - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initialize the USB Device HID function, for general HID device support. - * \param pHidd Pointer to HIDDFunction instance. - * \param pUsbd Pointer to USBDDriver instance. - * \param bInterfaceNb Interface number, - * can be 0xFF to obtain from descriptors. - * \param pReportDescriptor Pointer to report descriptor. - * \param pInputList Pointer to an HID input report list - * \param bInputListSize HID input report list size - * \param pOutputList Pointer to an HID output report list - * \param bOutputListSize HID output report list size - */ -void HIDDFunction_Initialize(HIDDFunction * pHidd, - USBDDriver * pUsbd, uint8_t bInterfaceNb, - const uint8_t * pReportDescriptor, - HIDDReport* pInputList[], uint8_t bInputListSize, - HIDDReport* pOutputList[], uint8_t bOutputListSize) -{ - TRACE_INFO("HIDDFunction_Initialize\n\r"); - - pHidd->pUsbd = pUsbd; - pHidd->pReportDescriptor = (uint8_t *)pReportDescriptor; - pHidd->pHidDescriptor = 0; - - pHidd->bInterface = bInterfaceNb; - pHidd->bPipeIN = 0xFF; - pHidd->bPipeOUT = 0xFF; - pHidd->bProtocol = HIDProtocol_REPORT; /* Non-boot protocol */ - - pHidd->pInputList = pInputList; - pHidd->pOutputList = pOutputList; - pHidd->bInputListSize = bInputListSize; - pHidd->bOutputListSize = bOutputListSize; - pHidd->bCurrInput = 0; - pHidd->bCurrOutput = 0; - -} - -/** - * Parse the USB HID Function Interface. - * Only first interface and its endpoints parsed. - * \param pHidd Pointer to HIDDFunction instance. - * \param pDescriptors Pointer to descriptor list. - * \param dwLength Descriptor list block length in bytes. - * \return Pointer to next descriptor. 0 means no other descriptor. - */ -USBGenericDescriptor *HIDDFunction_ParseInterface(HIDDFunction * pHidd, - USBGenericDescriptor * pDescriptors, - uint32_t dwLength) -{ - HIDDParseData data; - pHidd->bPipeIN = 0xFF; - pHidd->bPipeOUT = 0xFF; - data.pHidd = pHidd; - data.pIfDesc = 0; - return USBGenericDescriptor_Parse(pDescriptors, - dwLength, - (USBDescriptorParseFunction)HIDDFunction_Parse, - (void*)&data); -} - -/** - * Start polling interrupt OUT pipe - * (output report, host to device) if there is. - * \param pHidd Pointer to HIDDFunction instance. - */ -uint32_t HIDDFunction_StartPollingOutputs(HIDDFunction * pHidd) -{ - /* No report, do nothing */ - if (pHidd->bOutputListSize == 0 - || pHidd->pOutputList == 0) - return USBRC_PARAM_ERR; - - /* Start reading a report */ - return USBD_Read(pHidd->bPipeOUT, - pHidd->pOutputList[pHidd->bCurrOutput]->bData, - pHidd->pOutputList[pHidd->bCurrOutput]->wMaxSize, - (TransferCallback)HIDDFunction_ReportReceived, - (void*)pHidd); -} - -/** - * Start sending reports via interrupt IN pipe - * (input report, device to host) if there is. - * \param pHidd Pointer to HIDDFunction instance. - */ -uint32_t HIDDFunction_StartSendingInputs(HIDDFunction * pHidd) -{ - /* No report, do nothing */ - if (pHidd->bInputListSize == 0 - || pHidd->pInputList == 0) - return USBRC_PARAM_ERR; - /* Start sending a report */ - return USBD_Write(pHidd->bPipeIN, - pHidd->pInputList[pHidd->bCurrInput]->bData, - pHidd->pInputList[pHidd->bCurrInput]->wMaxSize, - (TransferCallback)HIDDFunction_ReportSent, - (void*)pHidd); -} - -/** - * Handles HID-specific SETUP request sent by the host. - * \param pHidd Pointer to HIDDFunction instance. - * \param request Pointer to a USBGenericRequest instance - */ -uint32_t HIDDFunction_RequestHandler(HIDDFunction *pHidd, - const USBGenericRequest *request) -{ - uint32_t reqCode = (request->bmRequestType << 8) - | (request->bRequest); - - switch (reqCode) { - /* Get_Descriptor */ - case USBGenericRequest_GETDESCRIPTOR|(0x81<<8): - return HIDDFunction_GetDescriptor( - pHidd, - USBGetDescriptorRequest_GetDescriptorType(request), - USBGenericRequest_GetLength(request)); - /* Clear_Feature (EP) */ - case USBGenericRequest_CLEARFEATURE|(0x02<<8): - if (USBFeatureRequest_GetFeatureSelector(request) - == USBFeatureRequest_ENDPOINTHALT) { - uint8_t ep = USBGenericRequest_GetEndpointNumber(request); - if (USBD_IsHalted(ep)) { - /* Unhalt EP */ - USBD_Unhalt(ep); - /* Restart Polling OUT */ - if (ep == pHidd->bPipeOUT) { - HIDDFunction_StartPollingOutputs(pHidd); - } - /* and send a zero-length packet */ - USBD_Write(0, 0, 0, 0, 0); - } - break; /* Handled success */ - } - return USBRC_PARAM_ERR; - /* Set_Descriptor */ - case USBGenericRequest_SETDESCRIPTOR|(0x01<<8): - /* Optional, not implemented */ - USBD_Stall(0); - break; - /* Get_Idle */ - case (0xa1<<8)|HIDGenericRequest_GETIDLE: - HIDDFunction_GetIdle(pHidd, - HIDReportRequest_GetReportId(request)); - break; - /* Set_Idle */ - case (0x21<<8)|HIDGenericRequest_SETIDLE: - HIDDFunction_SetIdle(pHidd, - HIDReportRequest_GetReportId(request), - HIDIdleRequest_GetIdleRate(request)); - break; - /* Get_Report */ - case (0xa1<<8)|HIDGenericRequest_GETREPORT: - HIDDFunction_GetReport(pHidd, - HIDReportRequest_GetReportType(request), - HIDReportRequest_GetReportId(request), - USBGenericRequest_GetLength(request)); - break; - /* Set_Report */ - case (0x21<<8)|HIDGenericRequest_SETREPORT: - HIDDFunction_SetReport(pHidd, - HIDReportRequest_GetReportType(request), - HIDReportRequest_GetReportId(request), - USBGenericRequest_GetLength(request)); - break; - /* Get_Protocol */ - case (0xa1<<8)|HIDGenericRequest_SETPROTOCOL: - pHidd->bProtocol = request->wValue; - USBD_Write(0, 0, 0, 0, 0); - break; - /* Set_Protocol */ - case (0x21<<8)|HIDGenericRequest_GETPROTOCOL: - USBD_Write(0, &pHidd->bProtocol, 1, 0, 0); - break; - - default: - return USBRC_PARAM_ERR; - } - return USBRC_SUCCESS; -} - -/** - * Read raw data through USB interrupt OUT EP. - * \param pHidd Pointer to HIDDFunction instance. - * \param pData Pointer to the data buffer. - * \param dwLength The data length. - * \param fCallback Callback function invoked when transferring done. - * \param pArg Pointer to additional arguments. - */ -uint32_t HIDDFunction_Read(const HIDDFunction *pHidd, - void* pData, - uint32_t dwLength, - TransferCallback fCallback, - void* pArg) -{ - return USBD_Read(pHidd->bPipeIN, - pData, dwLength, - fCallback, pArg); -} - -/** - * Write raw data through USB interrupt IN EP. - * \param pHidd Pointer to HIDDFunction instance. - * \param pData Pointer to the data sent. - * \param dwLength The data length. - * \param fCallback Callback function invoked when transferring done. - * \param pArg Pointer to additional arguments. - */ -uint32_t HIDDFunction_Write(const HIDDFunction *pHidd, - void* pData, - uint32_t dwLength, - TransferCallback fCallback, - void* pArg) -{ - return USBD_Write(pHidd->bPipeIN, - pData, dwLength, - fCallback, pArg); -} - -/** - * Initialize a report. - * \param pReport Pointer to HIDDReport instance. - * \param wSize Size of the report data. - * \param bID Report ID. - * \param fCallback Callback function for report events. - * \param pArg Pointer to event handler arguments. - */ -void HIDDFunction_InitializeReport(HIDDReport* pReport, - uint16_t wSize, - uint8_t bID, - HIDDReportEventCallback fCallback, - void* pArg) -{ - pReport->wMaxSize = wSize; - pReport->wTransferred = 0; - pReport->bIdleRate = 0; - pReport->bDelay = 0; - pReport->bID = bID; - - pReport->fCallback = fCallback; - pReport->pArg = pArg; -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/hid-transfer/HIDDTransferDriver.c b/firmware/atmel_softpack_libraries/usb/device/hid-transfer/HIDDTransferDriver.c deleted file mode 100644 index ab3b1de4..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/hid-transfer/HIDDTransferDriver.c +++ /dev/null @@ -1,481 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_hid_tran - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include "HIDDTransferDriver.h" -#include - -#include -#include -#include - -#include - -#include - -/*------------------------------------------------------------------------------ - * Internal types - *------------------------------------------------------------------------------*/ - -/** - * Report struct for HID transfer. - */ -typedef struct _HIDDTransferReport { - /** Callback when report done */ - HIDDReportEventCallback fCallback; - /** Callback arguments */ - void* pArg; - - /** Report size (ID + DATA) */ - uint16_t wMaxSize; - /** Transfered size */ - uint16_t wTransferred; - /** Report idle rate */ - uint8_t bIdleRate; - /** Delay count for Idle */ - uint8_t bDelay; - /** Report ID */ - uint8_t bID; - /** Report data address */ - uint8_t bData[HIDDTransferDriver_REPORTSIZE]; -} HIDDTransferReport; - -/** - * Driver structure for an HID device implementing simple transfer - * functionalities. - */ -typedef struct _HIDDTransferDriver { - - /** Standard HID function interface. */ - HIDDFunction hidFunction; - - /** HID Input report list */ - HIDDReport *inputReports[1]; - /** HID Output report list */ - HIDDReport *outputReports[1]; - - /* OUT Report - block input for SET_REPORT */ - /**< Output report block size */ - uint16_t iReportLen; - /**< Output report data buffer */ - uint8_t iReportBuf[HIDDTransferDriver_REPORTSIZE]; - -} HIDDTransferDriver; - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** Input report buffers */ -static HIDDTransferReport inputReport; - -/** Output report buffers */ -static HIDDTransferReport outputReport; - -/** Static instance of the HID Transfer device driver. */ -static HIDDTransferDriver hiddTransferDriver; - -/** Report descriptor used by the driver. */ -static const uint8_t hiddTransferReportDescriptor[] = { - - /* Global Usage Page */ - HIDReport_GLOBAL_USAGEPAGE + 2, 0xFF, 0xFF, /* Vendor-defined */ - - /* Collection: Application */ - HIDReport_LOCAL_USAGE + 1, 0xFF, /* Vendor-defined */ - HIDReport_COLLECTION + 1, HIDReport_COLLECTION_APPLICATION, - - /* Input report: Vendor-defined */ - HIDReport_LOCAL_USAGE + 1, 0xFF, /* Vendor-defined usage */ - HIDReport_GLOBAL_REPORTCOUNT + 1, HIDDTransferDriver_REPORTSIZE, - HIDReport_GLOBAL_REPORTSIZE + 1, 8, - HIDReport_GLOBAL_LOGICALMINIMUM + 1, (uint8_t) -128, - HIDReport_GLOBAL_LOGICALMAXIMUM + 1, (uint8_t) 127, - HIDReport_INPUT + 1, 0, /* No Modifiers */ - - /* Output report: vendor-defined */ - HIDReport_LOCAL_USAGE + 1, 0xFF, /* Vendor-defined usage */ - HIDReport_GLOBAL_REPORTCOUNT + 1, HIDDTransferDriver_REPORTSIZE, - HIDReport_GLOBAL_REPORTSIZE + 1, 8, - HIDReport_GLOBAL_LOGICALMINIMUM + 1, (uint8_t) -128, - HIDReport_GLOBAL_LOGICALMAXIMUM + 1, (uint8_t) 127, - HIDReport_OUTPUT + 1, 0, /* No Modifiers */ - HIDReport_ENDCOLLECTION -}; - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/** - * Returns the descriptor requested by the host. - * \param type Descriptor type. - * \param length Maximum number of bytes to send. - * \return 1 if the request has been handled by this function, otherwise 0. - */ -static uint8_t HIDDTransferDriver_GetDescriptor(uint8_t type, - uint8_t length) -{ - HIDDTransferDriver *pDrv = &hiddTransferDriver; - HIDDFunction *pHidd = &pDrv->hidFunction; - - const USBConfigurationDescriptor *pConfiguration; - HIDDescriptor *hidDescriptors[2]; - - switch (type) { - - case HIDGenericDescriptor_REPORT: - TRACE_INFO("Report "); - - /* Adjust length and send report descriptor */ - if (length > HIDDTransferDriver_REPORTDESCRIPTORSIZE) { - - length = HIDDTransferDriver_REPORTDESCRIPTORSIZE; - } - USBD_Write(0, &hiddTransferReportDescriptor, length, 0, 0); - break; - - case HIDGenericDescriptor_HID: - TRACE_INFO("HID "); - - /* Configuration descriptor is different depending on configuration */ - if (USBD_IsHighSpeed()) { - - pConfiguration = - pHidd->pUsbd->pDescriptors->pHsConfiguration; - } - else { - - pConfiguration = - pHidd->pUsbd->pDescriptors->pFsConfiguration[0]; - } - - /* Parse the device configuration to get the HID descriptor */ - USBConfigurationDescriptor_Parse(pConfiguration, 0, 0, - (USBGenericDescriptor **) hidDescriptors); - - /* Adjust length and send HID descriptor */ - if (length > sizeof(HIDDescriptor)) { - - length = sizeof(HIDDescriptor); - } - USBD_Write(0, hidDescriptors[0], length, 0, 0); - break; - - default: - return 0; - } - - return 1; -} - -/** - * Callback function when SetReport request data received from host - * \param pArg Pointer to additional argument struct - * \param status Result status - * \param transferred Number of bytes transferred - * \param remaining Number of bytes that are not transferred yet - */ -static void HIDDTransferDriver_ReportReceived(void *pArg, - uint8_t status, - uint32_t transferred, - uint32_t remaining) -{ - HIDDTransferDriver *pDrv = &hiddTransferDriver; - pDrv->iReportLen = transferred; - USBD_Write(0, 0, 0, 0, 0); -} - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * Initializes the HID Transfer %device driver. - * \param pDescriptors Pointer to USBDDriverDescriptors instance. - */ -void HIDDTransferDriver_Initialize(const USBDDriverDescriptors * pDescriptors) -{ - HIDDTransferDriver * pDrv = &hiddTransferDriver; - USBDDriver *pUsbd = USBD_GetDriver(); - - /* One input report */ - pDrv->inputReports[0] = (HIDDReport*)&inputReport; - HIDDFunction_InitializeReport((HIDDReport *)pDrv->inputReports[0], - HIDDTransferDriver_REPORTSIZE, - 0, - 0, 0); - /* One output report */ - pDrv->outputReports[0] = (HIDDReport*)&outputReport; - HIDDFunction_InitializeReport((HIDDReport *)pDrv->outputReports[0], - HIDDTransferDriver_REPORTSIZE, - 0, - 0, 0); - - /* Initialize USBD Driver instance */ - USBDDriver_Initialize(pUsbd, - pDescriptors, - 0); /* Multiple interface settings not supported */ - /* Function instance initialize */ - HIDDFunction_Initialize(&pDrv->hidFunction, - pUsbd, 0, - hiddTransferReportDescriptor, - (HIDDReport **)(&pDrv->inputReports), 1, - (HIDDReport **)(&pDrv->outputReports), 1); - /* Initialize USBD */ - USBD_Init(); -} - -/** - * Handles configureation changed event. - * \param cfgnum New configuration number - */ -void HIDDTransferDriver_ConfigurationChangedHandler(uint8_t cfgnum) -{ - const USBDDriverDescriptors * pDescriptors = USBD_GetDriver()->pDescriptors; - HIDDTransferDriver * pDrv = &hiddTransferDriver; - HIDDFunction * pHidd = &pDrv->hidFunction; - - USBConfigurationDescriptor *pDesc; - - if (cfgnum > 0) { - - /* Parse endpoints for reports */ - if (USBD_HAL_IsHighSpeed() && pDescriptors->pHsConfiguration) - pDesc = (USBConfigurationDescriptor*)pDescriptors->pHsConfiguration; - else - pDesc = (USBConfigurationDescriptor*)pDescriptors->pFsConfiguration[0]; - HIDDFunction_ParseInterface(pHidd, - (USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - - /* Start polling for Output Reports */ - HIDDFunction_StartPollingOutputs(pHidd); - } -} - -/** - * Handles HID-specific SETUP request sent by the host. - * \param request Pointer to a USBGenericRequest instance - */ -void HIDDTransferDriver_RequestHandler(const USBGenericRequest *request) -{ - HIDDTransferDriver *pDrv = &hiddTransferDriver; - HIDDFunction *pHidd = &pDrv->hidFunction; - - TRACE_INFO("NewReq "); - - /* Check if this is a standard request */ - if (USBGenericRequest_GetType(request) == USBGenericRequest_STANDARD) { - - /* This is a standard request */ - switch (USBGenericRequest_GetRequest(request)) { - - case USBGenericRequest_GETDESCRIPTOR: - /* Check if this is a HID descriptor, otherwise forward it to - the standard driver */ - if (!HIDDTransferDriver_GetDescriptor( - USBGetDescriptorRequest_GetDescriptorType(request), - USBGenericRequest_GetLength(request))) { - - USBDDriver_RequestHandler(pHidd->pUsbd, - request); - } - return; /* Handled, no need to do others */ - - case USBGenericRequest_CLEARFEATURE: - - /* Check which is the requested feature */ - switch (USBFeatureRequest_GetFeatureSelector(request)) { - case USBFeatureRequest_ENDPOINTHALT: - { uint8_t ep = - USBGenericRequest_GetEndpointNumber(request); - if (USBD_IsHalted(ep)) { - /* Unhalt endpoint restart OUT EP - */ - USBD_Unhalt(ep); - if (ep == pHidd->bPipeOUT) { - HIDDFunction_StartPollingOutputs(pHidd); - } - } - /* and send a zero-length packet */ - USBD_Write(0, 0, 0, 0, 0); - return; /* Handled, no need to do others */ - } - } - break; - - } - } - /* We use different buffer for SetReport */ - else if (USBGenericRequest_GetType(request) == USBGenericRequest_CLASS) { - - switch (USBGenericRequest_GetRequest(request)) { - - case HIDGenericRequest_SETREPORT: - { - uint16_t length = USBGenericRequest_GetLength(request); - uint8_t type = HIDReportRequest_GetReportType(request); - if (type == HIDReportRequest_OUTPUT) { - if (length > HIDDTransferDriver_REPORTSIZE) - length = HIDDTransferDriver_REPORTSIZE; - USBD_Read(0, - pDrv->iReportBuf, - length, - HIDDTransferDriver_ReportReceived, - 0); /* No argument to the callback function */ - } - else { - - USBD_Stall(0); - } - } - return; /* Handled, no need do others */ - } - } - - - /* Process HID requests */ - if (USBRC_SUCCESS == HIDDFunction_RequestHandler(pHidd, - request)) { - return; - } - else - USBDDriver_RequestHandler(pHidd->pUsbd, request); -} - -/** - * Try to read request buffer of SetReport. - * Set pData to 0 to get current data length only. - * \param pData Pointer to data buffer - * \param dwLength Data buffer length - * \return Number of bytes read - */ -uint16_t HIDDTransferDriver_ReadReport(void *pData, - uint32_t dwLength) -{ - HIDDTransferDriver *pDrv = &hiddTransferDriver; - - if (pData == 0) { - - return pDrv->iReportLen; - } - - if (dwLength > HIDDTransferDriver_REPORTSIZE) { - - dwLength = HIDDTransferDriver_REPORTSIZE; - } - if (dwLength > pDrv->iReportLen) { - - dwLength = pDrv->iReportLen; - } - pDrv->iReportLen = 0; - memcpy(pData, pDrv->iReportBuf, dwLength); - - return dwLength; -} - -/** - * Try to read request buffer of interrupt OUT EP. - * Set pData to 0 to get current data length only. - * \param pData Pointer to data buffer - * \param dLength Data buffer length - * \return Number of bytes read - */ -uint16_t HIDDTransferDriver_Read(void *pData, - uint32_t dLength) -{ - HIDDTransferDriver *pDrv = &hiddTransferDriver; - if (pData == 0) { - - return pDrv->outputReports[0]->wTransferred; - } - - if (dLength > HIDDTransferDriver_REPORTSIZE) { - - dLength = HIDDTransferDriver_REPORTSIZE; - } - if (dLength > pDrv->outputReports[0]->wTransferred) { - - dLength = pDrv->outputReports[0]->wTransferred; - } - pDrv->outputReports[0]->wTransferred = 0; - memcpy(pData, pDrv->outputReports[0]->bData, dLength); - - return dLength; -} - -/** - * Write data through USB interrupt IN EP. - * \param pData Pointer to the data sent. - * \param dLength The data length. - * \param fCallback Callback function invoked when transferring done. - * \param pArg Pointer to additional arguments. - */ -uint8_t HIDDTransferDriver_Write(const void *pData, - uint32_t dLength, - TransferCallback fCallback, - void *pArg) -{ - HIDDTransferDriver *pDrv = &hiddTransferDriver; - if (dLength != HIDDTransferDriver_REPORTSIZE) { - - dLength = HIDDTransferDriver_REPORTSIZE; - } - return USBD_Write(pDrv->hidFunction.bPipeIN, - pData, dLength, - fCallback, pArg); -} - -/** - * Starts a remote wake-up sequence if the host has explicitely enabled it - * by sending the appropriate SET_FEATURE request. - */ -void HIDDTransferDriver_RemoteWakeUp(void) -{ - HIDDTransferDriver *pDrv = &hiddTransferDriver; - - /* Remote wake-up has been enabled */ - if (USBDDriver_IsRemoteWakeUpEnabled(pDrv->hidFunction.pUsbd)) { - - USBD_RemoteWakeUp(); - } -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDDStateMachine.c b/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDDStateMachine.c deleted file mode 100644 index 97774821..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDDStateMachine.c +++ /dev/null @@ -1,637 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_msd - *@{ - */ - -/*----------------------------------------------------------------------------- - * Includes - *-----------------------------------------------------------------------------*/ - -#include "SBCMethods.h" -#include "MSDDStateMachine.h" - -/*----------------------------------------------------------------------------- - * Internal functions - *-----------------------------------------------------------------------------*/ -/** - * Returns the expected transfer length and direction (IN, OUT or don't care) - * from the host point-of-view. - * \param cbw Pointer to the CBW to examinate - * \param pLength Expected length of command - * \param pType Expected direction of command - */ -static void MSDD_GetCommandInformation(MSCbw *cbw, - unsigned int *length, - unsigned char *type) -{ - /* Expected host transfer direction and length */ - (*length) = cbw->dCBWDataTransferLength; - - if (*length == 0) { - - (*type) = MSDD_NO_TRANSFER; - } - else if ((cbw->bmCBWFlags & MSD_CBW_DEVICE_TO_HOST) != 0) { - - (*type) = MSDD_DEVICE_TO_HOST; - } - else { - - (*type) = MSDD_HOST_TO_DEVICE; - } -} - -/** - * Pre-processes a command by checking the differences between the host and - * device expectations in term of transfer type and length. - * Once one of the thirteen cases is identified, the actions to do during the - * post-processing phase are stored in the dCase variable of the command - * state. - * \param pMsdDriver Pointer to a MSDDriver instance - * \return 1 if the command is supported, false otherwise - */ -static unsigned char MSDD_PreProcessCommand(MSDDriver *pMsdDriver) -{ - unsigned int hostLength = 0; - unsigned int deviceLength = 0; - unsigned char hostType; - unsigned char deviceType; - unsigned char isCommandSupported; - MSDCommandState *commandState = &(pMsdDriver->commandState); - MSCsw *csw = &(commandState->csw); - MSCbw *cbw = &(commandState->cbw); - MSDLun *lun = &(pMsdDriver->luns[(unsigned char) cbw->bCBWLUN]); - - /* Get information about the command */ - /* Host-side */ - MSDD_GetCommandInformation(cbw, &hostLength, &hostType); - - /* Device-side */ - isCommandSupported = SBC_GetCommandInformation(cbw->pCommand, - &deviceLength, - &deviceType, - lun); - - /* Initialize data residue and result status */ - csw->dCSWDataResidue = 0; - csw->bCSWStatus = MSD_CSW_COMMAND_PASSED; - - /* Check if the command is supported */ - if (isCommandSupported) { - - /* Identify the command case */ - if(hostType == MSDD_NO_TRANSFER) { - - /* Case 1 (Hn = Dn) */ - if(deviceType == MSDD_NO_TRANSFER) { - - /*TRACE_WARNING("Case 1\n\r"); */ - commandState->postprocess = 0; - commandState->length = 0; - } - else if(deviceType == MSDD_DEVICE_TO_HOST) { - - /* Case 2 (Hn < Di) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 2\n\r"); - commandState->postprocess = MSDD_CASE_PHASE_ERROR; - commandState->length = 0; - } - else { /*if(deviceType == MSDD_HOST_TO_DEVICE) { */ - - /* Case 3 (Hn < Do) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 3\n\r"); - commandState->postprocess = MSDD_CASE_PHASE_ERROR; - commandState->length = 0; - } - } - - /* Case 4 (Hi > Dn) */ - else if(hostType == MSDD_DEVICE_TO_HOST) { - - if(deviceType == MSDD_NO_TRANSFER) { - - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 4\n\r"); - commandState->postprocess = MSDD_CASE_STALL_IN; - commandState->length = 0; - csw->dCSWDataResidue = hostLength; - } - else if(deviceType == MSDD_DEVICE_TO_HOST) { - - if(hostLength > deviceLength) { - - /* Case 5 (Hi > Di) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 5\n\r"); - commandState->postprocess = MSDD_CASE_STALL_IN; - commandState->length = deviceLength; - csw->dCSWDataResidue = hostLength - deviceLength; - } - else if(hostLength == deviceLength) { - - /* Case 6 (Hi = Di) */ - commandState->postprocess = 0; - commandState->length = deviceLength; - } - else { /*if(hostLength < deviceLength) { */ - - /* Case 7 (Hi < Di) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 7\n\r"); - commandState->postprocess = MSDD_CASE_PHASE_ERROR; - commandState->length = hostLength; - } - } - else { /*if(deviceType == MSDD_HOST_TO_DEVICE) { */ - - /* Case 8 (Hi <> Do) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 8\n\r"); - commandState->postprocess = - MSDD_CASE_STALL_IN | MSDD_CASE_PHASE_ERROR; - commandState->length = 0; - } - } - else if(hostType == MSDD_HOST_TO_DEVICE) { - - if(deviceType == MSDD_NO_TRANSFER) { - - /* Case 9 (Ho > Dn) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 9\n\r"); - commandState->postprocess = MSDD_CASE_STALL_OUT; - commandState->length = 0; - csw->dCSWDataResidue = hostLength; - } - else if(deviceType == MSDD_DEVICE_TO_HOST) { - - /* Case 10 (Ho <> Di) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 10\n\r"); - commandState->postprocess = - MSDD_CASE_STALL_OUT | MSDD_CASE_PHASE_ERROR; - commandState->length = 0; - } - else { /*if(deviceType == MSDD_HOST_TO_DEVICE) { */ - - if(hostLength > deviceLength) { - - /* Case 11 (Ho > Do) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 11\n\r"); - commandState->postprocess = MSDD_CASE_STALL_OUT; -/* commandState->length = deviceLength; */ -/* csw->dCSWDataResidue = hostLength - deviceLength; */ - commandState->length = 0; - csw->dCSWDataResidue = deviceLength; - } - else if(hostLength == deviceLength) { - - /* Case 12 (Ho = Do) */ - /*TRACE_WARNING( */ - /* "MSDD_PreProcessCommand: Case 12\n\r"); */ - commandState->postprocess = 0; - commandState->length = deviceLength; - } - else { /*if(hostLength < deviceLength) { */ - - /* Case 13 (Ho < Do) */ - TRACE_WARNING( - "MSDD_PreProcessCommand: Case 13\n\r"); - commandState->postprocess = MSDD_CASE_PHASE_ERROR; - commandState->length = hostLength; - } - } - } - } - - return isCommandSupported; -} - -/** - * Post-processes a command given the case identified during the - * pre-processing step. - * Depending on the case, one of the following actions can be done: - * - Bulk IN endpoint is stalled - * - Bulk OUT endpoint is stalled - * - CSW status set to phase error - * \param pMsdDriver Pointer to a MSDDriver instance - * \return If the device is halted - */ -static unsigned char MSDD_PostProcessCommand(MSDDriver *pMsdDriver) -{ - MSDCommandState *commandState = &(pMsdDriver->commandState); - MSCsw *csw = &(commandState->csw); - unsigned char haltStatus = 0; - - /* STALL Bulk IN endpoint ? */ - if ((commandState->postprocess & MSDD_CASE_STALL_IN) != 0) { - - TRACE_INFO_WP("StallIn "); - //MSDD_Halt(MSDD_CASE_STALL_IN); - USBD_Halt(commandState->pipeIN); - haltStatus = 1; - } - - /* STALL Bulk OUT endpoint ? */ - if ((commandState->postprocess & MSDD_CASE_STALL_OUT) != 0) { - - TRACE_INFO_WP("StallOut "); - //MSDD_Halt(MSDD_CASE_STALL_OUT); - USBD_Halt(commandState->pipeOUT); - haltStatus = 1; - } - - /* Set CSW status code to phase error ? */ - if ((commandState->postprocess & MSDD_CASE_PHASE_ERROR) != 0) { - - TRACE_INFO_WP("PhaseErr "); - csw->bCSWStatus = MSD_CSW_PHASE_ERROR; - } - - return haltStatus; -} - -/** - * Processes the latest command received by the %device. - * \param pMsdDriver Pointer to a MSDDriver instance - * \return 1 if the command has been completed, false otherwise. - */ -static unsigned char MSDD_ProcessCommand(MSDDriver * pMsdDriver) -{ - unsigned char status; - MSDCommandState *commandState = &(pMsdDriver->commandState); - MSCbw *cbw = &(commandState->cbw); - MSCsw *csw = &(commandState->csw); - MSDLun *lun = &(pMsdDriver->luns[(unsigned char) cbw->bCBWLUN]); - unsigned char isCommandComplete = 0; - - /* Check if LUN is valid */ - if (cbw->bCBWLUN > pMsdDriver->maxLun) { - - TRACE_WARNING( - "MSDD_ProcessCommand: LUN %d not exist\n\r", cbw->bCBWLUN); - status = MSDD_STATUS_ERROR; - } - else { - - /* Process command */ - if (pMsdDriver->maxLun > 0) { - - TRACE_INFO_WP("LUN%d ", cbw->bCBWLUN); - } - - status = SBC_ProcessCommand(lun, commandState); - } - - /* Check command result code */ - if (status == MSDD_STATUS_PARAMETER) { - - TRACE_WARNING( - "MSDD_ProcessCommand: Unknown cmd 0x%02X\n\r", - cbw->pCommand[0]); - - /* Update sense data */ - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_ILLEGAL_REQUEST, - SBC_ASC_INVALID_FIELD_IN_CDB, - 0); - - /* Result codes */ - csw->bCSWStatus = MSD_CSW_COMMAND_FAILED; - isCommandComplete = 1; - - /* stall the request, IN or OUT */ - if (((cbw->bmCBWFlags & MSD_CBW_DEVICE_TO_HOST) == 0) - && (cbw->dCBWDataTransferLength > 0)) { - - /* Stall the OUT endpoint : host to device */ - /* MSDD_Halt(MSDD_CASE_STALL_OUT); */ - commandState->postprocess = MSDD_CASE_STALL_OUT; - TRACE_INFO_WP("StaOUT "); - } - else { - - /* Stall the IN endpoint : device to host */ - /* MSDD_Halt(MSDD_CASE_STALL_IN); */ - commandState->postprocess = MSDD_CASE_STALL_IN; - TRACE_INFO_WP("StaIN "); - } - } - else if (status == MSDD_STATUS_ERROR) { - - TRACE_WARNING("MSD_ProcessCommand: Cmd %x fail\n\r", - ((SBCCommand*)commandState->cbw.pCommand)->bOperationCode); - - /* Update sense data */ - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_MEDIUM_ERROR, - SBC_ASC_INVALID_FIELD_IN_CDB, - 0); - - /* Result codes */ - csw->bCSWStatus = MSD_CSW_COMMAND_FAILED; - isCommandComplete = 1; - } - else if (status == MSDD_STATUS_RW) { - - csw->bCSWStatus = MSD_CSW_COMMAND_FAILED; - isCommandComplete = 1; - } - else { - - /* Update sense data */ - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_NO_SENSE, - 0, - 0); - - /* Is command complete ? */ - if (status == MSDD_STATUS_SUCCESS) { - - isCommandComplete = 1; - } - } - - /* Check if command has been completed */ - if (isCommandComplete) { - - TRACE_INFO_WP("Cplt "); - - /* Adjust data residue */ - if (commandState->length != 0) { - - csw->dCSWDataResidue += commandState->length; - - /* STALL the endpoint waiting for data */ - if ((cbw->bmCBWFlags & MSD_CBW_DEVICE_TO_HOST) == 0) { - - /* Stall the OUT endpoint : host to device */ - /* MSDD_Halt(MSDD_CASE_STALL_OUT); */ - commandState->postprocess = MSDD_CASE_STALL_OUT; - TRACE_INFO_WP("StaOUT "); - } - else { - - /* Stall the IN endpoint : device to host */ - /* MSDD_Halt(MSDD_CASE_STALL_IN); */ - commandState->postprocess = MSDD_CASE_STALL_IN; - TRACE_INFO_WP("StaIN "); - } - } - - /* Reset command state */ - commandState->state = 0; - } - - return isCommandComplete; -} - -/** - * State machine for the MSD %device driver - * \param pMsdDriver Pointer to a MSDDriver instance - */ -void MSDD_StateMachine(MSDDriver * pMsdDriver) -{ - MSDCommandState *commandState = &(pMsdDriver->commandState); - MSCbw *cbw = &(commandState->cbw); - MSCsw *csw = &(commandState->csw); - MSDTransfer *transfer = &(commandState->transfer); - unsigned char status; - - /* Identify current driver state */ - switch (pMsdDriver->state) { - /*---------------------- */ - case MSDD_STATE_READ_CBW: - /*---------------------- */ - /* Start the CBW read operation */ - transfer->semaphore = 0; - #if 1 - status = USBD_Read(commandState->pipeOUT, - cbw, - MSD_CBW_SIZE, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Read(cbw, - MSD_CBW_SIZE, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - - /* Check operation result code */ - if (status == USBD_STATUS_SUCCESS) { - - /* If the command was successful, wait for transfer */ - pMsdDriver->state = MSDD_STATE_WAIT_CBW; - } - break; - - /*---------------------- */ - case MSDD_STATE_WAIT_CBW: - /*---------------------- */ - /* Check transfer semaphore */ - if (transfer->semaphore > 0) { - - /* Take semaphore and terminate transfer */ - transfer->semaphore--; - - /* Check if transfer was successful */ - if (transfer->status == USBD_STATUS_SUCCESS) { - - TRACE_INFO_WP("------------------------------\n\r"); - - /* Process received command */ - pMsdDriver->state = MSDD_STATE_PROCESS_CBW; - } - else if (transfer->status == USBD_STATUS_RESET) { - - TRACE_INFO("MSDD_StateMachine: EP resetted\n\r"); - pMsdDriver->state = MSDD_STATE_READ_CBW; - } - else { - - TRACE_WARNING( - "MSDD_StateMachine: Failed to read CBW\n\r"); - pMsdDriver->state = MSDD_STATE_READ_CBW; - } - } - break; - - /*------------------------- */ - case MSDD_STATE_PROCESS_CBW: - /*------------------------- */ - /* Check if this is a new command */ - if (commandState->state == 0) { - - /* Copy the CBW tag */ - csw->dCSWTag = cbw->dCBWTag; - - /* Check that the CBW is 31 bytes long */ - if ((transfer->transferred != MSD_CBW_SIZE) || - (transfer->remaining != 0)) { - - TRACE_WARNING( - "MSDD_StateMachine: Invalid CBW (len %d)\n\r", - (int)transfer->transferred); - - /* Wait for a reset recovery */ - pMsdDriver->waitResetRecovery = 1; - - /* Halt the Bulk-IN and Bulk-OUT pipes */ - //MSDD_Halt(MSDD_CASE_STALL_OUT | MSDD_CASE_STALL_IN); - USBD_Halt(commandState->pipeIN); - USBD_Halt(commandState->pipeOUT); - - csw->bCSWStatus = MSD_CSW_COMMAND_FAILED; - pMsdDriver->state = MSDD_STATE_READ_CBW; - - } - /* Check the CBW Signature */ - else if (cbw->dCBWSignature != MSD_CBW_SIGNATURE) { - - TRACE_WARNING( - "MSD_BOTStateMachine: Invalid CBW (Bad signature)\n\r"); - - /* Wait for a reset recovery */ - pMsdDriver->waitResetRecovery = 1; - - /* Halt the Bulk-IN and Bulk-OUT pipes */ - //MSDD_Halt(MSDD_CASE_STALL_OUT | MSDD_CASE_STALL_IN); - USBD_Halt(commandState->pipeIN); - USBD_Halt(commandState->pipeOUT); - - csw->bCSWStatus = MSD_CSW_COMMAND_FAILED; - pMsdDriver->state = MSDD_STATE_READ_CBW; - } - else { - - /* Pre-process command */ - MSDD_PreProcessCommand(pMsdDriver); - } - } - - /* Process command */ - if (csw->bCSWStatus == MSDD_STATUS_SUCCESS) { - - if (MSDD_ProcessCommand(pMsdDriver)) { - - /* Post-process command if it is finished */ - if (MSDD_PostProcessCommand(pMsdDriver)) { - - TRACE_INFO_WP("WaitHALT "); - pMsdDriver->state = MSDD_STATE_WAIT_HALT; - } - else { - - pMsdDriver->state = MSDD_STATE_SEND_CSW; - } - } - TRACE_INFO_WP("\n\r"); - } - - break; - - /*---------------------- */ - case MSDD_STATE_SEND_CSW: - /*---------------------- */ - /* Set signature */ - csw->dCSWSignature = MSD_CSW_SIGNATURE; - - /* Start the CSW write operation */ - #if 1 - status = USBD_Write(commandState->pipeIN, - csw, - MSD_CSW_SIZE, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Write(csw, - MSD_CSW_SIZE, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - - /* Check operation result code */ - if (status == USBD_STATUS_SUCCESS) { - - TRACE_INFO_WP("SendCSW "); - - /* Wait for end of transfer */ - pMsdDriver->state = MSDD_STATE_WAIT_CSW; - } - break; - - /*---------------------- */ - case MSDD_STATE_WAIT_CSW: - /*---------------------- */ - /* Check transfer semaphore */ - if (transfer->semaphore > 0) { - - /* Take semaphore and terminate transfer */ - transfer->semaphore--; - - /* Check if transfer was successful */ - if (transfer->status == USBD_STATUS_RESET) { - - TRACE_INFO("MSDD_StateMachine: EP resetted\n\r"); - } - else if (transfer->status == USBD_STATUS_ABORTED) { - - TRACE_WARNING( - "MSDD_StateMachine: Failed to send CSW\n\r"); - } - else { - - TRACE_INFO_WP("ok"); - } - - /* Read new CBW */ - pMsdDriver->state = MSDD_STATE_READ_CBW; - } - break; - - /*---------------------- */ - case MSDD_STATE_WAIT_HALT: - /*---------------------- */ - //if (MSDD_IsHalted() == 0) { - if (!USBD_IsHalted(commandState->pipeIN)) { - - pMsdDriver->state = MSDD_STATE_SEND_CSW; - } - break; - } -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDDriver.c b/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDDriver.c deleted file mode 100644 index 660e30bb..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDDriver.c +++ /dev/null @@ -1,113 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_msd - *@{ - * Implement a single interface device with single MS function in. - */ - -/*------------------------------------------------------------------------------ - * Includes - *------------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include -#include - -/*----------------------------------------------------------------------------- - * Internal variables - *-----------------------------------------------------------------------------*/ - -/*----------------------------------------------------------------------------- - * Internal functions - *-----------------------------------------------------------------------------*/ - -/*----------------------------------------------------------------------------- - * Exported functions - *-----------------------------------------------------------------------------*/ - -/** - * Initializes the MSD driver and the associated USB driver. - * \param pDescriptors Pointer to Descriptors list for MSD Device. - * \param pLuns Pointer to a list of LUNs - * \param numLuns Number of LUN in list - * \see MSDLun - */ -void MSDDriver_Initialize( - const USBDDriverDescriptors *pDescriptors, - MSDLun *pLuns, unsigned char numLuns) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBDDriver_Initialize(pUsbd, pDescriptors, 0); - MSDFunction_Initialize(pUsbd, 0, pLuns, numLuns); - USBD_Init(); -} - -/** - * Invoked when the configuration of the device changes. Resets the mass - * storage driver. - * \param pMsdDriver Pointer to MSDDriver instance. - * \param cfgnum New configuration number. - */ -void MSDDriver_ConfigurationChangeHandler( - uint8_t cfgnum) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - USBConfigurationDescriptor *pDesc; - if (cfgnum) { - pDesc = USBDDriver_GetCfgDescriptors(pUsbd, cfgnum); - MSDFunction_Configure((USBGenericDescriptor*)pDesc, - pDesc->wTotalLength); - } -} - -/** - * Handler for incoming SETUP requests on default Control endpoint 0. - * - * Standard requests are forwarded to the USBDDriver_RequestHandler - * method. - * \param pMsdDriver Pointer to MSDDriver instance. - * \param request Pointer to a USBGenericRequest instance - */ -void MSDDriver_RequestHandler( - const USBGenericRequest *request) -{ - USBDDriver *pUsbd = USBD_GetDriver(); - TRACE_INFO_WP("NewReq "); - if (MSDFunction_RequestHandler(request)) { - USBDDriver_RequestHandler(pUsbd, request); - } -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDFunction.c b/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDFunction.c deleted file mode 100644 index c4531f41..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDFunction.c +++ /dev/null @@ -1,311 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_msd - *@{ - * Implements Massstorage Function for USB device. - */ - -/*------------------------------------------------------------------------------ - * Includes - *------------------------------------------------------------------------------*/ - -#include - -#include -#include -#include -#include -#include - -/*----------------------------------------------------------------------------- - * Internal Types - *-----------------------------------------------------------------------------*/ - -/** Parse data extension */ -typedef struct _MSDParseData { - /** Pointer to driver instance */ - MSDDriver *pMsdd; - /** Pointer to currently processed interface descriptor */ - USBInterfaceDescriptor *pIf; -} MSDParseData; - - -/*----------------------------------------------------------------------------- - * Internal variables - *-----------------------------------------------------------------------------*/ - -/** MSD Driver instance for device function */ -static MSDDriver msdFunction; - -/*----------------------------------------------------------------------------- - * Internal functions - *-----------------------------------------------------------------------------*/ - -/** - * Parse descriptors: Bulk EP IN/OUT. - * \param desc Pointer to current processed descriptor. - * \param arg Pointer to data extention struct for parsing. - */ -static uint8_t MSDFunction_Parse(USBGenericDescriptor* desc, MSDParseData* arg) -{ - MSDDriver *pMsdd = arg->pMsdd; - USBInterfaceDescriptor *pIf; - - /* Not a valid descriptor */ - if (desc->bLength == 0) { - return USBD_STATUS_INVALID_PARAMETER; - } - /* Find interface descriptor */ - if (desc->bDescriptorType == USBGenericDescriptor_INTERFACE) { - pIf = (USBInterfaceDescriptor*)desc; - if (pIf->bInterfaceClass == MSInterfaceDescriptor_CLASS) { - /* First found IF */ - if (pMsdd->interfaceNb == 0xFF) { - pMsdd->interfaceNb = pIf->bInterfaceNumber; - arg->pIf = pIf; - } - /* Specific IF */ - else if (pMsdd->interfaceNb == pIf->bInterfaceNumber) { - arg->pIf = pIf; - } - - } - } - /* Start parse endpoints */ - if (arg->pIf) { - if (desc->bDescriptorType == USBGenericDescriptor_ENDPOINT) { - USBEndpointDescriptor *pEP = (USBEndpointDescriptor*)desc; - if (pEP->bmAttributes == USBEndpointDescriptor_BULK) { - if (pEP->bEndpointAddress & 0x80) - pMsdd->commandState.pipeIN = pEP->bEndpointAddress & 0x7F; - else - pMsdd->commandState.pipeOUT = pEP->bEndpointAddress; - } - } - - /* Finish when found all pipes */ - if (pMsdd->commandState.pipeIN != 0 - && pMsdd->commandState.pipeOUT != 0) { - return USBRC_FINISHED; - } - } - return 0; -} - -/** - * Resets the state of the MSD driver - */ -static void MSDFunction_Reset(void) -{ - MSDDriver *pMsdd = &msdFunction; - - TRACE_INFO_WP("MSDReset "); - - pMsdd->state = MSDD_STATE_READ_CBW; - pMsdd->waitResetRecovery = 0; - pMsdd->commandState.state = 0; -} - -/*----------------------------------------------------------------------------- - * Exported functions - *-----------------------------------------------------------------------------*/ - -/** - * Initializes the MSD driver and the associated USB driver. - * \param pUsbd Pointer to USBDDriver instance. - * \param bInterfaceNb Interface number for the function. - * \param pLuns Pointer to a list of LUNs - * \param numLuns Number of LUN in list - * \see MSDLun - */ -void MSDFunction_Initialize( - USBDDriver *pUsbd, uint8_t bInterfaceNb, - MSDLun *pLuns, uint8_t numLuns) -{ - MSDDriver *pMsdDriver = &msdFunction; - - TRACE_INFO("MSDFun init\n\r"); - - /* Driver instance */ - pMsdDriver->pUsbd = pUsbd; - pMsdDriver->interfaceNb = bInterfaceNb; - - /* Command state initialization */ - pMsdDriver->commandState.state = 0; - pMsdDriver->commandState.postprocess = 0; - pMsdDriver->commandState.length = 0; - pMsdDriver->commandState.transfer.semaphore = 0; - - /* LUNs */ - pMsdDriver->luns = pLuns; - pMsdDriver->maxLun = (uint8_t) (numLuns - 1); - - /* Reset BOT driver */ - MSDFunction_Reset(); -} - -/** - * Invoked when the configuration of the device changes. - * Pass endpoints and resets the mass storage function. - * \pDescriptors Pointer to the descriptors for function configure. - * \wLength Length of descriptors in number of bytes. - */ -void MSDFunction_Configure(USBGenericDescriptor *pDescriptors, - uint16_t wLength) -{ - MSDDriver *pMsdDriver = &msdFunction; - MSDParseData parseData; - - TRACE_INFO_WP("MSDFunCfg "); - - pMsdDriver->state = MSDD_STATE_READ_CBW; - pMsdDriver->waitResetRecovery = 0; - pMsdDriver->commandState.state = 0; - - parseData.pIf = 0; - parseData.pMsdd = pMsdDriver; - USBGenericDescriptor_Parse((USBGenericDescriptor*)pDescriptors, wLength, - (USBDescriptorParseFunction)MSDFunction_Parse, &parseData); - - MSDFunction_Reset(); -} - -/** - * Handler for incoming SETUP requests on default Control endpoint 0. - * - * Standard requests are forwarded to the USBDDriver_RequestHandler - * method. - * \param pMsdDriver Pointer to MSDDriver instance. - * \param request Pointer to a USBGenericRequest instance - */ -uint32_t MSDFunction_RequestHandler( - const USBGenericRequest *request) -{ - MSDDriver *pMsdDriver = &msdFunction; - uint32_t reqCode = (USBGenericRequest_GetType(request) << 8) - | (USBGenericRequest_GetRequest(request)); - - TRACE_INFO_WP("Msdf "); - - /* Handle requests */ - switch (reqCode) { - /*--------------------- */ - case USBGenericRequest_CLEARFEATURE: - /*--------------------- */ - TRACE_INFO_WP("ClrFeat "); - - switch (USBFeatureRequest_GetFeatureSelector(request)) { - - /*--------------------- */ - case USBFeatureRequest_ENDPOINTHALT: - /*--------------------- */ - TRACE_INFO_WP("Hlt "); - - /* Do not clear the endpoint halt status if the device is waiting */ - /* for a reset recovery sequence */ - if (!pMsdDriver->waitResetRecovery) { - - /* Forward the request to the standard handler */ - USBDDriver_RequestHandler(USBD_GetDriver(), request); - } - else { - - TRACE_INFO_WP("No "); - } - - USBD_Write(0, 0, 0, 0, 0); - - return USBRC_SUCCESS; /* Handled */ - - } - break; - - /*------------------- */ - case (USBGenericRequest_CLASS<<8)|MSD_GET_MAX_LUN: - /*------------------- */ - TRACE_INFO_WP("gMaxLun "); - - /* Check request parameters */ - if ((request->wValue == 0) - && (request->wIndex == pMsdDriver->interfaceNb) - && (request->wLength == 1)) { - - USBD_Write(0, &(pMsdDriver->maxLun), 1, 0, 0); - - } - else { - - TRACE_WARNING( - "MSDDriver_RequestHandler: GetMaxLUN(%d,%d,%d)\n\r", - request->wValue, request->wIndex, request->wLength); - USBD_Stall(0); - } - return USBRC_SUCCESS; /* Handled */ - - /*----------------------- */ - case (USBGenericRequest_CLASS<<8)|MSD_BULK_ONLY_RESET: - /*----------------------- */ - TRACE_INFO_WP("Rst "); - - /* Check parameters */ - if ((request->wValue == 0) - && (request->wIndex == pMsdDriver->interfaceNb) - && (request->wLength == 0)) { - - /* Reset the MSD driver */ - MSDFunction_Reset(); - USBD_Write(0, 0, 0, 0, 0); - } - else { - - TRACE_WARNING( - "MSDDriver_RequestHandler: Reset(%d,%d,%d)\n\r", - request->wValue, request->wIndex, request->wLength); - USBD_Stall(0); - } - return USBRC_SUCCESS; /* Handled */ - } - - return USBRC_PARAM_ERR; -} - -/** - * State machine for the MSD driver - */ -void MSDFunction_StateMachine(void) -{ - if (USBD_GetState() < USBD_STATE_CONFIGURED){} - else MSDD_StateMachine(&msdFunction); - -} - -/**@}*/ - diff --git a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDIOFifo.c b/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDIOFifo.c deleted file mode 100644 index be742e4c..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDIOFifo.c +++ /dev/null @@ -1,75 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "MSDIOFifo.h" - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * \brief Initializes a MSDIOFifo instance. - * \param pFifo Pointer to the MSDIOFifo instance to initialize - * \param pBuffer Pointer to a buffer used for read/write operation and - * which must be blockSize bytes aligned. - * \param bufferSize Total size of the buffer in bytes - */ -void MSDIOFifo_Init(MSDIOFifo *pFifo, - void * pBuffer, unsigned short bufferSize) -{ - pFifo->pBuffer = pBuffer; - pFifo->bufferSize = bufferSize; - - pFifo->inputNdx = 0; - pFifo->outputNdx = 0; - pFifo->inputTotal = 0; - pFifo->outputTotal = 0; - - pFifo->inputState = MSDIO_IDLE; - pFifo->outputState = MSDIO_IDLE; - - pFifo->fullCnt = 0; - pFifo->nullCnt = 0; -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDLun.c b/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDLun.c deleted file mode 100644 index 66a4d335..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/massstorage/MSDLun.c +++ /dev/null @@ -1,389 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - - -#include "MSDLun.h" -#include -#include - -/*------------------------------------------------------------------------------ - * Constants - *------------------------------------------------------------------------------*/ - -/** Default LUN block size in bytes */ -#define DEFAULT_LUN_BLOCK_SIZE 512 - -/*------------------------------------------------------------------------------ - * Internal variables - *------------------------------------------------------------------------------*/ - -/** Inquiry data to return to the host for the Lun. */ -static SBCInquiryData inquiryData = { - - SBC_DIRECT_ACCESS_BLOCK_DEVICE, /* Direct-access block device */ - SBC_PERIPHERAL_DEVICE_CONNECTED,/* Peripheral device is connected */ - 0x00, /* Reserved bits */ - 0x01, /* Media is removable */ - SBC_SPC_VERSION_4, /* SPC-4 supported */ - 0x2, /* Response data format, must be 0x2 */ - 0, /* Hierarchical addressing not supported */ - 0, /* ACA not supported */ - 0x0, /* Obsolete bits */ - sizeof(SBCInquiryData) - 5, /* Additional length */ - 0, /* No embedded SCC */ - 0, /* No access control coordinator */ - SBC_TPGS_NONE, /* No target port support group */ - 0, /* Third-party copy not supported */ - 0x0, /* Reserved bits */ - 0, /* Protection information not supported */ - 0x0, /* Obsolete bit */ - 0, /* No embedded enclosure service component */ - 0x0, /* ??? */ - 0, /* Device is not multi-port */ - 0x0, /* Obsolete bits */ - 0x0, /* Unused feature */ - 0x0, /* Unused features */ - 0, /* Task management model not supported */ - 0x0, /* ??? */ - {'A','T','M','E','L',' ',' ',' '}, - {'M','a','s','s',' ', - 'S','t','o','r','a','g','e',' ', - 'M','S','D'}, - {'0','.','0','1'}, - {'M','a','s','s',' ', - 'S','t','o','r','a','g','e',' ', - 'E','x','a','m','p','l','e'}, - 0x00, /* Unused features */ - 0x00, /* Reserved bits */ - {SBC_VERSION_DESCRIPTOR_SBC_3}, /* SBC-3 compliant device */ - {0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, - 0, 0} /* Reserved */ -}; - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -/** - * \brief Initializes a LUN instance. Must be invoked at least once even no - * Media is linked. - * \param lun Pointer to the MSDLun instance to initialize - * \param media Media on which the LUN is constructed, set to 0 to - * disconnect the Media or initialize an ejected LUN. - * \param ioBuffer Pointer to a buffer used for read/write operation and - * which must be blockSize bytes long. - * \param ioBufferSize Size of the allocated IO buffer. - * \param baseAddress Base address of the LUN in number of media blocks - * \param size Total size of the LUN in number of media blocks - * \param blockSize One block of the LUN in number of media blocks - * \param protected The LUN area is forced to readonly even the media - * is writable - * \param dataMonitor Pointer to a Monitor Function to analyze the flow of - * this LUN. - */ -void LUN_Init(MSDLun *lun, - Media *media, - uint8_t *ioBuffer, - uint32_t ioBufferSize, - uint32_t baseAddress, - uint32_t size, - uint16_t blockSize, - uint8_t protected, - void (*dataMonitor)(uint8_t flowDirection, - uint32_t dataLength, - uint32_t fifoNullCount, - uint32_t fifoFullCount)) -{ - uint32_t logicalBlockAddress; - TRACE_INFO("LUN init\n\r"); - - /* Initialize inquiry data */ - - lun->inquiryData = &inquiryData; - - /* Initialize request sense data */ - - lun->requestSenseData.bResponseCode = SBC_SENSE_DATA_FIXED_CURRENT; - lun->requestSenseData.isValid = 1; - lun->requestSenseData.bObsolete1 = 0; - lun->requestSenseData.bSenseKey = SBC_SENSE_KEY_NO_SENSE; - lun->requestSenseData.bReserved1 = 0; - lun->requestSenseData.isILI = 0; - lun->requestSenseData.isEOM = 0; - lun->requestSenseData.isFilemark = 0; - lun->requestSenseData.pInformation[0] = 0; - lun->requestSenseData.pInformation[1] = 0; - lun->requestSenseData.pInformation[2] = 0; - lun->requestSenseData.pInformation[3] = 0; - lun->requestSenseData.bAdditionalSenseLength - = sizeof(SBCRequestSenseData) - 8; - lun->requestSenseData.bAdditionalSenseCode = 0; - lun->requestSenseData.bAdditionalSenseCodeQualifier = 0; - lun->requestSenseData.bFieldReplaceableUnitCode = 0; - lun->requestSenseData.bSenseKeySpecific = 0; - lun->requestSenseData.pSenseKeySpecific[0] = 0; - lun->requestSenseData.pSenseKeySpecific[0] = 0; - lun->requestSenseData.isSKSV = 0; - - STORE_DWORDB(0, lun->readCapacityData.pLogicalBlockAddress); - STORE_DWORDB(0, lun->readCapacityData.pLogicalBlockLength); - - /* Initialize LUN */ - - lun->media = media; - if (media == 0) { - lun->status = LUN_NOT_PRESENT; - return; - } - - lun->baseAddress = baseAddress; - - /* Customized block size */ - - if (blockSize) { - lun->blockSize = blockSize; - } - else { - if (media->blockSize < DEFAULT_LUN_BLOCK_SIZE) - lun->blockSize = DEFAULT_LUN_BLOCK_SIZE / media->blockSize; - else - lun->blockSize = 1; - } - - if (size) { - lun->size = size; - } - else { - lun->size = media->size; - /*if (blockSize) */ - - /* lun->size = media->size / blockSize; */ - - /*else { */ - - /* if (media->blockSize < DEFAULT_LUN_BLOCK_SIZE) */ - - /* lun->size = media->size / lun->blockSize; */ - - /* else */ - - /* lun->size = media->size; */ - - /*} */ - - } - - TRACE_INFO("LUN: blkSize %d, size %d\n\r", (int)lun->blockSize, (int)lun->size); - if (protected) lun->protected = 1; - else lun->protected = media->protected; - - lun->ioFifo.pBuffer = ioBuffer; - lun->ioFifo.bufferSize = ioBufferSize; - - lun->dataMonitor = dataMonitor; - - /* Initialize read capacity data */ - - logicalBlockAddress = lun->size / lun->blockSize - 1; - STORE_DWORDB(logicalBlockAddress, - lun->readCapacityData.pLogicalBlockAddress); - STORE_DWORDB(lun->blockSize * media->blockSize, - lun->readCapacityData.pLogicalBlockLength); - - /* Indicate media change */ - - lun->status = LUN_CHANGED; -} - -/** - * \brief Eject the media from a LUN - * \param lun Pointer to the MSDLun instance to initialize - * \return Operation result code - */ -uint32_t LUN_Eject(MSDLun *lun) -{ - if (lun->media) { - - /* Avoid any LUN R/W in progress */ - if (lun->media->state == MED_STATE_BUSY) { - - return USBD_STATUS_LOCKED; - } - - /* Remove the link of the media */ - lun->media = 0; - } - /* LUN is removed */ - lun->status = LUN_NOT_PRESENT; - - return USBD_STATUS_SUCCESS; -} - -/** - * \brief Writes data on the a LUN starting at the specified block address. - * \param lun Pointer to a MSDLun instance - * \param blockAddress First block address to write - * \param data Pointer to the data to write - * \param length Number of blocks to write - * \param callback Optional callback to invoke when the write finishes - * \param argument Optional callback argument. - * \return Operation result code - */ -uint32_t LUN_Write(MSDLun *lun, - uint32_t blockAddress, - void *data, - uint32_t length, - TransferCallback callback, - void *argument) -{ - uint32_t medBlk, medLen; - uint8_t status; - - TRACE_INFO_WP("LUNWrite(%u) ", blockAddress); - - /* Check that the data is not too big */ - if ((length + blockAddress) * lun->blockSize > lun->size) { - - TRACE_WARNING("LUN_Write: Data too big\n\r"); - status = USBD_STATUS_ABORTED; - } - else if (lun->media == 0 || lun->status != LUN_READY) { - - TRACE_WARNING("LUN_Write: Media not ready\n\r"); - status = USBD_STATUS_ABORTED; - } - else if (lun->protected) { - TRACE_WARNING("LUN_Write: LUN is readonly\n\r"); - status = USBD_STATUS_ABORTED; - } - else { - - /* Compute write start address */ - medBlk = lun->baseAddress + blockAddress * lun->blockSize; - medLen = length * lun->blockSize; - - /* Start write operation */ - status = MED_Write(lun->media, - medBlk, - data, - medLen, - (MediaCallback) callback, - argument); - - /* Check operation result code */ - if (status == MED_STATUS_SUCCESS) { - - status = USBD_STATUS_SUCCESS; - } - else { - - TRACE_WARNING("LUN_Write: Cannot write media\n\r"); - status = USBD_STATUS_ABORTED; - } - } - - return status; -} - -/** - * \brief Reads data from a LUN, starting at the specified block address. - * \param lun Pointer to a MSDLun instance - * \param blockAddress First block address to read - * \param data Pointer to a data buffer in which to store the data - * \param length Number of blocks to read - * \param callback Optional callback to invoke when the read finishes - * \param argument Optional callback argument. - * \return Operation result code - */ -uint32_t LUN_Read(MSDLun *lun, - uint32_t blockAddress, - void *data, - uint32_t length, - TransferCallback callback, - void *argument) -{ - uint32_t medBlk, medLen; - uint8_t status; - - /* Check that the data is not too big */ - if ((length + blockAddress) * lun->blockSize > lun->size) { - - TRACE_WARNING("LUN_Read: Area: (%d + %d)*%d > %d\n\r", - (int)length, (int)blockAddress, (int)lun->blockSize, (int)lun->size); - status = USBD_STATUS_ABORTED; - } - else if (lun->media == 0 || lun->status != LUN_READY) { - - TRACE_WARNING("LUN_Read: Media not present\n\r"); - status = USBD_STATUS_ABORTED; - } - else { - - TRACE_INFO_WP("LUNRead(%u) ", blockAddress); - - /* Compute read start address */ - medBlk = lun->baseAddress + (blockAddress * lun->blockSize); - medLen = length * lun->blockSize; - - /* Start write operation */ - status = MED_Read(lun->media, - medBlk, - data, - medLen, - (MediaCallback) callback, - argument); - - /* Check result code */ - if (status == MED_STATUS_SUCCESS) { - - status = USBD_STATUS_SUCCESS; - } - else { - - TRACE_WARNING("LUN_Read: Cannot read media\n\r"); - status = USBD_STATUS_ABORTED; - } - } - - return status; -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/device/massstorage/SBCMethods.c b/firmware/atmel_softpack_libraries/usb/device/massstorage/SBCMethods.c deleted file mode 100644 index 3b2d6ab6..00000000 --- a/firmware/atmel_softpack_libraries/usb/device/massstorage/SBCMethods.c +++ /dev/null @@ -1,1855 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "SBCMethods.h" -#include "MSDDStateMachine.h" -#include - -#include "MSDIOFifo.h" - -/*------------------------------------------------------------------------------ - * Global variables - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Macros - *------------------------------------------------------------------------------*/ - -#ifdef MSDIO_READ10_CHUNK_SIZE -/** READ10 - Read data from specific LUN to FIFO */ -#define SBC_READ_CHUNK(pLun, lba, pFifo, pCb, pArg) \ - LUN_Read((pLun), (lba), \ - &(pFifo)->pBuffer[(pFifo)->inputNdx], \ - ((pFifo)->chunkSize/(pFifo)->blockSize), \ - (TransferCallback)(pCb), (void*)pArg) -/** READ10 - Transfer data from FIFO to USB */ -#define SBC_TX_CHUNK(ep, pFifo, pCb, pArg) \ - USBD_Write( (ep), \ - &(pFifo)->pBuffer[(pFifo)->outputNdx], \ - (pFifo)->chunkSize, \ - (TransferCallback)(pCb), (void*)(pArg)) -#endif - -#ifdef MSDIO_WRITE10_CHUNK_SIZE -/** WRITE10 - Read data from USB to FIFO */ -#define SBC_RX_CHUNK(ep, pFifo,pCb,pArg) \ - USBD_Read( (ep), \ - &(pFifo)->pBuffer[(pFifo)->inputNdx], \ - (pFifo)->chunkSize, \ - (TransferCallback)(pCb), (void*)(pArg)) -/** WRITE10 - Write data from FIFO to LUN */ -#define SBC_WRITE_CHUNK(pLun, lba, pFifo, pCb, pArg) \ - LUN_Write((pLun), (lba), \ - &(pFifo)->pBuffer[(pFifo)->outputNdx], \ - ((pFifo)->chunkSize/(pFifo)->blockSize), \ - (TransferCallback)(pCb), (void*)(pArg)) -#endif - - -/** - * \brief Header for the mode pages data - * \see SBCModeParameterHeader6 - */ -static const SBCModeParameterHeader6 modeParameterHeader6 = { - - sizeof(SBCModeParameterHeader6) - 1, /*! Length is 0x03 */ - - SBC_MEDIUM_TYPE_DIRECT_ACCESS_BLOCK_DEVICE, /*! Direct-access block device */ - - 0, /*! Reserved bits */ - - 0, /*! DPO/FUA not supported */ - - 0, /*! Reserved bits */ - - 0, /*! not write-protected */ - - 0 /*! No block descriptor */ - -}; - -/*------------------------------------------------------------------------------ - * Internal functions - *------------------------------------------------------------------------------*/ - -/** - * \brief Check if the LUN is ready. - * \param lun Pointer to the LUN affected by the command - * \return 1 if the LUN is ready to be written - * \see MSDLun - */ -static unsigned char SBCLunIsReady(MSDLun *lun) -{ - unsigned char lunIsReady = 0; - - if (lun->media == 0 || lun->status < LUN_CHANGED) { - TRACE_INFO("SBCLunIsReady: Not Present!\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_NOT_READY, - SBC_ASC_MEDIUM_NOT_PRESENT, - 0); - - } - else if (lun->status < LUN_READY) { - TRACE_INFO("SBCLunIsReady: Changing!\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_UNIT_ATTENTION, - SBC_ASC_NOT_READY_TO_READY_CHANGE, - 0); - lun->status = LUN_READY; - } - else { - - lunIsReady = 1; - } - - return lunIsReady; -} - -/** - * \brief Check if the LUN can write. - * \param lun Pointer to the LUN affected by the command - * \return 1 if the LUN is ready to be written - * \see MSDLun - */ -static unsigned char SBCLunCanBeWritten(MSDLun *lun) -{ - unsigned char canBeWritten = 0; - - if (!SBCLunIsReady(lun)) { - - TRACE_WARNING("SBCLunCanBeWritten: Not Ready!\n\r"); - } - else if (lun->protected) { - - TRACE_WARNING("SBCLunCanBeWritten: Protected!\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_DATA_PROTECT, - SBC_ASC_WRITE_PROTECTED, - 0); - } - else { - - canBeWritten = 1; - } - - return canBeWritten; -} - -/** - * \brief Performs a WRITE (10) command on the specified LUN. - * - * The data to write is first received from the USB host and then - * actually written on the media. - * This function operates asynchronously and must be called multiple - * times to complete. A result code of MSDDriver_STATUS_INCOMPLETE - * indicates that at least another call of the method is necessary. - * \param lun Pointer to the LUN affected by the command - * \param commandState Current state of the command - * \return Operation result code (SUCCESS, ERROR, INCOMPLETE or PARAMETER) - * \see MSDLun - * \see MSDCommandState - */ -static unsigned char SBC_Write10(MSDLun *lun, - MSDCommandState *commandState) -{ - unsigned char status; - unsigned char result = MSDD_STATUS_INCOMPLETE; - SBCRead10 *command = (SBCRead10 *) commandState->cbw.pCommand; - MSDTransfer *transfer = &(commandState->transfer); - MSDTransfer *disktransfer = &(commandState->disktransfer); - MSDIOFifo *fifo = &lun->ioFifo; - - /* Init command state */ - if (commandState->state == 0) { - - commandState->state = SBC_STATE_WRITE; - - /* The command should not be proceeded if READONLY */ - if (!SBCLunCanBeWritten(lun)) { - - return MSDD_STATUS_RW; - } - else { - - - /* Initialize FIFO */ - fifo->dataTotal = commandState->length; - fifo->blockSize = lun->blockSize * lun->media->blockSize; - #ifdef MSDIO_WRITE10_CHUNK_SIZE - if ( fifo->dataTotal >= 64 * 1024 - && fifo->blockSize < MSDIO_WRITE10_CHUNK_SIZE) - fifo->chunkSize = MSDIO_WRITE10_CHUNK_SIZE; - else - fifo->chunkSize = fifo->blockSize; - #endif - fifo->fullCnt = 0; - fifo->nullCnt = 0; - - /* Initialize FIFO output (Disk) */ - fifo->outputNdx = 0; - fifo->outputTotal = 0; - fifo->outputState = MSDIO_IDLE; - transfer->semaphore = 0; - - /* Initialize FIFO input (USB) */ - fifo->inputNdx = 0; - fifo->inputTotal = 0; - fifo->inputState = MSDIO_START; - disktransfer->semaphore = 0; - } - - } - - if (commandState->length == 0) { - - /* Perform the callback! */ - if (lun->dataMonitor) { - - lun->dataMonitor(0, fifo->dataTotal, fifo->nullCnt, fifo->fullCnt); - } - return MSDD_STATUS_SUCCESS; - } - - /* USB receive task */ - switch(fifo->inputState) { - - /*------------------ */ - case MSDIO_IDLE: - /*------------------ */ - - if (fifo->inputTotal < fifo->dataTotal && - fifo->inputTotal - fifo->outputTotal < fifo->bufferSize) { - - fifo->inputState = MSDIO_START; - } - break; - - /*------------------ */ - case MSDIO_START: - /*------------------ */ - - /* Should not start if there is any disk error */ - if (fifo->outputState == MSDIO_ERROR) { - - TRACE_INFO_WP("udErr "); - fifo->inputState = MSDIO_ERROR; - break; - } - - /* Read one block of data sent by the host */ - if (lun->media->mappedWR) { - - /* Directly read to memory */ - #if 1 - status = USBD_Read(commandState->pipeOUT, - (void*) - ((lun->media->baseAddress - + (lun->baseAddress - + DWORDB(command->pLogicalBlockAddress) - * lun->blockSize - ) - ) * lun->media->blockSize - ), - fifo->dataTotal, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Read((void*) - ((lun->media->baseAddress - + (lun->baseAddress - + DWORDB(command->pLogicalBlockAddress) - * lun->blockSize - ) - ) * lun->media->blockSize - ), - fifo->dataTotal, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - } - else { - #ifdef MSDIO_WRITE10_CHUNK_SIZE - status = SBC_RX_CHUNK(commandState->pipeOUT, - fifo, MSDDriver_Callback, transfer); - #else - /* Read block to buffer */ - #if 1 - status = USBD_Read(commandState->pipeOUT, - (void*)&fifo->pBuffer[fifo->inputNdx], - fifo->blockSize, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Read((void*)&fifo->pBuffer[fifo->inputNdx], - fifo->blockSize, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - #endif - } - - /* Check operation result code */ - - if (status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_Write10: Failed to start receiving\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_HARDWARE_ERROR, - 0, - 0); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("uRx "); - - /* Prepare next device state */ - - fifo->inputState = MSDIO_WAIT; - } - break; /* MSDIO_START */ - - - /*------------------ */ - - case MSDIO_WAIT: - /*------------------ */ - - TRACE_INFO_WP("uWait "); - - /* Check semaphore */ - - if (transfer->semaphore > 0) { - - transfer->semaphore--; - fifo->inputState = MSDIO_NEXT; - } - break; - - /*------------------ */ - - case MSDIO_NEXT: - /*------------------ */ - - /* Check the result code of the read operation */ - - if (transfer->status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_Write10: Failed to received\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_HARDWARE_ERROR, - 0, - 0); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("uNxt "); - - /* Mapped read, all data done */ - - if (lun->media->mappedWR) { - - fifo->inputTotal = fifo->dataTotal; - fifo->inputState = MSDIO_IDLE; - } - else { - - /* Update input index */ - - #ifdef MSDIO_WRITE10_CHUNK_SIZE - MSDIOFifo_IncNdx(fifo->inputNdx, - fifo->chunkSize, - fifo->bufferSize); - fifo->inputTotal += fifo->chunkSize; - #else - MSDIOFifo_IncNdx(fifo->inputNdx, - fifo->blockSize, - fifo->bufferSize); - fifo->inputTotal += fifo->blockSize; - #endif - - /* Start Next block */ - - /* - All Data done? */ - - if (fifo->inputTotal >= fifo->dataTotal) { - - fifo->inputState = MSDIO_IDLE; - } - /* - Buffer full? */ - - else if (fifo->inputNdx == fifo->outputNdx) { - fifo->inputState = MSDIO_IDLE; - fifo->fullCnt ++; - - TRACE_DEBUG_WP("ufFull%d ", fifo->inputNdx); - } - /* - More data to transfer? */ - - else if (fifo->inputTotal < fifo->dataTotal) { - fifo->inputState = MSDIO_START; - - TRACE_INFO_WP("uStart "); - } - /* never executed ! */ - - /*else { */ - - /* fifo->inputState = MSDIO_IDLE; */ - - /* TRACE_INFO_WP("uDone "); */ - - /*} */ - - } - - } - break; /* MSDIO_NEXT */ - - - /*------------------ */ - - case MSDIO_ERROR: - /*------------------ */ - - - TRACE_WARNING_WP("uErr "); - commandState->length -= fifo->inputTotal; - return MSDD_STATUS_RW; - - } - - /* Disk write task */ - - switch(fifo->outputState) { - - /*------------------ */ - - case MSDIO_IDLE: - /*------------------ */ - - if (fifo->outputTotal < fifo->inputTotal) { - - fifo->outputState = MSDIO_START; - } - break; - - /*------------------ */ - - case MSDIO_START: - /*------------------ */ - - - /* Write the block to the media */ - - if (lun->media->mappedWR) { - - MSDDriver_Callback(disktransfer, MED_STATUS_SUCCESS, 0, 0); - status = LUN_STATUS_SUCCESS; - } - else { - #ifdef MSDIO_WRITE10_CHUNK_SIZE - status = SBC_WRITE_CHUNK(lun, DWORDB(command->pLogicalBlockAddress), - fifo, MSDDriver_Callback, disktransfer); - #else - status = LUN_Write(lun, - DWORDB(command->pLogicalBlockAddress), - &fifo->pBuffer[fifo->outputNdx], - 1, - (TransferCallback) MSDDriver_Callback, - (void *) disktransfer); - #endif - } - - /* Check operation result code */ - - if (status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_Write10: Failed to start write - "); - - if (!SBCLunCanBeWritten(lun)) { - - TRACE_WARNING("?\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_NOT_READY, - 0, - 0); - } - - fifo->outputState = MSDIO_ERROR; - } - else { - - /* Prepare next state */ - - fifo->outputState = MSDIO_WAIT; - } - break; /* MSDIO_START */ - - - /*------------------ */ - - case MSDIO_WAIT: - /*------------------ */ - - TRACE_INFO_WP("dWait "); - - /* Check semaphore value */ - - if (disktransfer->semaphore > 0) { - - /* Take semaphore and move to next state */ - - disktransfer->semaphore--; - fifo->outputState = MSDIO_NEXT; - } - break; - - /*------------------ */ - - case MSDIO_NEXT: - /*------------------ */ - - /* Check operation result code */ - - if (transfer->status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_Write10: Failed to write\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_RECOVERED_ERROR, - SBC_ASC_TOO_MUCH_WRITE_DATA, - 0); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("dNxt "); - - /* Update transfer length and block address */ - - - /* Mapped memory, done */ - - if (lun->media->mappedWR) { - - commandState->length = 0; - fifo->outputState = MSDIO_IDLE; - } - else { - - /* Update output index */ - - #ifdef MSDIO_WRITE10_CHUNK_SIZE - STORE_DWORDB(DWORDB(command->pLogicalBlockAddress) - + fifo->chunkSize/fifo->blockSize, - command->pLogicalBlockAddress); - MSDIOFifo_IncNdx(fifo->outputNdx, - fifo->chunkSize, - fifo->bufferSize); - fifo->outputTotal += fifo->chunkSize; - #else - STORE_DWORDB(DWORDB(command->pLogicalBlockAddress) + 1, - command->pLogicalBlockAddress); - MSDIOFifo_IncNdx(fifo->outputNdx, - fifo->blockSize, - fifo->bufferSize); - fifo->outputTotal += fifo->blockSize; - #endif - - /* Start Next block */ - - /* - All data done? */ - - if (fifo->outputTotal >= fifo->dataTotal) { - - fifo->outputState = MSDIO_IDLE; - commandState->length = 0; - TRACE_INFO_WP("dDone "); - } - /* - Send next? */ - - else if (fifo->outputTotal < fifo->inputTotal) { - - fifo->outputState = MSDIO_START; - TRACE_INFO_WP("dStart "); - } - /* - Buffer Null? */ - - else { - fifo->outputState = MSDIO_IDLE; - fifo->nullCnt ++; - - TRACE_DEBUG_WP("dfNull%d ", fifo->outputNdx); - } - } - } - break; /* MSDIO_NEXT */ - - - /*------------------ */ - - case MSDIO_ERROR: - /*------------------ */ - - break; - } - - return result; -} - -/** - * \brief Performs a READ (10) command on specified LUN. - * - * The data is first read from the media and then sent to the USB host. - * This function operates asynchronously and must be called multiple - * times to complete. A result code of MSDDriver_STATUS_INCOMPLETE - * indicates that at least another call of the method is necessary. - * \param lun Pointer to the LUN affected by the command - * \param commandState Current state of the command - * \return Operation result code (SUCCESS, ERROR, INCOMPLETE or PARAMETER) - * \see MSDLun - * \see MSDCommandState - */ -static unsigned char SBC_Read10(MSDLun *lun, - MSDCommandState *commandState) -{ - unsigned char status; - unsigned char result = MSDD_STATUS_INCOMPLETE; - SBCRead10 *command = (SBCRead10 *) commandState->cbw.pCommand; - MSDTransfer *transfer = &(commandState->transfer); - MSDTransfer *disktransfer = &(commandState->disktransfer); - MSDIOFifo *fifo = &lun->ioFifo; - - /* Init command state */ - - if (commandState->state == 0) { - - commandState->state = SBC_STATE_READ; - - if (!SBCLunIsReady(lun)) { - - return MSDD_STATUS_RW; - } - else { - - /* Initialize FIFO */ - - fifo->dataTotal = commandState->length; - fifo->blockSize = lun->blockSize * lun->media->blockSize; - #ifdef MSDIO_READ10_CHUNK_SIZE - if ( fifo->dataTotal >= 64*1024 - && fifo->blockSize < MSDIO_READ10_CHUNK_SIZE) - fifo->chunkSize = MSDIO_READ10_CHUNK_SIZE; - else - fifo->chunkSize = fifo->blockSize; - #endif - fifo->fullCnt = 0; - fifo->nullCnt = 0; - - #ifdef MSDIO_FIFO_OFFSET - /* Enable offset if total size >= 2*bufferSize */ - - if (fifo->dataTotal / fifo->bufferSize >= 2) - fifo->bufferOffset = MSDIO_FIFO_OFFSET; - else - fifo->bufferOffset = 0; - #endif - - /* Initialize FIFO output (USB) */ - - fifo->outputNdx = 0; - fifo->outputTotal = 0; - fifo->outputState = MSDIO_IDLE; - transfer->semaphore = 0; - - /* Initialize FIFO input (Disk) */ - - fifo->inputNdx = 0; - fifo->inputTotal = 0; - fifo->inputState = MSDIO_START; - disktransfer->semaphore = 0; - } - } - - /* Check length */ - - if (commandState->length == 0) { - - /* Perform the callback! */ - - if (lun->dataMonitor) { - - lun->dataMonitor(1, fifo->dataTotal, fifo->nullCnt, fifo->fullCnt); - } - return MSDD_STATUS_SUCCESS; - } - - /* Disk reading task */ - - switch(fifo->inputState) { - - /*------------------ */ - - case MSDIO_IDLE: - /*------------------ */ - - if (fifo->inputTotal < fifo->dataTotal && - fifo->inputTotal - fifo->outputTotal < fifo->bufferSize) { - - fifo->inputState = MSDIO_START; - } - break; - - /*------------------ */ - - case MSDIO_START: - /*------------------ */ - - /* Read one block of data from the media */ - - if (lun->media->mappedRD) { - - /* Directly write, no read needed */ - - MSDDriver_Callback(disktransfer, MED_STATUS_SUCCESS, 0, 0); - status = LUN_STATUS_SUCCESS; - } - else { - #ifdef MSDIO_READ10_CHUNK_SIZE - status = SBC_READ_CHUNK(lun, DWORDB(command->pLogicalBlockAddress), - fifo, MSDDriver_Callback, disktransfer); - #else - status = LUN_Read(lun, - DWORDB(command->pLogicalBlockAddress), - &fifo->pBuffer[fifo->inputNdx], - 1, - (TransferCallback) MSDDriver_Callback, - (void *)disktransfer); - #endif - } - - /* Check operation result code */ - - if (status != LUN_STATUS_SUCCESS) { - - TRACE_WARNING("RBC_Read10: Failed to start reading\n\r"); - - if (SBCLunIsReady(lun)) { - - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_NOT_READY, - SBC_ASC_LOGICAL_UNIT_NOT_READY, - 0); - } - - fifo->inputState = MSDIO_ERROR; - } - else { - - TRACE_INFO_WP("dRd "); - - /* Move to next command state */ - - fifo->inputState = MSDIO_WAIT; - } - break; /* MSDIO_START */ - - - /*------------------ */ - - case MSDIO_WAIT: - /*------------------ */ - - /* Check semaphore value */ - - if (disktransfer->semaphore > 0) { - - TRACE_INFO_WP("dOk "); - - /* Take semaphore and move to next state */ - - disktransfer->semaphore--; - fifo->inputState = MSDIO_NEXT; - } - break; - - /*------------------ */ - - case MSDIO_NEXT: - /*------------------ */ - - /* Check the operation result code */ - - if (disktransfer->status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_Read10: Failed to read media\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_RECOVERED_ERROR, - SBC_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE, - 0); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("dNxt "); - - if (lun->media->mappedRD) { - - /* All data is ready */ - - fifo->inputState = MSDIO_IDLE; - fifo->inputTotal = fifo->dataTotal; - } - else { - - /* Update block address */ - - #ifdef MSDIO_READ10_CHUNK_SIZE - STORE_DWORDB(DWORDB(command->pLogicalBlockAddress) - + fifo->chunkSize/fifo->blockSize, - command->pLogicalBlockAddress); - - /* Update input index */ - - MSDIOFifo_IncNdx(fifo->inputNdx, - fifo->chunkSize, - fifo->bufferSize); - fifo->inputTotal += fifo->chunkSize; - #else - /* Update block address */ - - STORE_DWORDB(DWORDB(command->pLogicalBlockAddress) + 1, - command->pLogicalBlockAddress); - - /* Update input index */ - - MSDIOFifo_IncNdx(fifo->inputNdx, - fifo->blockSize, - fifo->bufferSize); - fifo->inputTotal += fifo->blockSize; - #endif - - /* Start Next block */ - - /* - All Data done? */ - - if (fifo->inputTotal >= fifo->dataTotal) { - - TRACE_INFO_WP("dDone "); - fifo->inputState = MSDIO_IDLE; - } - /* - Buffer full? */ - - else if (fifo->inputNdx == fifo->outputNdx) { - - TRACE_INFO_WP("dfFull%d ", (int)fifo->inputNdx); - fifo->inputState = MSDIO_IDLE; - fifo->fullCnt ++; - } - /* - More data to transfer? */ - - else if (fifo->inputTotal < fifo->dataTotal) { - - TRACE_DEBUG_WP("dStart "); - fifo->inputState = MSDIO_START; - } - } - - } - - break; - - /*------------------ */ - - case MSDIO_ERROR: - /*------------------ */ - - break; - } - - /* USB sending task */ - - switch(fifo->outputState) { - - /*------------------ */ - - case MSDIO_IDLE: - /*------------------ */ - - if (fifo->outputTotal < fifo->inputTotal) { - - #ifdef MSDIO_FIFO_OFFSET - /* Offset buffer the input data */ - - if (fifo->bufferOffset) { - if (fifo->inputTotal < fifo->bufferOffset) { - break; - } - fifo->bufferOffset = 0; - } - #endif - fifo->outputState = MSDIO_START; - } - break; - - /*------------------ */ - - case MSDIO_START: - /*------------------ */ - - /* Should not start if there is any disk error */ - - if (fifo->outputState == MSDIO_ERROR) { - - fifo->inputState = MSDIO_ERROR; - break; - } - - /* Send the block to the host */ - if (lun->media->mappedRD) { - #if 1 - status = USBD_Write(commandState->pipeIN, - (void*) - ((lun->media->baseAddress - + (lun->baseAddress - + DWORDB(command->pLogicalBlockAddress) - * lun->blockSize - ) - ) * lun->media->blockSize - ), - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Write((void*) - ((lun->media->baseAddress - + (lun->baseAddress - + DWORDB(command->pLogicalBlockAddress) - * lun->blockSize - ) - ) * lun->media->blockSize - ), - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - } - else { - #ifdef MSDIO_READ10_CHUNK_SIZE - status = SBC_TX_CHUNK(commandState->pipeIN, - fifo, MSDDriver_Callback, transfer); - #else - #if 1 - status = USBD_Write(commandState->pipeIN, - &fifo->pBuffer[fifo->outputNdx], - fifo->blockSize, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Write(&fifo->pBuffer[fifo->outputNdx], - fifo->blockSize, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - #endif - } - /* Check operation result code */ - - if (status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_Read10: Failed to start to send\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_HARDWARE_ERROR, - 0, - 0); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("uTx "); - - /* Move to next command state */ - - fifo->outputState = MSDIO_WAIT; - } - break; /* MSDIO_START */ - - - /*------------------ */ - - case MSDIO_WAIT: - /*------------------ */ - - /* Check semaphore value */ - - if (transfer->semaphore > 0) { - - TRACE_INFO_WP("uOk "); - - /* Take semaphore and move to next state */ - - transfer->semaphore--; - fifo->outputState = MSDIO_NEXT; - } - break; - - /*------------------ */ - - case MSDIO_NEXT: - /*------------------ */ - - /* Check operation result code */ - - if (transfer->status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_Read10: Failed to send data\n\r"); - SBC_UpdateSenseData(&(lun->requestSenseData), - SBC_SENSE_KEY_HARDWARE_ERROR, - 0, - 0); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("uNxt "); - - if (lun->media->mappedRD) { - - commandState->length = 0; - } - else { - - /* Update output index */ - - #ifdef MSDIO_READ10_CHUNK_SIZE - MSDIOFifo_IncNdx(fifo->outputNdx, - fifo->chunkSize, - fifo->bufferSize); - fifo->outputTotal += fifo->chunkSize; - #else - MSDIOFifo_IncNdx(fifo->outputNdx, - fifo->blockSize, - fifo->bufferSize); - fifo->outputTotal += fifo->blockSize; - #endif - - /* Start Next block */ - - /* - All data done? */ - - if (fifo->outputTotal >= fifo->dataTotal) { - - fifo->outputState = MSDIO_IDLE; - commandState->length = 0; - TRACE_INFO_WP("uDone "); - } - /* - Buffer Null? */ - - else if (fifo->inputNdx == fifo->outputNdx) { - - TRACE_INFO_WP("ufNull%d ", (int)fifo->outputNdx); - fifo->outputState = MSDIO_IDLE; - fifo->nullCnt ++; - } - /* - Send next? */ - - else if (fifo->outputTotal < fifo->inputTotal) { - - TRACE_DEBUG_WP("uStart "); - fifo->outputState = MSDIO_START; - } - } - - } - break; - - /*------------------ */ - - case MSDIO_ERROR: - /*------------------ */ - - break; - } - - return result; -} - -/** - * \brief Performs a READ CAPACITY (10) command. - * - * This function operates asynchronously and must be called multiple - * times to complete. A result code of MSDD_STATUS_INCOMPLETE - * indicates that at least another call of the method is necessary. - * \param lun Pointer to the LUN affected by the command - * \param commandState Current state of the command - * \return Operation result code (SUCCESS, ERROR, INCOMPLETE or PARAMETER) - * \see MSDLun - * \see MSDCommandState - */ -static unsigned char SBC_ReadCapacity10(MSDLun *lun, - MSDCommandState *commandState) -{ - unsigned char result = MSDD_STATUS_INCOMPLETE; - unsigned char status; - MSDTransfer *transfer = &(commandState->transfer); - - if (!SBCLunIsReady(lun)) { - - TRACE_INFO("SBC_ReadCapacity10: Not Ready!\n\r"); - return MSDD_STATUS_RW; - } - - /* Initialize command state if needed */ - if (commandState->state == 0) { - - commandState->state = SBC_STATE_WRITE; - } - - /* Identify current command state */ - switch (commandState->state) { - /*------------------- */ - case SBC_STATE_WRITE: - /*------------------- */ - - /* Start the write operation */ - #if 1 - status = USBD_Write(commandState->pipeIN, - &(lun->readCapacityData), - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Write(&(lun->readCapacityData), - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - - /* Check operation result code */ - if (status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_ReadCapacity: Cannot start sending data\n\r"); - result = MSDD_STATUS_ERROR; - } - else { - - /* Proceed to next command state */ - TRACE_INFO_WP("Sending "); - commandState->state = SBC_STATE_WAIT_WRITE; - } - break; - - /*------------------------ */ - case SBC_STATE_WAIT_WRITE: - /*------------------------ */ - - /* Check semaphore value */ - if (transfer->semaphore > 0) { - - /* Take semaphore and terminate command */ - transfer->semaphore--; - - if (transfer->status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING("RBC_ReadCapacity: Cannot send data\n\r"); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("Sent "); - result = MSDD_STATUS_SUCCESS; - } - commandState->length -= transfer->transferred; - } - break; - } - - return result; -} - -/** - * \brief Handles an INQUIRY command. - * - * This function operates asynchronously and must be called multiple - * times to complete. A result code of MSDDriver_STATUS_INCOMPLETE - * indicates that at least another call of the method is necessary. - * \param lun Pointer to the LUN affected by the command - * \param commandState Current state of the command - * \return Operation result code (SUCCESS, ERROR, INCOMPLETE or PARAMETER) - * \see MSDLun - * \see MSDCommandState - */ -static unsigned char SBC_Inquiry(MSDLun *lun, - MSDCommandState *commandState) -{ - unsigned char result = MSDD_STATUS_INCOMPLETE; - unsigned char status; - MSDTransfer *transfer = &(commandState->transfer); - - /* Check if required length is 0 */ - if (commandState->length == 0) { - - /* Nothing to do */ - result = MSDD_STATUS_SUCCESS; - } - /* Initialize command state if needed */ - else if (commandState->state == 0) { - - commandState->state = SBC_STATE_WRITE; - - /* Change additional length field of inquiry data */ - lun->inquiryData->bAdditionalLength - = (unsigned char) (commandState->length - 5); - } - - /* Identify current command state */ - - switch (commandState->state) { - /*------------------- */ - case SBC_STATE_WRITE: - /*------------------- */ - - /* Start write operation */ - #if 1 - status = USBD_Write(commandState->pipeIN, - (void *) lun->inquiryData, - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Write((void *) lun->inquiryData, - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - - /* Check operation result code */ - if (status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "SPC_Inquiry: Cannot start sending data\n\r"); - result = MSDD_STATUS_ERROR; - } - else { - - /* Proceed to next state */ - TRACE_INFO_WP("Sending "); - commandState->state = SBC_STATE_WAIT_WRITE; - } - break; - - /*------------------------ */ - case SBC_STATE_WAIT_WRITE: - /*------------------------ */ - - /* Check the semaphore value */ - if (transfer->semaphore > 0) { - - /* Take semaphore and terminate command */ - transfer->semaphore--; - - if (transfer->status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "SPC_Inquiry: Data transfer failed\n\r"); - result = MSDD_STATUS_ERROR; - } - else { - - TRACE_INFO_WP("Sent "); - result = MSDD_STATUS_SUCCESS; - } - - /* Update length field */ - commandState->length -= transfer->transferred; - } - break; - } - - return result; -} - -/** - * \brief Performs a REQUEST SENSE command. - * - * This function operates asynchronously and must be called multiple - * times to complete. A result code of MSDDriver_STATUS_INCOMPLETE - * indicates that at least another call of the method is necessary. - * \param lun Pointer to the LUN affected by the command - * \param commandState Current state of the command - * \return Operation result code (SUCCESS, ERROR, INCOMPLETE or PARAMETER) - * \see MSDLun - * \see MSDCommandState - */ -static unsigned char SBC_RequestSense(MSDLun *lun, - MSDCommandState *commandState) -{ - unsigned char result = MSDD_STATUS_INCOMPLETE; - unsigned char status; - MSDTransfer *transfer = &(commandState->transfer); - - /* Check if requested length is zero */ - if (commandState->length == 0) { - - /* Nothing to do */ - - result = MSDD_STATUS_SUCCESS; - } - /* Initialize command state if needed */ - else if (commandState->state == 0) { - - commandState->state = SBC_STATE_WRITE; - } - - /* Identify current command state */ - switch (commandState->state) { - /*------------------- */ - case SBC_STATE_WRITE: - /*------------------- */ - - /* Start transfer */ - #if 1 - status = USBD_Write(commandState->pipeIN, - &(lun->requestSenseData), - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Write(&(lun->requestSenseData), - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - - /* Check result code */ - if (status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "RBC_RequestSense: Cannot start sending data\n\r"); - result = MSDD_STATUS_ERROR; - } - else { - - /* Change state */ - commandState->state = SBC_STATE_WAIT_WRITE; - } - break; - - /*------------------------ */ - case SBC_STATE_WAIT_WRITE: - /*------------------------ */ - - /* Check the transfer semaphore */ - if (transfer->semaphore > 0) { - - /* Take semaphore and finish command */ - transfer->semaphore--; - - if (transfer->status != USBD_STATUS_SUCCESS) { - - result = MSDD_STATUS_ERROR; - } - else { - - result = MSDD_STATUS_SUCCESS; - } - - /* Update length */ - commandState->length -= transfer->transferred; - } - break; - } - - return result; -} - -/** - * \brief Performs a MODE SENSE (6) command. - * - * This function operates asynchronously and must be called multiple - * times to complete. A result code of MSDDriver_STATUS_INCOMPLETE - * indicates that at least another call of the method is necessary. - * \param lun Pointer to the LUN affected by the command - * \param commandState Current state of the command - * \return Operation result code (SUCCESS, ERROR, INCOMPLETE or PARAMETER) - * \see MSDLun - * \see MSDCommandState - */ -static unsigned char SBC_ModeSense6(MSDLun *lun, MSDCommandState *commandState) -{ - unsigned char result = MSDD_STATUS_INCOMPLETE; - unsigned char status; - MSDTransfer *transfer = &(commandState->transfer); - - if (!SBCLunIsReady(lun)) { - - TRACE_INFO("SBC_ModeSense6: Not Ready!\n\r"); - return MSDD_STATUS_RW; - } - - /* Check if mode page is supported */ - if (((SBCCommand *) commandState->cbw.pCommand)->modeSense6.bPageCode - != SBC_PAGE_RETURN_ALL) { - - return MSDD_STATUS_PARAMETER; - } - - /* Initialize command state if needed */ - if (commandState->state == 0) { - - commandState->state = SBC_STATE_WRITE; - } - - /* Check current command state */ - switch (commandState->state) { - /*------------------- */ - case SBC_STATE_WRITE: - /*------------------- */ - - /* Start transfer */ - #if 1 - status = USBD_Write(commandState->pipeIN, - (void *) &modeParameterHeader6, - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #else - status = MSDD_Write((void *) &modeParameterHeader6, - commandState->length, - (TransferCallback) MSDDriver_Callback, - (void *) transfer); - #endif - - /* Check operation result code */ - if (status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "SPC_ModeSense6: Cannot start data transfer\n\r"); - result = MSDD_STATUS_ERROR; - } - else { - - /* Proceed to next state */ - commandState->state = SBC_STATE_WAIT_WRITE; - } - break; - - /*------------------------ */ - case SBC_STATE_WAIT_WRITE: - /*------------------------ */ - - TRACE_INFO_WP("Wait "); - - /* Check semaphore value */ - if (transfer->semaphore > 0) { - - /* Take semaphore and terminate command */ - transfer->semaphore--; - - if (transfer->status != USBD_STATUS_SUCCESS) { - - TRACE_WARNING( - "SPC_ModeSense6: Data transfer failed\n\r"); - result = MSDD_STATUS_ERROR; - } - else { - - result = MSDD_STATUS_SUCCESS; - } - - /* Update length field */ - commandState->length -= transfer->transferred; - - } - break; - } - - return result; -} - -/** - * \brief Performs a TEST UNIT READY COMMAND command. - * \param lun Pointer to the LUN affected by the command - * \return Operation result code (SUCCESS, ERROR, INCOMPLETE or PARAMETER) - * \see MSDLun - */ -static unsigned char SBC_TestUnitReady(MSDLun *lun) -{ - unsigned char result = MSDD_STATUS_RW; - unsigned char senseKey = SBC_SENSE_KEY_NO_SENSE, - addSenseCode = 0, - addSenseCodeQual = 0; - - /* Check current media state */ - - if (lun->status < LUN_CHANGED) { - - TRACE_INFO_WP("Ejc "); - senseKey = SBC_SENSE_KEY_NOT_READY; - addSenseCode = SBC_ASC_MEDIUM_NOT_PRESENT; - } - else if (lun->status == LUN_CHANGED) { - - TRACE_INFO_WP("Chg "); - senseKey = SBC_SENSE_KEY_UNIT_ATTENTION; - addSenseCode = SBC_ASC_NOT_READY_TO_READY_CHANGE; - lun->status = LUN_READY; - } - else { - - switch(lun->media->state) { - /*------------------- */ - - case MED_STATE_READY: - /*------------------- */ - - /* Nothing to do */ - - TRACE_INFO_WP("Rdy "); - result = MSDD_STATUS_SUCCESS; - break; - - /*------------------ */ - - case MED_STATE_BUSY: - /*------------------ */ - - TRACE_INFO_WP("Bsy "); - senseKey = SBC_SENSE_KEY_NOT_READY; - break; - - /*------ */ - - default: - /*------ */ - - TRACE_INFO_WP("? "); - senseKey = SBC_SENSE_KEY_NOT_READY; - addSenseCode = SBC_ASC_MEDIUM_NOT_PRESENT; - break; - } - } - SBC_UpdateSenseData(&(lun->requestSenseData), - senseKey, - addSenseCode, - addSenseCodeQual); - - return result; -} - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -/** - * \brief Updates the sense data of a LUN with the given key and codes - * \param requestSenseData Pointer to the sense data to update - * \param senseKey Sense key - * \param additionalSenseCode Additional sense code - * \param additionalSenseCodeQualifier Additional sense code qualifier - */ -void SBC_UpdateSenseData(SBCRequestSenseData *requestSenseData, - unsigned char senseKey, - unsigned char additionalSenseCode, - unsigned char additionalSenseCodeQualifier) -{ - requestSenseData->bSenseKey = senseKey; - requestSenseData->bAdditionalSenseCode = additionalSenseCode; - requestSenseData->bAdditionalSenseCodeQualifier - = additionalSenseCodeQualifier; -} - -/** - * \brief Return information about the transfer length and direction expected - * by the device for a particular command. - * \param command Pointer to a buffer holding the command to evaluate - * \param length Expected length of the data transfer - * \param type Expected direction of data transfer - * \param lun Pointer to the LUN affected by the command - */ -unsigned char SBC_GetCommandInformation(void *command, - unsigned int *length, - unsigned char *type, - MSDLun *lun) -{ - SBCCommand *sbcCommand = (SBCCommand *) command; - unsigned char isCommandSupported = 1; - - /* Identify command */ - - switch (sbcCommand->bOperationCode) { - /*--------------- */ - - case SBC_INQUIRY: - /*--------------- */ - - (*type) = MSDD_DEVICE_TO_HOST; - - /* Allocation length is stored in big-endian format */ - - (*length) = WORDB(sbcCommand->inquiry.pAllocationLength); - break; - - /*-------------------- */ - - case SBC_MODE_SENSE_6: - /*-------------------- */ - - (*type) = MSDD_DEVICE_TO_HOST; - if (sbcCommand->modeSense6.bAllocationLength > - sizeof(SBCModeParameterHeader6)) { - - *length = sizeof(SBCModeParameterHeader6); - } - else { - - *length = sbcCommand->modeSense6.bAllocationLength; - } - break; - - /*------------------------------------ */ - - case SBC_PREVENT_ALLOW_MEDIUM_REMOVAL: - /*------------------------------------ */ - - (*type) = MSDD_NO_TRANSFER; - break; - - /*--------------------- */ - - case SBC_REQUEST_SENSE: - /*--------------------- */ - - (*type) = MSDD_DEVICE_TO_HOST; - (*length) = sbcCommand->requestSense.bAllocationLength; - break; - - /*----------------------- */ - - case SBC_TEST_UNIT_READY: - /*----------------------- */ - - (*type) = MSDD_NO_TRANSFER; - break; - - /*--------------------- */ - - case SBC_READ_CAPACITY_10: - /*--------------------- */ - - (*type) = MSDD_DEVICE_TO_HOST; - (*length) = sizeof(SBCReadCapacity10Data); - break; - - /*--------------- */ - - case SBC_READ_10: - /*--------------- */ - - (*type) = MSDD_DEVICE_TO_HOST; - (*length) = WORDB(sbcCommand->read10.pTransferLength) - * lun->blockSize * lun->media->blockSize; - break; - - /*---------------- */ - - case SBC_WRITE_10: - /*---------------- */ - - (*type) = MSDD_HOST_TO_DEVICE; - (*length) = WORDB(sbcCommand->write10.pTransferLength) - * lun->blockSize * lun->media->blockSize; - break; - - /*----------------- */ - - case SBC_VERIFY_10: - /*----------------- */ - - (*type) = MSDD_NO_TRANSFER; - break; - /*------ */ - - default: - /*------ */ - - isCommandSupported = 0; - } - - /* If length is 0, no transfer is expected */ - - if ((*length) == 0) { - - (*type) = MSDD_NO_TRANSFER; - } - - return isCommandSupported; -} - -/** - * \brief Processes a SBC command by dispatching it to a subfunction. - * \param lun Pointer to the affected LUN - * \param commandState Pointer to the current command state - * \return Operation result code - */ -unsigned char SBC_ProcessCommand(MSDLun *lun, - MSDCommandState *commandState) -{ - unsigned char result = MSDD_STATUS_INCOMPLETE; - SBCCommand *command = (SBCCommand *) commandState->cbw.pCommand; - - /* Identify command */ - - switch (command->bOperationCode) { - /*--------------- */ - case SBC_READ_10: - /*--------------- */ - - TRACE_DEBUG_WP("Read(10) "); - - /* Perform the Read10 command */ - - result = SBC_Read10(lun, commandState); - break; - - /*---------------- */ - case SBC_WRITE_10: - /*---------------- */ - - TRACE_DEBUG_WP("Write(10) "); - - /* Perform the Write10 command */ - - result = SBC_Write10(lun, commandState); - break; - - /*--------------------- */ - case SBC_READ_CAPACITY_10: - /*--------------------- */ - - TRACE_INFO_WP("RdCapacity(10) "); - - /* Perform the ReadCapacity command */ - - result = SBC_ReadCapacity10(lun, commandState); - break; - - /*--------------------- */ - case SBC_VERIFY_10: - /*--------------------- */ - - TRACE_INFO_WP("Verify(10) "); - - /* Flush media */ - - MED_Flush(lun->media); - result = MSDD_STATUS_SUCCESS; - break; - - /*--------------- */ - case SBC_INQUIRY: - /*--------------- */ - - TRACE_INFO_WP("Inquiry "); - - /* Process Inquiry command */ - result = SBC_Inquiry(lun, commandState); - break; - - /*-------------------- */ - case SBC_MODE_SENSE_6: - /*-------------------- */ - - TRACE_INFO_WP("ModeSense(6) "); - - /* Process ModeSense6 command */ - result = SBC_ModeSense6(lun, commandState); - break; - - /*----------------------- */ - case SBC_TEST_UNIT_READY: - /*----------------------- */ - - TRACE_INFO_WP("TstUnitRdy "); - - /* Process TestUnitReady command */ - /*MED_Flush(lun->media); */ - result = SBC_TestUnitReady(lun); - break; - - /*--------------------- */ - case SBC_REQUEST_SENSE: - /*--------------------- */ - - TRACE_INFO_WP("ReqSense "); - - /* Perform the RequestSense command */ - result = SBC_RequestSense(lun, commandState); - break; - - /*------------------------------------ */ - case SBC_PREVENT_ALLOW_MEDIUM_REMOVAL: - /*------------------------------------ */ - - TRACE_INFO_WP("PrevAllowRem "); - - /* Check parameter */ - - result = command->mediumRemoval.bPrevent ? - MSDD_STATUS_PARAMETER : MSDD_STATUS_SUCCESS; - break; - /*------ */ - default: - /*------ */ - - result = MSDD_STATUS_PARAMETER; - } - - return result; -} - -/**@}*/ diff --git a/firmware/atmel_softpack_libraries/usb/include/AUDDFunction.h b/firmware/atmel_softpack_libraries/usb/include/AUDDFunction.h deleted file mode 100644 index ed2482c6..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/AUDDFunction.h +++ /dev/null @@ -1,109 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ -/** \file */ -#ifndef AUDDFUNCTION_H -#define AUDDFUNCTION_H -/** \addtogroup usbd_aud_fun - *@{ - */ - -/*----------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include -#include -#include -#include - -/*----------------------------------------------------------------------------- - * Definitions - *---------------------------------------------------------------------------*/ - -/** \addtogroup audd_fun_desc USBD Audio Function definitions - * @{ - */ -/** ID for Speaker */ -#define AUDDFunction_Speaker 0 -/** ID for Microphone */ -#define AUDDFunction_Microhpone 1 -/** Max number of interfaces that supported by the function (AC + 2*AS) */ -#define AUDDFunction_MaxNumInterfaces 3 -/** Max number of channels supported by speaker stream (including master) */ -#define AUDDFunction_MaxNumSpeakerChannels 3 -/** Max number of channels supported by microphone stream (including master) */ -#define AUDDFunction_MaxNumMicrophoneChannels 3 - -/** Endpoint polling interval 2^(x-1) * 125us */ -#define AUDDFunction_HS_INTERVAL 0x04 -/** Endpoint polling interval 2^(x-1) * ms */ -#define AUDDFunction_FS_INTERVAL 0x01 - -/** Playback input terminal ID */ -#define AUDDFunction_INPUTTERMINAL AUDD_ID_SpeakerIT -/** Playback output terminal ID */ -#define AUDDFunction_OUTPUTTERMINAL AUDD_ID_SpeakerOT -/** Playback feature unit ID */ -#define AUDDFunction_FEATUREUNIT AUDD_ID_SpeakerFU -/** Record input terminal ID */ -#define AUDDFunction_INPUTTERMINAL_REC AUDD_ID_MicrophoneIT -/** Record output terminal ID */ -#define AUDDFunction_OUTPUTTERMINAL_REC AUDD_ID_MicrophoneOT -/** Record feature unit ID */ -#define AUDDFunction_FEATUREUNIT_REC AUDD_ID_MicrophoneFU - -/** @}*/ - -/*----------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -extern void AUDDFunction_Initialize( - USBDDriver *pUsbd, uint8_t bInterface); -extern void AUDDFunction_Configure( - USBGenericDescriptor * pDescriptors, uint16_t wLength); -extern void AUDDFunction_InterfaceSettingChangedHandler( - uint8_t interface,uint8_t setting); -extern uint32_t AUDDFunction_RequestHandler(const USBGenericRequest * request); -extern uint8_t AUDDFunction_Read( - void * buffer, uint32_t length, - TransferCallback callback, void * argument); -extern uint8_t AUDDFunction_SetupWrite( - void * pListInit, void * pDmaInit, uint16_t listSize, uint16_t delaySize, - TransferCallback callback,void * argument); -extern uint8_t AUDDFunction_Write(void * buffer, uint16_t length); - -extern void AUDDFunction_MuteChanged( - uint8_t idMic, uint8_t ch, uint8_t mute); -extern void AUDDFunction_StreamSettingChanged( - uint8_t idMic, uint8_t setting); - -/**@}*/ -#endif // #define AUDDFUNCTIONDRIVER_H - diff --git a/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerDriver.h b/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerDriver.h deleted file mode 100644 index 87393f4c..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerDriver.h +++ /dev/null @@ -1,256 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definition of a USB Audio Speaker Driver with two playback channels. - * - * \section Usage - * - * -# Enable and setup USB related pins (see pio & board.h). - * -# Configure the USB Audio Speaker driver using AUDDSpeakerDriver_Initialize - * -# To get %audio stream frames from host, use AUDDSpeakerDriver_Read - */ - -#ifndef AUDDSPEAKERDRIVER_H -#define AUDDSPEAKERDRIVER_H - -/** \addtogroup usbd_audio_speaker - *@{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -#include -#include -#include - -#include -#include - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usbd_audio_ch USB Device Audio Speaker Channel Numbers - * @{ - * This page lists codes for USB Audio Speaker channel numbers. - * - * \par Playback channel numbers - * - \ref AUDDSpeakerDriver_MASTERCHANNEL - * - \ref AUDDSpeakerDriver_LEFTCHANNEL - * - \ref AUDDSpeakerDriver_RIGHTCHANNEL - * - * \par Record channel number - * - \ref AUDDSpeakerDriver_RECCHANNEL - */ -/** Master channel of playback. */ -#define AUDDSpeakerDriver_MASTERCHANNEL 0 -/** Front left channel of playback. */ -#define AUDDSpeakerDriver_LEFTCHANNEL 1 -/** Front right channel of playback. */ -#define AUDDSpeakerDriver_RIGHTCHANNEL 2 - -/** Channel of record. */ -#define AUDDSpeakerDriver_RECCHANNEL 0 - -/** Max Number of channels in audio stream (excluding master). */ -#define AUDDSpeakerDriver_NUMCHANNELS 2 -/** @}*/ - -/** \addtogroup usbd_audio_speaker_if USB Device Audio Speaker Interface IDs - * @{ - * This page lists the interface numbers for USB Audio Speaker device. - * - \ref AUDDSpeakerDriverDescriptors_CONTROL - * - \ref AUDDSpeakerDriverDescriptors_STREAMING - * Total number of integrated interfaces - * - \ref AUDDSpeakerDriver_NUMINTERFACES - */ -/** Audio control interface ID. */ -#define AUDDSpeakerDriverDescriptors_CONTROL 0 -/** Audio streaming interface ID (OUT, for playback). */ -#define AUDDSpeakerDriverDescriptors_STREAMING 1 - -/** Audio speaker total number of interfaces */ -#define AUDDSpeakerDriver_NUMINTERFACES 2 -/** @}*/ - -/** \addtogroup usbd_audio_entity USB Device Audio Speaker Entity IDs - * @{ - * This page lists the entity IDs for USB Audio Speaker device. - * - \ref AUDDSpeakerDriverDescriptors_INPUTTERMINAL - * - \ref AUDDSpeakerDriverDescriptors_OUTPUTTERMINAL - * - \ref AUDDSpeakerDriverDescriptors_FEATUREUNIT - */ -/** Playback input terminal ID. */ -#define AUDDSpeakerDriverDescriptors_INPUTTERMINAL AUDD_ID_SpeakerIT -/** Playback output terminal ID. */ -#define AUDDSpeakerDriverDescriptors_OUTPUTTERMINAL AUDD_ID_SpeakerOT -/** Playback feature unit ID. */ -#define AUDDSpeakerDriverDescriptors_FEATUREUNIT AUDD_ID_SpeakerFU -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR*/ -#pragma pack(1) /* IAR*/ -#define __attribute__(...) /* IAR*/ -#endif /* IAR*/ - -/** - * \typedef AUDHeaderDescriptor1 - * \brief Header descriptor with 1 interface. - */ -typedef struct _AUDHeaderDescriptor1 { - - /** Header descriptor. */ - AUDHeaderDescriptor header; - /** Id of the first grouped interface - Speaker. */ - uint8_t bInterface0; - -} __attribute__ ((packed)) AUDHeaderDescriptor1; /* GCC*/ - -/** - * \typedef AUDFeatureUnitDescriptor3 - * \brief Feature unit descriptor with 3 channel controls - * (master, right, left). - */ -typedef struct _AUDFeatureUnitDescriptor3 { - - /** Feature unit descriptor. */ - AUDFeatureUnitDescriptor feature; - /** Available controls for each channel. */ - uint8_t bmaControls[3]; - /** Index of a string descriptor for the feature unit. */ - uint8_t iFeature; - -} __attribute__ ((packed)) AUDFeatureUnitDescriptor3; /* GCC */ - -/** - * \typedef AUDDSpeakerDriverAudioControlDescriptors - * \brief List of descriptors for detailling the audio control interface of a - * device using a USB audio speaker driver. - */ -typedef struct _AUDDSpeakerDriverAudioControlDescriptors { - - /** Header descriptor (with one slave interface). */ - AUDHeaderDescriptor1 header; - /** Input terminal descriptor. */ - AUDInputTerminalDescriptor input; - /** Output terminal descriptor. */ - AUDOutputTerminalDescriptor output; - /** Feature unit descriptor. */ - AUDFeatureUnitDescriptor3 feature; - -} __attribute__ ((packed)) AUDDSpeakerDriverAudioControlDescriptors; /* GCC*/ - -/** - * \typedef AUDFormatTypeOneDescriptor1 - * \brief Format type I descriptor with one discrete sampling frequency. - */ -typedef struct _AUDFormatTypeOneDescriptor1 { - - /** Format type I descriptor. */ - AUDFormatTypeOneDescriptor formatType; - /** Sampling frequency in Hz. */ - uint8_t tSamFreq[3]; - -} __attribute__ ((packed)) AUDFormatTypeOneDescriptor1; /* GCC*/ - -/** - * \typedef AUDDSpeakerDriverConfigurationDescriptors - * \brief Holds a list of descriptors returned as part of the configuration of - * a USB audio speaker device. - */ -typedef struct _AUDDSpeakerDriverConfigurationDescriptors { - - /** Standard configuration. */ - USBConfigurationDescriptor configuration; - /** Audio control interface. */ - USBInterfaceDescriptor control; - /** Descriptors for the audio control interface. */ - AUDDSpeakerDriverAudioControlDescriptors controlDescriptors; - /* - AUDIO OUT */ - /** Streaming out interface descriptor (with no endpoint, required). */ - USBInterfaceDescriptor streamingOutNoIsochronous; - /** Streaming out interface descriptor. */ - USBInterfaceDescriptor streamingOut; - /** Audio class descriptor for the streaming out interface. */ - AUDStreamingInterfaceDescriptor streamingOutClass; - /** Stream format descriptor. */ - AUDFormatTypeOneDescriptor1 streamingOutFormatType; - /** Streaming out endpoint descriptor. */ - AUDEndpointDescriptor streamingOutEndpoint; - /** Audio class descriptor for the streaming out endpoint. */ - AUDDataEndpointDescriptor streamingOutDataEndpoint; - -} __attribute__ ((packed)) AUDDSpeakerDriverConfigurationDescriptors; /* GCC */ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void AUDDSpeakerDriver_Initialize( - const USBDDriverDescriptors *pDescriptors); - -extern void AUDDSpeakerDriver_ConfigurationChangeHandler(uint8_t cfgnum); - -extern void AUDDSpeakerDriver_InterfaceSettingChangedHandler( - uint8_t interface, uint8_t setting); - -extern void AUDDSpeakerDriver_RequestHandler(const USBGenericRequest *request); - -extern uint8_t AUDDSpeakerDriver_Read(void *buffer, - uint32_t length, - TransferCallback callback, - void *argument); - -extern void AUDDSpeakerDriver_MuteChanged(uint8_t channel,uint8_t muted); - -extern void AUDDSpeakerDriver_StreamSettingChanged(uint8_t newSetting); - -/**@}*/ -#endif /*#ifndef AUDDSPEAKERDRIVER_H */ - - diff --git a/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerPhone.h b/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerPhone.h deleted file mode 100644 index ae5a22a0..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerPhone.h +++ /dev/null @@ -1,156 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * USB Audio Speaker & Microphone Function. - */ - -/** \addtogroup usbd_audio_speakerphone - *@{ - * Implement speakerphone function that combine 1 AC interface, 1 AS interface - * for speaker and 1 AS interface for microphone. - */ - -#ifndef _AUDD_SPEAKERPHONE_H_ -#define _AUDD_SPEAKERPHONE_H_ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include - -#include -#include - -/*------------------------------------------------------------------------------ - * Defines - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_audio_ids Audio Device IDs required by driver - * @{ - * The driver uses following fixed entity IDs, use them to define your - * descriptor. - * \ref AUDD_ID_SpeakerIT - * \ref AUDD_ID_SpeakerOT - * \ref AUDD_ID_SpeakerFU - * \ref AUDD_ID_MicrophoneIT - * \ref AUDD_ID_MicrophoneOT - * \ref AUDD_ID_MicrophoneFU - */ -/** Speaker input terminal ID */ -#define AUDD_ID_SpeakerIT 0x01 -/** Speaker output terminal ID */ -#define AUDD_ID_SpeakerOT 0x02 -/** Speaker feature unit ID */ -#define AUDD_ID_SpeakerFU 0x03 -/** Microphone input terminal ID */ -#define AUDD_ID_MicrophoneIT 0x04 -/** Microphone output terminal ID */ -#define AUDD_ID_MicrophoneOT 0x05 -/** Microphone feature unit ID */ -#define AUDD_ID_MicrophoneFU 0x06 -/** @}*/ - -/** \addtogroup usbd_audio_chs Audio Device Channels - * @{ - */ -/** Master channel ID */ -#define AUDD_CH_Master 0x0 -/** Left channel ID */ -#define AUDD_CH_L 0x1 -/** Right channel ID */ -#define AUDD_CH_R 0x2 -/** @}*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** - * Struct of USB Audio Speakerphone Function, with - * - 1 control interface for features, - * - 1 input stream for microphone (Audio IN), - * - 1 output stream for speaker (Audio OUT). - */ -typedef struct _AUDDSpeakerPhone { - /** Pointer to USBD Driver Interface */ - USBDDriver *pUsbd; - /** Pointer to AUDDStream Instance */ - AUDDStream *pSpeaker; - /** Pointer to AUDDStream Instance */ - AUDDStream *pMicrophone; -} AUDDSpeakerPhone; - -/*------------------------------------------------------------------------------ - * Functions - *------------------------------------------------------------------------------*/ - -extern void AUDDSpeakerPhone_InitializeStream( - AUDDStream * pAuds, - uint8_t numChannels,uint16_t wChannelVolumes [ ], - AUDDStreamEventCallback fCallback,void * pArg); - -extern void AUDDSpeakerPhone_Initialize( - AUDDSpeakerPhone * pAudf, - USBDDriver * pUsbd, - AUDDStream * pSpeaker,AUDDStream * pMicrophone); - -extern USBGenericDescriptor* AUDDSpeakerPhone_ParseInterfaces( - AUDDSpeakerPhone * pAudf, - USBGenericDescriptor * pDescriptors, - uint32_t dwLength); - -extern uint32_t AUDDSpeakerPhone_RequestHandler( - AUDDSpeakerPhone * pAudf, - const USBGenericRequest * pRequest); - -extern uint32_t AUDDSpeakerPhone_CloseStream( - AUDDSpeakerPhone * pAudf, - uint32_t bInterface); - -extern uint32_t AUDDSpeakerPhone_SetupWrite( - AUDDSpeakerPhone * pAudf, - void * pListInit, void * pDmaInit, uint16_t listSize, uint16_t delaySize, - TransferCallback callback,void * argument); - -extern uint32_t AUDDSpeakerPhone_Write( - AUDDSpeakerPhone * pAudf, - void * pBuffer,uint16_t wLength); - -extern uint32_t AUDDSpeakerPhone_Read( - AUDDSpeakerPhone * pAudf, - void * pData, uint32_t dwSize, - TransferCallback fCallback,void * pArg); - -/**@}*/ -#endif /* _AUDD_SPEAKERPHONE_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerPhoneDriver.h b/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerPhoneDriver.h deleted file mode 100644 index 32d84716..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/AUDDSpeakerPhoneDriver.h +++ /dev/null @@ -1,311 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definition of a USB Audio Speakerphone Driver with two playback channels - * and one record channel. - * - * \section Usage - * - * -# Enable and setup USB related pins (see pio & board.h). - * -# Inplement a descriptor list using definitions - * - \ref usbd_audio_speakerphone_channel_num - * - \ref usbd_audio_speaker_interface_ids - * - \ref usbd_audio_speaker_entity_ids - * -# Configure the USB Audio Speakerphone driver using - * AUDDSpeakerPhoneDriver_Initialize - * -# To get %audio stream frames from host, use - * AUDDSpeakerPhoneDriver_Read - * -# To send %audio sampling stream to host, use - * AUDDSpeakerPhoneDriver_Write - * - */ - -#ifndef AUDDSpeakerPhoneDriver_H -#define AUDDSpeakerPhoneDriver_H - -/** \addtogroup usbd_audio_speakerphone - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include -#include - -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_audio_speakerphone_channel_num Audio SpeakerPhone Channel Numbers - * @{ - * This page lists codes for USB Audio Speakerphone channel numbers. - * - * \section Playback channel numbers - * - AUDDSpeakerPhoneDriver_MASTERCHANNEL - * - AUDDSpeakerPhoneDriver_LEFTCHANNEL - * - AUDDSpeakerPhoneDriver_RIGHTCHANNEL - * - * \section Record channel number - * - AUDDSpeakerPhoneDriver_RECCHANNEL - */ - -/** Master channel of playback. */ -#define AUDDSpeakerPhoneDriver_MASTERCHANNEL 0 -/** Front left channel of playback. */ -#define AUDDSpeakerPhoneDriver_LEFTCHANNEL 1 -/** Front right channel of playback. */ -#define AUDDSpeakerPhoneDriver_RIGHTCHANNEL 2 -/** Channel of record. */ -#define AUDDSpeakerPhoneDriver_RECCHANNEL 0 -/** @}*/ - -/** \addtogroup usbd_audio_speaker_interface_ids Audio SpeakerPhone Interface IDs - * @{ - * This page lists the interface numbers for USB Audio Speakerphone device. - * - * \section Interfaces - * - AUDDSpeakerPhoneDriverDescriptors_CONTROL - * - AUDDSpeakerPhoneDriverDescriptors_STREAMING - * - AUDDSpeakerPhoneDriverDescriptors_STREAMINGIN - */ - -/** Audio control interface ID */ -#define AUDDSpeakerPhoneDriverDescriptors_CONTROL 0 -/** Audio streaming interface ID (OUT, for playback) */ -#define AUDDSpeakerPhoneDriverDescriptors_STREAMING 1 -/** Audio streaming interface ID (IN, for record) */ -#define AUDDSpeakerPhoneDriverDescriptors_STREAMINGIN 2 -/** @}*/ - -/** \addtogroup usbd_audio_speaker_entity_ids Audio SpeakerPhone Entity IDs - * @{ - * This page lists the entity IDs for USB Audio Speaker device. - * - * \section Entities - * - AUDDSpeakerPhoneDriverDescriptors_INPUTTERMINAL - * - AUDDSpeakerPhoneDriverDescriptors_OUTPUTTERMINAL - * - AUDDSpeakerPhoneDriverDescriptors_FEATUREUNIT - * - AUDDSpeakerPhoneDriverDescriptors_INPUTTERMINAL_REC - * - AUDDSpeakerPhoneDriverDescriptors_OUTPUTTERMINAL_REC - * - AUDDSpeakerPhoneDriverDescriptors_FEATUREUNIT_REC - */ - -/** Playback input terminal ID */ -#define AUDDSpeakerPhoneDriverDescriptors_INPUTTERMINAL 0 -/** Playback output terminal ID */ -#define AUDDSpeakerPhoneDriverDescriptors_OUTPUTTERMINAL 1 -/** Playback feature unit ID */ -#define AUDDSpeakerPhoneDriverDescriptors_FEATUREUNIT 2 -/** Record input terminal ID */ -#define AUDDSpeakerPhoneDriverDescriptors_INPUTTERMINAL_REC 3 -/** Record output terminal ID */ -#define AUDDSpeakerPhoneDriverDescriptors_OUTPUTTERMINAL_REC 4 -/** Record feature unit ID */ -#define AUDDSpeakerPhoneDriverDescriptors_FEATUREUNIT_REC 5 -/** @}*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Audio control header descriptor with one slave interface. - *------------------------------------------------------------------------------*/ -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef AUDHeaderDescriptor2 - * \brief Header descriptor with 1 interface. - */ -typedef struct _AUDHeaderDescriptor2 { - - /** Header descriptor. */ - AUDHeaderDescriptor header; - /** Id of the first grouped interface - Speaker. */ - unsigned char bInterface0; - /** Id of the second grouped interface - Speakerphone. */ - unsigned char bInterface1; - -} __attribute__ ((packed)) AUDHeaderDescriptor2; /* GCC */ - -/** - * \typedef AUDFeatureUnitDescriptor3 - * \brief Feature unit descriptor with 3 channel controls (master, right, left). - */ -typedef struct _AUDFeatureUnitDescriptor3 { - - /** Feature unit descriptor. */ - AUDFeatureUnitDescriptor feature; - /** Available controls for each channel. */ - unsigned char bmaControls[3]; - /** Index of a string descriptor for the feature unit. */ - unsigned char iFeature; - -} __attribute__ ((packed)) AUDFeatureUnitDescriptor3; /* GCC */ - -/** - * \typedef AUDDSpeakerPhoneDriverAudioControlDescriptors - * \brief List of descriptors for detailling the audio control interface of a - * device using a USB Audio Speakerphoneer driver. - */ -typedef struct _AUDDSpeakerPhoneDriverAudioControlDescriptors { - - /** Header descriptor (with one slave interface). */ - AUDHeaderDescriptor2 header; - /** Input terminal descriptor. */ - AUDInputTerminalDescriptor inputSpeakerPhone; - /** Output terminal descriptor. */ - AUDOutputTerminalDescriptor outputSpeakerPhone; - /** Feature unit descriptor - SpeakerPhone. */ - AUDFeatureUnitDescriptor3 featureSpeakerPhone; - /** Input terminal descriptor. */ - AUDInputTerminalDescriptor inputRec; - /** Output terminal descriptor. */ - AUDOutputTerminalDescriptor outputRec; - /** Feature unit descriptor - SpeakerPhonephone. */ - AUDFeatureUnitDescriptor3 featureRec; - -} __attribute__ ((packed)) AUDDSpeakerPhoneDriverAudioControlDescriptors; /* GCC */ - -/** - * \typedef AUDFormatTypeOneDescriptor1 - * \brief Format type I descriptor with one discrete sampling frequency. - */ -typedef struct _AUDFormatTypeOneDescriptor1 { - - /** Format type I descriptor. */ - AUDFormatTypeOneDescriptor formatType; - /** Sampling frequency in Hz. */ - unsigned char tSamFreq[3]; - -} __attribute__ ((packed)) AUDFormatTypeOneDescriptor1; /* GCC */ - -/** - * \typedef AUDDSpeakerPhoneDriverConfigurationDescriptors - * \brief Holds a list of descriptors returned as part of the configuration of - * a USB Audio Speakerphone device. - */ -typedef struct _AUDDSpeakerPhoneDriverConfigurationDescriptors { - - /** Standard configuration. */ - USBConfigurationDescriptor configuration; - /** Audio control interface. */ - USBInterfaceDescriptor control; - /** Descriptors for the audio control interface. */ - AUDDSpeakerPhoneDriverAudioControlDescriptors controlDescriptors; - /*- AUDIO OUT */ - /** Streaming out interface descriptor (with no endpoint, required). */ - USBInterfaceDescriptor streamingOutNoIsochronous; - /** Streaming out interface descriptor. */ - USBInterfaceDescriptor streamingOut; - /** Audio class descriptor for the streaming out interface. */ - AUDStreamingInterfaceDescriptor streamingOutClass; - /** Stream format descriptor. */ - AUDFormatTypeOneDescriptor1 streamingOutFormatType; - /** Streaming out endpoint descriptor. */ - AUDEndpointDescriptor streamingOutEndpoint; - /** Audio class descriptor for the streaming out endpoint. */ - AUDDataEndpointDescriptor streamingOutDataEndpoint; - /*- AUDIO IN */ - /** Streaming in interface descriptor (with no endpoint, required). */ - USBInterfaceDescriptor streamingInNoIsochronous; - /** Streaming in interface descriptor. */ - USBInterfaceDescriptor streamingIn; - /** Audio class descriptor for the streaming in interface. */ - AUDStreamingInterfaceDescriptor streamingInClass; - /** Stream format descriptor. */ - AUDFormatTypeOneDescriptor1 streamingInFormatType; - /** Streaming in endpoint descriptor. */ - AUDEndpointDescriptor streamingInEndpoint; - /** Audio class descriptor for the streaming in endpoint. */ - AUDDataEndpointDescriptor streamingInDataEndpoint; - -} __attribute__ ((packed)) AUDDSpeakerPhoneDriverConfigurationDescriptors; /* GCC */ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void AUDDSpeakerPhoneDriver_Initialize( - const USBDDriverDescriptors *pDescriptors); - -extern void AUDDSpeakerPhoneDriver_ConfigurationChangeHandler(uint8_t cfgnum); - -extern void AUDDSpeakerPhoneDriver_InterfaceSettingChangedHandler( - uint8_t interface, - uint8_t setting); - -extern void AUDDSpeakerPhoneDriver_RequestHandler( - const USBGenericRequest *request); - -extern uint8_t AUDDSpeakerPhoneDriver_Read(void *buffer, - uint32_t length, - TransferCallback callback, - void *argument); - -extern uint8_t AUDDSpeakerPhoneDriver_SetupWrite(void * pListInit, - void * pDmaInit, - uint16_t listSize, - uint16_t delaySize, - TransferCallback callback, - void * argument); - -extern uint8_t AUDDSpeakerPhoneDriver_Write(void * buffer,uint16_t length); - - -extern void AUDDSpeakerPhoneDriver_MuteChanged(uint8_t mic, - uint8_t channel, - uint8_t muted); - -extern void AUDDSpeakerPhoneDriver_StreamSettingChanged(uint8_t mic, - uint8_t newSetting); - -/**@}*/ - -#endif /*#ifndef AUDDSpeakerPhoneDriver_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/AUDDStream.h b/firmware/atmel_softpack_libraries/usb/include/AUDDStream.h deleted file mode 100644 index 571711bc..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/AUDDStream.h +++ /dev/null @@ -1,149 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * USB Audio Device Streaming interface with controls. - * (3 channels (including master) supported). - */ - -/** \addtogroup usbd_audio_speakerphone - *@{ - * Implement speakerphone function that combine 1 AC interface, 1 AS interface - * for speaker and 1 AS interface for microphone. - */ - -#ifndef _AUDD_STREAM_H_ -#define _AUDD_STREAM_H_ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include -#include - -/*------------------------------------------------------------------------------ - * Defines - *------------------------------------------------------------------------------*/ - -/** \addtopage usbd_audio_ec Audio Device Event codes - * @{ - */ -/** Mute status changed */ -#define AUDD_EC_MuteChanged 1 -/** Volume status changed */ -#define AUDD_EC_VolumeChanged 2 -/** @}*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** Callback function for Audio Stream Event */ -typedef void (*AUDDStreamEventCallback)(uint32_t ec, - uint8_t channel, - void* pArg); - -/** - * Struct of USB Audio Stream Interface. - * Support 1 control interface, with I & O stream. - * Unit ID 0xFF is reserved for not implemented. - */ -typedef struct _AUDDStream { - /** AudioControl Interface number */ - uint8_t bAcInterface; - /** AudioControl Feature Unit ID for IN */ - uint8_t bFeatureUnitOut; - /** AudioControl Feature Unit ID for OUT */ - uint8_t bFeatureUnitIn; - /** AudioStreaming Interface number */ - uint8_t bAsInterface; - /** Streaming OUT endpoint address */ - uint8_t bEndpointOut; - /** Streaming IN endpoint address */ - uint8_t bEndpointIn; - /** Number of channels (<=8) */ - uint8_t bNumChannels; - /** Mute control bits (8b) */ - uint8_t bmMute; - /** Volume control data */ - uint16_t *pwVolumes; - - /** Audio Streaming Events Callback */ - AUDDStreamEventCallback fCallback; - /** Callback arguments */ - void* pArg; -} AUDDStream; - -/*------------------------------------------------------------------------------ - * Functions - *------------------------------------------------------------------------------*/ - -extern void AUDDStream_Initialize( - AUDDStream * pAuds, - uint8_t numChannels, - uint16_t wChannelVolumes [ ], - AUDDStreamEventCallback fCallback, - void * pArg); - -extern uint32_t AUDDStream_ChangeMute( - AUDDStream * pAuds, - uint8_t bChannel, - uint8_t bMute); - -extern uint32_t AUDDStream_SetVolume( - AUDDStream * pAuds, - uint8_t bChannel, - uint16_t wVolume); - -extern uint32_t AUDDStream_IsRequestAccepted( - AUDDStream *pAuds, - const USBGenericRequest *pReq); - -extern uint32_t AUDDStream_Read( - AUDDStream * pAuds, - void * pData, uint32_t dwSize, - TransferCallback fCallback,void * pArg); - -extern uint32_t AUDDStream_SetupWrite( - AUDDStream * pAuds, - void * pListInit, void * pDmaInit, uint16_t listSize, - uint16_t delaySize, - TransferCallback callback,void * argument); - -extern uint32_t AUDDStream_Write( - AUDDStream * pAuds, - void * pBuffer,uint16_t wLength); - -extern uint32_t AUDDStream_Close(AUDDStream * pStream); - -#endif /* _AUDD_STREAM_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/AUDDescriptors.h b/firmware/atmel_softpack_libraries/usb/include/AUDDescriptors.h deleted file mode 100644 index 43d5e6b2..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/AUDDescriptors.h +++ /dev/null @@ -1,546 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * Definitions and classes for USB Audio class descriptors. - * - * - For a USB %device: - * -# When declaring an Audio-specific descriptor, use the descriptor types - * and subtypes defined in this unit (see "USB Audio descriptor types" - * and "USB Audio descriptor subtypes"). - * -# When declaring the %device descriptor of a USB %audio %device, use - * "USB Audio device descriptor values" defined here. - * -# Declare an AUDStreamingInterfaceDescriptor instance as part of the - * configuration descriptors returned by a USB %audio %device. - * -# Declare a AUDHeaderDescriptor as part of the configuration - * descriptors of the %device. - * -# Declare an AUDFeatureUnitDescriptor instance as part of the - * configuration descriptors returned by a USB %audio %device. - * -# Declare an instance of AUDFormatTypeOneDescriptor as part of the - * configuration descriptors of an audio device. - */ - -#ifndef _AUDDESCRIPTORS_H_ -#define _AUDDESCRIPTORS_H_ -/** \addtogroup usb_audio - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_audio_desc_type USB Audio descriptor types - * @{ - * This section lists the available types for USB audio-specific descriptors. - * - \ref AUDGenericDescriptor_DEVICE - * - \ref AUDGenericDescriptor_CONFIGURATION - * - \ref AUDGenericDescriptor_STRING - * - \ref AUDGenericDescriptor_INTERFACE - * - \ref AUDGenericDescriptor_ENDPOINT - */ - -/** Descriptor gives detail about the whole device.*/ -#define AUDGenericDescriptor_DEVICE 0x21 -/** Descriptor gives detail about a configuration.*/ -#define AUDGenericDescriptor_CONFIGURATION 0x22 -/** Descriptor gives detail about a string.*/ -#define AUDGenericDescriptor_STRING 0x23 -/** Descriptor gives detail about an interface.*/ -#define AUDGenericDescriptor_INTERFACE 0x24 -/** Descriptor gives detail about an endpoint. */ -#define AUDGenericDescriptor_ENDPOINT 0x25 -/** @}*/ - -/** \addtogroup usb_audio_desc_subtype USB Audio descriptor subtypes - * @{ - * This section lists the possible subtypes for USB audio-specific descriptors. - * - \ref AUDGenericDescriptor_HEADER - * - \ref AUDGenericDescriptor_INPUTTERMINAL - * - \ref AUDGenericDescriptor_OUTPUTTERMINAL - * - \ref AUDGenericDescriptor_MIXERUNIT - * - \ref AUDGenericDescriptor_SELECTORUNIT - * - \ref AUDGenericDescriptor_FEATUREUNIT - * - \ref AUDGenericDescriptor_PROCESSINGUNIT - * - \ref AUDGenericDescriptor_EXTENSIONUNIT - */ -/** Header descriptor subtype.*/ -#define AUDGenericDescriptor_HEADER 0x01 -/** Input terminal descriptor subtype.*/ -#define AUDGenericDescriptor_INPUTTERMINAL 0x02 -/** Output terminal descriptor subtype.*/ -#define AUDGenericDescriptor_OUTPUTTERMINAL 0x03 -/** Mixer unit descriptor subtype.*/ -#define AUDGenericDescriptor_MIXERUNIT 0x04 -/** Selector unit descriptor subtype.*/ -#define AUDGenericDescriptor_SELECTORUNIT 0x05 -/** Feature unit descriptor subtype.*/ -#define AUDGenericDescriptor_FEATUREUNIT 0x06 -/** Processing unit descriptor subtype.*/ -#define AUDGenericDescriptor_PROCESSINGUNIT 0x07 -/** Extension unit descriptor subtype.*/ -#define AUDGenericDescriptor_EXTENSIONUNIT 0x08 -/** @}*/ - - -/** \addtogroup usb_audio_desc USB Audio Descriptors - * @{ - * USB Audio device descriptor values - * - * This section lists the class, subclass & protocol codes that a USB audio - * device should display in its device descriptor. - * - \ref AUDDeviceDescriptor_CLASS - * - \ref AUDDeviceDescriptor_SUBCLASS - * - \ref AUDDeviceDescriptor_PROTOCOL - */ -/** Class code for a USB audio device. */ -#define AUDDeviceDescriptor_CLASS 0x00 -/** Subclass code for a USB audio device. */ -#define AUDDeviceDescriptor_SUBCLASS 0x00 -/** Protocol code for a USB audio device. */ -#define AUDDeviceDescriptor_PROTOCOL 0x00 -/** @}*/ - - -/** - * \addtogroup usb_audio_stream_if USB Audio streaming interface codes - * @{ - * This section lists the class, subclass and protocol codes that an Audio - * Streaming interface should display in its descriptor. - * - \ref AUDStreamingInterfaceDescriptor_CLASS - * - \ref AUDStreamingInterfaceDescriptor_SUBCLASS - * - \ref AUDStreamingInterfaceDescriptor_PROTOCOL - */ -/** Class code for an USB audio streaming interface.*/ -#define AUDStreamingInterfaceDescriptor_CLASS 0x01 - -/** Subclass code for an audio streaming interface.*/ -#define AUDStreamingInterfaceDescriptor_SUBCLASS 0x02 - -/** Protocol code for an audio streaming interface.*/ -#define AUDStreamingInterfaceDescriptor_PROTOCOL 0x00 -/** @}*/ - -/** - * \addtogroup usb_audio_stream_subtype USB Audio streaming descriptor subtypes - * @{ - * This section lists the possible subtypes for audio-specific descriptor - * appended to an Audio Streaming interface. - * - \ref AUDStreamingInterfaceDescriptor_GENERAL - * - \ref AUDStreamingInterfaceDescriptor_FORMATTYPE - * - \ref AUDStreamingInterfaceDescriptor_FORMATSPECIFIC - */ -/** General descriptor subtype.*/ -#define AUDStreamingInterfaceDescriptor_GENERAL 0x01 - -/** Format type descriptor subtype.*/ -#define AUDStreamingInterfaceDescriptor_FORMATTYPE 0x02 - -/** Format specific descriptor subtype.*/ -#define AUDStreamingInterfaceDescriptor_FORMATSPECIFIC 0x03 -/** @}*/ - - -/** \addtogroup usb_audio_ctrl_if USB Audio Control Interface - * @{ - * This section lists the class, subclass and protocol codes that a USB Audio - * Control interface descriptor should display. - * - \ref AUDControlInterfaceDescriptor_CLASS - * - \ref AUDControlInterfaceDescriptor_SUBCLASS - * - \ref AUDControlInterfaceDescriptor_PROTOCOL - */ -/** Class code for an audio control interface. */ -#define AUDControlInterfaceDescriptor_CLASS 0x01 -/** Subclass code for an audio control interface. */ -#define AUDControlInterfaceDescriptor_SUBCLASS 0x01 -/** Protocol code for an audio control interface. */ -#define AUDControlInterfaceDescriptor_PROTOCOL 0x00 -/** @}*/ - - -/** Descriptor subtype for an Audio data endpoint. */ -#define AUDDataEndpointDescriptor_SUBTYPE 0x01 - -/** \addtogroup usb_audio_lock_delay USB Audio Lock delay units - * @{ - * This section lists the valid lock delay unit types. - * - \ref AUDDataEndpointDescriptor_MILLISECONDS - * - \ref AUDDataEndpointDescriptor_PCMSAMPLES - */ -/** Lock delay is expressed in milliseconds. */ -#define AUDDataEndpointDescriptor_MILLISECONDS 1 -/** Lock delay is expressed in decoded PCM samples. */ -#define AUDDataEndpointDescriptor_PCMSAMPLES 2 -/** @}*/ - - -/** \addtogroup usb_audio_class_ver USB Audio class releases - * @{ - * This section lists the existing versions of the Audio class specification. - * - \ref AUDHeaderDescriptor_AUD1_00 - */ - -/** Indentifies the USB audio specification release 1.00.*/ -#define AUDHeaderDescriptor_AUD1_00 0x0100 -/** @}*/ - -#define AUDTerminalDescriptor_USBSTREAMING 0x0101 -#define AUDTerminalDescriptor_MICROPHONE 0x0201 -#define AUDTerminalDescriptor_HANDSETIN 0x0401 -#define AUDTerminalDescriptor_SPEAKERPHONE 0x0403 -#define AUDTerminalDescriptor_LINEIN 0x0501 - -/** \addtogroup usb_audio_in_term USB Audio Input terminal types - * @{ - * This section lists the available types for an Input terminal. - * - \ref AUDInputTerminalDescriptor_USBSTREAMING - * - \ref AUDInputTerminalDescriptor_MICROPHONE - * - \ref AUDInputTerminalDescriptor_SPEAKERPHONE - * - \ref AUDInputTerminalDescriptor_LINEIN - */ - -/** A terminal receiving its data from a USB isochronous endpoint.*/ -#define AUDInputTerminalDescriptor_USBSTREAMING 0x0101 -/** A terminal sampling data from a microphone.*/ -#define AUDInputTerminalDescriptor_MICROPHONE 0x0201 -/** A terminal sampling data from a Handset In.*/ -#define AUDInputTerminalDescriptor_HANDSETIN 0x0401 -/** A terminal sampling data from a speakerphone*/ -#define AUDInputTerminalDescriptor_SPEAKERPHONE 0x0403 -/** A terminal sampling data from a Phone Line In.*/ -#define AUDInputTerminalDescriptor_LINEIN 0x0501 -/** @}*/ - -/** \addtogroup usb_audio_ch_loc USB Audio Channel spatial locations - * @{ - * This section lists the possible spatial locations for audio channels. - * - \ref AUDInputTerminalDescriptor_LEFTFRONT - * - \ref AUDInputTerminalDescriptor_RIGHTFRONT - * - \ref AUDInputTerminalDescriptor_CENTERFRONT - */ -/** Front left channel.*/ -#define AUDInputTerminalDescriptor_LEFTFRONT (1 << 0) -/** Front right channel.*/ -#define AUDInputTerminalDescriptor_RIGHTFRONT (1 << 1) -/** Front center channel.*/ -#define AUDInputTerminalDescriptor_CENTERFRONT (1 << 2) -/** @}*/ - - -/** \addtogroup usb_audio_out_term USB Audio Output terminal types - * @{ - * This section lists the available types for an output terminal. - * - \ref AUDOutputTerminalDescriptor_USBTREAMING - * - \ref AUDOutputTerminalDescriptor_SPEAKER - * - \ref AUDOutputTerminalDescriptor_HANDSETOUT - * - \ref AUDOutputTerminalDescriptor_LINEOUT - */ -/** A terminal sending data through USB isochronous endpoint.*/ -#define AUDOutputTerminalDescriptor_USBTREAMING 0x0101 -/** A terminal sending data to a USB host through an Isochronous endpoint.*/ -#define AUDOutputTerminalDescriptor_SPEAKER 0x0301 -/** A terminal sending data to Handset Out.*/ -#define AUDOutputTerminalDescriptor_HANDSETOUT 0x0401 -/** A terminal sending data to Phone Line Out.*/ -#define AUDOutputTerminalDescriptor_LINEOUT 0x0501 -/** @}*/ - -/** \addtogroup usb_audio_ch_ctrl USB Audio Channel controls - * @{ - * This section lists the available controls for each channel of the audio - * interface. Each channel can have any control combination; simply perform - * a bitwise OR ('|') to combine several values. - * -# \ref AUDFeatureUnitDescriptor_MUTE - * -# \ref AUDFeatureUnitDescriptor_VOLUME - * -# \ref AUDFeatureUnitDescriptor_BASS - * -# \ref AUDFeatureUnitDescriptor_MID - * -# \ref AUDFeatureUnitDescriptor_TREBLE - */ -/** Channel mute control. */ -#define AUDFeatureUnitDescriptor_MUTE (1 << 0) -/** Channel volume control. */ -#define AUDFeatureUnitDescriptor_VOLUME (1 << 1) -/** Channel bass control. */ -#define AUDFeatureUnitDescriptor_BASS (1 << 2) -/** Channel middle control. */ -#define AUDFeatureUnitDescriptor_MID (1 << 3) -/** Channel treble control. */ -#define AUDFeatureUnitDescriptor_TREBLE (1 << 4) -/** @}*/ - - -/** Format type for a format type I descriptor. */ -#define AUDFormatTypeOneDescriptor_FORMATTYPEONE 0x01 - -/** AUDFormatTypeOneDescriptor_PCM - PCM format. */ -#define AUDFormatTypeOneDescriptor_PCM 0x0001 - -/** Indicates the sampling frequency can have any value in the provided range. */ -#define AUDFormatTypeOneDescriptor_CONTINUOUS 0 - - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef AUDStreamingInterfaceDescriptor - * \brief Provides additional information about an audio streaming interface to - * the USB host. - */ -typedef struct _AUDStreamingInterfaceDescriptor { - - /** Size of descriptor in bytes.*/ - uint8_t bLength; - /** Descriptor type (AUDGenericDescriptor_INTERFACE).*/ - uint8_t bDescriptorType; - /** Descriptor subtype (AUDStreamingInterfaceDescriptor_GENERAL).*/ - uint8_t bDescriptorSubType; - /** Terminal ID to which the interface is connected.*/ - uint8_t bTerminalLink; - /** Delay introduced by the data path, in number of frames.*/ - uint8_t bDelay; - /** Audio data format used by this interface.*/ - uint16_t wFormatTag; - -} __attribute__ ((packed)) AUDStreamingInterfaceDescriptor; /* GCC */ - -/** - * \typedef AUDEndpointDescriptor - * \brief Modified endpoint descriptor with two additional fields, with are - * USB audio specific. - */ -typedef struct _AUDEndpointDescriptor { - - /** Size of the descriptor in bytes. */ - uint8_t bLength; - /** Descriptor type (USBGenericDescriptor_ENDPOINT). */ - uint8_t bDescriptorType; - /** Address and direction of the endpoint. */ - uint8_t bEndpointAddress; - /** Endpoint type and additional characteristics (for isochronous endpoints). */ - uint8_t bmAttributes; - /** Maximum packet size (in bytes) of the endpoint. */ - uint16_t wMaxPacketSize; - /** Polling rate of the endpoint. */ - uint8_t bInterval; - /** Refresh rate for a feedback endpoint. */ - uint8_t bRefresh; - /** Address of the associated feedback endpoint if any. */ - uint8_t bSyncAddress; - -} __attribute__ ((packed)) AUDEndpointDescriptor; /* GCC */ - -/** - * \typedef AUDDataEndpointDescriptor - * \brief Gives additional information about an USB endpoint used to transmit audio - * data to or from the host. - */ -typedef struct _AUDDataEndpointDescriptor { - - /** Size of descriptor in bytes. */ - uint8_t bLength; - /** Descriptor type - (\ref AUDGenericDescriptor_ENDPOINT). */ - uint8_t bDescriptorType; - /** Descriptor subtype - (\ref AUDDataEndpointDescriptor_SUBTYPE). */ - uint8_t bDescriptorSubType; - /** Indicates available controls and requirement on packet sizes. */ - uint8_t bmAttributes; - /** Indicates the units of the wLockDelay fields. - \sa usb_audio_lock_delay USB Audio Lock delay units */ - uint8_t bLockDelayUnits; - /** Time it takes for the endpoint to lock its internal clock circuitry. */ - uint16_t wLockDelay; - -} __attribute__ ((packed)) AUDDataEndpointDescriptor; /* GCC */ - -/** - * \typedef AUDHeaderDescriptor - * \brief Groups the various audio interfaces to display one single function to - * the USB host. Subclass this structure to add a particular number of - * slave interface descriptors. - */ -typedef struct _AUDHeaderDescriptor { - - /** Size of descriptor in bytes.*/ - uint8_t bLength; - /** Descriptor type (\ref AUDGenericDescriptor_INTERFACE).*/ - uint8_t bDescriptorType; - /** Descriptor subtype (\ref AUDGenericDescriptor_HEADER).*/ - uint8_t bDescriptorSubType; - /** Audio class release number in BCD format - * \sa usb_audio_class_ver USB Audio class releases */ - uint16_t bcdADC; - /** Length of all descriptors used to qualify the Audio Control interface.*/ - uint16_t wTotalLength; - /** Number of Streaming interfaces contained in this collection.*/ - uint8_t bInCollection; - -} __attribute__ ((packed)) AUDHeaderDescriptor; /* GCC */ - -/** - * \typedef AUDInputTerminalDescriptor - * \brief Describes an input of a USB audio device. - */ -typedef struct _AUDInputTerminalDescriptor { - - /** Size of descriptor in bytes.*/ - uint8_t bLength; - /** Descriptor type (AUDGenericDescriptor_INTERFACE).*/ - uint8_t bDescriptorType; - /** Descriptor subtype (AUDGenericDescriptor_INPUTTERMINAL).*/ - uint8_t bDescriptorSubType; - /** ID of the terminal in the audio function.*/ - uint8_t bTerminalID; - /** Terminal type. - * \sa usb_audio_in_term USB Audio Input terminal types - */ - uint16_t wTerminalType; - /** ID of the output terminal to which this input terminal is associated.*/ - uint8_t bAssocTerminal; - /** Number of logical output channels in this terminal.*/ - uint8_t bNrChannels; - /** Spatial configuration of the logical channels.*/ - uint16_t wChannelConfig; - /** Index of a string descriptor for the first logical channel.*/ - uint8_t iChannelNames; - /** Index of a string descriptor for this terminal. */ - uint8_t iTerminal; - -} __attribute__ ((packed)) AUDInputTerminalDescriptor; /* GCC */ - -/** - * \typedef AUDOutputTerminalDescriptor - * \brief Describes an output of the USB audio function. - */ -typedef struct _AUDOutputTerminalDescriptor { - - /** Size of descriptor in bytes.*/ - uint8_t bLength; - /** Descriptor type (\ref AUDGenericDescriptor_INTERFACE).*/ - uint8_t bDescriptorType; - /** Descriptor subtype (\ref AUDGenericDescriptor_OUTPUTTERMINAL). */ - uint8_t bDescriptorSubType; - /** Identifier for this terminal.*/ - uint8_t bTerminalID; - /** Terminal type. - * \sa "USB Audio Output terminal types" */ - uint16_t wTerminalType; - /** Identifier of the associated input terminal.*/ - uint8_t bAssocTerminal; - /** Identifier of the unit or terminal to which this terminal - * is connected.*/ - uint8_t bSourceID; - /** Index of a string descriptor for this terminal.*/ - uint8_t iTerminal; - -} __attribute__ ((packed)) AUDOutputTerminalDescriptor; /* GCC */ - -/** - * \typedef AUDFeatureUnitDescriptor - * \brief Describes available controls for each channel of the unit or terminal - * it is connected to. - * - * This type must be augmented with the relevant number - * of bmaControls fields and the iFeature field. - **/ -typedef struct _AUDFeatureUnitDescriptor { - - /** Size of descriptor in bytes.*/ - uint8_t bLength; - /** Descriptor type (AUDGenericDescriptor_INTERFACE). */ - uint8_t bDescriptorType; - /** Descriptor subtype (AUDGenericDescriptor_FEATURE). */ - uint8_t bDescriptorSubType; - /** Identifier of this feature unit. */ - uint8_t bUnitID; - /** Identifier of the unit or terminal this feature unit is connected to. */ - uint8_t bSourceID; - /** Size in bytes of a channel controls field. */ - uint8_t bControlSize; - -} __attribute__ ((packed)) AUDFeatureUnitDescriptor; /* GCC */ - -/** - * \typedef AUDFormatTypeOneDescriptor - * \brief Describes an audio data stream that is constructed on a sample-by-sample - * basis. - * - * This type must be augmented with either the continuous sampling frequency range - * (if bSamFreqType = <\ref AUDFormatTypeOneDescriptor_CONTINUOUS>) - * or with an array containing the possible discrete frequencies. - */ -typedef struct _AUDFormatTypeOneDescriptor { - - /** Size of descriptor in bytes. */ - uint8_t bLength; - /** Descriptor type (\ref AUDGenericDescriptor_INTERFACE). */ - uint8_t bDescriptorType; - /** Descriptor subtype (\ref AUDStreamingInterfaceDescriptor_FORMATTYPE).*/ - uint8_t bDescriptorSubType; - /** Format type (\ref AUDFormatTypeOneDescriptor_FORMATTYPEONE).*/ - uint8_t bFormatType; - /** Number of physical channels in the audio stream.*/ - uint8_t bNrChannels; - /** Number of bytes occupied by one audio subframe.*/ - uint8_t bSubFrameSize; - /** Number of bits effectively used in an audio subframe.*/ - uint8_t bBitResolution; - /** Number of supported discrete sampling frequencies, or - * \ref AUDFormatTypeOneDescriptor_CONTINUOUS.*/ - uint8_t bSamFreqType; - -} __attribute__ ((packed)) AUDFormatTypeOneDescriptor; /* GCC */ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - - - -/**@}*/ -#endif /* _AUDDESCRIPTORS_H_ */ diff --git a/firmware/atmel_softpack_libraries/usb/include/AUDRequests.h b/firmware/atmel_softpack_libraries/usb/include/AUDRequests.h deleted file mode 100644 index 93d16621..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/AUDRequests.h +++ /dev/null @@ -1,123 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * Definitions and classes for USB Audio class requests. - * - * - For a USB %device: - * -# After receiving an Audio request from the host, use - * AUDGenericRequest_GetEntity to determine the target Unit or Terminal. - * -# After receiving an Audio request from the host, use - * AUDGenericRequest_GetInterface to know which interface is referenced. - * -# Use AUDFeatureUnitRequest_GetControl to determine which control - * shall be tweaked following a host request. - * -# Use AUDFeatureUnitRequest_GetChannel to identify the channel which - * will have its control altered. - */ - -#ifndef _AUDREQUESTS_H_ -#define _AUDREQUESTS_H_ -/** \addtogroup usb_audio - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_audio_request USB Audio request codes - * @{ - * This section lists the codes of the existing Audio requests. - * - \ref AUDGenericRequest_SETCUR - * - \ref AUDGenericRequest_GETCUR - */ -/** SET_CUR request code.*/ -#define AUDGenericRequest_SETCUR 0x01 -/** GET_CUR request code.*/ -#define AUDGenericRequest_GETCUR 0x81 -/** GET_MIN request code.*/ -#define AUDGenericRequest_GETMIN 0x82 -/** GET_MAX request code.*/ -#define AUDGenericRequest_GETMAX 0x83 -/** GET_RES request code.*/ -#define AUDGenericRequest_GETRES 0x84 -/** @}*/ - -/** \addtogroup usb_audio_ctrl_sel USB Audio Control selector values - * @{ - * This section lists the available control selectors for a Feature Unit request. - * - \ref AUDFeatureUnitRequest_MUTE - */ -/** Mute control selector (MUTE_CONTROL). */ -#define AUDFeatureUnitRequest_MUTE 0x01 -/** Volume control selector (VOLUME_CONTROL). */ -#define AUDFeatureUnitRequest_VOLUME 0x02 -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - - - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - -extern uint8_t AUDGenericRequest_GetEntity( - const USBGenericRequest *request); - -extern uint8_t AUDGenericRequest_GetInterface( - const USBGenericRequest *request); - - -extern uint8_t AUDFeatureUnitRequest_GetControl( - const USBGenericRequest *request); - -extern uint8_t AUDFeatureUnitRequest_GetChannel( - const USBGenericRequest *request); - -/**@}*/ -#endif /* _AUDREQUESTS_H_ */ diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCAUDDDriver.h b/firmware/atmel_softpack_libraries/usb/include/CDCAUDDDriver.h deleted file mode 100644 index 50ee688d..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCAUDDDriver.h +++ /dev/null @@ -1,307 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definitions and methods for USB composite device implement. - * - */ - -#ifndef CDCAUDDDRIVER_H -#define CDCAUDDDRIVER_H -/** \addtogroup usbd_cdc_aud - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Definitions - *---------------------------------------------------------------------------*/ - -/** \addtogroup usbd_cdc_aud_desc USB CDC(Serial) + AUD(Speaker) Definitions - * @{ - */ -/** Number of interfaces of the device (5, can be 4 if no mic support */ -#define CDCAUDDDriverDescriptors_MaxNumInterfaces 5 -/** Number of the CDC interface. */ -#define CDCAUDDDriverDescriptors_CDC_INTERFACE 0 -/** Number of the Audio interface. */ -#define CDCAUDDDriverDescriptors_AUD_INTERFACE 2 -/** Number of Audio function channels (M,L,R) */ -#define AUDD_NumChannels 3 -/** @}*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** Audio header descriptor with 1 interface */ -typedef struct _AUDHeaderDescriptor1{ - - /** Header descriptor.*/ - AUDHeaderDescriptor header; - /** Id of the first grouped interface.*/ - uint8_t bInterface0; - -} __attribute__ ((packed)) AUDHeaderDescriptor1; - -/** Audio header descriptor with 2 interface */ -typedef struct _AUDHeaderDescriptor2 { - - /** Header descriptor. */ - AUDHeaderDescriptor header; - /** Id of the first grouped interface - Speaker. */ - uint8_t bInterface0; - /** Id of the second grouped interface - Speakerphone. */ - uint8_t bInterface1; - -} __attribute__ ((packed)) AUDHeaderDescriptor2; /* GCC */ - -/** - * Feature unit descriptor with 3 channel controls (master, right, left). - */ -typedef struct _AUDFeatureUnitDescriptor3{ - - /** Feature unit descriptor.*/ - AUDFeatureUnitDescriptor feature; - /** Available controls for each channel.*/ - uint8_t bmaControls[AUDD_NumChannels]; - /** Index of a string descriptor for the feature unit.*/ - uint8_t iFeature; - -} __attribute__ ((packed)) AUDFeatureUnitDescriptor3; - -/** - * List of descriptors for detailling the audio control interface of a - * device using a USB audio speaker function. - */ -typedef struct _AUDDSpeakerAcDescriptors{ - - /** Header descriptor (with one slave interface).*/ - AUDHeaderDescriptor1 header; - /** Input terminal descriptor.*/ - AUDInputTerminalDescriptor input; - /** Output terminal descriptor.*/ - AUDOutputTerminalDescriptor output; - /** Feature unit descriptor.*/ - AUDFeatureUnitDescriptor3 feature; - -} __attribute__ ((packed)) AUDDSpeakerAcDescriptors; - -/** - * List of descriptors for detailling the audio control interface of a - * device using a USB Audio Speakerphoneer function. - */ -typedef struct _AUDDSpeakerPhoneAcDescriptors { - - /** Header descriptor (with one slave interface). */ - AUDHeaderDescriptor2 header; - /** Input terminal descriptor. */ - AUDInputTerminalDescriptor inputSpeakerPhone; - /** Output terminal descriptor. */ - AUDOutputTerminalDescriptor outputSpeakerPhone; - /** Feature unit descriptor - SpeakerPhone. */ - AUDFeatureUnitDescriptor3 featureSpeakerPhone; - /** Input terminal descriptor. */ - AUDInputTerminalDescriptor inputRec; - /** Output terminal descriptor. */ - AUDOutputTerminalDescriptor outputRec; - /** Feature unit descriptor - SpeakerPhonephone. */ - AUDFeatureUnitDescriptor3 featureRec; - -} __attribute__ ((packed)) AUDDSpeakerPhoneAcDescriptors; - -/** - * Format type I descriptor with one discrete sampling frequency. - */ -typedef struct _AUDFormatTypeOneDescriptor1{ - - /** Format type I descriptor.*/ - AUDFormatTypeOneDescriptor formatType; - /** Sampling frequency in Hz.*/ - uint8_t tSamFreq[3]; - -} __attribute__ ((packed)) AUDFormatTypeOneDescriptor1; - -/** - * Configuration descriptor list for a device implementing - * CDC(Serial) + Audio(Speaker) composite driver. - */ -typedef struct _CdcAudspkdDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - - /* --- CDC 0 */ - /** IAD 0 */ - USBInterfaceAssociationDescriptor cdcIAD0; - /** Communication interface descriptor */ - USBInterfaceDescriptor cdcCommunication0; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor cdcHeader0; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor cdcCallManagement0; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor cdcUnion0; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor cdcNotification0; - /** Data interface descriptor. */ - USBInterfaceDescriptor cdcData0; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor cdcDataOut0; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor cdcDataIn0; - - /* --- AUDIO (AC) */ - /** IAD 1*/ - USBInterfaceAssociationDescriptor audIAD; - /** Audio control interface.*/ - USBInterfaceDescriptor audInterface; - /** Descriptors for the audio control interface.*/ - AUDDSpeakerAcDescriptors audControl; - /* -- AUDIO out (AS) */ - /** Streaming out interface descriptor (with no endpoint, required).*/ - USBInterfaceDescriptor audStreamingOutNoIsochronous; - /** Streaming out interface descriptor.*/ - USBInterfaceDescriptor audStreamingOut; - /** Audio class descriptor for the streaming out interface.*/ - AUDStreamingInterfaceDescriptor audStreamingOutClass; - /** Stream format descriptor.*/ - AUDFormatTypeOneDescriptor1 audStreamingOutFormatType; - /** Streaming out endpoint descriptor.*/ - AUDEndpointDescriptor audStreamingOutEndpoint; - /** Audio class descriptor for the streaming out endpoint.*/ - AUDDataEndpointDescriptor audStreamingOutDataEndpoint; - -} __attribute__ ((packed)) CdcAudspkdDriverConfigurationDescriptors; - -/** - * Configuration descriptor list for a device implementing - * CDC(Serial) + Audio(SpeakerPhone) composite driver. - */ -typedef struct _CdcAuddDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - - /* --- CDC 0 */ - /** IAD 0 */ - USBInterfaceAssociationDescriptor cdcIAD0; - /** Communication interface descriptor */ - USBInterfaceDescriptor cdcCommunication0; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor cdcHeader0; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor cdcCallManagement0; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor cdcUnion0; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor cdcNotification0; - /** Data interface descriptor. */ - USBInterfaceDescriptor cdcData0; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor cdcDataOut0; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor cdcDataIn0; - - /* --- AUDIO (AC) */ - /** IAD 1*/ - USBInterfaceAssociationDescriptor audIAD; - /** Audio control interface.*/ - USBInterfaceDescriptor audInterface; - /** Descriptors for the audio control interface.*/ - AUDDSpeakerPhoneAcDescriptors audControl; - /* -- AUDIO out (AS) */ - /** Streaming out interface descriptor (with no endpoint, required).*/ - USBInterfaceDescriptor audStreamingOutNoIsochronous; - /** Streaming out interface descriptor.*/ - USBInterfaceDescriptor audStreamingOut; - /** Audio class descriptor for the streaming out interface.*/ - AUDStreamingInterfaceDescriptor audStreamingOutClass; - /** Stream format descriptor.*/ - AUDFormatTypeOneDescriptor1 audStreamingOutFormatType; - /** Streaming out endpoint descriptor.*/ - AUDEndpointDescriptor audStreamingOutEndpoint; - /** Audio class descriptor for the streaming out endpoint.*/ - AUDDataEndpointDescriptor audStreamingOutDataEndpoint; - /*- AUDIO IN */ - /** Streaming in interface descriptor (with no endpoint, required). */ - USBInterfaceDescriptor streamingInNoIsochronous; - /** Streaming in interface descriptor. */ - USBInterfaceDescriptor streamingIn; - /** Audio class descriptor for the streaming in interface. */ - AUDStreamingInterfaceDescriptor streamingInClass; - /** Stream format descriptor. */ - AUDFormatTypeOneDescriptor1 streamingInFormatType; - /** Streaming in endpoint descriptor. */ - AUDEndpointDescriptor streamingInEndpoint; - /** Audio class descriptor for the streaming in endpoint. */ - AUDDataEndpointDescriptor streamingInDataEndpoint; - -} __attribute__ ((packed)) CdcAuddDriverConfigurationDescriptors; - - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -extern void CDCAUDDDriver_Initialize(const USBDDriverDescriptors * pDescriptors); -extern void CDCAUDDDriver_ConfigurationChangedHandler(uint8_t cfgnum); -extern void CDCAUDDDriver_InterfaceSettingChangedHandler( - uint8_t interface, uint8_t setting); -extern void CDCAUDDDriver_RequestHandler(const USBGenericRequest *request); - -/**@}*/ -#endif //#ifndef CDCHIDDDRIVER_H - diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCDSerial.h b/firmware/atmel_softpack_libraries/usb/include/CDCDSerial.h deleted file mode 100644 index 4d1656c0..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCDSerial.h +++ /dev/null @@ -1,106 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Single CDC Serial Port Function for USB device & composite driver. - */ - -#ifndef CDCDSERIAL_H -#define CDCDSERIAL_H - -/** \addtogroup usbd_cdc - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 - by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void CDCDSerial_Initialize( - USBDDriver * pUsbd, uint8_t bInterfaceNb); - -extern uint32_t CDCDSerial_RequestHandler( - const USBGenericRequest *request); - -extern void CDCDSerial_ConfigureFunction( - USBGenericDescriptor * pDescriptors, uint16_t wLength); - -extern uint32_t CDCDSerial_Write( - void *data, - uint32_t size, - TransferCallback callback, - void *argument); - -extern uint32_t CDCDSerial_Read( - void *data, - uint32_t size, - TransferCallback callback, - void *argument); - -extern void CDCDSerial_GetLineCoding(CDCLineCoding * pLineCoding); - -extern uint8_t CDCDSerial_GetControlLineState(void); - -extern uint16_t CDCDSerial_GetSerialState(void); - -extern void CDCDSerial_SetSerialState(uint16_t serialState); - -extern uint8_t CDCDSerial_LineCodingIsToChange( - CDCLineCoding * pLineCoding); - -extern void CDCDSerial_ControlLineStateChanged( - uint8_t DTR,uint8_t RTS); - -/**@}*/ - -#endif /*#ifndef CDCSERIAL_H*/ - diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCDSerialDriver.h b/firmware/atmel_softpack_libraries/usb/include/CDCDSerialDriver.h deleted file mode 100644 index 41e0fda3..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCDSerialDriver.h +++ /dev/null @@ -1,245 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definition of a class for implementing a USB device CDC serial driver. - * - * \section Usage - * - * -# Re-implement the USBDCallbacks_RequestReceived method to pass - * received requests to CDCDSerialDriver_RequestHandler. *This is - * automatically done unless the NOAUTOCALLBACK symbol is defined*. - * -# Initialize the CDC serial and USB drivers using - * CDCDSerialDriver_Initialize. - * -# Logically connect the device to the host using USBD_Connect. - * -# Send serial data to the USB host using CDCDSerialDriver_Write. - * -# Receive serial data from the USB host using CDCDSerialDriver_Read. - */ - -#ifndef CDCDSERIALDRIVER_H -#define CDCDSERIALDRIVER_H - -/** \addtogroup usbd_cdc - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 - by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include -#include -#include -#include - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_cdc_if USB Device CDC Serial Interface IDs - * @{ - */ -/** Communication Class Interface ID */ -#define CDCDSerialDriver_CC_INTERFACE 0 -/** Data Class Interface ID */ -#define CDCDSerialDriver_DC_INTERFACE 1 -/** @}*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** - * \typedef CDCDSerialDriverConfigurationDescriptors - * \brief Configuration descriptor list for a device implementing a - * CDC serial driver. - */ -typedef struct _CDCDSerialDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - /** Communication interface descriptor. */ - USBInterfaceDescriptor communication; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor header; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor callManagement; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor abstractControlManagement; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor union1; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor notification; - /** Data interface descriptor. */ - USBInterfaceDescriptor data; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor dataOut; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor dataIn; - -} __attribute__ ((packed)) CDCDSerialDriverConfigurationDescriptors; - -/** - * \typedef CDCDSerialDriverConfigurationDescriptorsOTG - * \brief Configuration descriptor list for a device implementing a - * CDC serial OTG driver. - */ -typedef struct _CDCDSerialDriverConfigurationDescriptorsOTG { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - /* OTG descriptor */ - USBOtgDescriptor otgDescriptor; - /** Communication interface descriptor. */ - USBInterfaceDescriptor communication; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor header; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor callManagement; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor abstractControlManagement; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor union1; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor notification; - /** Data interface descriptor. */ - USBInterfaceDescriptor data; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor dataOut; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor dataIn; - -} __attribute__ ((packed)) CDCDSerialDriverConfigurationDescriptorsOTG; - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void CDCDSerialDriver_Initialize( - const USBDDriverDescriptors *pDescriptors); - -extern void CDCDSerialDriver_ConfigurationChangedHandler(uint8_t cfgnum); - -extern void CDCDSerialDriver_RequestHandler( - const USBGenericRequest *request); - -extern uint8_t CDCDSerialDriver_LineCodingIsToChange( - CDCLineCoding * pLineCoding); - -extern void CDCDSerialDriver_ControlLineStateChanged( - uint8_t DTR,uint8_t RTS); - -/** - * Sends a data buffer through the virtual COM port created by the CDC - * device serial driver. This function behaves exactly like USBD_Write. - * \param data Pointer to the data buffer to send. - * \param size Size of the data buffer in bytes. - * \param callback Optional callback function to invoke when the transfer - * finishes. - * \param argument Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -static inline uint32_t CDCDSerialDriver_Write( - void *data, - uint32_t size, - TransferCallback callback, - void *argument) -{ - return CDCDSerial_Write(data, size, callback, argument); -} - -/** - * Receives data from the host through the virtual COM port created by - * the CDC device serial driver. This function behaves like USBD_Read. - * \param data Pointer to the data buffer to put received data. - * \param size Size of the data buffer in bytes. - * \param callback Optional callback function to invoke when the transfer - * finishes. - * \param argument Optional argument to the callback function. - * \return USBD_STATUS_SUCCESS if the read operation has been started normally; - * otherwise, the corresponding error code. - */ -static inline uint32_t CDCDSerialDriver_Read( - void *data, - uint32_t size, - TransferCallback callback, - void *argument) -{ - return CDCDSerial_Read(data, size, callback, argument); -} - -/** - * Copy current line coding settings to pointered space. - * \param pLineCoding Pointer to CDCLineCoding instance. - */ -static inline void CDCDSerialDriver_GetLineCoding(CDCLineCoding * pLineCoding) -{ - CDCDSerial_GetLineCoding(pLineCoding); -} - -/** - * Returns the current control line state of the RS-232 line. - */ -static inline uint8_t CDCDSerialDriver_GetControlLineState(void) -{ - return CDCDSerial_GetControlLineState(); -} - -/** - * Returns the current status of the RS-232 line. - */ -static inline uint16_t CDCDSerialDriver_GetSerialState(void) -{ - return CDCDSerial_GetSerialState(); -} - -/** - * Sets the current serial state of the device to the given value. - * \param serialState New device state. - */ -static inline void CDCDSerialDriver_SetSerialState(uint16_t serialState) -{ - CDCDSerial_SetSerialState(serialState); -} - -/**@}*/ - -#endif /*#ifndef CDCSERIALDRIVER_H*/ - diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCDSerialPort.h b/firmware/atmel_softpack_libraries/usb/include/CDCDSerialPort.h deleted file mode 100644 index 6a6f2ea1..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCDSerialPort.h +++ /dev/null @@ -1,167 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Definition of a class for implementing a USB device - * CDC serial port function. - */ - -#ifndef _CDCDSERIALPORT_H_ -#define _CDCDSERIALPORT_H_ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -/* These headers were introduced in C99 - by working group ISO/IEC JTC1/SC22/WG14. */ -#include - -#include -#include -#include -#include -#include -/** \addtogroup usbd_cdc - *@{ - */ - -/*------------------------------------------------------------------------------ - * Defines - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_cdc_serial_desc USB Device Serial Port Descriptor Values - * @{ - */ -/** Default CDC interrupt endpoints max packat size (8). */ -#define CDCDSerialPort_INTERRUPT_MAXPACKETSIZE 8 -/** Default CDC interrupt endpoint polling rate of High Speed (16ms). */ -#define CDCDSerialPort_INTERRUPT_INTERVAL_HS 8 -/** Default CDC interrupt endpoint polling rate of Full Speed (16ms). */ -#define CDCDSerialPort_INTERRUPT_INTERVAL_FS 16 -/** Default CDC bulk endpoints max packat size (512, for HS actually). */ -#define CDCDSerialPort_BULK_MAXPACKETSIZE_HS 512 -/** Default CDC bulk endpoints max packat size (64, for FS actually). */ -#define CDCDSerialPort_BULK_MAXPACKETSIZE_FS 64 -/** @}*/ - -/** \addtogroup usbd_cdc_serial_events USB Device Serial Port Events - * @{ - */ -/** SetControlLineState event, value is changed */ -#define CDCDSerialPortEvent_SETCONTROLLINESTATE 0 -/** SetLineCoding event, value is to changed according to return value */ -#define CDCDSerialPortEvent_SETLINECODING 1 -/** @}*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** Callback function for serial port events */ -typedef uint32_t (*CDCDSerialPortEventHandler)(uint32_t dwEvent, - uint32_t dwParam, - void * pArguments); - -/** - * Struct for USB CDC virtual COM serial port function. - */ -typedef struct _CDCDSerialPort { - /** USB Driver for the %device */ - USBDDriver *pUsbd; - /** Callback for serial port events */ - CDCDSerialPortEventHandler fEventHandler; - /** Callback arguments */ - void *pArg; - /** USB starting interface index */ - uint8_t bInterfaceNdx; - /** USB number of interfaces */ - uint8_t bNumInterface; - /** USB interrupt IN endpoint address */ - uint8_t bIntInPIPE; - /** USB bulk IN endpoint address */ - uint8_t bBulkInPIPE; - /** USB bulk OUT endpoint address */ - uint8_t bBulkOutPIPE; - - /** Serial port ControlLineState */ - uint8_t bControlLineState; - /** Serial port SerialState */ - uint16_t wSerialState; - /** Serial port linecoding */ - CDCLineCoding lineCoding; - - uint8_t bReserved; -} CDCDSerialPort; - -/*------------------------------------------------------------------------------ - * Functions - *------------------------------------------------------------------------------*/ - -extern void CDCDSerialPort_Initialize(CDCDSerialPort *pCdcd, - USBDDriver *pUsbd, - CDCDSerialPortEventHandler fCallback, - void *pArg, - uint8_t firstInterface, - uint8_t numInterface); - -extern USBGenericDescriptor * CDCDSerialPort_ParseInterfaces( - CDCDSerialPort * pCdcd, - USBGenericDescriptor * pDescriptors, uint32_t dwLength); - -extern uint32_t CDCDSerialPort_RequestHandler( - CDCDSerialPort *pCdcd, - const USBGenericRequest *pRequest); - -extern uint32_t CDCDSerialPort_Write( - const CDCDSerialPort *pCdcd, - void *pData, uint32_t dwSize, - TransferCallback fCallback, void* pArg); - -extern uint32_t CDCDSerialPort_Read( - const CDCDSerialPort *pCdcd, - void *pData, uint32_t dwSize, - TransferCallback fCallback, void* pArg); - -extern uint16_t CDCDSerialPort_GetSerialState( - const CDCDSerialPort *pCdcd); - -extern void CDCDSerialPort_SetSerialState( - CDCDSerialPort *pCdcd, - uint16_t wSerialState); - -extern uint8_t CDCDSerialPort_GetControlLineState( - const CDCDSerialPort * pCdcd); - -extern void CDCDSerialPort_GetLineCoding( - const CDCDSerialPort * pCdcd, - CDCLineCoding * pLineCoding); - -/**@}*/ -#endif /* #ifndef _CDCDSERIALPORT_H_ */ diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCDescriptors.h b/firmware/atmel_softpack_libraries/usb/include/CDCDescriptors.h deleted file mode 100644 index b4719b8a..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCDescriptors.h +++ /dev/null @@ -1,275 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * Definitions and classes for USB CDC class descriptors. - */ - -#ifndef _CDCDESCRIPTORS_H_ -#define _CDCDESCRIPTORS_H_ -/** \addtogroup usb_cdc - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_cdc_ver USB CDC Specification Release Numbers - * @{ - * This section list the CDC Spec. Release Numbers. - * - \ref CDCGenericDescriptor_CDC1_10 - */ - -/** Identify CDC specification version 1.10. */ -#define CDCGenericDescriptor_CDC1_10 0x0110 -/** @}*/ - -/** \addtogroup usb_cdc_desc_type CDC Descriptro Types - * @{ - * This section lists CDC descriptor types. - * - \ref CDCGenericDescriptor_INTERFACE - * - \ref CDCGenericDescriptor_ENDPOINT - */ -/**Indicates that a CDC descriptor applies to an interface. */ -#define CDCGenericDescriptor_INTERFACE 0x24 -/** Indicates that a CDC descriptor applies to an endpoint. */ -#define CDCGenericDescriptor_ENDPOINT 0x25 -/** @}*/ - -/** \addtogroup usb_cdc_desc_subtype CDC Descriptor Subtypes - * @{ - * This section lists CDC descriptor sub types - * - \ref CDCGenericDescriptor_HEADER - * - \ref CDCGenericDescriptor_CALLMANAGEMENT - * - \ref CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT - * - \ref CDCGenericDescriptor_UNION - */ - -/** Header functional descriptor subtype. */ -#define CDCGenericDescriptor_HEADER 0x00 -/** Call management functional descriptor subtype. */ -#define CDCGenericDescriptor_CALLMANAGEMENT 0x01 -/** Abstract control management descriptor subtype. */ -#define CDCGenericDescriptor_ABSTRACTCONTROLMANAGEMENT 0x02 -/** Union descriptor subtype. */ -#define CDCGenericDescriptor_UNION 0x06 -/** @}*/ - -/** \addtogroup usb_cdc_descriptor USB CDC Device Descriptor Values - * @{ - * This section lists the values for CDC Device Descriptor. - * - \ref CDCDeviceDescriptor_CLASS - * - \ref CDCDeviceDescriptor_SUBCLASS - * - \ref CDCDeviceDescriptor_PROTOCOL - */ -/** Device class code when using the CDC class. */ -#define CDCDeviceDescriptor_CLASS 0x02 -/** Device subclass code when using the CDC class. */ -#define CDCDeviceDescriptor_SUBCLASS 0x00 -/** Device protocol code when using the CDC class. */ -#define CDCDeviceDescriptor_PROTOCOL 0x00 -/** @}*/ - -/** \addtogroup usb_cdc_if_desc USB CDC Communication Interface Descriptor - * @{ - * This section lists the values for CDC Communication Interface Descriptor. - * - \ref CDCCommunicationInterfaceDescriptor_CLASS - * - \ref CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL - * - \ref CDCCommunicationInterfaceDescriptor_NOPROTOCOL - */ -/** Interface class code for a CDC communication class interface. */ -#define CDCCommunicationInterfaceDescriptor_CLASS 0x02 -/** Interface subclass code for an Abstract Control Model interface descriptor. - */ -#define CDCCommunicationInterfaceDescriptor_ABSTRACTCONTROLMODEL 0x02 -/** Interface protocol code when a CDC communication interface does not - implemenent any particular protocol. */ -#define CDCCommunicationInterfaceDescriptor_NOPROTOCOL 0x00 -/** @}*/ - -/** \addtogroup usb_cdc_data_if USB CDC Data Interface Values - * @{ - * This section lists the values for CDC Data Interface Descriptor. - * - \ref CDCDataInterfaceDescriptor_CLASS - * - \ref CDCDataInterfaceDescriptor_SUBCLASS - * - \ref CDCDataInterfaceDescriptor_NOPROTOCOL - */ - -/** Interface class code for a data class interface. */ -#define CDCDataInterfaceDescriptor_CLASS 0x0A -/** Interface subclass code for a data class interface. */ -#define CDCDataInterfaceDescriptor_SUBCLASS 0x00 -/** Protocol code for a data class interface which does not implement any - particular protocol. */ -#define CDCDataInterfaceDescriptor_NOPROTOCOL 0x00 -/** @}*/ - -/** \addtogroup usb_cdc_cb_man_desc USB CDC CallManagement Capabilities - * @{ - * This section lists CDC CallManagement Capabilities. - * - \ref CDCCallManagementDescriptor_SELFCALLMANAGEMENT - * - \ref CDCCallManagementDescriptor_DATACALLMANAGEMENT - */ -/** Device handles call management itself. */ -#define CDCCallManagementDescriptor_SELFCALLMANAGEMENT (1 << 0) -/** Device can exchange call management information over a Data class interface. - */ -#define CDCCallManagementDescriptor_DATACALLMANAGEMENT (1 << 1) -/** @}*/ - -/** \addtogroup usb_cdc_acm USB CDC ACM Capabilities - * @{ - * - * This section lists the capabilities of the CDC ACM. - * - \ref CDCAbstractControlManagementDescriptor_COMMFEATURE - * - \ref CDCAbstractControlManagementDescriptor_LINE - * - \ref CDCAbstractControlManagementDescriptor_SENDBREAK - * - \ref CDCAbstractControlManagementDescriptor_NETWORKCONNECTION - */ - -/** Device supports the request combination of SetCommFeature, ClearCommFeature - and GetCommFeature. */ -#define CDCAbstractControlManagementDescriptor_COMMFEATURE (1 << 0) -/** Device supports the request combination of SetLineCoding, GetLineCoding and - SetControlLineState. */ -#define CDCAbstractControlManagementDescriptor_LINE (1 << 1) -/** Device supports the SendBreak request. */ -#define CDCAbstractControlManagementDescriptor_SENDBREAK (1 << 2) -/** Device supports the NetworkConnection notification. */ -#define CDCAbstractControlManagementDescriptor_NETWORKCONNECTION (1 << 3) -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef CDCHeaderDescriptor - * \brief Marks the beginning of the concatenated set of functional descriptors - * for the interface. - */ -typedef struct _CDCHeaderDescriptor { - - /** Size of this descriptor in bytes. */ - uint8_t bFunctionLength; - /** Descriptor type . */ - uint8_t bDescriptorType; - /** Descriptor sub-type . */ - uint8_t bDescriptorSubtype; - /** USB CDC specification release number. */ - uint16_t bcdCDC; - -} __attribute__ ((packed)) CDCHeaderDescriptor; /* GCC */ - -/** - * \typedef CDCUnionDescriptor - * \brief Describes the relationship between a group of interfaces that can - * be considered to form a functional unit. - */ -typedef struct _CDCUnionDescriptor { - - /** Size of the descriptor in bytes. */ - uint8_t bFunctionLength; - /** Descriptor type . */ - uint8_t bDescriptorType; - /** Descriptor subtype . */ - uint8_t bDescriptorSubtype; - /** Number of the master interface for this union. */ - uint8_t bMasterInterface; - /** Number of the first slave interface for this union. */ - uint8_t bSlaveInterface0; - -} __attribute__ ((packed)) CDCUnionDescriptor; /* GCC */ - -/** - * \typedef CDCCallManagementDescriptor - * \brief Describes the processing of calls for the communication class - * interface. - */ -typedef struct _CDCCallManagementDescriptor { - - /** Size of this descriptor in bytes. */ - uint8_t bFunctionLength; - /** Descriptor type . */ - uint8_t bDescriptorType; - /** Descriptor sub-type . */ - uint8_t bDescriptorSubtype; - /** Configuration capabilities - \sa usb_cdc_cb_man_desc CDC CallManagement Capabilities. */ - uint8_t bmCapabilities; - /** Interface number of the data class interface used for call management - (optional). */ - uint8_t bDataInterface; - -} __attribute__ ((packed)) CDCCallManagementDescriptor; /* GCC */ - -/** - * \typedef CDCAbstractControlManagementDescriptor - * \brief Describes the command supported by the communication interface class - * with the Abstract Control Model subclass code. - */ -typedef struct _CDCAbstractControlManagementDescriptor { - - /** Size of this descriptor in bytes. */ - uint8_t bFunctionLength; - /** Descriptor type . */ - uint8_t bDescriptorType; - /** Descriptor subtype . */ - uint8_t bDescriptorSubtype; - /** Configuration capabilities. - \sa usb_cdc_acm CDC ACM Capabilities. */ - uint8_t bmCapabilities; - -} __attribute__ ((packed)) CDCAbstractControlManagementDescriptor; /* GCC */ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - - -/**@}*/ -#endif /* #ifndef _CDCDESCRIPTORS_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCHIDDDriver.h b/firmware/atmel_softpack_libraries/usb/include/CDCHIDDDriver.h deleted file mode 100644 index b0026111..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCHIDDDriver.h +++ /dev/null @@ -1,152 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definitions and methods for USB composite device implement. - * - * \section Usage - * - * -# Initialize USB function specified driver ( for MSD currently ) - * - MSDDFunctionDriver_Initialize() - * - * -# Initialize USB composite driver and USB driver - * - CDCHIDDDriver_Initialize() - * - * -# Handle and dispach USB requests - * - CDCHIDDDriver_RequestHandler() - * - * -# Try starting a remote wake-up sequence - * - CDCHIDDDriver_RemoteWakeUp() - */ - -#ifndef CDCHIDDDRIVER_H -#define CDCHIDDDRIVER_H -/** \addtogroup usbd_cdc_hid - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Definitions - *---------------------------------------------------------------------------*/ - -/** \addtogroup usbd_cdc_hid_desc USB CDC(Serial) + HID(Kbd) Descriptors define - * @{ - */ -/** Number of interfaces of the device */ -#define CDCHIDDDriverDescriptors_NUMINTERFACE 3 -/** Number of the CDC interface. */ -#define CDCHIDDDriverDescriptors_CDC_INTERFACE 0 -/** Number of the HID interface. */ -#define CDCHIDDDriverDescriptors_HID_INTERFACE 2 -/** @}*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef CdcHidDriverConfigurationDescriptors - * \brief Configuration descriptor list for a device implementing a - * composite driver. - */ -typedef struct _CdcHidDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - - /* --- CDC 0 */ - /** IAD 0 */ - USBInterfaceAssociationDescriptor cdcIAD0; - /** Communication interface descriptor */ - USBInterfaceDescriptor cdcCommunication0; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor cdcHeader0; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor cdcCallManagement0; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor cdcUnion0; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor cdcNotification0; - /** Data interface descriptor. */ - USBInterfaceDescriptor cdcData0; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor cdcDataOut0; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor cdcDataIn0; - - /* --- HID */ - USBInterfaceDescriptor hidInterface; - HIDDescriptor1 hid; - USBEndpointDescriptor hidInterruptIn; - USBEndpointDescriptor hidInterruptOut; - -} __attribute__ ((packed)) CdcHidDriverConfigurationDescriptors; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/* -CDCHID */ -extern void CDCHIDDDriver_Initialize( - const USBDDriverDescriptors * pDescriptors); - -extern void CDCHIDDDriver_ConfigurationChangedHandler(uint8_t cfgnum); - -extern void CDCHIDDDriver_RequestHandler(const USBGenericRequest *request); - -extern void CDCHIDDDriver_RemoteWakeUp(void); - -/**@}*/ -#endif //#ifndef CDCHIDDDRIVER_H - diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCMSDDriver.h b/firmware/atmel_softpack_libraries/usb/include/CDCMSDDriver.h deleted file mode 100644 index 6f01f1ab..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCMSDDriver.h +++ /dev/null @@ -1,155 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definitions and methods for USB CDCMSD device implement. - * - * \section Usage - * - * -# Initialize USB function specified driver ( for MSD currently ) - * - MSDDFunctionDriver_Initialize - * - * -# Initialize USB CDCMSD driver and USB driver - * - CDCMSDDDriver_Initialize - * - * -# Handle and dispach USB requests - * - CDCMSDDDriver_RequestHandler - * - * -# Try starting a remote wake-up sequence - * - CDCMSDDDriver_RemoteWakeUp - */ - -#ifndef CDCMSDDDRIVER_H -#define CDCMSDDDRIVER_H -/** \addtogroup usbd_composite_cdcmsd - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Consts - *---------------------------------------------------------------------------*/ - -/** \addtogroup usbd_cdc_msd_desc USB CDC(Serial) + MS Descriptors define - * @{ - */ -/** Number of interfaces of the device */ -#define CDCMSDDriverDescriptors_NUMINTERFACE 3 -/** Number of the CDC interface. */ -#define CDCMSDDriverDescriptors_CDC_INTERFACE 0 -/** Number of the HID interface. */ -#define CDCMSDDriverDescriptors_MSD_INTERFACE 2 -/** @}*/ - - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef CDCMSDDriverConfigurationDescriptors - * \brief Configuration descriptor list for a device implementing - * a CDCMSD driver. - */ -typedef struct _CDCMSDDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - - /* --- CDC 0 */ - /** IAD 0 */ - USBInterfaceAssociationDescriptor cdcIAD0; - /** Communication interface descriptor */ - USBInterfaceDescriptor cdcCommunication0; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor cdcHeader0; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor cdcCallManagement0; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor cdcUnion0; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor cdcNotification0; - /** Data interface descriptor. */ - USBInterfaceDescriptor cdcData0; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor cdcDataOut0; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor cdcDataIn0; - - /* --- MSD */ - /** Mass storage interface descriptor. */ - USBInterfaceDescriptor msdInterface; - /** Bulk-out endpoint descriptor. */ - USBEndpointDescriptor msdBulkOut; - /** Bulk-in endpoint descriptor. */ - USBEndpointDescriptor msdBulkIn; - -} __attribute__ ((packed)) CDCMSDDriverConfigurationDescriptors; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/* -CDCMSD */ -extern void CDCMSDDriver_Initialize( - const USBDDriverDescriptors *pDescriptors, - MSDLun *pLuns, unsigned char numLuns); - -extern void CDCMSDDriver_ConfigurationChangedHandler(unsigned char cfgnum); - -extern void CDCMSDDriver_RequestHandler(const USBGenericRequest *request); - -/**@}*/ -#endif /* #ifndef CDCMSDDDRIVER_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCNotifications.h b/firmware/atmel_softpack_libraries/usb/include/CDCNotifications.h deleted file mode 100644 index c37631cb..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCNotifications.h +++ /dev/null @@ -1,111 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Definitions and methods for USB CDC Notifications. - */ - -#ifndef _CDCNOTIFICATIONS_H_ -#define _CDCNOTIFICATIONS_H_ -/** \addtogroup usb_cdc - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup cdc_serial_states CDC SerialState bits - * @{ - * This page lists the bit map for CDC Serial States. - * - * - \ref CDCSerialState_RXDRIVER - * - \ref CDCSerialState_TXCARRIER - * - \ref CDCSerialState_BREAK - * - \ref CDCSerialState_RINGSIGNAL - * - \ref CDCSerialState_FRAMING - * - \ref CDCSerialState_PARITY - * - \ref CDCSerialState_OVERRUN - */ - -/** Indicates the receiver carrier signal is present */ -#define CDCSerialState_RXDRIVER (1 << 0) -/** Indicates the transmission carrier signal is present */ -#define CDCSerialState_TXCARRIER (1 << 1) -/** Indicates a break has been detected */ -#define CDCSerialState_BREAK (1 << 2) -/** Indicates a ring signal has been detected */ -#define CDCSerialState_RINGSIGNAL (1 << 3) -/** Indicates a framing error has occured */ -#define CDCSerialState_FRAMING (1 << 4) -/** Indicates a parity error has occured */ -#define CDCSerialState_PARITY (1 << 5) -/** Indicates a data overrun error has occured */ -#define CDCSerialState_OVERRUN (1 << 6) -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** USB CDC SerialState struct (bitmap) */ -typedef struct _CDCSerialState { - uint16_t bRxCarrier:1, /**< State of receive carrier detection (V2.4 signal - 109 and RS-232 signal DCD) */ - bTxCarrier:1, /**< State of transmission carrier */ - bBreak:1, /**< State of break detection */ - bRingSignal:1, /**< State of ring signal */ - bFraming:1, /**< Framing error */ - bParity:1, /**< Parity error */ - bOverRun:1, /**< Received data discarded due to overrun error */ - reserved:9; /**< Reserved */ -} __attribute__ ((packed)) CDCSerialState; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - -/**@}*/ -#endif /* #ifndef _CDCNOTIFICATIONS_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/CDCRequests.h b/firmware/atmel_softpack_libraries/usb/include/CDCRequests.h deleted file mode 100644 index eb30b999..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/CDCRequests.h +++ /dev/null @@ -1,182 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * Definitions and classes for USB CDC class requests - * (mostly for ACM). - * - * \section CDCLineCoding - * - * -# Initialize a CDCLineCoding instance using CDCLineCoding_Initialize. - * -# Send a CDCLineCoding object to the host in response to a GetLineCoding - * request. - * -# Receive a CDCLineCoding object from the host after a SetLineCoding - * request. - * - */ - -#ifndef _CDCREQUESTS_H_ -#define _CDCREQUESTS_H_ -/** \addtogroup usb_cdc - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_cdc_request USB CDC Request Codes - * @{ - * This section lists USB CDC Request Codes. - * - \ref CDCGenericRequest_SETLINECODING - * - \ref CDCGenericRequest_GETLINECODING - * - \ref CDCGenericRequest_SETCONTROLLINESTATE - */ - -/** SetLineCoding request code. */ -#define CDCGenericRequest_SETLINECODING 0x20 -/** GetLineCoding request code. */ -#define CDCGenericRequest_GETLINECODING 0x21 -/** SetControlLineState request code. */ -#define CDCGenericRequest_SETCONTROLLINESTATE 0x22 -/** @}*/ - -/** \addtogroup usb_cdc_ctrl_line_state USB CDC ControlLineState bitmap - * @{ - * This section lists CDC ControlLineState bitmap. - * - \ref CDCControlLineState_DTR, CDCControlLineState_DTE_PRESENT - * - \ref CDCControlLineState_RTS, CDCControlLineState_CARRIER_ON - */ -/** Indicates to DCE if DTE is present or not. */ -#define CDCControlLineState_DTE_PRESENT (1 << 0) -/** RS232 signal DTR: Data Terminal Ready. */ -#define CDCControlLineState_DTR (1 << 0) -/** Carrier control for half duplex modems. */ -#define CDCControlLineState_CARRIER_ON (1 << 1) -/** RS232 signal RTS: Request to send. */ -#define CDCControlLineState_RTS (1 << 1) -/** @}*/ - -/** \addtogroup usb_cdc_stop USB CDC LineCoding StopBits - * @{ - * This section lists Stop Bits for CDC Line Coding. - * - \ref CDCLineCoding_ONESTOPBIT - * - \ref CDCLineCoding_ONE5STOPBIT - * - \ref CDCLineCoding_TWOSTOPBITS - */ -/** The transmission protocol uses one stop bit. */ -#define CDCLineCoding_ONESTOPBIT 0 -/** The transmission protocol uses 1.5 stop bit. */ -#define CDCLineCoding_ONE5STOPBIT 1 -/** The transmissin protocol uses two stop bits. */ -#define CDCLineCoding_TWOSTOPBITS 2 -/** @}*/ - -/** \addtogroup usb_cdc_parity USB CDC LineCoding ParityCheckings - * @{ - * This section lists Parity checkings for CDC Line Coding. - * - \ref CDCLineCoding_NOPARITY - * - \ref CDCLineCoding_ODDPARITY - * - \ref CDCLineCoding_EVENPARITY - * - \ref CDCLineCoding_MARKPARITY - * - \ref CDCLineCoding_SPACEPARITY - */ -/** No parity checking. */ -#define CDCLineCoding_NOPARITY 0 -/** Odd parity checking. */ -#define CDCLineCoding_ODDPARITY 1 -/** Even parity checking. */ -#define CDCLineCoding_EVENPARITY 2 -/** Mark parity checking. */ -#define CDCLineCoding_MARKPARITY 3 -/** Space parity checking. */ -#define CDCLineCoding_SPACEPARITY 4 -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef CDCLineCoding - * \brief Format of the data returned when a GetLineCoding request is received. - */ -typedef struct _CDCLineCoding { - - /** Data terminal rate in bits per second. */ - uint32_t dwDTERate; - /** Number of stop bits. - \sa usb_cdc_stop CDC LineCoding StopBits. */ - uint8_t bCharFormat; - /** Type of parity checking used. - \sa usb_cdc_parity CDC LineCoding ParityCheckings. */ - uint8_t bParityType; - /** Number of data bits (5, 6, 7, 8 or 16). */ - uint8_t bDataBits; - -} __attribute__ ((packed)) CDCLineCoding; /* GCC */ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - -extern uint8_t CDCSetControlLineStateRequest_IsDtePresent( - const USBGenericRequest *request); - -extern uint8_t CDCSetControlLineStateRequest_ActivateCarrier( - const USBGenericRequest *request); - -extern void CDCLineCoding_Initialize(CDCLineCoding *lineCoding, - uint32_t bitrate, - uint8_t stopbits, - uint8_t parity, - uint8_t databits); - - -/**@}*/ -#endif /* #define _CDCREQUESTS_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/DUALCDCDDriver.h b/firmware/atmel_softpack_libraries/usb/include/DUALCDCDDriver.h deleted file mode 100644 index 4478fbe9..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/DUALCDCDDriver.h +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definitions and methods for USB composite device implement. - * - */ - -#ifndef DUALCDCDDRIVER_H -#define DUALCDCDDRIVER_H -/** \addtogroup usbd_composite_cdccdc - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include -#include - -#include -#include - - -/*--------------------------------------------------------------------------- - * Defines - *---------------------------------------------------------------------------*/ - -/** \addtogroup usbd_composite_cdccdc_desc - * The driver uses these interface numbers in configuration descriptor. - * @{ - */ -/** Number of interfaces of the device */ -#define DUALCDCDDriverDescriptors_NUMINTERFACE 4 -/** Number of the CDC0 interface. */ -#define DUALCDCDDriverDescriptors_INTERFACENUM0 0 -/** Number of the CDC1 interface. */ -#define DUALCDCDDriverDescriptors_INTERFACENUM1 2 -/** @}*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef DualCdcDriverConfigurationDescriptors - * \brief Configuration descriptor list for a device implementing a - * dual CDC serial composite driver. - */ -typedef struct _DualCdcDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - - /* --- CDC 0 */ - /** IAD 0 */ - USBInterfaceAssociationDescriptor cdcIAD0; - /** Communication interface descriptor */ - USBInterfaceDescriptor cdcCommunication0; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor cdcHeader0; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor cdcCallManagement0; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor cdcAbstractControlManagement0; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor cdcUnion0; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor cdcNotification0; - /** Data interface descriptor. */ - USBInterfaceDescriptor cdcData0; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor cdcDataOut0; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor cdcDataIn0; - - /* --- CDC 1 */ - /** IAD 1 */ - USBInterfaceAssociationDescriptor cdcIAD1; - /** Communication interface descriptor */ - USBInterfaceDescriptor cdcCommunication1; - /** CDC header functional descriptor. */ - CDCHeaderDescriptor cdcHeader1; - /** CDC call management functional descriptor. */ - CDCCallManagementDescriptor cdcCallManagement1; - /** CDC abstract control management functional descriptor. */ - CDCAbstractControlManagementDescriptor cdcAbstractControlManagement1; - /** CDC union functional descriptor (with one slave interface). */ - CDCUnionDescriptor cdcUnion1; - /** Notification endpoint descriptor. */ - USBEndpointDescriptor cdcNotification1; - /** Data interface descriptor. */ - USBInterfaceDescriptor cdcData1; - /** Data OUT endpoint descriptor. */ - USBEndpointDescriptor cdcDataOut1; - /** Data IN endpoint descriptor. */ - USBEndpointDescriptor cdcDataIn1; - -} __attribute__ ((packed)) DualCdcDriverConfigurationDescriptors; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/* -DUALCDC */ -extern void DUALCDCDDriver_Initialize( - const USBDDriverDescriptors* pDescriptors); - -extern void DUALCDCDDriver_ConfigurationChangeHandler(uint8_t cfgnum); - -extern void DUALCDCDDriver_RequestHandler(const USBGenericRequest *request); - -extern CDCDSerialPort* DUALCDCDDriver_GetSerialPort(uint32_t port); - -/**@}*/ -#endif /* #ifndef DUALCDCDDRIVER_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDAUDDDriver.h b/firmware/atmel_softpack_libraries/usb/include/HIDAUDDDriver.h deleted file mode 100644 index d355e417..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDAUDDDriver.h +++ /dev/null @@ -1,191 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definitions and methods for USB composite device implement. - * - */ - -#ifndef HIDAUDDDRIVER_H -#define HIDAUDDDRIVER_H -/** \addtogroup usbd_hid_aud - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Definitions - *---------------------------------------------------------------------------*/ - -/** \addtogroup usbd_hid_aud_desc USB HID(Keyboard) + AUD(Speaker) Definitions - * @{ - */ -/** Number of interfaces of the device 1+2 */ -#define HIDAUDDDriverDescriptors_NUMINTERFACE 3 -/** Number of the CDC interface. */ -#define HIDAUDDDriverDescriptors_HID_INTERFACE 0 -/** Number of the Audio interface. */ -#define HIDAUDDDriverDescriptors_AUD_INTERFACE 1 -/** @}*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** Structure of audio header descriptor*/ -typedef struct _AUDHeaderDescriptor1{ - - /** Header descriptor.*/ - AUDHeaderDescriptor header; - /** Id of the first grouped interface.*/ - unsigned char bInterface0; - -} __attribute__ ((packed)) AUDHeaderDescriptor1; - -/** - * Feature unit descriptor with 3 channel controls (master, right, left). - */ -typedef struct _AUDFeatureUnitDescriptor3{ - - /** Feature unit descriptor.*/ - AUDFeatureUnitDescriptor feature; - /** Available controls for each channel.*/ - unsigned char bmaControls[3]; - /** Index of a string descriptor for the feature unit.*/ - unsigned char iFeature; - -} __attribute__ ((packed)) AUDFeatureUnitDescriptor3; - -/** - * List of descriptors for detailling the audio control interface of a - * device using a USB audio speaker driver. - */ -typedef struct _AUDDSpeakerDriverAudioControlDescriptors{ - - /** Header descriptor (with one slave interface).*/ - AUDHeaderDescriptor1 header; - /** Input terminal descriptor.*/ - AUDInputTerminalDescriptor input; - /** Output terminal descriptor.*/ - AUDOutputTerminalDescriptor output; - /** Feature unit descriptor.*/ - AUDFeatureUnitDescriptor3 feature; - -} __attribute__ ((packed)) AUDDSpeakerDriverAudioControlDescriptors; // GCC - -/** - * Format type I descriptor with one discrete sampling frequency. - */ -typedef struct _AUDFormatTypeOneDescriptor1{ - - /** Format type I descriptor.*/ - AUDFormatTypeOneDescriptor formatType; - /** Sampling frequency in Hz.*/ - unsigned char tSamFreq[3]; - -} __attribute__ ((packed)) AUDFormatTypeOneDescriptor1; // GCC - -/** - * \typedef CdcAudDriverConfigurationDescriptors - * \brief Configuration descriptor list for a device implementing a - * composite HID (Keyboard) + Audio (Speaker) driver. - */ -typedef struct _HidAuddDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - - /* --- HID */ - /** HID interface. */ - USBInterfaceDescriptor hidInterface; - /** HID descriptor */ - HIDDescriptor1 hid; - /** HID interrupt IN */ - USBEndpointDescriptor hidInterruptIn; - /** HID interrupt OUT */ - USBEndpointDescriptor hidInterruptOut; - - /* --- AUDIO (AC) */ - /** Audio IAD */ - USBInterfaceAssociationDescriptor audIAD; - /** Audio control interface.*/ - USBInterfaceDescriptor audInterface; - /** Descriptors for the audio control interface.*/ - AUDDSpeakerDriverAudioControlDescriptors audControl; - /* -- AUDIO out (AS) */ - /** Streaming out interface descriptor (with no endpoint, required).*/ - USBInterfaceDescriptor audStreamingOutNoIsochronous; - /** Streaming out interface descriptor.*/ - USBInterfaceDescriptor audStreamingOut; - /** Audio class descriptor for the streaming out interface.*/ - AUDStreamingInterfaceDescriptor audStreamingOutClass; - /** Stream format descriptor.*/ - AUDFormatTypeOneDescriptor1 audStreamingOutFormatType; - /** Streaming out endpoint descriptor.*/ - AUDEndpointDescriptor audStreamingOutEndpoint; - /** Audio class descriptor for the streaming out endpoint.*/ - AUDDataEndpointDescriptor audStreamingOutDataEndpoint; - -} __attribute__ ((packed)) HidAuddDriverConfigurationDescriptors; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -extern void HIDAUDDDriver_Initialize(const USBDDriverDescriptors * pDescriptors); -extern void HIDAUDDDriver_ConfigurationChangedHandler(uint8_t cfgnum); -extern void HIDAUDDDriver_InterfaceSettingChangedHandler( - uint8_t interface, uint8_t setting); -extern void HIDAUDDDriver_RequestHandler(const USBGenericRequest *request); - -/**@}*/ -#endif //#ifndef CDCHIDDDRIVER_H - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDDFunction.h b/firmware/atmel_softpack_libraries/usb/include/HIDDFunction.h deleted file mode 100644 index 8fa93243..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDDFunction.h +++ /dev/null @@ -1,210 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * - * Definitions used for general HID support. - * - * The HID Function supports following: - * - 1 interface with 1 pipe in and 1 pipe out; - * - An input report list; - * - An output report list; - * - handles requests: - * - handles: GET_IDLE/SET_IDLE, - * GET_REPORT/SET_REPORT, - * SET_PROTOCOL/GET_PROTOCOL; - * - stall : SET_DESCRIPTOR. - */ - -#ifndef _HIDDFUNCTION_H_ -#define _HIDDFUNCTION_H_ -/** \addtogroup usbd_hid - * @{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - -#include -#include - -#include -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usbd_hid_events HIDD Event codes - * @{ - */ -/** Report sent */ -#define HIDD_EC_REPORTSENT 1 -/** Report changed */ -#define HIDD_EC_REPORTCHANGED 2 -/** Report sent because of GET_REPORT Request */ -#define HIDD_EC_GETREPORT 3 -/** Report changed because of SET_REPORT Request */ -#define HIDD_EC_SETREPORT 4 -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** - * Callback function for HID report events. - */ -typedef void(*HIDDReportEventCallback)(uint32_t ec, void *pArg); - -/** - * Struct for a header of basic HID report descriptor. - */ -typedef struct _HIDDReportHeader { - /** Callback when report done */ - HIDDReportEventCallback fCallback; - /** Callback arguments */ - void* pArg; - - /** Report size (ID + DATA) */ - uint16_t wMaxSize; - /** Transfered size */ - uint16_t wTransferred; - /** Report idle rate */ - uint8_t bIdleRate; - /** Delay count for Idle */ - uint8_t bDelay; - /** Report ID */ - uint8_t bID; -} HIDDReportHeader; - -/** - * Struct for an basic HID report descriptor. - */ -typedef struct _HIDDReport { - /** Callback when report done */ - HIDDReportEventCallback fCallback; - /** Callback arguments */ - void* pArg; - - /** Report size (ID + DATA) */ - uint16_t wMaxSize; - /** Transfered size */ - uint16_t wTransferred; - /** Report idle rate */ - uint8_t bIdleRate; - /** Delay count for Idle */ - uint8_t bDelay; - /** Report ID */ - uint8_t bID; - /** Report data block start ... */ - uint8_t bData[1]; -} HIDDReport; - -/** - * Struct for an HID general function. - * Supports Input/Output reports. No feature report support. - */ -typedef struct _HIDDFunction { - /** USB Driver for the %device */ - USBDDriver *pUsbd; - /** HID descriptor */ - HIDDescriptor *pHidDescriptor; - /** HID Specific report descriptor */ - uint8_t *pReportDescriptor; - /** USB interface for HID function */ - uint8_t bInterface; - /** USB interrupt IN EP */ - uint8_t bPipeIN; - /** USB interrupt OUT EP */ - uint8_t bPipeOUT; - - /** HID Protocol */ - uint8_t bProtocol; - - /** HID Input reports list */ - HIDDReport **pInputList; - /** HID Output reports list */ - HIDDReport **pOutputList; - /** HID Input report list size */ - uint8_t bInputListSize; - /** Current input report */ - uint8_t bCurrInput; - /** HID Output reports list */ - uint8_t bOutputListSize; - /** Current output report */ - uint8_t bCurrOutput; -} HIDDFunction; - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - -extern void HIDDFunction_Initialize( - HIDDFunction * pHidd, - USBDDriver * pUsbd, uint8_t bInterfaceNb, - const uint8_t * pReportDescriptor, - HIDDReport * pInputList [ ], uint8_t bInputListSize, - HIDDReport * pOutputList [ ], uint8_t bOutputListSize); - -extern USBGenericDescriptor* HIDDFunction_ParseInterface( - HIDDFunction * pHidd, - USBGenericDescriptor * pDescriptors, - uint32_t dwLength); - -extern uint32_t HIDDFunction_RequestHandler( - HIDDFunction * pHidd, - const USBGenericRequest * request); - -extern uint32_t HIDDFunction_StartSendingInputs(HIDDFunction * pHidd); - -extern uint32_t HIDDFunction_StartPollingOutputs(HIDDFunction * pHidd); - -extern uint32_t HIDDFunction_Read( - const HIDDFunction * pHidd, - void * pData, uint32_t dwLength, - TransferCallback fCallback, void * pArg); - -extern uint32_t HIDDFunction_Write( - const HIDDFunction * pHidd, - void * pData, uint32_t dwLength, - TransferCallback fCallback, void * pArg); - -extern void HIDDFunction_InitializeReport( - HIDDReport * pReport, - uint16_t wSize, - uint8_t bID, - HIDDReportEventCallback fCallback, void* pArg); - -/**@}*/ -#endif /* #define _HIDDFUNCTION_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDDKeyboard.h b/firmware/atmel_softpack_libraries/usb/include/HIDDKeyboard.h deleted file mode 100644 index 26ca8087..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDDKeyboard.h +++ /dev/null @@ -1,216 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * Definition of methods for using a HID keyboard function. - */ - -#ifndef HIDDKEYBOARD_H -#define HIDDKEYBOARD_H - -/** \addtogroup usbd_hid_key - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "board.h" - -#include "USBDescriptors.h" -#include "USBRequests.h" - -#include "HIDDescriptors.h" -#include "USBDDriver.h" - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_hid_kbd_desc HIDD Keyboard Driver Definitions - * @{ - */ - -/** Maximum number of simultaneous key presses. */ -#define HIDDKeyboardInputReport_MAXKEYPRESSES 3 - -/** \addtogroup usbd_hid_kbd_keys HID Keypad keys - * @{ - * This page lists definition for HID keypad keys. - * - * \section Keys - * - HIDDKeyboardDescriptors_FIRSTMODIFIERKEY - * - HIDDKeyboardDescriptors_LASTMODIFIERKEY - * - HIDDKeyboardDescriptors_FIRSTSTANDARDKEY - * - HIDDKeyboardDescriptors_LASTSTANDARDKEY - */ -/** Key code of the first accepted modifier key */ -#define HIDDKeyboardDescriptors_FIRSTMODIFIERKEY HIDKeypad_LEFTCONTROL -/** Key code of the last accepted modifier key */ -#define HIDDKeyboardDescriptors_LASTMODIFIERKEY HIDKeypad_RIGHTGUI -/** Key code of the first accepted standard key */ -#define HIDDKeyboardDescriptors_FIRSTSTANDARDKEY 0 -/** Key code of the last accepted standard key */ -#define HIDDKeyboardDescriptors_LASTSTANDARDKEY HIDKeypad_NUMLOCK -/** @}*/ - -/** \addtogroup usbd_hid_kbd_polling HID Keyboard Default Polling Rates - * @{ - */ -/** Default HID interrupt IN endpoint polling rate FS (16ms). */ -#define HIDDKeyboardDescriptors_INTERRUPTIN_POLLING_FS 16 -/** Default HID interrupt IN endpoint polling rate HS (16ms). */ -#define HIDDKeyboardDescriptors_INTERRUPTIN_POLLING_HS 8 -/** Default interrupt OUT endpoint polling rate FS (16ms). */ -#define HIDDKeyboardDescriptors_INTERRUPTOUT_POLLING_FS 16 -/** Default interrupt OUT endpoint polling rate HS (16ms). */ -#define HIDDKeyboardDescriptors_INTERRUPTOUT_POLLING_HS 8 -/** @}*/ - -/** Size of the report descriptor in bytes */ -#define HIDDKeyboard_REPORTDESCRIPTORSIZE 61 - -/** @}*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef HIDDKeyboardOutputReport - * \brief HID output report structure used by the host to control the state of - * the keyboard LEDs. - * - * Only the first three bits are relevant, the other 5 are used as - * padding bits. - */ -typedef struct _HIDDKeyboardOutputReport { - - uint8_t numLockStatus:1, /** State of the num. lock LED. */ - capsLockStatus:1, /** State of the caps lock LED. */ - scrollLockStatus:1, /** State of the scroll lock LED. */ - padding:5; /** Padding bits. */ - -} __attribute__ ((packed)) HIDDKeyboardOutputReport; /* GCC */ - -/** - * \typedef HIDDKeyboardInputReport - * \brief HID input report structure used by the keyboard driver to notify the - * host of pressed keys. - * - * The first byte is used to report the state of modifier keys. The - * other three contains the keycodes of the currently pressed keys. - */ -typedef struct _HIDDKeyboardInputReport { - - /** State of modifier keys. */ - uint8_t bmModifierKeys:8; - /** Key codes of pressed keys. */ - uint8_t pressedKeys[HIDDKeyboardInputReport_MAXKEYPRESSES]; -} __attribute__ ((packed)) HIDDKeyboardInputReport; /* GCC */ - - -/** - * \typedef HIDDKeyboardDriverConfigurationDescriptors - * \brief List of descriptors that make up the configuration descriptors of a - * device using the HID keyboard driver. - */ -typedef struct _HIDDKeyboardDriverConfigurationDescriptors { - - /** Configuration descriptor. */ - USBConfigurationDescriptor configuration; - /** Interface descriptor. */ - USBInterfaceDescriptor interface; - /** HID descriptor. */ - HIDDescriptor1 hid; - /** Interrupt IN endpoint descriptor. */ - USBEndpointDescriptor interruptIn; - /** Interrupt OUT endpoint descriptor. */ - USBEndpointDescriptor interruptOut; - -} __attribute__ ((packed)) HIDDKeyboardDriverConfigurationDescriptors; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void HIDDKeyboard_Initialize(USBDDriver * pUsbd,uint8_t bInterfaceNb); - -extern void HIDDKeyboard_ConfigureFunction( USBGenericDescriptor * pDescriptors, uint16_t wLength); - -extern uint32_t HIDDKeyboard_RequestHandler( const USBGenericRequest *request); - -extern uint32_t HIDDKeyboard_ChangeKeys( - uint8_t *pressedKeys, - uint8_t pressedKeysSize, - uint8_t *releasedKeys, - uint8_t releasedKeysSize); - -extern void HIDDKeyboard_RemoteWakeUp(void); - -extern void HIDDKeyboardCallbacks_LedsChanged( - uint8_t numLockStatus, - uint8_t capsLockStatus, - uint8_t scrollLockStatus); - - -extern void HIDDKeyboardInputReport_Initialize(HIDDKeyboardInputReport *report); - -extern void HIDDKeyboardInputReport_PressStandardKey( HIDDKeyboardInputReport *report, uint8_t key ) ; - -extern void HIDDKeyboardInputReport_ReleaseStandardKey( HIDDKeyboardInputReport *report, uint8_t key ) ; - -extern void HIDDKeyboardInputReport_PressModifierKey( HIDDKeyboardInputReport *report, uint8_t key); - -extern void HIDDKeyboardInputReport_ReleaseModifierKey( HIDDKeyboardInputReport *report, uint8_t key); - - -extern void HIDDKeyboardOutputReport_Initialize( HIDDKeyboardOutputReport *report); - -extern uint8_t HIDDKeyboardOutputReport_GetNumLockStatus( const HIDDKeyboardOutputReport *report); - -extern uint8_t HIDDKeyboardOutputReport_GetCapsLockStatus( const HIDDKeyboardOutputReport *report); - -extern uint8_t HIDDKeyboardOutputReport_GetScrollLockStatus( const HIDDKeyboardOutputReport *report); - -/**@}*/ - -#endif /*#ifndef HIDDKEYBOARD_H*/ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDDKeyboardDriver.h b/firmware/atmel_softpack_libraries/usb/include/HIDDKeyboardDriver.h deleted file mode 100644 index e7fa5f49..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDDKeyboardDriver.h +++ /dev/null @@ -1,125 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Definition of methods for using a HID keyboard device driver. - * - * \section Usage - * - * -# Re-implement the USBDCallbacks_RequestReceived callback to forward - * requests to HIDDKeyboardDriver_RequestHandler. This is done - * automatically unless the NOAUTOCALLBACK symbol is defined during - * compilation. - * -# Initialize the driver using HIDDKeyboardDriver_Initialize. The - * USB driver is automatically initialized by this method. - * -# Call the HIDDKeyboardDriver_ChangeKeys method when one or more - * keys are pressed/released. - */ - -#ifndef HIDDKEYBOARDDRIVER_H -#define HIDDKEYBOARDDRIVER_H - -/** \addtogroup usbd_hid_key - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include - -#include - -#include - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void HIDDKeyboardDriver_Initialize( - const USBDDriverDescriptors *pDescriptors); - -extern void HIDDKeyboardDriver_ConfigurationChangedHandler( - uint8_t cfgnum); - -extern void HIDDKeyboardDriver_RequestHandler( - const USBGenericRequest *request); - -/** - * Reports a change in which keys are currently pressed or release to the - * host. - * - * \param pressedKeys Pointer to an array of key codes indicating keys that have - * been pressed since the last call to - * HIDDKeyboardDriver_ChangeKeys(). - * \param pressedKeysSize Number of key codes in the pressedKeys array. - * \param releasedKeys Pointer to an array of key codes indicates keys that have - * been released since the last call to - * HIDDKeyboardDriver_ChangeKeys(). - * \param releasedKeysSize Number of key codes in the releasedKeys array. - * \return USBD_STATUS_SUCCESS if the report has been sent to the host; - * otherwise an error code. - */ -static inline uint32_t HIDDKeyboardDriver_ChangeKeys( - uint8_t *pressedKeys, - uint8_t pressedKeysSize, - uint8_t *releasedKeys, - uint8_t releasedKeysSize){ - return HIDDKeyboard_ChangeKeys(pressedKeys, pressedKeysSize, - releasedKeys, releasedKeysSize); -} - -/** - * Starts a remote wake-up sequence if the host has explicitely enabled it - * by sending the appropriate SET_FEATURE request. - */ -static inline void HIDDKeyboardDriver_RemoteWakeUp(void) { - HIDDKeyboard_RemoteWakeUp(); -} - -/**@}*/ - -#endif /*#ifndef HIDDKEYBOARDDRIVER_H*/ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDDMouseDriver.h b/firmware/atmel_softpack_libraries/usb/include/HIDDMouseDriver.h deleted file mode 100644 index 546f8350..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDDMouseDriver.h +++ /dev/null @@ -1,151 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * - * \section Purpose - * - * Definition of methods for using a HID mouse device driver. - * - * \section Usage - * - * -# Re-implement the USBDCallbacks_RequestReceived callback to forward - * requests to HIDDMouseDriver_RequestHandler. This is done - * automatically unless the NOAUTOCALLBACK symbol is defined during - * compilation. - * -# Initialize the driver using HIDDMouseDriver_Initialize. The - * USB driver is automatically initialized by this method. - * -# Call the HIDDMouseDriver_ChangePoints method when one or more - * keys are pressed/released. - */ - -#ifndef HIDDKEYBOARDDRIVER_H -#define HIDDKEYBOARDDRIVER_H - -/** \addtogroup usbd_hid_mouse - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include -#include - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_hid_mouse_button_bitmaps HID Mouse Button bitmaps - * @{ - * \section Bits - * - HIDDMouse_LEFT_BUTTON - * - HIDDMouse_RIGHT_BUTTON - * - HIDDMouse_MIDDLE_BUTTON - */ - -/** Left mouse button */ -#define HIDDMouse_LEFT_BUTTON (1 << 0) -/** Right mouse button */ -#define HIDDMouse_RIGHT_BUTTON (1 << 1) -/** Middle mouse button */ -#define HIDDMouse_MIDDLE_BUTTON (1 << 2) -/** @}*/ - -/** Size of the report descriptor in bytes. */ -#define HIDDMouseDriver_REPORTDESCRIPTORSIZE 50 - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef HIDDMouseDriverConfigurationDescriptors - * \brief List of descriptors that make up the configuration descriptors of a - * device using the HID Mouse driver. - */ -typedef struct _HIDDMouseDriverConfigurationDescriptors { - - /** Configuration descriptor. */ - USBConfigurationDescriptor configuration; - /** Interface descriptor. */ - USBInterfaceDescriptor interface; - /** HID descriptor. */ - HIDDescriptor1 hid; - /** Interrupt IN endpoint descriptor. */ - USBEndpointDescriptor interruptIn; - -} __attribute__ ((packed)) HIDDMouseDriverConfigurationDescriptors; - -/** - * \typedef HIDDMouseInputReport - * \brief HID input report data struct used by the Mouse driver to notify the - * host of pressed keys. - */ -typedef struct _HIDDMouseInputReport { - - uint8_t bmButtons; /**< Bitmap state of three mouse buttons. */ - int8_t bX; /**< Pointer displacement along the X axis. */ - int8_t bY; /**< Pointer displacement along the Y axis. */ -} __attribute__ ((packed)) HIDDMouseInputReport; /* GCC */ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void HIDDMouseDriver_Initialize(const USBDDriverDescriptors *pDescriptors); - -extern void HIDDMouseDriver_ConfigurationChangedHandler(uint8_t cfgnum); - -extern void HIDDMouseDriver_RequestHandler(const USBGenericRequest *request); - -extern uint8_t HIDDMouseDriver_ChangePoints(uint8_t bmButtons, - int8_t deltaX, - int8_t deltaY); - -extern void HIDDMouseDriver_RemoteWakeUp(void); - -/**@}*/ - -#endif /*#ifndef HIDDKEYBOARDDRIVER_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDDTransferDriver.h b/firmware/atmel_softpack_libraries/usb/include/HIDDTransferDriver.h deleted file mode 100644 index 76dcdff1..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDDTransferDriver.h +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - *\file - * - *\section Purpose - * - *Definition of methods for using a HID transfer %device driver. - * - *\section Usage - * - *-# Re-implement the USBDCallbacks_RequestReceived callback to forward - * requests to HIDDTransferDriver_RequestHandler. This is done - * automatically unless the NOAUTOCALLBACK symbol is defined during - * compilation. - *-# Initialize the driver using HIDDTransferDriver_Initialize. The - * USB driver is automatically initialized by this method. - *-# Call the HIDDTransferDriver_Write method when sendint data to host. - *-# Call the HIDDTransferRead, HIDDTransferReadReport when checking and getting - * received data from host. - */ - -#ifndef HIDDKEYBOARDDRIVER_H -#define HIDDKEYBOARDDRIVER_H - -/** \addtogroup usbd_hid_tran - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include - -#include - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** Size of the input and output report, in bytes */ -#define HIDDTransferDriver_REPORTSIZE 32 - -/** Size of the report descriptor, in bytes */ -#define HIDDTransferDriver_REPORTDESCRIPTORSIZE 32 - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef HIDDTransferDriverConfigurationDescriptors - * \brief List of descriptors that make up the configuration descriptors of a - * device using the HID Transfer driver. - */ -typedef struct _HIDDTransferDriverConfigurationDescriptors { - - /** Configuration descriptor. */ - USBConfigurationDescriptor configuration; - /** Interface descriptor. */ - USBInterfaceDescriptor interface; - /** HID descriptor. */ - HIDDescriptor1 hid; - /** Interrupt IN endpoint descriptor. */ - USBEndpointDescriptor interruptIn; - /** Interrupt OUT endpoint descriptor. */ - USBEndpointDescriptor interruptOut; - -} __attribute__ ((packed)) HIDDTransferDriverConfigurationDescriptors; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern void HIDDTransferDriver_Initialize( - const USBDDriverDescriptors * pDescriptors); - -extern void HIDDTransferDriver_ConfigurationChangedHandler(uint8_t cfgnum); - -extern void HIDDTransferDriver_RequestHandler( - const USBGenericRequest *request); - -extern uint16_t HIDDTransferDriver_Read(void *pData, - uint32_t dLength); - -extern uint16_t HIDDTransferDriver_ReadReport(void *pData, - uint32_t dLength); - -extern uint8_t HIDDTransferDriver_Write(const void *pData, - uint32_t size, - TransferCallback callback, - void *pArg); - - -extern void HIDDTransferDriver_RemoteWakeUp(void); - -/**@}*/ - -#endif /*#ifndef HIDDKEYBOARDDRIVER_H*/ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDDescriptors.h b/firmware/atmel_softpack_libraries/usb/include/HIDDescriptors.h deleted file mode 100644 index 41104be6..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDDescriptors.h +++ /dev/null @@ -1,229 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * - * \section Purpose - * - * Definitions used for declaring the descriptors of a HID device. - * - */ - -#ifndef _HIDDESCRIPTORS_H_ -#define _HIDDESCRIPTORS_H_ -/** \addtogroup usb_hid - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - -#include "HIDReports.h" -#include "HIDUsages.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_hid_device_descriptor_codes HID Device Descriptor Codes - * @{ - * This page lists HID device class, subclass and protocol codes. - * - * \section Codes - * - HIDDeviceDescriptor_CLASS - * - HIDDeviceDescriptor_SUBCLASS - * - HIDDeviceDescriptor_PROTOCOL - */ - -/** Class code for a HID device. */ -#define HIDDeviceDescriptor_CLASS 0 -/** Subclass code for a HID device. */ -#define HIDDeviceDescriptor_SUBCLASS 0 -/** Protocol code for a HID device. */ -#define HIDDeviceDescriptor_PROTOCOL 0 -/** @}*/ - -/** \addtogroup usb_hid_interface_descriptor_codes HID Interface Descriptor Codes - * @{ - * This page lists HID Interface class, subclass and protocol codes. - * - * \section Codes - * - HIDInterfaceDescriptor_CLASS - * - HIDInterfaceDescriptor_SUBCLASS_NONE - * - HIDInterfaceDescriptor_SUBCLASS_BOOT - * - HIDInterfaceDescriptor_PROTOCOL_NONE - * - HIDInterfaceDescriptor_PROTOCOL_KEYBOARD - * - HIDInterfaceDescriptor_PROTOCOL_MOUSE - */ - -/** HID interface class code. */ -#define HIDInterfaceDescriptor_CLASS 0x03 -/** Indicates the interface does not implement a particular subclass. */ -#define HIDInterfaceDescriptor_SUBCLASS_NONE 0x00 -/** Indicates the interface is compliant with the boot specification. */ -#define HIDInterfaceDescriptor_SUBCLASS_BOOT 0x01 -/** Indicates the interface does not implement a particular protocol. */ -#define HIDInterfaceDescriptor_PROTOCOL_NONE 0x00 -/** Indicates the interface supports the boot specification as a keyboard. */ -#define HIDInterfaceDescriptor_PROTOCOL_KEYBOARD 0x01 -/** Indicates the interface supports the boot specification as a mouse. */ -#define HIDInterfaceDescriptor_PROTOCOL_MOUSE 0x02 -/** @}*/ - -/** \addtogroup usb_hid_ver HID Release Numbers - * @{ - * - \ref HIDDescriptor_HID1_11 - */ - -/** Identifies version 1.11 of the HID specification. */ -#define HIDDescriptor_HID1_11 0x0111 -/** @}*/ - -/** \addtogroup usb_descriptors_types HID Descriptors Types - * @{ - * - * \section Types - * - HIDGenericDescriptor_HID - * - HIDGenericDescriptor_REPORT - * - HIDGenericDescriptor_PHYSICAL - */ - -/** HID descriptor type. */ -#define HIDGenericDescriptor_HID 0x21 -/** Report descriptor type. */ -#define HIDGenericDescriptor_REPORT 0x22 -/** Physical descriptor type. */ -#define HIDGenericDescriptor_PHYSICAL 0x23 -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef HIDDescriptor - * \brief Identifies the length of type of subordinate descriptors of a HID - * device. This particular type has no subordinate descriptor. - */ -typedef struct _HIDDescriptor { - - /** Size of descriptor in bytes. */ - uint8_t bLength; - /** Descriptor type (\ref HIDGenericDescriptor_HID). */ - uint8_t bDescriptorType; - /** HID class specification release number in BCD format. */ - uint16_t bcdHID; - /** Country code of the device if it is localized. */ - uint8_t bCountryCode; - /** Number of subordinate descriptors. */ - uint8_t bNumDescriptors; - -} __attribute__ ((packed)) HIDDescriptor; /* GCC */ - -/** - * \typedef HIDDescriptor - * \brief Identifies the length of type of subordinate descriptors of a HID - * device. This particular type only supports one subordinate descriptor. - */ -typedef struct _HIDDescriptor1 { - - /** Size of descriptor in bytes. */ - uint8_t bLength; - /** Descriptor type (\ref HIDGenericDescriptor_HID). */ - uint8_t bDescriptorType; - /** HID class specification release number in BCD format. */ - uint16_t bcdHID; - /** Country code of the device if it is localized. */ - uint8_t bCountryCode; - /** Number of subordinate descriptors. */ - uint8_t bNumDescriptors; - /** Type of the first subordinate descriptor. */ - uint8_t bDescriptorType0; - /** Size in bytes of the first subordinate descriptor. */ - /* uint8_t bDescriptorLength0[2]; */ - uint16_t wDescriptorLength0; - -} __attribute__ ((packed)) HIDDescriptor1; /* GCC */ - -/** - * HID Physical Descriptor set 0: specifies the number of additional - * descriptor sets. - */ -typedef struct _HIDPhysicalDescriptor0 { - /** Numeric expression specifying the number of Physical Descriptor sets - Physical Descriptor 0 itself not included */ - uint8_t bNumber; - /** Numeric expression identifying the length of each Physical descriptor */ - uint8_t bLength[2]; -} __attribute__ ((packed)) HIDPhysicalDescriptor0; /* GCC */ - -/** - * HID Physical information - */ -typedef union _HIDPhysicalInfo { - /** Bits specifying physical information: 7..5 Bias, 4..0 Preference */ - uint8_t bData; - struct { - uint8_t Preference:5, /**< 0=Most preferred */ - Bias:3; /**< indicates which hand the descriptor - set is characterizing */ - } sPhysicalInfo; -} HIDPhysicalInfo; - -/** - * HID Physical Descriptor - */ -typedef struct _HIDPhysicalDescriptor { - /** Designator: indicates which part of the body affects the item */ - uint8_t bDesignator; - /** Bits specifying flags: - 7..5 Qualifier; - 4..0 Effort */ - uint8_t bFlags; -} __attribute__ ((packed)) HIDPhysicalDescriptor; /* GCC */ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - -/**@}*/ -#endif /* #ifndef _HIDDESCRIPTORS_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDMSDDriver.h b/firmware/atmel_softpack_libraries/usb/include/HIDMSDDriver.h deleted file mode 100644 index 795f1df0..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDMSDDriver.h +++ /dev/null @@ -1,140 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * \section Purpose - * - * Definitions and methods for USB HID + MSD device implement. - * - * \section Usage - * - * -# Initialize USB function specified driver ( for MSD currently ) - * - MSDDFunctionDriver_Initialize() - * - * -# Initialize USB HIDMSD driver and USB driver - * - HIDMSDDDriver_Initialize() - * - * -# Handle and dispach USB requests - * - HIDMSDDDriver_RequestHandler() - * - * -# Try starting a remote wake-up sequence - * - HIDMSDDDriver_RemoteWakeUp() - */ - -#ifndef HIDMSDDDRIVER_H -#define HIDMSDDDRIVER_H - -/** \addtogroup usbd_composite_hidmsd - *@{ - */ - -/*--------------------------------------------------------------------------- - * Headers - *---------------------------------------------------------------------------*/ - -#include -#include -#include -#include -#include -#include - -/*--------------------------------------------------------------------------- - * Consts - *---------------------------------------------------------------------------*/ - -/** \addtogroup usbd_hid_msd_desc USB HID(Kbd) + MSD Descriptors define - * @{ - */ -/** Number of interfaces of the device */ -#define HIDMSDDriverDescriptors_NUMINTERFACE 2 -/** Number of the HID (Keyboard) interface. */ -#define HIDMSDDriverDescriptors_HID_INTERFACE 0 -/** Number of the MSD interface. */ -#define HIDMSDDriverDescriptors_MSD_INTERFACE 1 -/** @}*/ - -/*--------------------------------------------------------------------------- - * Types - *---------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef HidMsdDriverConfigurationDescriptors - * \brief Configuration descriptor list for a device implementing a - * HID MSD composite driver. - */ -typedef struct _HidMsdDriverConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - - /* --- HID */ - USBInterfaceDescriptor hidInterface; - HIDDescriptor1 hid; - USBEndpointDescriptor hidInterruptIn; - USBEndpointDescriptor hidInterruptOut; - - /* --- MSD */ - /** Mass storage interface descriptor. */ - USBInterfaceDescriptor msdInterface; - /** Bulk-out endpoint descriptor. */ - USBEndpointDescriptor msdBulkOut; - /** Bulk-in endpoint descriptor. */ - USBEndpointDescriptor msdBulkIn; - -} __attribute__ ((packed)) HidMsdDriverConfigurationDescriptors; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*--------------------------------------------------------------------------- - * Exported functions - *---------------------------------------------------------------------------*/ - -/* -HIDMSD Composite device */ -extern void HIDMSDDriver_Initialize( - const USBDDriverDescriptors *pDescriptors, - MSDLun *pLuns, uint8_t numLuns); - -extern void HIDMSDDriver_ConfigurationChangedHandler(uint8_t cfgnum); - -extern void HIDMSDDriver_RequestHandler(const USBGenericRequest *request); - -extern void HIDMSDDriver_RemoteWakeUp(void); - -/**@}*/ -#endif //#ifndef HIDMSDDDRIVER_H - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDReports.h b/firmware/atmel_softpack_libraries/usb/include/HIDReports.h deleted file mode 100644 index 2b2b551b..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDReports.h +++ /dev/null @@ -1,299 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * - * \section Purpose - * - * Definitions used when declaring an HID report descriptors. - * - * \section Usage - * - * Use the definitions provided here when declaring a report descriptor, - * which shall be an uint8_t array. -*/ - -#ifndef _HIDREPORTS_H_ -#define _HIDREPORTS_H_ -/** \addtogroup usb_hid - *@{ - * \addtogroup usb_hid_report USB HID Report - * @{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_hid_item HID Items Definitions - * @{ - */ -/** Item size 0 bytes */ -#define HIDItemSize_0B 0 -/** Item size 1 bytes */ -#define HIDItemSize_1B 1 -/** Item size 2 bytes */ -#define HIDItemSize_2B 2 -/** Item size 4 bytes */ -#define HIDItemSize_4B 3 - -/** Item type: Main */ -#define HIDItemType_MAIN 0 -/** Item type: Global */ -#define HIDItemType_GLOBAL 1 -/** Item type: Local */ -#define HIDItemType_LOCAL 2 - -/** Item prefix for long items */ -#define HIDItem_LONGITEM 0xFE -/** @}*/ - -/** \addtogroup usb_hid_main HID Main Item Tags - * @{ - * This section lists the Main Item Tags defined for HID device. - * ( HID Spec. 6.2.2.4 ) - * - * - \ref HIDReport_INPUT - * - \ref HIDReport_FEATURE - * - \ref HIDReport_COLLECTION - * - \ref HIDReport_ENDCOLLECTION - */ -/** Input item. */ -#define HIDReport_INPUT 0x80 -/** Output item. */ -#define HIDReport_OUTPUT 0x90 -/** Feature item. */ -#define HIDReport_FEATURE 0xB0 -/** Collection item. */ -#define HIDReport_COLLECTION 0xA0 -/** End of collection item. */ -#define HIDReport_ENDCOLLECTION 0xC0 -/** @}*/ - -/** \addtogroup usb_hid_data HID Items for Data Fields - * @{ - * This section lists defintions for HID Input, Output and Feature items that - * are used to create the data fields within a report. - * ( HID Spec. 6.2.2.5 ) - * - \ref HIDReport_CONSTANT - * - \ref HIDReport_VARIABLE - * - \ref HIDReport_RELATIVE - * - \ref HIDReport_WRAP - * - \ref HIDReport_NONLINEAR - * - \ref HIDReport_NOPREFERRED - * - \ref HIDReport_NULLSTATE - * - \ref HIDReport_VOLATILE - * - \ref HIDReport_BUFFEREDBYTES - */ -/** The report value is constant (vs. variable). */ -#define HIDReport_CONSTANT (1 << 0) -/** Data reported is a variable (vs. array). */ -#define HIDReport_VARIABLE (1 << 1) -/** Data is relative (vs. absolute). */ -#define HIDReport_RELATIVE (1 << 2) -/** Value rolls over when it reach a maximum/minimum. */ -#define HIDReport_WRAP (1 << 3) -/** Indicates that the data reported has been processed and is no longuer */ -/** linear with the original measurements. */ -#define HIDReport_NONLINEAR (1 << 4) -/** Device has no preferred state to which it automatically returns. */ -#define HIDReport_NOPREFERRED (1 << 5) -/** Device has a null state, in which it does not report meaningful */ -/** information. */ -#define HIDReport_NULLSTATE (1 << 6) -/** Indicates data can change without the host intervention. */ -#define HIDReport_VOLATILE (1 << 7) -/** Indicates the device produces a fixed-length stream of bytes. */ -#define HIDReport_BUFFEREDBYTES (1 << 8) -/** @}*/ - -/** \addtogroup usb_hid_collection HID Collection Items - * @{ - * This section lists definitions for HID Collection Items. - * ( HID Spec. 6.2.2.6 ) - * - \ref HIDReport_COLLECTION_PHYSICAL - * - \ref HIDReport_COLLECTION_APPLICATION - * - \ref HIDReport_COLLECTION_LOGICAL - * - \ref HIDReport_COLLECTION_REPORT - * - \ref HIDReport_COLLECTION_NAMEDARRAY - * - \ref HIDReport_COLLECTION_USAGESWITCH - * - \ref HIDReport_COLLECTION_USAGEMODIFIER - */ -/** Physical collection. */ -#define HIDReport_COLLECTION_PHYSICAL 0x00 -/** Application collection. */ -#define HIDReport_COLLECTION_APPLICATION 0x01 -/** Logical collection. */ -#define HIDReport_COLLECTION_LOGICAL 0x02 -/** Report collection. */ -#define HIDReport_COLLECTION_REPORT 0x03 -/** Named array collection. */ -#define HIDReport_COLLECTION_NAMEDARRAY 0x04 -/** Usage switch collection. */ -#define HIDReport_COLLECTION_USAGESWITCH 0x05 -/** Usage modifier collection */ -#define HIDReport_COLLECTION_USAGEMODIFIER 0x06 -/** @}*/ - -/** \addtogroup usb_hid_global HID Global Items - * @{ - * This section lists HID Global Items. - * ( HID Spec. 6.2.2.7 ) - * - \ref HIDReport_GLOBAL_USAGEPAGE - * - \ref HIDReport_GLOBAL_LOGICALMINIMUM - * - \ref HIDReport_GLOBAL_LOGICALMAXIMUM - * - \ref HIDReport_GLOBAL_PHYSICALMINIMUM - * - \ref HIDReport_GLOBAL_PHYSICALMAXIMUM - * - \ref HIDReport_GLOBAL_UNITEXPONENT - * - \ref HIDReport_GLOBAL_UNIT - * - \ref HIDReport_GLOBAL_REPORTSIZE - * - \ref HIDReport_GLOBAL_REPORTID - * - \ref HIDReport_GLOBAL_REPORTCOUNT - * - \ref HIDReport_GLOBAL_PUSH - * - \ref HIDReport_GLOBAL_POP - */ -/** Current usage page. */ -#define HIDReport_GLOBAL_USAGEPAGE 0x04 -/** Minimum value that a variable or array item will report. */ -#define HIDReport_GLOBAL_LOGICALMINIMUM 0x14 -/** Maximum value that a variable or array item will report. */ -#define HIDReport_GLOBAL_LOGICALMAXIMUM 0x24 -/** Minimum value for the physical extent of a variable item. */ -#define HIDReport_GLOBAL_PHYSICALMINIMUM 0x34 -/** Maximum value for the physical extent of a variable item. */ -#define HIDReport_GLOBAL_PHYSICALMAXIMUM 0x44 -/** Value of the unit exponent in base 10. */ -#define HIDReport_GLOBAL_UNITEXPONENT 0x54 -/** Unit values. */ -#define HIDReport_GLOBAL_UNIT 0x64 -/** Size of the report fields in bits. */ -#define HIDReport_GLOBAL_REPORTSIZE 0x74 -/** Specifies the report ID. */ -#define HIDReport_GLOBAL_REPORTID 0x84 -/** Number of data fields for an item. */ -#define HIDReport_GLOBAL_REPORTCOUNT 0x94 -/** Places a copy of the global item state table on the stack. */ -#define HIDReport_GLOBAL_PUSH 0xA4 -/** Replaces the item state table with the top structure from the stack. */ -#define HIDReport_GLOBAL_POP 0xB4 -/** @}*/ - -/** \addtogroup usb_hid_local HID Local Items - * @{ - * This section lists definitions for HID Local Items. - * ( HID Spec. 6.2.2.8 ) - * - \ref HIDReport_LOCAL_USAGE - * - \ref HIDReport_LOCAL_USAGEMINIMUM - * - \ref HIDReport_LOCAL_USAGEMAXIMUM - * - \ref HIDReport_LOCAL_DESIGNATORINDEX - * - \ref HIDReport_LOCAL_DESIGNATORMINIMUM - * - \ref HIDReport_LOCAL_DESIGNATORMAXIMUM - * - \ref HIDReport_LOCAL_STRINGINDEX - * - \ref HIDReport_LOCAL_STRINGMINIMUM - * - \ref HIDReport_LOCAL_STRINGMAXIMUM - * - \ref HIDReport_LOCAL_DELIMITER - */ -/** Suggested usage for an item or collection. */ -#define HIDReport_LOCAL_USAGE 0x08 -/** Defines the starting usage associated with an array or bitmap. */ -#define HIDReport_LOCAL_USAGEMINIMUM 0x18 -/** Defines the ending usage associated with an array or bitmap. */ -#define HIDReport_LOCAL_USAGEMAXIMUM 0x28 -/** Determines the body part used for a control. */ -#define HIDReport_LOCAL_DESIGNATORINDEX 0x38 -/** Defines the index of the starting designator associated with an array or */ -/** bitmap. */ -#define HIDReport_LOCAL_DESIGNATORMINIMUM 0x48 -/** Defines the index of the ending designator associated with an array or */ -/** bitmap. */ -#define HIDReport_LOCAL_DESIGNATORMAXIMUM 0x58 -/** String index for a string descriptor. */ -#define HIDReport_LOCAL_STRINGINDEX 0x78 -/** Specifies the first string index when assigning a group of sequential */ -/** strings to controls in an array or bitmap. */ -#define HIDReport_LOCAL_STRINGMINIMUM 0x88 -/** Specifies the last string index when assigning a group of sequential */ -/** strings to controls in an array or bitmap. */ -#define HIDReport_LOCAL_STRINGMAXIMUM 0x98 -/** Defines the beginning or end of a set of local items. */ -#define HIDReport_LOCAL_DELIMITER 0xA8 -/** @}*/ - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** HID Short Item Header, followed by bSize bytes of data */ -typedef struct _HIDShortItem { - uint8_t bSize:2, /**< data size (0, 1, 2 or 4) */ - bType:2, /**< fundamental type */ - bTag:4; /**< item type */ -} HIDShortItem; - -/** HID Long Item Header, followed by bDataSize bytes of data */ -typedef struct _HIDLongItem { - uint8_t bPrefix; /**< Prefix, 0xFE */ - uint8_t bDataSize; /**< data size */ - uint16_t bLongItemTag; /**< item type */ -} HIDLongItem; - -/** HID Report without ID (with one byte data) */ -typedef struct _HIDReportNoID { - uint8_t bData[1]; /**< First report data byte */ -} HIDReportNoID; - -/** HID Report with ID (with one byte data) */ -typedef struct _HIDReport { - uint8_t bID; /**< Report ID */ - uint8_t bData[1]; /**< First report data byte */ -} HIDReport; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - -/** @}*/ -/**@}*/ -#endif /*#ifndef _HIDREPORTS_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDRequests.h b/firmware/atmel_softpack_libraries/usb/include/HIDRequests.h deleted file mode 100644 index 5e1c5877..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDRequests.h +++ /dev/null @@ -1,154 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * - * \section Purpose - * - * Definitions used for declaring the requests of a HID device. - * - * -# Receive a GET_REPORT or SET_REPORT request from the host. - * -# Retrieve the report type using HIDReportRequest_GetReportType. - * -# Retrieve the report ID using HIDReportRequest_GetReportId. - * -# Retrieve the idle rate indicated by a GET_IDLE or SET_IDLE request - * with HIDIdleRequest_GetIdleRate. - */ - -#ifndef _HIDREQUESTS_H_ -#define _HIDREQUESTS_H_ -/** \addtogroup usb_hid - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_hid_request_codes HID Request Codes - * @{ - * - * \section Codes - * - HIDGenericRequest_GETREPORT - * - HIDGenericRequest_GETIDLE - * - HIDGenericRequest_GETPROTOCOL - * - HIDGenericRequest_SETREPORT - * - HIDGenericRequest_SETIDLE - * - HIDGenericRequest_SETPROTOCOL - */ - -/** GetReport request code. */ -#define HIDGenericRequest_GETREPORT 0x01 -/** GetIdle request code. */ -#define HIDGenericRequest_GETIDLE 0x02 -/** GetProtocol request code. */ -#define HIDGenericRequest_GETPROTOCOL 0x03 -/** SetReport request code. */ -#define HIDGenericRequest_SETREPORT 0x09 -/** SetIdle request code. */ -#define HIDGenericRequest_SETIDLE 0x0A -/** SetProtocol request code. */ -#define HIDGenericRequest_SETPROTOCOL 0x0B -/** @}*/ - -/** \addtogroup usb_hid_report_types HID Report Types - * @{ - * This page lists the types for USB HID Reports. - * - * \section Types - * - HIDReportRequest_INPUT - * - HIDReportRequest_OUTPUT - * - HIDReportRequest_FEATURE - */ - -/** Input report. */ -#define HIDReportRequest_INPUT 1 -/** Output report. */ -#define HIDReportRequest_OUTPUT 2 -/** Feature report. */ -#define HIDReportRequest_FEATURE 3 -/** @}*/ - -/** \addtogroup usb_hid_protocol_types HID Protocol Types - * @{ - */ -/** Boot Protocol */ -#define HIDProtocol_BOOT 0 -/** Report Protocol */ -#define HIDProtocol_REPORT 1 - -/** Infinite idle rate.*/ -#define HIDIdleRequest_INFINITE 0 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - - - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*---------------------------------------------------------------------------- - * Functions - *----------------------------------------------------------------------------*/ - -extern uint8_t HIDReportRequest_GetReportType( - const USBGenericRequest *request); - -extern uint8_t HIDReportRequest_GetReportId( - const USBGenericRequest *request); - - -static inline uint16_t HIDProtocolRequest_GetProtocol( - const USBGenericRequest *request) -{ - return USBGenericRequest_GetValue(request); -} - -extern uint8_t HIDIdleRequest_GetReportId( - const USBGenericRequest * request); - -extern uint8_t HIDIdleRequest_GetIdleRate( - const USBGenericRequest *request); - -/**@}*/ -#endif /* #define _HIDREQUESTS_H_ */ diff --git a/firmware/atmel_softpack_libraries/usb/include/HIDUsages.h b/firmware/atmel_softpack_libraries/usb/include/HIDUsages.h deleted file mode 100644 index bc135429..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/HIDUsages.h +++ /dev/null @@ -1,393 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/**\file - * - * \section Purpose - * - * Definitions used for declaring the usages of a HID device. - * - */ - -#ifndef _HIDUSAGES_H_ -#define _HIDUSAGES_H_ -/** \addtogroup usb_hid - *@{ - */ - -/*---------------------------------------------------------------------------- - * Includes - *----------------------------------------------------------------------------*/ - -#include - - -/*---------------------------------------------------------------------------- - * Defines - *----------------------------------------------------------------------------*/ - -/** \addtogroup usb_hid_usage_pages HID Usage Pages' IDs - * @{ - * (HUT section 3) - */ - -/** ID for the HID Generic Desktop Controls. */ -#define HIDUsage_GENERICDESKTOP 1 -/** ID for the HID Game Controls. */ -#define HIDUsage_GAME 5 -/** ID for the HID Generic Device Controls. */ -#define HIDUsage_GENERICDEVICE 6 -/** ID for the HID Keyboard/Keypad */ -#define HIDUsage_KEYBOARD 7 -/** ID for the HID LEDs. */ -#define HIDUsage_LEDS 8 -/** ID for the HID buttons. */ -#define HIDUsage_BUTTON 9 -/** ID for Bar Code Scanner page. */ -#define HIDUsage_BARCODE 0x8C -/** ID for Camera Control Page. */ -#define HIDUsage_CAMERA 0x90 -/** ID for vendor-defined controls. */ -#define HIDUsage_VENDOR 0xFF -/** @}*/ - -/** \addtogroup usb_hid_genericdesktop_page_id HID GenericDesktop Page ID - * @{ - * - * \section ID - * - HIDGenericDesktop_PAGEID - */ - -/** ID for the HID generic desktop usage page. */ -#define HIDGenericDesktop_PAGEID 0x01 -/** @}*/ - -/** \addtogroup usb_hid_genericdesktop_usages HID GenericDesktop Usages - * @{ - * - * \section Usages - * - HIDGenericDesktop_POINTER - * - HIDGenericDesktop_MOUSE - * - HIDGenericDesktop_JOYSTICK - * - HIDGenericDesktop_GAMEPAD - * - HIDGenericDesktop_KEYBOARD - * - HIDGenericDesktop_KEYPAD - * - HIDGenericDesktop_MULTIAXIS - * - HIDGenericDesktop_X - * - HIDGenericDesktop_Y - */ - -/** Pointer usage ID. */ -#define HIDGenericDesktop_POINTER 0x01 -/** Mouse usage ID. */ -#define HIDGenericDesktop_MOUSE 0x02 -/** Joystick usage ID. */ -#define HIDGenericDesktop_JOYSTICK 0x04 -/** Gamepad usage ID. */ -#define HIDGenericDesktop_GAMEPAD 0x05 -/** Keyboard usage ID. */ -#define HIDGenericDesktop_KEYBOARD 0x06 -/** Keypad usage ID. */ -#define HIDGenericDesktop_KEYPAD 0x07 -/** Multi-axis controller usage ID. */ -#define HIDGenericDesktop_MULTIAXIS 0x08 - -/** Axis Usage X direction ID. */ -#define HIDGenericDesktop_X 0x30 -/** Axis Usage Y direction ID. */ -#define HIDGenericDesktop_Y 0x31 -/** @}*/ - - -/** \addtogroup usb_hid_keypad_page_id HID Keypad Page ID - * @{ - * This page lists HID Keypad page ID. - * - * \section ID - * - HIDKeypad_PAGEID - */ - -/** Identifier for the HID keypad usage page */ -#define HIDKeypad_PAGEID 0x07 -/** @}*/ - -/** \addtogroup usb_hid_alphabetic_keys HID Alphabetic Keys - * @{ - * - * \section Keys - * - HIDKeypad_A - * - HIDKeypad_B - * - HIDKeypad_C - * - HIDKeypad_D - * - HIDKeypad_E - * - HIDKeypad_F - * - HIDKeypad_G - * - HIDKeypad_H - * - HIDKeypad_I - * - HIDKeypad_J - * - HIDKeypad_K - * - HIDKeypad_L - * - HIDKeypad_M - * - HIDKeypad_N - * - HIDKeypad_O - * - HIDKeypad_P - * - HIDKeypad_Q - * - HIDKeypad_R - * - HIDKeypad_S - * - HIDKeypad_T - * - HIDKeypad_U - * - HIDKeypad_V - * - HIDKeypad_W - * - HIDKeypad_X - * - HIDKeypad_Y - * - HIDKeypad_Z - */ - -/** Key code for 'a' and 'A'. */ -#define HIDKeypad_A 4 -/** Key code for 'b' and 'B'. */ -#define HIDKeypad_B 5 -/** Key code for 'c' and 'C'. */ -#define HIDKeypad_C 6 -/** Key code for 'd' and 'D'. */ -#define HIDKeypad_D 7 -/** Key code for 'e' and 'E'. */ -#define HIDKeypad_E 8 -/** Key code for 'f' and 'F'. */ -#define HIDKeypad_F 9 -/** Key code for 'g' and 'G'. */ -#define HIDKeypad_G 10 -/** Key code for 'h' and 'H'. */ -#define HIDKeypad_H 11 -/** Key code for 'i' and 'I'. */ -#define HIDKeypad_I 12 -/** Key code for 'j' and 'J'. */ -#define HIDKeypad_J 13 -/** Key code for 'k' and 'K'. */ -#define HIDKeypad_K 14 -/** Key code for 'l' and 'L'. */ -#define HIDKeypad_L 15 -/** Key code for 'm' and 'M'. */ -#define HIDKeypad_M 16 -/** Key code for 'n' and 'N'. */ -#define HIDKeypad_N 17 -/** Key code for 'o' and 'O'. */ -#define HIDKeypad_O 18 -/** Key code for 'p' and 'P'. */ -#define HIDKeypad_P 19 -/** Key code for 'q' and 'Q'. */ -#define HIDKeypad_Q 20 -/** Key code for 'r' and 'R'. */ -#define HIDKeypad_R 21 -/** Key code for 's' and 'S'. */ -#define HIDKeypad_S 22 -/** Key code for 't' and 'T'. */ -#define HIDKeypad_T 23 -/** Key code for 'u' and 'U'. */ -#define HIDKeypad_U 24 -/** Key code for 'v' and 'V'. */ -#define HIDKeypad_V 25 -/** Key code for 'w' and 'W'. */ -#define HIDKeypad_W 26 -/** Key code for 'x' and 'X'. */ -#define HIDKeypad_X 27 -/** Key code for 'y' and 'Y'. */ -#define HIDKeypad_Y 28 -/** Key code for 'z' and 'Z'. */ -#define HIDKeypad_Z 29 -/** @}*/ - -/** \addtogroup usb_hid_numeric_keys HID Numeric Keys - * @{ - * - * \section Keys - * - HIDKeypad_1 - * - HIDKeypad_2 - * - HIDKeypad_3 - * - HIDKeypad_4 - * - HIDKeypad_5 - * - HIDKeypad_6 - * - HIDKeypad_7 - * - HIDKeypad_8 - * - HIDKeypad_9 - * - HIDKeypad_0 - */ - -/** Key code for '1' and '!'. */ -#define HIDKeypad_1 30 -/** Key code for '2' and '@'. */ -#define HIDKeypad_2 31 -/** Key code for '3' and '#'. */ -#define HIDKeypad_3 32 -/** Key code for '4' and '$'. */ -#define HIDKeypad_4 33 -/** Key code for '5' and '%'. */ -#define HIDKeypad_5 34 -/** Key code for '6' and '^'. */ -#define HIDKeypad_6 35 -/** Key code for '7' and '&'. */ -#define HIDKeypad_7 36 -/** Key code for '8' and '*'. */ -#define HIDKeypad_8 37 -/** Key code for '9' and '('. */ -#define HIDKeypad_9 38 -/** Key code for '0' and ')'. */ -#define HIDKeypad_0 39 -/** @}*/ - -/** \addtogroup usb_hid_special_keys HID Special Keys - * @{ - * - * \section Keys - * - HIDKeypad_ENTER - * - HIDKeypad_ESCAPE - * - HIDKeypad_BACKSPACE - * - HIDKeypad_TAB - * - HIDKeypad_SPACEBAR - * - HIDKeypad_PRINTSCREEN - * - HIDKeypad_SCROLLLOCK - * - HIDKeypad_NUMLOCK - */ - -/** Enter key code. */ -#define HIDKeypad_ENTER 40 -/** Escape key code. */ -#define HIDKeypad_ESCAPE 41 -/** Backspace key code. */ -#define HIDKeypad_BACKSPACE 42 -/** Tab key code. */ -#define HIDKeypad_TAB 43 -/** Spacebar key code. */ -#define HIDKeypad_SPACEBAR 44 -/** Printscreen key code. */ -#define HIDKeypad_PRINTSCREEN 70 -/** Scroll lock key code. */ -#define HIDKeypad_SCROLLLOCK 71 -/** Num lock key code. */ -#define HIDKeypad_NUMLOCK 83 -/** @}*/ - -/** \addtogroup usb_hid_modified_keys HID Modified Keys - * @{ - * - * \section Keys - * - HIDKeypad_LEFTCONTROL - * - HIDKeypad_LEFTSHIFT - * - HIDKeypad_LEFTALT - * - HIDKeypad_LEFTGUI - * - HIDKeypad_RIGHTCONTROL - * - HIDKeypad_RIGHTSHIFT - * - HIDKeypad_RIGHTALT - * - HIDKeypad_RIGHTGUI - */ - -/** Key code for the left 'Control' key. */ -#define HIDKeypad_LEFTCONTROL 224 -/** Key code for the left 'Shift' key. */ -#define HIDKeypad_LEFTSHIFT 225 -/** Key code for the left 'Alt' key. */ -#define HIDKeypad_LEFTALT 226 -/** Key code for the left 'GUI' (e.g. Windows) key. */ -#define HIDKeypad_LEFTGUI 227 -/** Key code for the right 'Control' key. */ -#define HIDKeypad_RIGHTCONTROL 228 -/** Key code for the right 'Shift' key. */ -#define HIDKeypad_RIGHTSHIFT 229 -/** Key code for the right 'Alt' key. */ -#define HIDKeypad_RIGHTALT 230 -/** Key code for the right 'GUI' key. */ -#define HIDKeypad_RIGHTGUI 231 -/** @}*/ - -/** \addtogroup usb_hid_error_codes HID Error Codes - * @{ - * - * \section Codes - * - HIDKeypad_ERRORROLLOVER - * - HIDKeypad_POSTFAIL - * - HIDKeypad_ERRORUNDEFINED - */ - -/** Indicates that too many keys have been pressed at the same time. */ -#define HIDKeypad_ERRORROLLOVER 1 -/** postfail */ -#define HIDKeypad_POSTFAIL 2 -/** Indicates an undefined error. */ -#define HIDKeypad_ERRORUNDEFINED 3 -/** @}*/ - - -/** \addtogroup usb_hid_leds_page_id HID LEDs Page ID - * @{ - * This page lists the page ID of the HID LEDs usage page. - * - * \section ID - * - HIDLeds_PAGEID - */ - -/** ID of the HID LEDs usage page. */ -#define HIDLeds_PAGEID 0x08 -/** @}*/ - -/** \addtogroup usb_hid_leds_usage HID LEDs Usages - * @{ - * This page lists the Usages of the HID LEDs. - * - * \section Usages - * - HIDLeds_NUMLOCK - * - HIDLeds_CAPSLOCK - * - HIDLeds_SCROLLLOCK - */ - -/** Num lock LED usage. */ -#define HIDLeds_NUMLOCK 0x01 -/** Caps lock LED usage. */ -#define HIDLeds_CAPSLOCK 0x02 -/** Scroll lock LED usage. */ -#define HIDLeds_SCROLLLOCK 0x03 -/** @}*/ - - -/** \addtogroup usb_hid_buttons_page_id HID BUTTONs Page ID - * @{ - */ -/** Identifier for the HID button usage page*/ -#define HIDButton_PAGEID 0x09 -/** @}*/ - - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -extern uint8_t HIDKeypad_IsModifierKey(uint8_t key); - -/**@}*/ -#endif /* #define _HIDUSAGES_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/MSD.h b/firmware/atmel_softpack_libraries/usb/include/MSD.h deleted file mode 100644 index ba8ef388..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/MSD.h +++ /dev/null @@ -1,245 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \section Purpose - * - * Mass Storage class definitions. - * - * See - * - - * USB Mass Storage Class Spec. Overview - * - - * USB Mass Storage Class Bulk-Only Transport - * - * \section Usage - * - * -# Uses "MSD Requests" to check incoming requests from USB Host. - * -# Uses "MSD Subclass Codes" and "MSD Protocol Codes" to fill %device - * interface descriptors for a MSD %device. - * -# Handle the incoming Bulk data with "MSD CBW Definitions" and MSCbw - * structure. - * -# Prepare the outgoing Bulk data with "MSD CSW Definitions" and MSCsw - * structure. - */ - -#ifndef MSD_H -#define MSD_H - -/** \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Includes - *------------------------------------------------------------------------------*/ - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/* - * MSD Requests - * This section lists MSD-specific requests ( Actually for Bulk-only protocol ). - * - * \section Requests - * - MSD_BULK_ONLY_RESET - * - MSD_GET_MAX_LUN - */ - -/** Reset the mass storage %device and its associated interface. */ -#define MSD_BULK_ONLY_RESET 0xFF -/** Return the maximum LUN number supported by the %device. */ -#define MSD_GET_MAX_LUN 0xFE - -/** \addtogroup usbd_msd_subclass MSD Subclass Codes - * @{ - * This page lists the Subclass Codes for bInterfaceSubClass field. - * (Table 2.1, USB Mass Storage Class Spec. Overview) - * - * \section SubClasses - * - MSD_SUBCLASS_RBC - * - MSD_SUBCLASS_SFF_MCC - * - MSD_SUBCLASS_QIC - * - MSD_SUBCLASS_UFI - * - MSD_SUBCLASS_SFF - * - MSD_SUBCLASS_SCSI - */ - -/** Reduced Block Commands (RBC) T10 */ -#define MSD_SUBCLASS_RBC 0x01 -/** C/DVD devices */ -#define MSD_SUBCLASS_SFF_MCC 0x02 -/** Tape device */ -#define MSD_SUBCLASS_QIC 0x03 -/** Floppy disk drive (FDD) device */ -#define MSD_SUBCLASS_UFI 0x04 -/** Floppy disk drive (FDD) device */ -#define MSD_SUBCLASS_SFF 0x05 -/** SCSI transparent command set */ -#define MSD_SUBCLASS_SCSI 0x06 -/** @} */ - - -/** \addtogroup usbd_msd_protocol_codes MSD Protocol Codes - * @{ - * This page lists the Transport Protocol codes for MSD. - * (Table 3.1, USB Mass Storage Class Spec. Overview) - * - * \section Protocols - * - MSD_PROTOCOL_CBI_COMPLETION - * - MSD_PROTOCOL_CBI - * - MSD_PROTOCOL_BULK_ONLY - */ - -/** Control/Bulk/Interrupt (CBI) Transport (with command complete interrupt) */ -#define MSD_PROTOCOL_CBI_COMPLETION 0x00 -/** Control/Bulk/Interrupt (CBI) Transport (no command complete interrupt) */ -#define MSD_PROTOCOL_CBI 0x01 -/** Bulk-Only Transport */ -#define MSD_PROTOCOL_BULK_ONLY 0x50 -/** @}*/ - -/** \addtogroup usbd_msd_cbw_def MSD CBW Definitions - * @{ - * This page lists the Command Block Wrapper (CBW) definitions. - * - * \section Constants - * - MSD_CBW_SIZE - * - MSD_CBW_SIGNATURE - * - * \section Fields - * - MSD_CBW_DEVICE_TO_HOST - */ - -/** Command Block Wrapper Size */ -#define MSD_CBW_SIZE 31 -/** 'USBC' 0x43425355 */ -#define MSD_CBW_SIGNATURE 0x43425355 - -/** CBW bmCBWFlags field */ -#define MSD_CBW_DEVICE_TO_HOST (1 << 7) -/** @}*/ - -/** \addtogroup usbd_msd_csw_def MSD CSW Definitions - * @{ - * This page lists the Command Status Wrapper (CSW) definitions. - * - * \section Constants - * - MSD_CSW_SIZE - * - MSD_CSW_SIGNATURE - * - * \section Command Block Status Values - * (Table 5.3 , USB Mass Storage Class Bulk-Only Transport) - * - MSD_CSW_COMMAND_PASSED - * - MSD_CSW_COMMAND_FAILED - * - MSD_CSW_PHASE_ERROR - */ - -/** Command Status Wrapper Size */ -#define MSD_CSW_SIZE 13 -/** 'USBS' 0x53425355 */ -#define MSD_CSW_SIGNATURE 0x53425355 - -/** Command Passed (good status) */ -#define MSD_CSW_COMMAND_PASSED 0 -/** Command Failed */ -#define MSD_CSW_COMMAND_FAILED 1 -/** Phase Error */ -#define MSD_CSW_PHASE_ERROR 2 -/** @}*/ - - -/*------------------------------------------------------------------------------ - * Structures - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Command Block Wrapper (CBW), - * See Table 5.1, USB Mass Storage Class Bulk-Only Transport. - * - * The CBW shall start on a packet boundary and shall end as a - * short packet with exactly 31 (1Fh) bytes transferred. - *------------------------------------------------------------------------------*/ -typedef struct { - - /** 'USBC' 0x43425355 (little endian) */ - uint32_t dCBWSignature; - /** Must be the same as dCSWTag */ - uint32_t dCBWTag; - /** Number of bytes transfer */ - uint32_t dCBWDataTransferLength; - /** Indicates the directin of the transfer: - * - 0x80=IN=device-to-host; - * - 0x00=OUT=host-to-device - */ - uint8_t bmCBWFlags; - /** bits 0->3: bCBWLUN */ - uint8_t bCBWLUN :4, - bReserved1:4; /** reserved */ - /** bits 0->4: bCBWCBLength */ - uint8_t bCBWCBLength:5, - bReserved2 :3; /** reserved */ - /** Command block */ - uint8_t pCommand[16]; - -} MSCbw; - -/*------------------------------------------------------------------------------ - * Command Status Wrapper (CSW), - * See Table 5.2, USB Mass Storage Class Bulk-Only Transport. - *------------------------------------------------------------------------------*/ -typedef struct -{ - /** 'USBS' 0x53425355 (little endian) */ - uint32_t dCSWSignature; - /** Must be the same as dCBWTag */ - uint32_t dCSWTag; - /** - * For Data-Out the device shall report in the dCSWDataResidue the - * difference between the amount of data expected as stated in the - * dCBWDataTransferLength, and the actual amount of data processed by - * the device. For Data-In the device shall report in the dCSWDataResidue - * the difference between the amount of data expected as stated in the - * dCBWDataTransferLength and the actual amount of relevant data sent by - * the device. The dCSWDataResidue shall not exceed the value sent in the - * dCBWDataTransferLength. - */ - uint32_t dCSWDataResidue; - /** Indicates the success or failure of the command. */ - uint8_t bCSWStatus; - -} MSCsw; - -/**@}*/ -#endif /*#ifndef MSD_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/MSDDStateMachine.h b/firmware/atmel_softpack_libraries/usb/include/MSDDStateMachine.h deleted file mode 100644 index 2df59075..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/MSDDStateMachine.h +++ /dev/null @@ -1,256 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \section Purpose - * - * Definitions, structs, functions required by a Mass Storage device driver - * state machine.. - * - * \section Usage - * - * - For a USB device: - * -# MSDD_StateMachine is invoked to run the MSD state machine. - * - *-----------------------------------------------------------------------------*/ - -#ifndef MSDDSTATEMACHINE_H -#define MSDDSTATEMACHINE_H - -/** \addtogroup usbd_msd - *@{ - */ - -/*----------------------------------------------------------------------------- - * Headers - *-----------------------------------------------------------------------------*/ - -#include "MSD.h" -#include "MSDLun.h" -#include -#include - -/*----------------------------------------------------------------------------- - * Definitions - *-----------------------------------------------------------------------------*/ - -/** \addtogroup usbd_msd_driver_possible_states MSD Driver Possible states - * @{ - * - * - MSDD_STATE_READ_CBW - * - MSDD_STATE_WAIT_CBW - * - MSDD_STATE_PROCESS_CBW - * - MSDD_STATE_WAIT_HALT - * - MSDD_STATE_SEND_CSW - * - MSDD_STATE_WAIT_CSW - * - MSDD_STATE_WAIT_RESET - */ - -/** \brief Driver is expecting a command block wrapper */ -#define MSDD_STATE_READ_CBW (1 << 0) - -/** \brief Driver is waiting for the transfer to finish */ -#define MSDD_STATE_WAIT_CBW (1 << 1) - -/** \brief Driver is processing the received command */ -#define MSDD_STATE_PROCESS_CBW (1 << 2) - -/** \brief Driver is halted because pipe halt or wait reset */ -#define MSDD_STATE_WAIT_HALT (1 << 3) - -/** \brief Driver is starting the transmission of a command status wrapper */ -#define MSDD_STATE_SEND_CSW (1 << 4) - -/** \brief Driver is waiting for the CSW transmission to finish */ -#define MSDD_STATE_WAIT_CSW (1 << 5) - -/** \brief Driver is waiting for the MassStorageReset */ -#define MSDD_STATE_WAIT_RESET (1 << 6) -/** @}*/ - -/** \addtogroup usbd_msd_driver_result_codes MSD Driver Result Codes - * @{ - * This page lists result codes for MSD functions. - * - * \section Codes - * - MSDD_STATUS_SUCCESS - * - MSDD_STATUS_ERROR - * - MSDD_STATUS_INCOMPLETE - * - MSDD_STATUS_PARAMETER - * - MSDD_STATUS_RW - */ - -/** \brief Method was successful */ -#define MSDD_STATUS_SUCCESS 0x00 - -/** \brief There was an error when trying to perform a method */ -#define MSDD_STATUS_ERROR 0x01 - -/** \brief No error was encountered but the application should call the - method again to continue the operation */ -#define MSDD_STATUS_INCOMPLETE 0x02 - -/** \brief A wrong parameter has been passed to the method */ -#define MSDD_STATUS_PARAMETER 0x03 - -/** \brief An error when reading/writing disk (protected or not present) */ -#define MSDD_STATUS_RW 0x04 -/** @}*/ - -/** \addtogroup usbd_msd_driver_action_cases MSD Driver Action Cases - * @{ - * This page lists actions to perform during the post-processing phase of a - * command. - * - * \section Actions - * - MSDD_CASE_PHASE_ERROR - * - MSDD_CASE_STALL_IN - * - MSDD_CASE_STALL_OUT - */ - -/** \brief Indicates that the CSW should report a phase error */ -#define MSDD_CASE_PHASE_ERROR (1 << 0) - -/** \brief The driver should halt the Bulk IN pipe after the transfer */ -#define MSDD_CASE_STALL_IN (1 << 1) - -/** \brief The driver should halt the Bulk OUT pipe after the transfer */ -#define MSDD_CASE_STALL_OUT (1 << 2) -/** @}*/ - -/*------------------------------------------------------------------------------ */ - -/** \addtogroup usbd_msd_driver_xfr_directions MSD Driver Xfr Directions - * @{ - * This page lists possible direction values for a data transfer - * - MSDD_DEVICE_TO_HOST - * - MSDD_HOST_TO_DEVICE - * - MSDD_NO_TRANSFER - */ -/** Data transfer from device to host (READ) */ -#define MSDD_DEVICE_TO_HOST 0 -/** Data transfer from host to device (WRITE) */ -#define MSDD_HOST_TO_DEVICE 1 -/** No data transfer */ -#define MSDD_NO_TRANSFER 2 -/** @}*/ - -/*----------------------------------------------------------------------------- - * Types - *-----------------------------------------------------------------------------*/ - -/** - * \typedef MSDTransfer - * \brief Structure for holding the result of a USB transfer - * \see MSDDriver_Callback - */ -typedef struct _MSDTransfer { - - uint32_t transferred; /** Number of bytes transferred */ - uint32_t remaining; /** Number of bytes not transferred */ - volatile uint16_t semaphore; /** Semaphore to indicate transfer completion */ - uint16_t status; /** Operation result code */ -} MSDTransfer; - -/** - * \typedef MSDCommandState - * \brief Status of an executing command - * \see MSDCbw - * \see MSDCsw - * \see MSDTransfer - *------------------------------------------------------------------------------*/ -typedef struct _MSDCommandState { - - MSDTransfer transfer; /**< Current transfer status (USB) */ - MSDTransfer disktransfer;/**< Current transfer status (Disk) */ - uint32_t length; /**< Remaining length of command */ - MSCbw cbw; /**< Received CBW (31 bytes) */ - uint8_t state; /**< Current command state */ - MSCsw csw; /**< CSW to send (13 bytes) */ - uint8_t postprocess; /**< Actions to perform when command is complete */ - uint8_t pipeIN; /**< Pipe ID for input */ - uint8_t pipeOUT; /**< Pipe ID for output */ -} MSDCommandState; - -/** - * \typedef MSDDriver - * \brief MSD driver state variables - * \see MSDCommandState - * \see MSDLun - */ -typedef struct _MSDDriver { - - /** USB Driver for the %device. */ - USBDDriver *pUsbd; - /** LUN list for the %device. */ - MSDLun *luns; - /** State of the currently executing command */ - MSDCommandState commandState; - /** Associated interface number */ - uint8_t interfaceNb; - /** Maximum LUN index */ - uint8_t maxLun; - /** Current state of the driver */ - uint8_t state; - /** Indicates if the driver is waiting for a reset recovery */ - uint8_t waitResetRecovery; -} MSDDriver; - -/*----------------------------------------------------------------------------- - * Inline functions - *-----------------------------------------------------------------------------*/ -/** - * This function is to be used as a callback for USB or LUN transfers. - * \param transfer Pointer to the transfer structure to update - * \param status Operation result code - * \param transferred Number of bytes transferred by the command - * \param remaining Number of bytes not transferred - */ -static inline void MSDDriver_Callback(MSDTransfer *transfer, - uint8_t status, - uint32_t transferred, - uint32_t remaining) -{ - TRACE_DEBUG( "Cbk " ) ; - transfer->semaphore++; - transfer->status = status; - transfer->transferred = transferred; - transfer->remaining = remaining; -} - -/*----------------------------------------------------------------------------- - * Exported functions - *-----------------------------------------------------------------------------*/ - -extern void MSDD_StateMachine(MSDDriver * pMsdDriver); - -/**@}*/ - -#endif /* #define MSDDSTATEMACHINE_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/MSDDriver.h b/firmware/atmel_softpack_libraries/usb/include/MSDDriver.h deleted file mode 100644 index 37ea63a9..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/MSDDriver.h +++ /dev/null @@ -1,141 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \section Purpose - * - * Mass storage %device driver implementation. - * - * \section Usage - * - * -# Enable and setup USB related pins (see pio & board.h). - * -# Configure the memory interfaces used for Mass Storage LUNs - * (see memories, MSDLun.h). - * -# Instance the USB device configure descriptor as - * MSDConfigurationDescriptors or MSDConfigurationDescriptorsOTG defined. - * Interface number should be 0. - * -# Configure the USB MSD %driver using MSDDriver_Initialize. - * -# Invoke MSDDriver_StateMachine in main loop to handle all Mass Storage - * operations. - */ - -#ifndef MSDDRIVER_H -#define MSDDRIVER_H - -/** \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef MSDConfigurationDescriptors - * \brief List of configuration descriptors used by a Mass Storage device driver. - */ -typedef struct _MSDConfigurationDescriptors { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - /** Mass storage interface descriptor. */ - USBInterfaceDescriptor interface; - /** Bulk-out endpoint descriptor. */ - USBEndpointDescriptor bulkOut; - /** Bulk-in endpoint descriptor. */ - USBEndpointDescriptor bulkIn; - -} __attribute__ ((packed)) MSDConfigurationDescriptors; - -/** - * \typedef MSDConfigurationDescriptorsOTG - * \brief List of configuration descriptors used by a - * Mass Storage device driver, with OTG support. - */ -typedef struct _MSDConfigurationDescriptorsOTG { - - /** Standard configuration descriptor. */ - USBConfigurationDescriptor configuration; - /* OTG descriptor */ - USBOtgDescriptor otgDescriptor; - /** Mass storage interface descriptor. */ - USBInterfaceDescriptor interface; - /** Bulk-out endpoint descriptor. */ - USBEndpointDescriptor bulkOut; - /** Bulk-in endpoint descriptor. */ - USBEndpointDescriptor bulkIn; - -} __attribute__ ((packed)) MSDConfigurationDescriptorsOTG; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/*------------------------------------------------------------------------------ - * Global functions - *------------------------------------------------------------------------------*/ - -extern void MSDDriver_Initialize( - const USBDDriverDescriptors *pDescriptors, - MSDLun *luns, uint8_t numLuns); - -extern void MSDDriver_RequestHandler( - const USBGenericRequest *request); - -extern void MSDDriver_ConfigurationChangeHandler( - uint8_t cfgnum); - -/** - * State machine for the MSD driver - * \param pMsdDriver Pointer to MSDDriver instance. - */ -static inline void MSDDriver_StateMachine(void) { - MSDFunction_StateMachine(); -} - -/**@}*/ - -#endif /* #ifndef MSDDRIVER_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/MSDFunction.h b/firmware/atmel_softpack_libraries/usb/include/MSDFunction.h deleted file mode 100644 index 0cffc59b..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/MSDFunction.h +++ /dev/null @@ -1,74 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * Mass storage function driver definitions. - */ - -#ifndef MSDFUNCTION_H -#define MSDFUNCTION_H - -/** \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include - -#include -#include -#include - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Global functions - *------------------------------------------------------------------------------*/ - -extern void MSDFunction_Initialize( - USBDDriver * pUsbd, uint8_t bInterfaceNb, - MSDLun * pLuns, uint8_t numLuns); - -extern uint32_t MSDFunction_RequestHandler( - const USBGenericRequest *request); - -extern void MSDFunction_Configure( - USBGenericDescriptor * pDescriptors, uint16_t wLength); - -extern void MSDFunction_StateMachine(void); - -/**@}*/ - -#endif /* #ifndef MSDDRIVER_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/MSDIOFifo.h b/firmware/atmel_softpack_libraries/usb/include/MSDIOFifo.h deleted file mode 100644 index 4ed70fc5..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/MSDIOFifo.h +++ /dev/null @@ -1,145 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _MSDIOFIFO_H -#define _MSDIOFIFO_H - -/** \file - * \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** Idle state, do nothing */ -#define MSDIO_IDLE 0 -/** Start, to start IO operation */ -#define MSDIO_START 1 -/** Wait, waiting for IO operation done */ -#define MSDIO_WAIT 2 -/** Next, to check if the next block can be performed */ -#define MSDIO_NEXT 3 -/** Pause, to pause the process for buffer full or null */ -#define MSDIO_PAUSE 4 -/** Abort, to abort the process */ -#define MSDIO_ABORT 5 -/** Done, finish without error */ -#define MSDIO_DONE 6 -/** Error, any error happens */ -#define MSDIO_ERROR 7 - -/** FIFO offset before USB transmit start */ -/*#define MSDIO_FIFO_OFFSET (4*512) */ - - -/** FIFO trunk size (in each transfer, large amount of data) */ -#if !defined(MSD_OP_BUFFER) -#define MSDIO_READ10_CHUNK_SIZE (4*512) -#define MSDIO_WRITE10_CHUNK_SIZE (4*512) -#endif - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** \brief FIFO buffer for READ/WRITE (disk) operation of a mass storage device */ -typedef struct _MSDIOFifo { - - /** Pointer to the ring buffer allocated for read/write */ - unsigned char * pBuffer; - /** The size of the buffer allocated */ - unsigned int bufferSize; -#ifdef MSDIO_FIFO_OFFSET - /** The offset to start USB transfer (READ10) */ - unsigned int bufferOffset; -#endif - /** The index of input data (loaded to fifo buffer) */ - unsigned int inputNdx; - /** The total size of the loaded data */ - unsigned int inputTotal; - /** The index of output data (sent from the fifo buffer) */ - unsigned int outputNdx; - /** The total size of the output data */ - unsigned int outputTotal; - - /** The total size of the data */ - unsigned int dataTotal; - /** The size of the block in bytes */ - unsigned short blockSize; -#if defined(MSDIO_READ10_CHUNK_SIZE) || defined(MSDIO_WRITE10_CHUNK_SIZE) - /** The size of one chunk */ - /** (1 block, or several blocks for large amount data R/W) */ - unsigned int chunkSize; -#endif - /** State of input & output */ - unsigned char inputState; - unsigned char outputState; - - /*- Statistics */ - - /** Times when fifo has no data to send */ - unsigned short nullCnt; - /** Times when fifo can not load more input data */ - unsigned short fullCnt; -} MSDIOFifo, *PMSDIOFifo; - -/*------------------------------------------------------------------------------ - * MACROS - *------------------------------------------------------------------------------*/ - -/*------------------------------------------------------------------------------ - * Increase the index, by defined block size, in the ring buffer - * \param ndx The index to be increased - * \param sectSize The defined block size - * \param bufSize The ring buffer size - *------------------------------------------------------------------------------*/ -#define MSDIOFifo_IncNdx(ndx, sectSize, bufSize) \ - if ((ndx) >= (bufSize) - (sectSize)) (ndx) = 0; \ - else (ndx) += (sectSize) - - -/*------------------------------------------------------------------------------ - * Exported Functions - *------------------------------------------------------------------------------*/ - - -extern void MSDIOFifo_Init(MSDIOFifo *pFifo, - void * pBuffer, unsigned short bufferSize); - -/**@}*/ - -#endif /* _MSDIOFIFO_H */ - - diff --git a/firmware/atmel_softpack_libraries/usb/include/MSDLun.h b/firmware/atmel_softpack_libraries/usb/include/MSDLun.h deleted file mode 100644 index 57114000..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/MSDLun.h +++ /dev/null @@ -1,176 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \section Purpose - * - * Logical Unit Number (LUN) used by the Mass Storage driver and the SCSI - * protocol. Represents a logical hard-drive. - * - * \section Usage - * -# Initialize Memory related pins (see pio & board.h). - * -# Initialize a Media instance for the LUN (see memories). - * -# Initlalize the LUN with LUN_Init, and link to the initialized Media. - * -# To read data from the LUN linked media, uses LUN_Read. - * -# To write data to the LUN linked media, uses LUN_Write. - * -# To unlink the media, uses LUN_Eject. - */ - -#ifndef MSDLUN_H -#define MSDLUN_H - -/** \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include -#include "memories.h" - -#include "SBC.h" -#include "MSDIOFifo.h" -#include "USBD.h" - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** LUN RC: success */ -#define LUN_STATUS_SUCCESS 0x00 -/** LUN RC: error */ -#define LUN_STATUS_ERROR 0x02 - -/** Media of LUN is removed */ -#define LUN_NOT_PRESENT 0x00 -/** LUN is ejected by host */ -#define LUN_EJECTED 0x01 -/** Media of LUN is changed */ -#define LUN_CHANGED 0x10 -/** LUN Not Ready to Ready transition */ -#define LUN_TRANS_READY LUN_CHANGED -/** Media of LUN is ready */ -#define LUN_READY 0x11 - -/*------------------------------------------------------------------------------ - * Types - *------------------------------------------------------------------------------*/ - -/** Mass storage device data flow monitor function type - * \param flowDirection 1 - device to host (READ10) - * 0 - host to device (WRITE10) - * \param dataLength Length of data transferred in bytes. - * \param fifoNullCount Times that FIFO is NULL to wait - * \param fifoFullCount Times that FIFO is filled to wait - */ -typedef void(*MSDLunDataMonitorFunction)(uint8_t flowDirection, - uint32_t dataLength, - uint32_t fifoNullCount, - uint32_t fifoFullCount); - -/*------------------------------------------------------------------------------ - * Structures - *------------------------------------------------------------------------------*/ - -/** \brief LUN structure */ -typedef struct { - - /** Pointer to a SBCInquiryData instance. */ - SBCInquiryData *inquiryData; - /** Fifo for USB transfer, must be assigned. */ - MSDIOFifo ioFifo; - /** Pointer to Media instance for the LUN. */ - Media *media; - /** Pointer to a Monitor Function to analyze the flow of LUN. - * \param flowDirection 1 - device to host (READ10) - * 0 - host to device (WRITE10) - * \param dataLength Length of data transferred in bytes. - * \param fifoNullCount Times that FIFO is NULL to wait - * \param fifoFullCount Times that FIFO is filled to wait - */ - void (*dataMonitor)(uint8_t flowDirection, - uint32_t dataLength, - uint32_t fifoNullCount, - uint32_t fifoFullCount); - /** The start position of the media (blocks) allocated to the LUN. */ - uint32_t baseAddress; - /** The size of the media (blocks) allocated to the LUN. */ - uint32_t size; - /** Sector size of the media in number of media blocks */ - uint16_t blockSize; - /** The LUN can be readonly even the media is writable */ - uint8_t protected; - /** The LUN status (Ejected/Changed/) */ - uint8_t status; - - /** Data for the RequestSense command. */ - SBCRequestSenseData requestSenseData; - /** Data for the ReadCapacity command. */ - SBCReadCapacity10Data readCapacityData; - -} MSDLun; - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void LUN_Init(MSDLun *lun, - Media *media, - uint8_t *ioBuffer, - uint32_t ioBufferSize, - uint32_t baseAddress, - uint32_t size, - uint16_t blockSize, - uint8_t protected, - void (*dataMonitor)(uint8_t flowDirection, - uint32_t dataLength, - uint32_t fifoNullCount, - uint32_t fifoFullCount)); - -extern uint32_t LUN_Eject(MSDLun *lun); - -extern uint32_t LUN_Write(MSDLun *lun, - uint32_t blockAddress, - void *data, - uint32_t length, - TransferCallback callback, - void *argument); - -extern uint32_t LUN_Read(MSDLun *lun, - uint32_t blockAddress, - void *data, - uint32_t length, - TransferCallback callback, - void *argument); - -/**@}*/ - -#endif /*#ifndef MSDLUN_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/MSDescriptors.h b/firmware/atmel_softpack_libraries/usb/include/MSDescriptors.h deleted file mode 100644 index c5bcc290..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/MSDescriptors.h +++ /dev/null @@ -1,109 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2010, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * - * \section ms_dev_desc Device Descriptors - * - * Declaration of constants for using Device Descriptors with a Mass Storage - * driver. - * - * - For a USB device: - * -# When declaring a USBDeviceDescriptor instance, use the Mass Storage - * codes defined in this file (see "MS device codes"). - * - * \section ms_if_desc Interface Descriptors - * - * Definition of several constants used when manipulating Mass Storage interface - * descriptors. - * - * - For a USB device: - * -# When declaring an interface descriptor for a Mass Storage device, use - * the class, subclass and protocol codes defined here (see - * "MS interface codes"). - */ - -#ifndef _MSDESCRIPTORS_H_ -#define _MSDESCRIPTORS_H_ -/**\addtogroup usb_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_ms_device_codes MS device codes - * @{ - * This page lists the class, subclass & protocol codes used by a device with - * a Mass Storage driver. - * - * \section Codes - * - * - MSDeviceDescriptor_CLASS - * - MSDeviceDescriptor_SUBCLASS - * - MSDeviceDescriptor_PROTOCOL - */ - -/** Class code for a Mass Storage device. */ -#define MSDeviceDescriptor_CLASS 0 - -/** Subclass code for a Mass Storage device. */ -#define MSDeviceDescriptor_SUBCLASS 0 - -/** Protocol code for a Mass Storage device. */ -#define MSDeviceDescriptor_PROTOCOL 0 -/** @}*/ - - -/** \addtogroup usb_ms_interface_code MS interface codes - * @{ - * This page lists the available class, subclass & protocol codes for a Mass - * Storage interface. - * - * \section Codes - * - * - MSInterfaceDescriptor_CLASS - * - MSInterfaceDescriptor_SCSI - * - MSInterfaceDescriptor_BULKONLY - */ - -/** Class code for a Mass Storage interface. */ -#define MSInterfaceDescriptor_CLASS 0x08 - -/** Subclass code for a Mass Storage interface using the SCSI protocol. */ -#define MSInterfaceDescriptor_SCSI 0x06 - -/** Protocol code for a Mass Storage interface using Bulk-Only Transport. */ -#define MSInterfaceDescriptor_BULKONLY 0x50 -/** @}*/ - -/**@}*/ -#endif /* #ifndef _MSDESCRIPTORS_H_ */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/SBC.h b/firmware/atmel_softpack_libraries/usb/include/SBC.h deleted file mode 100644 index 163c9a84..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/SBC.h +++ /dev/null @@ -1,678 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \section Purpose - * - * SCSI definitions. - * - * \section Usage - * - * -# After command block received, Access and decode the SCSI command block - * with SBCCommand structure. - */ - -#ifndef SBC_H -#define SBC_H - -/** \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_sbc_operation_codes SBC Operation Codes - * @{ - * This page lists operation codes of commands described in the SBC-3 - * standard. - * - * \note That most commands are actually defined in other standards, - * like SPC-4. Optional commands are not included here. - * - * \see sbc3r07.pdf - Section 5.1 - Table 12 - * \see spc4r06.pdf - * \see SBCCommand - * - * \section Codes - * - SBC_INQUIRY - * - SBC_READ_10 - * - SBC_READ_CAPACITY_10 - * - SBC_REQUEST_SENSE - * - SBC_TEST_UNIT_READY - * - SBC_WRITE_10 - * - * \section Optional Codes but required by Windows - * - SBC_PREVENT_ALLOW_MEDIUM_REMOVAL - * - SBC_MODE_SENSE_6 - * - SBC_VERIFY_10 - * - SBC_READ_FORMAT_CAPACITIES - */ - -/** Request information regarding parameters of the target and Logical Unit. */ -#define SBC_INQUIRY 0x12 -/** Request the transfer data to the host. */ -#define SBC_READ_10 0x28 -/** Request capacities of the currently installed medium. */ -#define SBC_READ_CAPACITY_10 0x25 -/** Request that the device server transfer sense data. */ -#define SBC_REQUEST_SENSE 0x03 -/** Check if the LUN is ready */ -#define SBC_TEST_UNIT_READY 0x00 -/** Request that the device write the data transferred by the host. */ -#define SBC_WRITE_10 0x2A - -/** Request that the target enable or disable the removal of the medium in */ -/** the Logical Unit. */ -#define SBC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E -/** Report parameters. */ -#define SBC_MODE_SENSE_6 0x1A -/** Request that the %device verify the data on the medium. */ -#define SBC_VERIFY_10 0x2F -/** Request a list of the possible capacities that can be formatted on medium */ -#define SBC_READ_FORMAT_CAPACITIES 0x23 -/** @}*/ - -/** \addtogroup usbd_sbc_periph_quali SBC Periph. Qualifiers - * @{ - * This page lists the peripheral qualifier values specified in the INQUIRY - * data - * \see spc4r06.pdf - Section 6.4.2 - Table 83 - * \see SBCInquiryData - * - * \section Qualifiers - * - SBC_PERIPHERAL_DEVICE_CONNECTED - * - SBC_PERIPHERAL_DEVICE_NOT_CONNECTED - * - SBC_PERIPHERAL_DEVICE_NOT_SUPPORTED - */ - -#define SBC_PERIPHERAL_DEVICE_CONNECTED 0x00 -#define SBC_PERIPHERAL_DEVICE_NOT_CONNECTED 0x01 -#define SBC_PERIPHERAL_DEVICE_NOT_SUPPORTED 0x03 -/** @}*/ - -/** \addtogroup usbd_sbc_periph_types SBC Periph. Types - * @{ - * This page lists peripheral device types specified in the INQUIRY data - * \see spc4r06.pdf - Section 6.4.2 - Table 84 - * \see SBCInquiryData - * - * \section Types - * - SBC_DIRECT_ACCESS_BLOCK_DEVICE - * - SBC_SEQUENTIAL_ACCESS_DEVICE - * - SBC_PRINTER_DEVICE - * - SBC_PROCESSOR_DEVICE - * - SBC_WRITE_ONCE_DEVICE - * - SBC_CD_DVD_DEVICE - * - SBC_SCANNER_DEVICE - * - SBC_OPTICAL_MEMORY_DEVICE - * - SBC_MEDIA_CHANGER_DEVICE - * - SBC_COMMUNICATION_DEVICE - * - SBC_STORAGE_ARRAY_CONTROLLER_DEVICE - * - SBC_ENCLOSURE_SERVICES_DEVICE - * - SBC_SIMPLIFIED_DIRECT_ACCESS_DEVICE - * - SBC_OPTICAL_CARD_READER_WRITER_DEVICE - * - SBC_BRIDGE_CONTROLLER_COMMANDS - * - SBC_OBJECT_BASED_STORAGE_DEVICE - */ - -#define SBC_DIRECT_ACCESS_BLOCK_DEVICE 0x00 -#define SBC_SEQUENTIAL_ACCESS_DEVICE 0x01 -#define SBC_PRINTER_DEVICE 0x02 -#define SBC_PROCESSOR_DEVICE 0x03 -#define SBC_WRITE_ONCE_DEVICE 0x04 -#define SBC_CD_DVD_DEVICE 0x05 -#define SBC_SCANNER_DEVICE 0x06 -#define SBC_OPTICAL_MEMORY_DEVICE 0x07 -#define SBC_MEDIA_CHANGER_DEVICE 0x08 -#define SBC_COMMUNICATION_DEVICE 0x09 -#define SBC_STORAGE_ARRAY_CONTROLLER_DEVICE 0x0C -#define SBC_ENCLOSURE_SERVICES_DEVICE 0x0D -#define SBC_SIMPLIFIED_DIRECT_ACCESS_DEVICE 0x0E -#define SBC_OPTICAL_CARD_READER_WRITER_DEVICE 0x0F -#define SBC_BRIDGE_CONTROLLER_COMMANDS 0x10 -#define SBC_OBJECT_BASED_STORAGE_DEVICE 0x11 -/** @}*/ - -/*------------------------------------------------------------------------------ */ -/** \brief Version value for the SBC-3 specification */ -/** \see spc4r06.pdf - Section 6.4.2 - Table 85 */ -#define SBC_SPC_VERSION_4 0x06 -/*------------------------------------------------------------------------------ */ - -/*------------------------------------------------------------------------------ */ -/** \brief Values for the TPGS field returned in INQUIRY data */ -/** \see spc4r06.pdf - Section 6.4.2 - Table 86 */ -#define SBC_TPGS_NONE 0x0 -#define SBC_TPGS_ASYMMETRIC 0x1 -#define SBC_TPGS_SYMMETRIC 0x2 -#define SBC_TPGS_BOTH 0x3 -/*------------------------------------------------------------------------------ */ - -/*------------------------------------------------------------------------------ */ -/** \brief Version descriptor value for the SBC-3 specification */ -/** \see spc4r06.pdf - Section 6.4.2 - Table 87 */ -#define SBC_VERSION_DESCRIPTOR_SBC_3 0x04C0 -/*------------------------------------------------------------------------------ */ - -/** \addtogroup usbd_sbc_secse_codes SBC Sense Response Codes - * @{ - * This page lists sense data response codes returned in REQUEST SENSE data - * \see spc4r06.pdf - Section 4.5.1 - Table 12 - * - * \section Codes - * - SBC_SENSE_DATA_FIXED_CURRENT - * - SBC_SENSE_DATA_FIXED_DEFERRED - * - SBC_SENSE_DATA_DESCRIPTOR_CURRENT - * - SBC_SENSE_DATA_DESCRIPTOR_DEFERRED - */ - -#define SBC_SENSE_DATA_FIXED_CURRENT 0x70 -#define SBC_SENSE_DATA_FIXED_DEFERRED 0x71 -#define SBC_SENSE_DATA_DESCRIPTOR_CURRENT 0x72 -#define SBC_SENSE_DATA_DESCRIPTOR_DEFERRED 0x73 -/** @}*/ - -/** \addtogroup usbd_sbc_sense_keys SBC Sense Keys - * @{ - * This page lists sense key values returned in the REQUEST SENSE data - * \see spc4r06.pdf - Section 4.5.6 - Table 27 - * - * \section Keys - * - SBC_SENSE_KEY_NO_SENSE - * - SBC_SENSE_KEY_RECOVERED_ERROR - * - SBC_SENSE_KEY_NOT_READY - * - SBC_SENSE_KEY_MEDIUM_ERROR - * - SBC_SENSE_KEY_HARDWARE_ERROR - * - SBC_SENSE_KEY_ILLEGAL_REQUEST - * - SBC_SENSE_KEY_UNIT_ATTENTION - * - SBC_SENSE_KEY_DATA_PROTECT - * - SBC_SENSE_KEY_BLANK_CHECK - * - SBC_SENSE_KEY_VENDOR_SPECIFIC - * - SBC_SENSE_KEY_COPY_ABORTED - * - SBC_SENSE_KEY_ABORTED_COMMAND - * - SBC_SENSE_KEY_VOLUME_OVERFLOW - * - SBC_SENSE_KEY_MISCOMPARE - */ - -/** No specific sense key. Successful command. */ -#define SBC_SENSE_KEY_NO_SENSE 0x00 -/** Command completed succesfully with some recovery action by the %device. */ -#define SBC_SENSE_KEY_RECOVERED_ERROR 0x01 -/** The device can not be accessed. */ -#define SBC_SENSE_KEY_NOT_READY 0x02 -/** Command terminated with a error condition that was probably caused by a */ -/** flaw in the medium or an error in the recorded data. */ -#define SBC_SENSE_KEY_MEDIUM_ERROR 0x03 -/** Hardware failure while performing the command or during a self test. */ -#define SBC_SENSE_KEY_HARDWARE_ERROR 0x04 -/** Illegal parameter found in the command or additional parameters. */ -#define SBC_SENSE_KEY_ILLEGAL_REQUEST 0x05 -/** Removable medium may have been changed or the %device has been reset. */ -#define SBC_SENSE_KEY_UNIT_ATTENTION 0x06 -/** Write on a block that is protected. */ -#define SBC_SENSE_KEY_DATA_PROTECT 0x07 -/** Indicates that a write-once device or a sequential-access device */ -/** encountered blank medium or format-defined end-of-data indication while */ -/** reading or a write-once device encountered a non-blank medium while writing. */ -#define SBC_SENSE_KEY_BLANK_CHECK 0x08 -/** Reporting vendor specific conditions. */ -#define SBC_SENSE_KEY_VENDOR_SPECIFIC 0x09 -/** EXTENDED COPY command was aborted. */ -#define SBC_SENSE_KEY_COPY_ABORTED 0x0A -/** Device aborted the command. */ -#define SBC_SENSE_KEY_ABORTED_COMMAND 0x0B -/** A buffered peripheral device is overflow. */ -#define SBC_SENSE_KEY_VOLUME_OVERFLOW 0x0D -/** The source data did not match the data read from the medium. */ -#define SBC_SENSE_KEY_MISCOMPARE 0x0E -/** @}*/ - -/** \addtogroup usbd_sbc_sense_additionals SBC Sense Additionals - * @{ - * This page lists additional sense code values returned in REQUEST SENSE data - * \see spc4r06.pdf - Section 4.5.6 - Table 28 - * - * \section Additional Codes - * - SBC_ASC_LOGICAL_UNIT_NOT_READY - * - SBC_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE - * - SBC_ASC_INVALID_FIELD_IN_CDB - * - SBC_ASC_WRITE_PROTECTED - * - SBC_ASC_FORMAT_CORRUPTED - * - SBC_ASC_INVALID_COMMAND_OPERATION_CODE - * - SBC_ASC_TOO_MUCH_WRITE_DATA - * - SBC_ASC_NOT_READY_TO_READY_CHANGE - * - SBC_ASC_MEDIUM_NOT_PRESENT - */ - -#define SBC_ASC_LOGICAL_UNIT_NOT_READY 0x04 -#define SBC_ASC_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x21 -#define SBC_ASC_INVALID_FIELD_IN_CDB 0x24 -#define SBC_ASC_WRITE_PROTECTED 0x27 -#define SBC_ASC_FORMAT_CORRUPTED 0x31 -#define SBC_ASC_INVALID_COMMAND_OPERATION_CODE 0x20 -#define SBC_ASC_TOO_MUCH_WRITE_DATA 0x26 -#define SBC_ASC_NOT_READY_TO_READY_CHANGE 0x28 -#define SBC_ASC_MEDIUM_NOT_PRESENT 0x3A -/** @}*/ - -/*------------------------------------------------------------------------------ */ -/** \brief MEDIUM TYPE field value for direct-access block devices */ -/** \see sbc3r06.pdf - Section 6.3.1 */ -#define SBC_MEDIUM_TYPE_DIRECT_ACCESS_BLOCK_DEVICE 0x00 -/*------------------------------------------------------------------------------ */ - -/*------------------------------------------------------------------------------ */ -/** \brief MRIE field values */ -/** \see sbc3r06.pdf - Section 7.4.11 - Table 286 */ -#define SBC_MRIE_NO_REPORTING 0x00 -#define SBC_MRIE_ASYNCHRONOUS 0x01 -#define SBC_MRIE_GENERATE_UNIT_ATTENTION 0x02 -#define SBC_MRIE_COND_GENERATE_RECOVERED_ERROR 0x03 -#define SBC_MRIE_UNCOND_GENERATE_RECOVERED_ERROR 0x04 -#define SBC_MRIE_GENERATE_NO_SENSE 0x05 -#define SBC_MRIE_ON_REQUEST 0x06 -/*------------------------------------------------------------------------------ */ - -/*------------------------------------------------------------------------------ */ -/** \brief Supported mode pages */ -/** \see sbc3r06.pdf - Section 6.3.1 - Table 115 */ -#define SBC_PAGE_READ_WRITE_ERROR_RECOVERY 0x01 -#define SBC_PAGE_INFORMATIONAL_EXCEPTIONS_CONTROL 0x1C -#define SBC_PAGE_RETURN_ALL 0x3F -#define SBC_PAGE_VENDOR_SPECIFIC 0x00 -/*------------------------------------------------------------------------------ */ - -/** \addtogroup usbd_msd_endian_macros MSD Endian Macros - * @{ - * This page lists the macros for endianness conversion. - * - * \section Macros - * - WORDB - * - DWORDB - * - STORE_DWORDB - * - STORE_WORDB - */ - - /** \brief Converts a byte array to a word value using the big endian format */ -#define WORDB(bytes) ((unsigned short) ((bytes[0] << 8) | bytes[1])) - -/** \brief Converts a byte array to a dword value using the big endian format */ -#define DWORDB(bytes) ((unsigned int) ((bytes[0] << 24) | (bytes[1] << 16) \ - | (bytes[2] << 8) | bytes[3])) - -/** \brief Stores a dword value in a byte array, in big endian format */ -#define STORE_DWORDB(dword, bytes) \ - bytes[0] = (unsigned char) (((dword) >> 24) & 0xFF); \ - bytes[1] = (unsigned char) (((dword) >> 16) & 0xFF); \ - bytes[2] = (unsigned char) (((dword) >> 8) & 0xFF); \ - bytes[3] = (unsigned char) ((dword) & 0xFF); - -/** \brief Stores a word value in a byte array, in big endian format */ -#define STORE_WORDB(word, bytes) \ - bytes[0] = (unsigned char) (((word) >> 8) & 0xFF); \ - bytes[1] = (unsigned char) ((word) & 0xFF); -/** @}*/ - -/*------------------------------------------------------------------------------ - * Structures - *------------------------------------------------------------------------------*/ - -#ifdef __ICCARM__ /* IAR */ -#pragma pack(1) /* IAR */ -#define __attribute__(...) /* IAR */ -#endif /* IAR */ - -/** - * \typedef SBCInquiry - * \brief Structure for the INQUIRY command - * \see spc4r06.pdf - Section 6.4.1 - Table 81 - */ -typedef struct _SBCInquiry { - - unsigned char bOperationCode; /*!< 0x12 : SBC_INQUIRY */ - unsigned char isEVPD:1, /*!< Type of requested data */ - bReserved1:7; /*!< Reserved bits */ - unsigned char bPageCode; /*!< Specifies the VPD to return */ - unsigned char pAllocationLength[2]; /*!< Size of host buffer */ - unsigned char bControl; /*!< 0x00 */ - -} __attribute__ ((packed)) SBCInquiry; /* GCC */ - -/** - * \typedef SBCInquiryData - * \brief Standard INQUIRY data format returned by the device - * \see spc4r06.pdf - Section 6.4.2 - Table 82 - */ -typedef struct _SBCInquiryData { - - unsigned char bPeripheralDeviceType:5, /*!< Peripheral device type */ - bPeripheralQualifier :3; /*!< Peripheral qualifier */ - unsigned char bReserved1:7, /*!< Reserved bits */ - isRMB :1; /*!< Is media removable ? */ - unsigned char bVersion; /*!< SPC version used */ - unsigned char bResponseDataFormat:4, /*!< Must be 0x2 */ - isHIGHSUP :1, /*!< Hierarchical addressing used ? */ - isNORMACA :1, /*!< ACA attribute supported ? */ - bObsolete1 :2; /*!< Obsolete bits */ - unsigned char bAdditionalLength; /*!< Length of remaining INQUIRY data */ - unsigned char isSCCS :1, /*!< Embedded SCC ? */ - isACC :1, /*!< Access control coordinator ? */ - bTPGS :2, /*!< Target port support group */ - is3PC :1, /*!< Third-party copy supported ? */ - bReserved2:2, /*!< Reserved bits */ - isProtect :1; /*!< Protection info supported ? */ - unsigned char bObsolete2:1, /*!< Obsolete bit */ - isEncServ :1, /*!< Embedded enclosure service comp? */ - isVS :1, /*!< ??? */ - isMultiP :1, /*!< Multi-port device ? */ - bObsolete3:3, /*!< Obsolete bits */ - bUnused1 :1; /*!< Unused feature */ - unsigned char bUnused2:6, /*!< Unused features */ - isCmdQue:1, /*!< Task management model supported ? */ - isVS2 :1; /*!< ??? */ - unsigned char pVendorID[8]; /*!< T10 vendor identification */ - unsigned char pProductID[16]; /*!< Vendor-defined product ID */ - unsigned char pProductRevisionLevel[4];/*!< Vendor-defined product revision */ - unsigned char pVendorSpecific[20]; /*!< Vendor-specific data */ - unsigned char bUnused3; /*!< Unused features */ - unsigned char bReserved3; /*!< Reserved bits */ - unsigned short pVersionDescriptors[8]; /*!< Standards the device complies to */ - unsigned char pReserved4[22]; /*!< Reserved bytes */ - -} __attribute__ ((packed)) SBCInquiryData; /* GCC */ - -/** - * \typedef SBCRead10 - * \brief Data structure for the READ (10) command - * \see sbc3r07.pdf - Section 5.7 - Table 34 - */ -typedef struct _SBCRead10 { - - unsigned char bOperationCode; /*!< 0x28 : SBC_READ_10 */ - unsigned char bObsolete1:1, /*!< Obsolete bit */ - isFUA_NV:1, /*!< Cache control bit */ - bReserved1:1, /*!< Reserved bit */ - isFUA:1, /*!< Cache control bit */ - isDPO:1, /*!< Cache control bit */ - bRdProtect:3; /*!< Protection information to send */ - unsigned char pLogicalBlockAddress[4]; /*!< Index of first block to read */ - unsigned char bGroupNumber:5, /*!< Information grouping */ - bReserved2:3; /*!< Reserved bits */ - unsigned char pTransferLength[2]; /*!< Number of blocks to transmit */ - unsigned char bControl; /*!< 0x00 */ - -} __attribute__ ((packed)) SBCRead10; /* GCC */ - -/** - * \typedef SBCReadCapacity10 - * \brief Structure for the READ CAPACITY (10) command - * \see sbc3r07.pdf - Section 5.11.1 - Table 40 - */ -typedef struct _SBCReadCapacity10 { - - unsigned char bOperationCode; /*!< 0x25 : RBC_READ_CAPACITY */ - unsigned char bObsolete1:1, /*!< Obsolete bit */ - bReserved1:7; /*!< Reserved bits */ - unsigned char pLogicalBlockAddress[4]; /*!< Block to evaluate if PMI is set */ - unsigned char pReserved2[2]; /*!< Reserved bytes */ - unsigned char isPMI:1, /*!< Partial medium indicator bit */ - bReserved3:7; /*!< Reserved bits */ - unsigned char bControl; /*!< 0x00 */ - -} SBCReadCapacity10; - -/*------------------------------------------------------------------------------ - * \brief Data returned by the device after a READ CAPACITY (10) command - * \see sbc3r07.pdf - Section 5.11.2 - Table 41 - *------------------------------------------------------------------------------*/ -typedef struct { - - unsigned char pLogicalBlockAddress[4]; /*!< Address of last logical block */ - unsigned char pLogicalBlockLength[4]; /*!< Length of each logical block */ - -} SBCReadCapacity10Data; - -/*------------------------------------------------------------------------------ - * \brief Structure for the REQUEST SENSE command - * \see spc4r06.pdf - Section 6.26 - Table 170 - *------------------------------------------------------------------------------*/ -typedef struct { - - unsigned char bOperationCode; /*!< 0x03 : SBC_REQUEST_SENSE */ - unsigned char isDesc :1, /*!< Type of information expected */ - bReserved1:7; /*!< Reserved bits */ - unsigned char pReserved2[2]; /*!< Reserved bytes */ - unsigned char bAllocationLength; /*!< Size of host buffer */ - unsigned char bControl; /*!< 0x00 */ - -} SBCRequestSense; - -/*------------------------------------------------------------------------------ - * \brief Fixed format sense data returned after a REQUEST SENSE command has - * been received with a DESC bit cleared. - * \see spc4r06.pdf - Section 4.5.3 - Table 26 - *------------------------------------------------------------------------------*/ -typedef struct { - - unsigned char bResponseCode:7, /*!< Sense data format */ - isValid :1; /*!< Information field is standard */ - unsigned char bObsolete1; /*!< Obsolete byte */ - unsigned char bSenseKey :4, /*!< Generic error information */ - bReserved1:1, /*!< Reserved bit */ - isILI :1, /*!< SSC */ - isEOM :1, /*!< SSC */ - isFilemark:1; /*!< SSC */ - unsigned char pInformation[4]; /*!< Command-specific */ - unsigned char bAdditionalSenseLength; /*!< sizeof(SBCRequestSense_data)-8 */ - unsigned char pCommandSpecificInformation[4]; /*!< Command-specific */ - unsigned char bAdditionalSenseCode; /*!< Additional error information */ - unsigned char bAdditionalSenseCodeQualifier; /*!< Further error information */ - unsigned char bFieldReplaceableUnitCode; /*!< Specific component code */ - unsigned char bSenseKeySpecific:7, /*!< Additional exception info */ - isSKSV :1; /*!< Is sense key specific valid? */ - unsigned char pSenseKeySpecific[2]; /*!< Additional exception info */ - -} SBCRequestSenseData; - -/** - * \brief SBCTestUnitReady - * Data structure for the TEST UNIT READY command - * \see spc4r06.pdf - Section 6.34 - Table 192 - */ -typedef struct _SBCTestUnitReady { - - unsigned char bOperationCode; /*!< 0x00 : SBC_TEST_UNIT_READY */ - unsigned char pReserved1[4]; /*!< Reserved bits */ - unsigned char bControl; /*!< 0x00 */ - -} __attribute__ ((packed)) SBCTestUnitReady; /* GCC */ - -/** - * \typedef SBCWrite10 - * \brief Structure for the WRITE (10) command - * \see sbc3r07.pdf - Section 5.26 - Table 70 - */ -typedef struct _SBCWrite10 { - - unsigned char bOperationCode; /*!< 0x2A : SBC_WRITE_10 */ - unsigned char bObsolete1:1, /*!< Obsolete bit */ - isFUA_NV:1, /*!< Cache control bit */ - bReserved1:1, /*!< Reserved bit */ - isFUA:1, /*!< Cache control bit */ - isDPO:1, /*!< Cache control bit */ - bWrProtect:3; /*!< Protection information to send */ - unsigned char pLogicalBlockAddress[4]; /*!< First block to write */ - unsigned char bGroupNumber:5, /*!< Information grouping */ - bReserved2:3; /*!< Reserved bits */ - unsigned char pTransferLength[2]; /*!< Number of blocks to write */ - unsigned char bControl; /*!< 0x00 */ - -} SBCWrite10; - -/** - * \typedef SBCMediumRemoval - * \brief Structure for the PREVENT/ALLOW MEDIUM REMOVAL command - * \see sbc3r07.pdf - Section 5.5 - Table 30 - */ -typedef struct _SBCMediumRemoval { - - unsigned char bOperationCode; /*!< 0x1E : SBC_PREVENT_ALLOW_MEDIUM_REMOVAL */ - unsigned char pReserved1[3]; /*!< Reserved bytes */ - unsigned char bPrevent:2, /*!< Accept/prohibit removal */ - bReserved2:6; /*!< Reserved bits */ - unsigned char bControl; /*!< 0x00 */ - -} __attribute__ ((packed)) SBCMediumRemoval; /* GCC */ - -/** - * \typedef SBCModeSense6 - * \brief Structure for the MODE SENSE (6) command - * \see spc4r06 - Section 6.9.1 - Table 98 - */ -typedef struct _SBCModeSense6 { - - unsigned char bOperationCode; /*!< 0x1A : SBC_MODE_SENSE_6 */ - unsigned char bReserved1:3, /*!< Reserved bits */ - isDBD:1, /*!< Disable block descriptors bit */ - bReserved2:4; /*!< Reserved bits */ - unsigned char bPageCode:6, /*!< Mode page to return */ - bPC:2; /*!< Type of parameter values to return */ - unsigned char bSubpageCode; /*!< Mode subpage to return */ - unsigned char bAllocationLength; /*!< Host buffer allocated size */ - unsigned char bControl; /*!< 0x00 */ - -} __attribute__ ((packed)) SBCModeSense6; /* GCC */ - -/** - * \typedef SBCModeParameterHeader6 - * \brief Header for the data returned after a MODE SENSE (6) command - * \see spc4r06.pdf - Section 7.4.3 - Table 268 - */ -typedef struct _SBCModeParameterHeader6 { - - unsigned char bModeDataLength; /*!< Length of mode data to follow */ - unsigned char bMediumType; /*!< Type of medium (SBC_MEDIUM_TYPE_DIRECT_ACCESS_BLOCK_DEVICE) */ - unsigned char bReserved1:4, /*!< Reserved bits */ - isDPOFUA:1, /*!< DPO/FUA bits supported ? */ - bReserved2:2, /*!< Reserved bits */ - isWP:1; /*!< Is medium write-protected ? */ - unsigned char bBlockDescriptorLength; /*!< Length of all block descriptors */ - -} __attribute__ ((packed)) SBCModeParameterHeader6; /* GCC */ - -/** - * \typedef SBCInformationalExceptionsControl - * \brief Informational exceptions control mode page - * \see spc4r06.pdf - Section 7.4.11 - Table 285 - */ -typedef struct _SBCInformationalExceptionsControl { - - unsigned char bPageCode:6, /*!< 0x1C : SBC_PAGE_INFORMATIONAL_EXCEPTIONS_CONTROL */ - isSPF:1, /*!< Page or subpage data format */ - isPS:1; /*!< Parameters saveable ? */ - unsigned char bPageLength; /*!< Length of page data (0x0A) */ - unsigned char isLogErr:1, /*!< Should informational exceptions be logged ? */ - isEBackErr:1, /*!< Enable background error bit */ - isTest:1, /*!< Create a device test failure ? */ - isDExcpt:1, /*!< Disable exception control bit */ - isEWasc:1, /*!< Report warnings ? */ - isEBF:1, /*!< Enable background function bit */ - bReserved1:1, /*!< Reserved bit */ - isPerf:1; /*!< Delay acceptable when treating exceptions ? */ - unsigned char bMRIE:4, /*!< Method of reporting informational exceptions */ - bReserved2:4; /*!< Reserved bits */ - unsigned char pIntervalTimer[4]; /*!< Error reporting period */ - unsigned char pReportCount[4]; /*!< Maximum number of time a report can be issued */ - -} __attribute__ ((packed)) SBCInformationalExceptionsControl; /* GCC */ - -/** - * \typedef SBCReadWriteErrorRecovery - * \brief Read/write error recovery mode page - * \see sbc3r07.pdf - Section 6.3.5 - Table 122 - */ -typedef struct _SBCReadWriteErrorRecovery { - - unsigned char bPageCode:6, /*!< 0x01 : SBC_PAGE_READ_WRITE_ERROR_RECOVERY */ - isSPF:1, /*!< Page or subpage data format */ - isPS:1; /*!< Parameters saveable ? */ - unsigned char bPageLength; /*!< Length of page data (0x0A) */ - unsigned char isDCR:1, /*!< Disable correction bit */ - isDTE:1, /*!< Data terminate on error bit */ - isPER:1, /*!< Post error bit */ - isEER:1, /*!< Enable early recovery bit */ - isRC:1, /*!< Read continuous bit */ - isTB:1, /*!< Transfer block bit */ - isARRE:1, /*!< Automatic read reallocation enabled bit */ - isAWRE:1; /*!< Automatic write reallocation enabled bit */ - unsigned char bReadRetryCount; /*!< Number of retries when reading */ - unsigned char pObsolete1[3]; /*!< Obsolete bytes */ - unsigned char bReserved1; /*!< Reserved byte */ - unsigned char bWriteRetryCount; /*!< Number of retries when writing */ - unsigned char bReserved2; /*!< Reserved byte */ - unsigned char pRecoveryTimeLimit[2]; /*!< Maximum time duration for error recovery */ - -} __attribute__ ((packed)) SBCReadWriteErrorRecovery; /* GCC */ - -/** - * \typedef SBCCommand - * \brief Generic structure for holding information about SBC commands - * \see SBCInquiry - * \see SBCRead10 - * \see SBCReadCapacity10 - * \see SBCRequestSense - * \see SBCTestUnitReady - * \see SBCWrite10 - * \see SBCMediumRemoval - * \see SBCModeSense6 - */ -typedef union _SBCCommand { - - unsigned char bOperationCode; /*!< Operation code of the command */ - SBCInquiry inquiry; /*!< INQUIRY command */ - SBCRead10 read10; /*!< READ (10) command */ - SBCReadCapacity10 readCapacity10; /*!< READ CAPACITY (10) command */ - SBCRequestSense requestSense; /*!< REQUEST SENSE command */ - SBCTestUnitReady testUnitReady; /*!< TEST UNIT READY command */ - SBCWrite10 write10; /*!< WRITE (10) command */ - SBCMediumRemoval mediumRemoval; /*!< PREVENT/ALLOW MEDIUM REMOVAL command */ - SBCModeSense6 modeSense6; /*!< MODE SENSE (6) command */ - -} SBCCommand; - -#ifdef __ICCARM__ /* IAR */ -#pragma pack() /* IAR */ -#endif /* IAR */ - -/**@}*/ - -#endif /*#ifndef SBC_H */ - diff --git a/firmware/atmel_softpack_libraries/usb/include/SBCMethods.h b/firmware/atmel_softpack_libraries/usb/include/SBCMethods.h deleted file mode 100644 index 3e78b4e3..00000000 --- a/firmware/atmel_softpack_libraries/usb/include/SBCMethods.h +++ /dev/null @@ -1,118 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \file - * \section Purpose - * - * SCSI commands implementation. - * - * section Usage - * - * -# After a CBW is received from host, use SBC_GetCommandInformation to check - * if the command is supported, and get the command length and type - * information before processing it. - * -# Then SBC_ProcessCommand can be used to handle a valid command, to - * perform the command operations. - * -# SBC_UpdateSenseData is used to update the sense data that will be sent - * to host. - */ - -#ifndef SBCMETHODS_H -#define SBCMETHODS_H - -/** \addtogroup usbd_msd - *@{ - */ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "SBC.h" -#include "MSDLun.h" -#include "MSDDStateMachine.h" - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \addtogroup usbd_sbc_command_state SBC Command States - * @{ - * This page lists the possible states of a SBC command. - * - * \section States - * - SBC_STATE_READ - * - SBC_STATE_WAIT_READ - * - SBC_STATE_WRITE - * - SBC_STATE_WAIT_WRITE - * - SBC_STATE_NEXT_BLOCK - */ - -/** Start of reading bulk data */ -#define SBC_STATE_READ 0x01 -/** Waiting for the bulk data reading complete */ -#define SBC_STATE_WAIT_READ 0x02 -/** Read error state */ -#define SBC_STATE_READ_ERROR 0x03 -/** Start next read block */ -#define SBC_STATE_NEXT_READ 0x04 -/** Start writing bulk data to host */ -#define SBC_STATE_WRITE 0x05 -/** Waiting for the bulk data sending complete */ -#define SBC_STATE_WAIT_WRITE 0x06 -/** Write error state */ -#define SBC_STATE_WRITE_ERROR 0x07 -/** Start next write block */ -#define SBC_STATE_NEXT_WRITE 0x08 -/** Start next command block */ -#define SBC_STATE_NEXT_BLOCK 0x09 -/** @}*/ - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ - -void SBC_UpdateSenseData(SBCRequestSenseData *requestSenseData, - unsigned char senseKey, - unsigned char additionalSenseCode, - unsigned char additionalSenseCodeQualifier); - -unsigned char SBC_GetCommandInformation(void *command, - unsigned int *length, - unsigned char *type, - MSDLun *lun); - -unsigned char SBC_ProcessCommand(MSDLun *lun, - MSDCommandState *commandState); - -/**@}*/ - -#endif /*#ifndef SBCMETHODS_H */ - - diff --git a/firmware/sam3s_examples_include/SAM3S.h b/firmware/sam3s_examples_include/SAM3S.h deleted file mode 100644 index 2f128300..00000000 --- a/firmware/sam3s_examples_include/SAM3S.h +++ /dev/null @@ -1,7735 +0,0 @@ -/* ---------------------------------------------------------------------------- */ -/* Atmel Microcontroller Software Support */ -/* ---------------------------------------------------------------------------- */ -/* Copyright (c) 2010, Atmel Corporation */ -/* */ -/* All rights reserved. */ -/* */ -/* Redistribution and use in source and binary forms, with or without */ -/* modification, are permitted provided that the following condition is met: */ -/* */ -/* - Redistributions of source code must retain the above copyright notice, */ -/* this list of conditions and the disclaimer below. */ -/* */ -/* Atmel's name may not be used to endorse or promote products derived from */ -/* this software without specific prior written permission. */ -/* */ -/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ -/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ -/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ -/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ -/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ -/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ -/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ -/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ -/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ -/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* ---------------------------------------------------------------------------- */ -/* */ -/* File Name : SAM3S.h */ -/* Object : SAM3S definitions */ -/* Generated by : AT91 SW Application Group */ -/* Generated on : 2010-09-06 */ - -#ifndef SAM3S_H -#define SAM3S_H - -/** \addtogroup SAM3S_definitions SAM3S definitions - This file defines all structures and symbols for SAM3S: - - registers and bitfields - - peripheral base address - - peripheral ID - - PIO definitions -*/ -/*@{*/ - -#ifdef __cplusplus - extern "C" { -#endif - -#ifndef __ASSEMBLY__ -#include -#ifndef __cplusplus -typedef volatile const uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#else -typedef volatile uint32_t RoReg; /**< Read only 32-bit register (volatile const unsigned int) */ -#endif -typedef volatile uint32_t WoReg; /**< Write only 32-bit register (volatile unsigned int) */ -typedef volatile uint32_t RwReg; /**< Read-Write 32-bit register (volatile unsigned int) */ -#define CAST(type, value) ((type *) value) -#define REG_ACCESS(type, address) (*(type*)address) /**< C code: Register value */ -#else -#define CAST(type, value) (value) -#define REG_ACCESS(type, address) (address) /**< Assembly code: Register address */ -#endif - -/* ************************************************************************** */ -/* CMSIS DEFINITIONS FOR SAM3S */ -/* ************************************************************************** */ -/** \addtogroup SAM3S_cmsis CMSIS Definitions */ -/*@{*/ - -/**< Interrupt Number Definition */ -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ******************************/ - NonMaskableInt_IRQn = -14, /**< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /**< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /**< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /**< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /**< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /**< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /**< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /**< 15 Cortex-M3 System Tick Interrupt */ -/****** SAM3S specific Interrupt Numbers *********************************/ - - SUPC_IRQn = 0, /**< 0 SAM3S Supply Controller (SUPC) */ - RSTC_IRQn = 1, /**< 1 SAM3S Reset Controller (RSTC) */ - RTC_IRQn = 2, /**< 2 SAM3S Real Time Clock (RTC) */ - RTT_IRQn = 3, /**< 3 SAM3S Real Time Timer (RTT) */ - WDT_IRQn = 4, /**< 4 SAM3S Watchdog Timer (WDT) */ - PMC_IRQn = 5, /**< 5 SAM3S Power Management Controller (PMC) */ - EFC_IRQn = 6, /**< 6 SAM3S Enhanced Embedded Flash Controller (EFC) */ - UART0_IRQn = 8, /**< 8 SAM3S UART 0 (UART0) */ - UART1_IRQn = 9, /**< 9 SAM3S UART 1 (UART1) */ - SMC_IRQn = 10, /**< 10 SAM3S Static Memory Controller (SMC) */ - PIOA_IRQn = 11, /**< 11 SAM3S Parallel I/O Controller A (PIOA) */ - PIOB_IRQn = 12, /**< 12 SAM3S Parallel I/O Controller B (PIOB) */ - PIOC_IRQn = 13, /**< 13 SAM3S Parallel I/O Controller C (PIOC) */ - USART0_IRQn = 14, /**< 14 SAM3S USART 0 (USART0) */ - USART1_IRQn = 15, /**< 15 SAM3S USART 1 (USART1) */ - HSMCI_IRQn = 18, /**< 18 SAM3S Multimedia Card Interface (HSMCI) */ - TWI0_IRQn = 19, /**< 19 SAM3S Two Wire Interface 0 (TWI0) */ - TWI1_IRQn = 20, /**< 20 SAM3S Two Wire Interface 1 (TWI1) */ - SPI_IRQn = 21, /**< 21 SAM3S Serial Peripheral Interface (SPI) */ - SSC_IRQn = 22, /**< 22 SAM3S Synchronous Serial Controler (SSC) */ - TC0_IRQn = 23, /**< 23 SAM3S Timer/Counter 0 (TC0) */ - TC1_IRQn = 24, /**< 24 SAM3S Timer/Counter 1 (TC1) */ - TC2_IRQn = 25, /**< 25 SAM3S Timer/Counter 2 (TC2) */ - TC3_IRQn = 26, /**< 26 SAM3S Timer/Counter 3 (TC3) */ - TC4_IRQn = 27, /**< 27 SAM3S Timer/Counter 4 (TC4) */ - TC5_IRQn = 28, /**< 28 SAM3S Timer/Counter 5 (TC5) */ - ADC_IRQn = 29, /**< 29 SAM3S Analog To Digital Converter (ADC) */ - DACC_IRQn = 30, /**< 30 SAM3S Digital To Analog Converter (DACC) */ - PWM_IRQn = 31, /**< 31 SAM3S Pulse Width Modulation (PWM) */ - CRCCU_IRQn = 32, /**< 32 SAM3S CRC Calculation Unit (CRCCU) */ - ACC_IRQn = 33, /**< 33 SAM3S Analog Comparator (ACC) */ - UDP_IRQn = 34 /**< 34 SAM3S USB Device Port (UDP) */ -} IRQn_Type; - -/** - * \brief Configuration of the Cortex-M3 Processor and Core Peripherals - */ - -#define __MPU_PRESENT 1 /**< $product does provide a MPU */ -#define __NVIC_PRIO_BITS 4 /**< $product uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /**< Set to 1 if different SysTick Config is used */ - -/* - * \brief CMSIS includes - */ - -#include "cmsis/core_cm3.h" - -/*@}*/ - -/* ************************************************************************** */ -/** SOFTWARE PERIPHERAL API DEFINITION FOR SAM3S */ -/* ************************************************************************** */ -/** \addtogroup SAM3S_api Peripheral Software API */ -/*@{*/ -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog Comparator Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_ACC Analog Comparator Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Acc hardware registers */ -typedef struct { - WoReg ACC_CR; /**< \brief (Acc Offset: 0x00) Control Register */ - RwReg ACC_MR; /**< \brief (Acc Offset: 0x04) Mode Register */ - RwReg Reserved1[7]; - WoReg ACC_IER; /**< \brief (Acc Offset: 0x24) Interrupt Enable Register */ - WoReg ACC_IDR; /**< \brief (Acc Offset: 0x28) Interrupt Disable Register */ - RoReg ACC_IMR; /**< \brief (Acc Offset: 0x2C) Interrupt Mask Register */ - RoReg ACC_ISR; /**< \brief (Acc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved2[24]; - RwReg ACC_ACR; /**< \brief (Acc Offset: 0x94) Analog Control Register */ - RwReg Reserved3[19]; - RwReg ACC_WPMR; /**< \brief (Acc Offset: 0xE4) Write Protect Mode Register */ - RoReg ACC_WPSR; /**< \brief (Acc Offset: 0xE8) Write Protect Status Register */ -} Acc; -#endif /* __ASSEMBLY__ */ -/* -------- ACC_CR : (ACC Offset: 0x00) Control Register -------- */ -#define ACC_CR_SWRST (0x1u << 0) /**< \brief (ACC_CR) SoftWare ReSeT */ -/* -------- ACC_MR : (ACC Offset: 0x04) Mode Register -------- */ -#define ACC_MR_SELMINUS_Pos 0 -#define ACC_MR_SELMINUS_Msk (0x7u << ACC_MR_SELMINUS_Pos) /**< \brief (ACC_MR) SELection for MINUS comparator input */ -#define ACC_MR_SELMINUS_TS (0x0u << 0) /**< \brief (ACC_MR) SelectTS */ -#define ACC_MR_SELMINUS_ADVREF (0x1u << 0) /**< \brief (ACC_MR) Select ADVREF */ -#define ACC_MR_SELMINUS_DAC0 (0x2u << 0) /**< \brief (ACC_MR) Select DAC0 */ -#define ACC_MR_SELMINUS_DAC1 (0x3u << 0) /**< \brief (ACC_MR) Select DAC1 */ -#define ACC_MR_SELMINUS_AD0 (0x4u << 0) /**< \brief (ACC_MR) Select AD0 */ -#define ACC_MR_SELMINUS_AD1 (0x5u << 0) /**< \brief (ACC_MR) Select AD1 */ -#define ACC_MR_SELMINUS_AD2 (0x6u << 0) /**< \brief (ACC_MR) Select AD2 */ -#define ACC_MR_SELMINUS_AD3 (0x7u << 0) /**< \brief (ACC_MR) Select AD3 */ -#define ACC_MR_SELPLUS_Pos 4 -#define ACC_MR_SELPLUS_Msk (0x7u << ACC_MR_SELPLUS_Pos) /**< \brief (ACC_MR) SELection for PLUS comparator input */ -#define ACC_MR_SELPLUS_AD0 (0x0u << 4) /**< \brief (ACC_MR) Select AD0 */ -#define ACC_MR_SELPLUS_AD1 (0x1u << 4) /**< \brief (ACC_MR) Select AD1 */ -#define ACC_MR_SELPLUS_AD2 (0x2u << 4) /**< \brief (ACC_MR) Select AD2 */ -#define ACC_MR_SELPLUS_AD3 (0x3u << 4) /**< \brief (ACC_MR) Select AD3 */ -#define ACC_MR_SELPLUS_AD4 (0x4u << 4) /**< \brief (ACC_MR) Select AD4 */ -#define ACC_MR_SELPLUS_AD5 (0x5u << 4) /**< \brief (ACC_MR) Select AD5 */ -#define ACC_MR_SELPLUS_AD6 (0x6u << 4) /**< \brief (ACC_MR) Select AD6 */ -#define ACC_MR_SELPLUS_AD7 (0x7u << 4) /**< \brief (ACC_MR) Select AD7 */ -#define ACC_MR_ACEN (0x1u << 8) /**< \brief (ACC_MR) Analog Comparator ENable */ -#define ACC_MR_ACEN_DIS (0x0u << 8) /**< \brief (ACC_MR) Analog Comparator Disabled. */ -#define ACC_MR_ACEN_EN (0x1u << 8) /**< \brief (ACC_MR) Analog Comparator Enabled. */ -#define ACC_MR_EDGETYP_Pos 9 -#define ACC_MR_EDGETYP_Msk (0x3u << ACC_MR_EDGETYP_Pos) /**< \brief (ACC_MR) EDGE TYPe */ -#define ACC_MR_EDGETYP_RISING (0x0u << 9) /**< \brief (ACC_MR) only rising edge of comparator output */ -#define ACC_MR_EDGETYP_FALLING (0x1u << 9) /**< \brief (ACC_MR) falling edge of comparator output */ -#define ACC_MR_EDGETYP_ANY (0x2u << 9) /**< \brief (ACC_MR) any edge of comparator output */ -#define ACC_MR_INV (0x1u << 12) /**< \brief (ACC_MR) INVert comparator output */ -#define ACC_MR_INV_DIS (0x0u << 12) /**< \brief (ACC_MR) Analog Comparator output is directly processed. */ -#define ACC_MR_INV_EN (0x1u << 12) /**< \brief (ACC_MR) Analog Comparator output is inverted prior to being processed. */ -#define ACC_MR_SELFS (0x1u << 13) /**< \brief (ACC_MR) SELection of Fault Source */ -#define ACC_MR_SELFS_CF (0x0u << 13) /**< \brief (ACC_MR) the CF flag is used to drive the FAULT output. */ -#define ACC_MR_SELFS_OUTPUT (0x1u << 13) /**< \brief (ACC_MR) the output of the Analog Comparator flag is used to drive the FAULT output. */ -#define ACC_MR_FE (0x1u << 14) /**< \brief (ACC_MR) Fault Enable */ -#define ACC_MR_FE_DIS (0x0u << 14) /**< \brief (ACC_MR) the FAULT output is tied to 0. */ -#define ACC_MR_FE_EN (0x1u << 14) /**< \brief (ACC_MR) the FAULT output is driven by the signal defined by SELFS. */ -/* -------- ACC_IER : (ACC Offset: 0x24) Interrupt Enable Register -------- */ -#define ACC_IER_CE (0x1u << 0) /**< \brief (ACC_IER) Comparison Edge */ -/* -------- ACC_IDR : (ACC Offset: 0x28) Interrupt Disable Register -------- */ -#define ACC_IDR_CE (0x1u << 0) /**< \brief (ACC_IDR) Comparison Edge */ -/* -------- ACC_IMR : (ACC Offset: 0x2C) Interrupt Mask Register -------- */ -#define ACC_IMR_CE (0x1u << 0) /**< \brief (ACC_IMR) Comparison Edge */ -/* -------- ACC_ISR : (ACC Offset: 0x30) Interrupt Status Register -------- */ -#define ACC_ISR_CE (0x1u << 0) /**< \brief (ACC_ISR) Comparison Edge */ -#define ACC_ISR_SCO (0x1u << 1) /**< \brief (ACC_ISR) Synchronized Comparator Output */ -#define ACC_ISR_MASK (0x1u << 31) /**< \brief (ACC_ISR) */ -/* -------- ACC_ACR : (ACC Offset: 0x94) Analog Control Register -------- */ -#define ACC_ACR_ISEL (0x1u << 0) /**< \brief (ACC_ACR) Current SELection */ -#define ACC_ACR_ISEL_LOPW (0x0u << 0) /**< \brief (ACC_ACR) low power option. */ -#define ACC_ACR_ISEL_HISP (0x1u << 0) /**< \brief (ACC_ACR) high speed option. */ -#define ACC_ACR_HYST_Pos 1 -#define ACC_ACR_HYST_Msk (0x3u << ACC_ACR_HYST_Pos) /**< \brief (ACC_ACR) HYSTeresis selection */ -#define ACC_ACR_HYST(value) ((ACC_ACR_HYST_Msk & ((value) << ACC_ACR_HYST_Pos))) -/* -------- ACC_WPMR : (ACC Offset: 0xE4) Write Protect Mode Register -------- */ -#define ACC_WPMR_WPEN (0x1u << 0) /**< \brief (ACC_WPMR) Write Protect Enable */ -#define ACC_WPMR_WPKEY_Pos 8 -#define ACC_WPMR_WPKEY_Msk (0xffffffu << ACC_WPMR_WPKEY_Pos) /**< \brief (ACC_WPMR) Write Protect KEY */ -#define ACC_WPMR_WPKEY(value) ((ACC_WPMR_WPKEY_Msk & ((value) << ACC_WPMR_WPKEY_Pos))) -/* -------- ACC_WPSR : (ACC Offset: 0xE8) Write Protect Status Register -------- */ -#define ACC_WPSR_WPROTERR (0x1u << 0) /**< \brief (ACC_WPSR) Write PROTection ERRor */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Analog-to-digital Converter */ -/* ============================================================================= */ -/** \addtogroup SAM3S_ADC Analog-to-digital Converter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Adc hardware registers */ -typedef struct { - WoReg ADC_CR; /**< \brief (Adc Offset: 0x00) Control Register */ - RwReg ADC_MR; /**< \brief (Adc Offset: 0x04) Mode Register */ - RwReg ADC_SEQR1; /**< \brief (Adc Offset: 0x08) Channel Sequence Register 1 */ - RwReg ADC_SEQR2; /**< \brief (Adc Offset: 0x0C) Channel Sequence Register 2 */ - WoReg ADC_CHER; /**< \brief (Adc Offset: 0x10) Channel Enable Register */ - WoReg ADC_CHDR; /**< \brief (Adc Offset: 0x14) Channel Disable Register */ - RoReg ADC_CHSR; /**< \brief (Adc Offset: 0x18) Channel Status Register */ - RwReg Reserved1[1]; - RoReg ADC_LCDR; /**< \brief (Adc Offset: 0x20) Last Converted Data Register */ - WoReg ADC_IER; /**< \brief (Adc Offset: 0x24) Interrupt Enable Register */ - WoReg ADC_IDR; /**< \brief (Adc Offset: 0x28) Interrupt Disable Register */ - RoReg ADC_IMR; /**< \brief (Adc Offset: 0x2C) Interrupt Mask Register */ - RoReg ADC_ISR; /**< \brief (Adc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved2[2]; - RoReg ADC_OVER; /**< \brief (Adc Offset: 0x3C) Overrun Status Register */ - RwReg ADC_EMR; /**< \brief (Adc Offset: 0x40) Extended Mode Register */ - RwReg ADC_CWR; /**< \brief (Adc Offset: 0x44) Compare Window Register */ - RwReg ADC_CGR; /**< \brief (Adc Offset: 0x48) Channel Gain Register */ - RwReg ADC_COR; /**< \brief (Adc Offset: 0x4C) Channel Offset Register */ - RoReg ADC_CDR[16]; /**< \brief (Adc Offset: 0x50) Channel Data Register */ - RwReg Reserved3[1]; - RwReg ADC_ACR; /**< \brief (Adc Offset: 0x94) Analog Control Register */ - RwReg Reserved4[19]; - RwReg ADC_WPMR; /**< \brief (Adc Offset: 0xE4) Write Protect Mode Register */ - RoReg ADC_WPSR; /**< \brief (Adc Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved5[5]; - RwReg ADC_RPR; /**< \brief (Adc Offset: 0x100) Receive Pointer Register */ - RwReg ADC_RCR; /**< \brief (Adc Offset: 0x104) Receive Counter Register */ - RwReg ADC_TPR; /**< \brief (Adc Offset: 0x108) Transmit Pointer Register */ - RwReg ADC_TCR; /**< \brief (Adc Offset: 0x10C) Transmit Counter Register */ - RwReg ADC_RNPR; /**< \brief (Adc Offset: 0x110) Receive Next Pointer Register */ - RwReg ADC_RNCR; /**< \brief (Adc Offset: 0x114) Receive Next Counter Register */ - RwReg ADC_TNPR; /**< \brief (Adc Offset: 0x118) Transmit Next Pointer Register */ - RwReg ADC_TNCR; /**< \brief (Adc Offset: 0x11C) Transmit Next Counter Register */ - WoReg ADC_PTCR; /**< \brief (Adc Offset: 0x120) Transfer Control Register */ - RoReg ADC_PTSR; /**< \brief (Adc Offset: 0x124) Transfer Status Register */ -} Adc; -#endif /* __ASSEMBLY__ */ -/* -------- ADC_CR : (ADC Offset: 0x00) Control Register -------- */ -#define ADC_CR_SWRST (0x1u << 0) /**< \brief (ADC_CR) Software Reset */ -#define ADC_CR_START (0x1u << 1) /**< \brief (ADC_CR) Start Conversion */ -/* -------- ADC_MR : (ADC Offset: 0x04) Mode Register -------- */ -#define ADC_MR_TRGEN (0x1u << 0) /**< \brief (ADC_MR) Trigger Enable */ -#define ADC_MR_TRGEN_DIS (0x0u << 0) /**< \brief (ADC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software. */ -#define ADC_MR_TRGEN_EN (0x1u << 0) /**< \brief (ADC_MR) Hardware trigger selected by TRGSEL field is enabled. */ -#define ADC_MR_TRGSEL_Pos 1 -#define ADC_MR_TRGSEL_Msk (0x7u << ADC_MR_TRGSEL_Pos) /**< \brief (ADC_MR) Trigger Selection */ -#define ADC_MR_TRGSEL_ADC_TRIG0 (0x0u << 1) /**< \brief (ADC_MR) External trigger */ -#define ADC_MR_TRGSEL_ADC_TRIG1 (0x1u << 1) /**< \brief (ADC_MR) TIO Output of the Timer Counter Channel 0 */ -#define ADC_MR_TRGSEL_ADC_TRIG2 (0x2u << 1) /**< \brief (ADC_MR) TIO Output of the Timer Counter Channel 1 */ -#define ADC_MR_TRGSEL_ADC_TRIG3 (0x3u << 1) /**< \brief (ADC_MR) TIO Output of the Timer Counter Channel 2 */ -#define ADC_MR_TRGSEL_ADC_TRIG4 (0x4u << 1) /**< \brief (ADC_MR) PWM Event Line 0 */ -#define ADC_MR_TRGSEL_ADC_TRIG5 (0x5u << 1) /**< \brief (ADC_MR) PWM Event Line 1 */ -#define ADC_MR_LOWRES (0x1u << 4) /**< \brief (ADC_MR) Resolution */ -#define ADC_MR_LOWRES_BITS_12 (0x0u << 4) /**< \brief (ADC_MR) 12-bit resolution */ -#define ADC_MR_LOWRES_BITS_10 (0x1u << 4) /**< \brief (ADC_MR) 10-bit resolution */ -#define ADC_MR_SLEEP (0x1u << 5) /**< \brief (ADC_MR) Sleep Mode */ -#define ADC_MR_SLEEP_NORMAL (0x0u << 5) /**< \brief (ADC_MR) Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions */ -#define ADC_MR_SLEEP_SLEEP (0x1u << 5) /**< \brief (ADC_MR) Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions */ -#define ADC_MR_FWUP (0x1u << 6) /**< \brief (ADC_MR) Fast Wake Up */ -#define ADC_MR_FWUP_OFF (0x0u << 6) /**< \brief (ADC_MR) Normal Sleep Mode: The sleep mode is defined by the SLEEP bit */ -#define ADC_MR_FWUP_ON (0x1u << 6) /**< \brief (ADC_MR) Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF */ -#define ADC_MR_FREERUN (0x1u << 7) /**< \brief (ADC_MR) Free Run Mode */ -#define ADC_MR_FREERUN_OFF (0x0u << 7) /**< \brief (ADC_MR) Normal Mode */ -#define ADC_MR_FREERUN_ON (0x1u << 7) /**< \brief (ADC_MR) Free Run Mode: Never wait for any trigger. */ -#define ADC_MR_PRESCAL_Pos 8 -#define ADC_MR_PRESCAL_Msk (0xffu << ADC_MR_PRESCAL_Pos) /**< \brief (ADC_MR) Prescaler Rate Selection */ -#define ADC_MR_PRESCAL(value) ((ADC_MR_PRESCAL_Msk & ((value) << ADC_MR_PRESCAL_Pos))) -#define ADC_MR_STARTUP_Pos 16 -#define ADC_MR_STARTUP_Msk (0xfu << ADC_MR_STARTUP_Pos) /**< \brief (ADC_MR) Start Up Time */ -#define ADC_MR_STARTUP_SUT0 (0x0u << 16) /**< \brief (ADC_MR) 0 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT8 (0x1u << 16) /**< \brief (ADC_MR) 8 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT16 (0x2u << 16) /**< \brief (ADC_MR) 16 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT24 (0x3u << 16) /**< \brief (ADC_MR) 24 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT64 (0x4u << 16) /**< \brief (ADC_MR) 64 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT80 (0x5u << 16) /**< \brief (ADC_MR) 80 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT96 (0x6u << 16) /**< \brief (ADC_MR) 96 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT112 (0x7u << 16) /**< \brief (ADC_MR) 112 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT512 (0x8u << 16) /**< \brief (ADC_MR) 512 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT576 (0x9u << 16) /**< \brief (ADC_MR) 576 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT640 (0xAu << 16) /**< \brief (ADC_MR) 640 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT704 (0xBu << 16) /**< \brief (ADC_MR) 704 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT768 (0xCu << 16) /**< \brief (ADC_MR) 768 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT832 (0xDu << 16) /**< \brief (ADC_MR) 832 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT896 (0xEu << 16) /**< \brief (ADC_MR) 896 periods of ADCClock */ -#define ADC_MR_STARTUP_SUT960 (0xFu << 16) /**< \brief (ADC_MR) 960 periods of ADCClock */ -#define ADC_MR_SETTLING_Pos 20 -#define ADC_MR_SETTLING_Msk (0x3u << ADC_MR_SETTLING_Pos) /**< \brief (ADC_MR) Analog Settling Time */ -#define ADC_MR_SETTLING(value) ((ADC_MR_SETTLING_Msk & ((value) << ADC_MR_SETTLING_Pos))) -#define ADC_MR_ANACH (0x1u << 23) /**< \brief (ADC_MR) Analog Change */ -#define ADC_MR_ANACH_NONE (0x0u << 23) /**< \brief (ADC_MR) No analog change on channel switching: DIFF0, GAIN0 and OFF0 are used for all channels */ -#define ADC_MR_ANACH_ALLOWED (0x1u << 23) /**< \brief (ADC_MR) Allows different analog settings for each channel. See ADC_CGR and ADC_COR Registers */ -#define ADC_MR_TRACKTIM_Pos 24 -#define ADC_MR_TRACKTIM_Msk (0xfu << ADC_MR_TRACKTIM_Pos) /**< \brief (ADC_MR) Tracking Time */ -#define ADC_MR_TRACKTIM(value) ((ADC_MR_TRACKTIM_Msk & ((value) << ADC_MR_TRACKTIM_Pos))) -#define ADC_MR_TRANSFER_Pos 28 -#define ADC_MR_TRANSFER_Msk (0x3u << ADC_MR_TRANSFER_Pos) /**< \brief (ADC_MR) */ -#define ADC_MR_TRANSFER(value) ((ADC_MR_TRANSFER_Msk & ((value) << ADC_MR_TRANSFER_Pos))) -#define ADC_MR_USEQ (0x1u << 31) /**< \brief (ADC_MR) Use Sequence Enable */ -#define ADC_MR_USEQ_NUM_ORDER (0x0u << 31) /**< \brief (ADC_MR) Normal Mode: The controller converts channels in a simple numeric order. */ -#define ADC_MR_USEQ_REG_ORDER (0x1u << 31) /**< \brief (ADC_MR) User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers. */ -/* -------- ADC_SEQR1 : (ADC Offset: 0x08) Channel Sequence Register 1 -------- */ -#define ADC_SEQR1_USCH1_Pos 0 -#define ADC_SEQR1_USCH1_Msk (0x7u << ADC_SEQR1_USCH1_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 1 */ -#define ADC_SEQR1_USCH1(value) ((ADC_SEQR1_USCH1_Msk & ((value) << ADC_SEQR1_USCH1_Pos))) -#define ADC_SEQR1_USCH2_Pos 4 -#define ADC_SEQR1_USCH2_Msk (0x7u << ADC_SEQR1_USCH2_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 2 */ -#define ADC_SEQR1_USCH2(value) ((ADC_SEQR1_USCH2_Msk & ((value) << ADC_SEQR1_USCH2_Pos))) -#define ADC_SEQR1_USCH3_Pos 8 -#define ADC_SEQR1_USCH3_Msk (0x7u << ADC_SEQR1_USCH3_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 3 */ -#define ADC_SEQR1_USCH3(value) ((ADC_SEQR1_USCH3_Msk & ((value) << ADC_SEQR1_USCH3_Pos))) -#define ADC_SEQR1_USCH4_Pos 12 -#define ADC_SEQR1_USCH4_Msk (0x7u << ADC_SEQR1_USCH4_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 4 */ -#define ADC_SEQR1_USCH4(value) ((ADC_SEQR1_USCH4_Msk & ((value) << ADC_SEQR1_USCH4_Pos))) -#define ADC_SEQR1_USCH5_Pos 16 -#define ADC_SEQR1_USCH5_Msk (0x7u << ADC_SEQR1_USCH5_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 5 */ -#define ADC_SEQR1_USCH5(value) ((ADC_SEQR1_USCH5_Msk & ((value) << ADC_SEQR1_USCH5_Pos))) -#define ADC_SEQR1_USCH6_Pos 20 -#define ADC_SEQR1_USCH6_Msk (0x7u << ADC_SEQR1_USCH6_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 6 */ -#define ADC_SEQR1_USCH6(value) ((ADC_SEQR1_USCH6_Msk & ((value) << ADC_SEQR1_USCH6_Pos))) -#define ADC_SEQR1_USCH7_Pos 24 -#define ADC_SEQR1_USCH7_Msk (0x7u << ADC_SEQR1_USCH7_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 7 */ -#define ADC_SEQR1_USCH7(value) ((ADC_SEQR1_USCH7_Msk & ((value) << ADC_SEQR1_USCH7_Pos))) -#define ADC_SEQR1_USCH8_Pos 28 -#define ADC_SEQR1_USCH8_Msk (0x7u << ADC_SEQR1_USCH8_Pos) /**< \brief (ADC_SEQR1) User Sequence Number 8 */ -#define ADC_SEQR1_USCH8(value) ((ADC_SEQR1_USCH8_Msk & ((value) << ADC_SEQR1_USCH8_Pos))) -/* -------- ADC_SEQR2 : (ADC Offset: 0x0C) Channel Sequence Register 2 -------- */ -#define ADC_SEQR2_USCH9_Pos 0 -#define ADC_SEQR2_USCH9_Msk (0x7u << ADC_SEQR2_USCH9_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 9 */ -#define ADC_SEQR2_USCH9(value) ((ADC_SEQR2_USCH9_Msk & ((value) << ADC_SEQR2_USCH9_Pos))) -#define ADC_SEQR2_USCH10_Pos 4 -#define ADC_SEQR2_USCH10_Msk (0x7u << ADC_SEQR2_USCH10_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 10 */ -#define ADC_SEQR2_USCH10(value) ((ADC_SEQR2_USCH10_Msk & ((value) << ADC_SEQR2_USCH10_Pos))) -#define ADC_SEQR2_USCH11_Pos 8 -#define ADC_SEQR2_USCH11_Msk (0x7u << ADC_SEQR2_USCH11_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 11 */ -#define ADC_SEQR2_USCH11(value) ((ADC_SEQR2_USCH11_Msk & ((value) << ADC_SEQR2_USCH11_Pos))) -#define ADC_SEQR2_USCH12_Pos 12 -#define ADC_SEQR2_USCH12_Msk (0x7u << ADC_SEQR2_USCH12_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 12 */ -#define ADC_SEQR2_USCH12(value) ((ADC_SEQR2_USCH12_Msk & ((value) << ADC_SEQR2_USCH12_Pos))) -#define ADC_SEQR2_USCH13_Pos 16 -#define ADC_SEQR2_USCH13_Msk (0x7u << ADC_SEQR2_USCH13_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 13 */ -#define ADC_SEQR2_USCH13(value) ((ADC_SEQR2_USCH13_Msk & ((value) << ADC_SEQR2_USCH13_Pos))) -#define ADC_SEQR2_USCH14_Pos 20 -#define ADC_SEQR2_USCH14_Msk (0x7u << ADC_SEQR2_USCH14_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 14 */ -#define ADC_SEQR2_USCH14(value) ((ADC_SEQR2_USCH14_Msk & ((value) << ADC_SEQR2_USCH14_Pos))) -#define ADC_SEQR2_USCH15_Pos 24 -#define ADC_SEQR2_USCH15_Msk (0x7u << ADC_SEQR2_USCH15_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 15 */ -#define ADC_SEQR2_USCH15(value) ((ADC_SEQR2_USCH15_Msk & ((value) << ADC_SEQR2_USCH15_Pos))) -#define ADC_SEQR2_USCH16_Pos 28 -#define ADC_SEQR2_USCH16_Msk (0x7u << ADC_SEQR2_USCH16_Pos) /**< \brief (ADC_SEQR2) User Sequence Number 16 */ -#define ADC_SEQR2_USCH16(value) ((ADC_SEQR2_USCH16_Msk & ((value) << ADC_SEQR2_USCH16_Pos))) -/* -------- ADC_CHER : (ADC Offset: 0x10) Channel Enable Register -------- */ -#define ADC_CHER_CH0 (0x1u << 0) /**< \brief (ADC_CHER) Channel 0 Enable */ -#define ADC_CHER_CH1 (0x1u << 1) /**< \brief (ADC_CHER) Channel 1 Enable */ -#define ADC_CHER_CH2 (0x1u << 2) /**< \brief (ADC_CHER) Channel 2 Enable */ -#define ADC_CHER_CH3 (0x1u << 3) /**< \brief (ADC_CHER) Channel 3 Enable */ -#define ADC_CHER_CH4 (0x1u << 4) /**< \brief (ADC_CHER) Channel 4 Enable */ -#define ADC_CHER_CH5 (0x1u << 5) /**< \brief (ADC_CHER) Channel 5 Enable */ -#define ADC_CHER_CH6 (0x1u << 6) /**< \brief (ADC_CHER) Channel 6 Enable */ -#define ADC_CHER_CH7 (0x1u << 7) /**< \brief (ADC_CHER) Channel 7 Enable */ -#define ADC_CHER_CH8 (0x1u << 8) /**< \brief (ADC_CHER) Channel 8 Enable */ -#define ADC_CHER_CH9 (0x1u << 9) /**< \brief (ADC_CHER) Channel 9 Enable */ -#define ADC_CHER_CH10 (0x1u << 10) /**< \brief (ADC_CHER) Channel 10 Enable */ -#define ADC_CHER_CH11 (0x1u << 11) /**< \brief (ADC_CHER) Channel 11 Enable */ -#define ADC_CHER_CH12 (0x1u << 12) /**< \brief (ADC_CHER) Channel 12 Enable */ -#define ADC_CHER_CH13 (0x1u << 13) /**< \brief (ADC_CHER) Channel 13 Enable */ -#define ADC_CHER_CH14 (0x1u << 14) /**< \brief (ADC_CHER) Channel 14 Enable */ -#define ADC_CHER_CH15 (0x1u << 15) /**< \brief (ADC_CHER) Channel 15 Enable */ -/* -------- ADC_CHDR : (ADC Offset: 0x14) Channel Disable Register -------- */ -#define ADC_CHDR_CH0 (0x1u << 0) /**< \brief (ADC_CHDR) Channel 0 Disable */ -#define ADC_CHDR_CH1 (0x1u << 1) /**< \brief (ADC_CHDR) Channel 1 Disable */ -#define ADC_CHDR_CH2 (0x1u << 2) /**< \brief (ADC_CHDR) Channel 2 Disable */ -#define ADC_CHDR_CH3 (0x1u << 3) /**< \brief (ADC_CHDR) Channel 3 Disable */ -#define ADC_CHDR_CH4 (0x1u << 4) /**< \brief (ADC_CHDR) Channel 4 Disable */ -#define ADC_CHDR_CH5 (0x1u << 5) /**< \brief (ADC_CHDR) Channel 5 Disable */ -#define ADC_CHDR_CH6 (0x1u << 6) /**< \brief (ADC_CHDR) Channel 6 Disable */ -#define ADC_CHDR_CH7 (0x1u << 7) /**< \brief (ADC_CHDR) Channel 7 Disable */ -#define ADC_CHDR_CH8 (0x1u << 8) /**< \brief (ADC_CHDR) Channel 8 Disable */ -#define ADC_CHDR_CH9 (0x1u << 9) /**< \brief (ADC_CHDR) Channel 9 Disable */ -#define ADC_CHDR_CH10 (0x1u << 10) /**< \brief (ADC_CHDR) Channel 10 Disable */ -#define ADC_CHDR_CH11 (0x1u << 11) /**< \brief (ADC_CHDR) Channel 11 Disable */ -#define ADC_CHDR_CH12 (0x1u << 12) /**< \brief (ADC_CHDR) Channel 12 Disable */ -#define ADC_CHDR_CH13 (0x1u << 13) /**< \brief (ADC_CHDR) Channel 13 Disable */ -#define ADC_CHDR_CH14 (0x1u << 14) /**< \brief (ADC_CHDR) Channel 14 Disable */ -#define ADC_CHDR_CH15 (0x1u << 15) /**< \brief (ADC_CHDR) Channel 15 Disable */ -/* -------- ADC_CHSR : (ADC Offset: 0x18) Channel Status Register -------- */ -#define ADC_CHSR_CH0 (0x1u << 0) /**< \brief (ADC_CHSR) Channel 0 Status */ -#define ADC_CHSR_CH1 (0x1u << 1) /**< \brief (ADC_CHSR) Channel 1 Status */ -#define ADC_CHSR_CH2 (0x1u << 2) /**< \brief (ADC_CHSR) Channel 2 Status */ -#define ADC_CHSR_CH3 (0x1u << 3) /**< \brief (ADC_CHSR) Channel 3 Status */ -#define ADC_CHSR_CH4 (0x1u << 4) /**< \brief (ADC_CHSR) Channel 4 Status */ -#define ADC_CHSR_CH5 (0x1u << 5) /**< \brief (ADC_CHSR) Channel 5 Status */ -#define ADC_CHSR_CH6 (0x1u << 6) /**< \brief (ADC_CHSR) Channel 6 Status */ -#define ADC_CHSR_CH7 (0x1u << 7) /**< \brief (ADC_CHSR) Channel 7 Status */ -#define ADC_CHSR_CH8 (0x1u << 8) /**< \brief (ADC_CHSR) Channel 8 Status */ -#define ADC_CHSR_CH9 (0x1u << 9) /**< \brief (ADC_CHSR) Channel 9 Status */ -#define ADC_CHSR_CH10 (0x1u << 10) /**< \brief (ADC_CHSR) Channel 10 Status */ -#define ADC_CHSR_CH11 (0x1u << 11) /**< \brief (ADC_CHSR) Channel 11 Status */ -#define ADC_CHSR_CH12 (0x1u << 12) /**< \brief (ADC_CHSR) Channel 12 Status */ -#define ADC_CHSR_CH13 (0x1u << 13) /**< \brief (ADC_CHSR) Channel 13 Status */ -#define ADC_CHSR_CH14 (0x1u << 14) /**< \brief (ADC_CHSR) Channel 14 Status */ -#define ADC_CHSR_CH15 (0x1u << 15) /**< \brief (ADC_CHSR) Channel 15 Status */ -/* -------- ADC_LCDR : (ADC Offset: 0x20) Last Converted Data Register -------- */ -#define ADC_LCDR_LDATA_Pos 0 -#define ADC_LCDR_LDATA_Msk (0xfffu << ADC_LCDR_LDATA_Pos) /**< \brief (ADC_LCDR) Last Data Converted */ -#define ADC_LCDR_CHNB_Pos 12 -#define ADC_LCDR_CHNB_Msk (0xfu << ADC_LCDR_CHNB_Pos) /**< \brief (ADC_LCDR) Channel Number */ -/* -------- ADC_IER : (ADC Offset: 0x24) Interrupt Enable Register -------- */ -#define ADC_IER_EOC0 (0x1u << 0) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 0 */ -#define ADC_IER_EOC1 (0x1u << 1) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 1 */ -#define ADC_IER_EOC2 (0x1u << 2) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 2 */ -#define ADC_IER_EOC3 (0x1u << 3) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 3 */ -#define ADC_IER_EOC4 (0x1u << 4) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 4 */ -#define ADC_IER_EOC5 (0x1u << 5) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 5 */ -#define ADC_IER_EOC6 (0x1u << 6) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 6 */ -#define ADC_IER_EOC7 (0x1u << 7) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 7 */ -#define ADC_IER_EOC8 (0x1u << 8) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 8 */ -#define ADC_IER_EOC9 (0x1u << 9) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 9 */ -#define ADC_IER_EOC10 (0x1u << 10) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 10 */ -#define ADC_IER_EOC11 (0x1u << 11) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 11 */ -#define ADC_IER_EOC12 (0x1u << 12) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 12 */ -#define ADC_IER_EOC13 (0x1u << 13) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 13 */ -#define ADC_IER_EOC14 (0x1u << 14) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 14 */ -#define ADC_IER_EOC15 (0x1u << 15) /**< \brief (ADC_IER) End of Conversion Interrupt Enable 15 */ -#define ADC_IER_DRDY (0x1u << 24) /**< \brief (ADC_IER) Data Ready Interrupt Enable */ -#define ADC_IER_GOVRE (0x1u << 25) /**< \brief (ADC_IER) General Overrun Error Interrupt Enable */ -#define ADC_IER_COMPE (0x1u << 26) /**< \brief (ADC_IER) Comparison Event Interrupt Enable */ -#define ADC_IER_ENDRX (0x1u << 27) /**< \brief (ADC_IER) End of Receive Buffer Interrupt Enable */ -#define ADC_IER_RXBUFF (0x1u << 28) /**< \brief (ADC_IER) Receive Buffer Full Interrupt Enable */ -/* -------- ADC_IDR : (ADC Offset: 0x28) Interrupt Disable Register -------- */ -#define ADC_IDR_EOC0 (0x1u << 0) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 0 */ -#define ADC_IDR_EOC1 (0x1u << 1) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 1 */ -#define ADC_IDR_EOC2 (0x1u << 2) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 2 */ -#define ADC_IDR_EOC3 (0x1u << 3) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 3 */ -#define ADC_IDR_EOC4 (0x1u << 4) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 4 */ -#define ADC_IDR_EOC5 (0x1u << 5) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 5 */ -#define ADC_IDR_EOC6 (0x1u << 6) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 6 */ -#define ADC_IDR_EOC7 (0x1u << 7) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 7 */ -#define ADC_IDR_EOC8 (0x1u << 8) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 8 */ -#define ADC_IDR_EOC9 (0x1u << 9) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 9 */ -#define ADC_IDR_EOC10 (0x1u << 10) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 10 */ -#define ADC_IDR_EOC11 (0x1u << 11) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 11 */ -#define ADC_IDR_EOC12 (0x1u << 12) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 12 */ -#define ADC_IDR_EOC13 (0x1u << 13) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 13 */ -#define ADC_IDR_EOC14 (0x1u << 14) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 14 */ -#define ADC_IDR_EOC15 (0x1u << 15) /**< \brief (ADC_IDR) End of Conversion Interrupt Disable 15 */ -#define ADC_IDR_DRDY (0x1u << 24) /**< \brief (ADC_IDR) Data Ready Interrupt Disable */ -#define ADC_IDR_GOVRE (0x1u << 25) /**< \brief (ADC_IDR) General Overrun Error Interrupt Disable */ -#define ADC_IDR_COMPE (0x1u << 26) /**< \brief (ADC_IDR) Comparison Event Interrupt Disable */ -#define ADC_IDR_ENDRX (0x1u << 27) /**< \brief (ADC_IDR) End of Receive Buffer Interrupt Disable */ -#define ADC_IDR_RXBUFF (0x1u << 28) /**< \brief (ADC_IDR) Receive Buffer Full Interrupt Disable */ -/* -------- ADC_IMR : (ADC Offset: 0x2C) Interrupt Mask Register -------- */ -#define ADC_IMR_EOC0 (0x1u << 0) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 0 */ -#define ADC_IMR_EOC1 (0x1u << 1) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 1 */ -#define ADC_IMR_EOC2 (0x1u << 2) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 2 */ -#define ADC_IMR_EOC3 (0x1u << 3) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 3 */ -#define ADC_IMR_EOC4 (0x1u << 4) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 4 */ -#define ADC_IMR_EOC5 (0x1u << 5) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 5 */ -#define ADC_IMR_EOC6 (0x1u << 6) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 6 */ -#define ADC_IMR_EOC7 (0x1u << 7) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 7 */ -#define ADC_IMR_EOC8 (0x1u << 8) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 8 */ -#define ADC_IMR_EOC9 (0x1u << 9) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 9 */ -#define ADC_IMR_EOC10 (0x1u << 10) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 10 */ -#define ADC_IMR_EOC11 (0x1u << 11) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 11 */ -#define ADC_IMR_EOC12 (0x1u << 12) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 12 */ -#define ADC_IMR_EOC13 (0x1u << 13) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 13 */ -#define ADC_IMR_EOC14 (0x1u << 14) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 14 */ -#define ADC_IMR_EOC15 (0x1u << 15) /**< \brief (ADC_IMR) End of Conversion Interrupt Mask 15 */ -#define ADC_IMR_DRDY (0x1u << 24) /**< \brief (ADC_IMR) Data Ready Interrupt Mask */ -#define ADC_IMR_GOVRE (0x1u << 25) /**< \brief (ADC_IMR) General Overrun Error Interrupt Mask */ -#define ADC_IMR_COMPE (0x1u << 26) /**< \brief (ADC_IMR) Comparison Event Interrupt Mask */ -#define ADC_IMR_ENDRX (0x1u << 27) /**< \brief (ADC_IMR) End of Receive Buffer Interrupt Mask */ -#define ADC_IMR_RXBUFF (0x1u << 28) /**< \brief (ADC_IMR) Receive Buffer Full Interrupt Mask */ -/* -------- ADC_ISR : (ADC Offset: 0x30) Interrupt Status Register -------- */ -#define ADC_ISR_EOC0 (0x1u << 0) /**< \brief (ADC_ISR) End of Conversion 0 */ -#define ADC_ISR_EOC1 (0x1u << 1) /**< \brief (ADC_ISR) End of Conversion 1 */ -#define ADC_ISR_EOC2 (0x1u << 2) /**< \brief (ADC_ISR) End of Conversion 2 */ -#define ADC_ISR_EOC3 (0x1u << 3) /**< \brief (ADC_ISR) End of Conversion 3 */ -#define ADC_ISR_EOC4 (0x1u << 4) /**< \brief (ADC_ISR) End of Conversion 4 */ -#define ADC_ISR_EOC5 (0x1u << 5) /**< \brief (ADC_ISR) End of Conversion 5 */ -#define ADC_ISR_EOC6 (0x1u << 6) /**< \brief (ADC_ISR) End of Conversion 6 */ -#define ADC_ISR_EOC7 (0x1u << 7) /**< \brief (ADC_ISR) End of Conversion 7 */ -#define ADC_ISR_EOC8 (0x1u << 8) /**< \brief (ADC_ISR) End of Conversion 8 */ -#define ADC_ISR_EOC9 (0x1u << 9) /**< \brief (ADC_ISR) End of Conversion 9 */ -#define ADC_ISR_EOC10 (0x1u << 10) /**< \brief (ADC_ISR) End of Conversion 10 */ -#define ADC_ISR_EOC11 (0x1u << 11) /**< \brief (ADC_ISR) End of Conversion 11 */ -#define ADC_ISR_EOC12 (0x1u << 12) /**< \brief (ADC_ISR) End of Conversion 12 */ -#define ADC_ISR_EOC13 (0x1u << 13) /**< \brief (ADC_ISR) End of Conversion 13 */ -#define ADC_ISR_EOC14 (0x1u << 14) /**< \brief (ADC_ISR) End of Conversion 14 */ -#define ADC_ISR_EOC15 (0x1u << 15) /**< \brief (ADC_ISR) End of Conversion 15 */ -#define ADC_ISR_DRDY (0x1u << 24) /**< \brief (ADC_ISR) Data Ready */ -#define ADC_ISR_GOVRE (0x1u << 25) /**< \brief (ADC_ISR) General Overrun Error */ -#define ADC_ISR_COMPE (0x1u << 26) /**< \brief (ADC_ISR) Comparison Error */ -#define ADC_ISR_ENDRX (0x1u << 27) /**< \brief (ADC_ISR) End of RX Buffer */ -#define ADC_ISR_RXBUFF (0x1u << 28) /**< \brief (ADC_ISR) RX Buffer Full */ -/* -------- ADC_OVER : (ADC Offset: 0x3C) Overrun Status Register -------- */ -#define ADC_OVER_OVRE0 (0x1u << 0) /**< \brief (ADC_OVER) Overrun Error 0 */ -#define ADC_OVER_OVRE1 (0x1u << 1) /**< \brief (ADC_OVER) Overrun Error 1 */ -#define ADC_OVER_OVRE2 (0x1u << 2) /**< \brief (ADC_OVER) Overrun Error 2 */ -#define ADC_OVER_OVRE3 (0x1u << 3) /**< \brief (ADC_OVER) Overrun Error 3 */ -#define ADC_OVER_OVRE4 (0x1u << 4) /**< \brief (ADC_OVER) Overrun Error 4 */ -#define ADC_OVER_OVRE5 (0x1u << 5) /**< \brief (ADC_OVER) Overrun Error 5 */ -#define ADC_OVER_OVRE6 (0x1u << 6) /**< \brief (ADC_OVER) Overrun Error 6 */ -#define ADC_OVER_OVRE7 (0x1u << 7) /**< \brief (ADC_OVER) Overrun Error 7 */ -#define ADC_OVER_OVRE8 (0x1u << 8) /**< \brief (ADC_OVER) Overrun Error 8 */ -#define ADC_OVER_OVRE9 (0x1u << 9) /**< \brief (ADC_OVER) Overrun Error 9 */ -#define ADC_OVER_OVRE10 (0x1u << 10) /**< \brief (ADC_OVER) Overrun Error 10 */ -#define ADC_OVER_OVRE11 (0x1u << 11) /**< \brief (ADC_OVER) Overrun Error 11 */ -#define ADC_OVER_OVRE12 (0x1u << 12) /**< \brief (ADC_OVER) Overrun Error 12 */ -#define ADC_OVER_OVRE13 (0x1u << 13) /**< \brief (ADC_OVER) Overrun Error 13 */ -#define ADC_OVER_OVRE14 (0x1u << 14) /**< \brief (ADC_OVER) Overrun Error 14 */ -#define ADC_OVER_OVRE15 (0x1u << 15) /**< \brief (ADC_OVER) Overrun Error 15 */ -/* -------- ADC_EMR : (ADC Offset: 0x40) Extended Mode Register -------- */ -#define ADC_EMR_CMPMODE_Pos 0 -#define ADC_EMR_CMPMODE_Msk (0x3u << ADC_EMR_CMPMODE_Pos) /**< \brief (ADC_EMR) Comparison Mode */ -#define ADC_EMR_CMPMODE_LOW (0x0u << 0) /**< \brief (ADC_EMR) Generates an event when the converted data is lower than the low threshold of the window. */ -#define ADC_EMR_CMPMODE_HIGH (0x1u << 0) /**< \brief (ADC_EMR) Generates an event when the converted data is higher than the high threshold of the window. */ -#define ADC_EMR_CMPMODE_IN (0x2u << 0) /**< \brief (ADC_EMR) Generates an event when the converted data is in the comparison window. */ -#define ADC_EMR_CMPMODE_OUT (0x3u << 0) /**< \brief (ADC_EMR) Generates an event when the converted data is out of the comparison window. */ -#define ADC_EMR_CMPSEL_Pos 4 -#define ADC_EMR_CMPSEL_Msk (0xfu << ADC_EMR_CMPSEL_Pos) /**< \brief (ADC_EMR) Comparison Selected Channel */ -#define ADC_EMR_CMPSEL(value) ((ADC_EMR_CMPSEL_Msk & ((value) << ADC_EMR_CMPSEL_Pos))) -#define ADC_EMR_CMPALL (0x1u << 9) /**< \brief (ADC_EMR) Compare All Channels */ -#define ADC_EMR_TAG (0x1u << 24) /**< \brief (ADC_EMR) TAG of ADC_LDCR register */ -/* -------- ADC_CWR : (ADC Offset: 0x44) Compare Window Register -------- */ -#define ADC_CWR_LOWTHRES_Pos 0 -#define ADC_CWR_LOWTHRES_Msk (0xfffu << ADC_CWR_LOWTHRES_Pos) /**< \brief (ADC_CWR) Low Threshold */ -#define ADC_CWR_LOWTHRES(value) ((ADC_CWR_LOWTHRES_Msk & ((value) << ADC_CWR_LOWTHRES_Pos))) -#define ADC_CWR_HIGHTHRES_Pos 16 -#define ADC_CWR_HIGHTHRES_Msk (0xfffu << ADC_CWR_HIGHTHRES_Pos) /**< \brief (ADC_CWR) High Threshold */ -#define ADC_CWR_HIGHTHRES(value) ((ADC_CWR_HIGHTHRES_Msk & ((value) << ADC_CWR_HIGHTHRES_Pos))) -/* -------- ADC_CGR : (ADC Offset: 0x48) Channel Gain Register -------- */ -#define ADC_CGR_GAIN0_Pos 0 -#define ADC_CGR_GAIN0_Msk (0x3u << ADC_CGR_GAIN0_Pos) /**< \brief (ADC_CGR) Gain for channel 0 */ -#define ADC_CGR_GAIN0(value) ((ADC_CGR_GAIN0_Msk & ((value) << ADC_CGR_GAIN0_Pos))) -#define ADC_CGR_GAIN1_Pos 2 -#define ADC_CGR_GAIN1_Msk (0x3u << ADC_CGR_GAIN1_Pos) /**< \brief (ADC_CGR) Gain for channel 1 */ -#define ADC_CGR_GAIN1(value) ((ADC_CGR_GAIN1_Msk & ((value) << ADC_CGR_GAIN1_Pos))) -#define ADC_CGR_GAIN2_Pos 4 -#define ADC_CGR_GAIN2_Msk (0x3u << ADC_CGR_GAIN2_Pos) /**< \brief (ADC_CGR) Gain for channel 2 */ -#define ADC_CGR_GAIN2(value) ((ADC_CGR_GAIN2_Msk & ((value) << ADC_CGR_GAIN2_Pos))) -#define ADC_CGR_GAIN3_Pos 6 -#define ADC_CGR_GAIN3_Msk (0x3u << ADC_CGR_GAIN3_Pos) /**< \brief (ADC_CGR) Gain for channel 3 */ -#define ADC_CGR_GAIN3(value) ((ADC_CGR_GAIN3_Msk & ((value) << ADC_CGR_GAIN3_Pos))) -#define ADC_CGR_GAIN4_Pos 8 -#define ADC_CGR_GAIN4_Msk (0x3u << ADC_CGR_GAIN4_Pos) /**< \brief (ADC_CGR) Gain for channel 4 */ -#define ADC_CGR_GAIN4(value) ((ADC_CGR_GAIN4_Msk & ((value) << ADC_CGR_GAIN4_Pos))) -#define ADC_CGR_GAIN5_Pos 10 -#define ADC_CGR_GAIN5_Msk (0x3u << ADC_CGR_GAIN5_Pos) /**< \brief (ADC_CGR) Gain for channel 5 */ -#define ADC_CGR_GAIN5(value) ((ADC_CGR_GAIN5_Msk & ((value) << ADC_CGR_GAIN5_Pos))) -#define ADC_CGR_GAIN6_Pos 12 -#define ADC_CGR_GAIN6_Msk (0x3u << ADC_CGR_GAIN6_Pos) /**< \brief (ADC_CGR) Gain for channel 6 */ -#define ADC_CGR_GAIN6(value) ((ADC_CGR_GAIN6_Msk & ((value) << ADC_CGR_GAIN6_Pos))) -#define ADC_CGR_GAIN7_Pos 14 -#define ADC_CGR_GAIN7_Msk (0x3u << ADC_CGR_GAIN7_Pos) /**< \brief (ADC_CGR) Gain for channel 7 */ -#define ADC_CGR_GAIN7(value) ((ADC_CGR_GAIN7_Msk & ((value) << ADC_CGR_GAIN7_Pos))) -#define ADC_CGR_GAIN8_Pos 16 -#define ADC_CGR_GAIN8_Msk (0x3u << ADC_CGR_GAIN8_Pos) /**< \brief (ADC_CGR) Gain for channel 8 */ -#define ADC_CGR_GAIN8(value) ((ADC_CGR_GAIN8_Msk & ((value) << ADC_CGR_GAIN8_Pos))) -#define ADC_CGR_GAIN9_Pos 18 -#define ADC_CGR_GAIN9_Msk (0x3u << ADC_CGR_GAIN9_Pos) /**< \brief (ADC_CGR) Gain for channel 9 */ -#define ADC_CGR_GAIN9(value) ((ADC_CGR_GAIN9_Msk & ((value) << ADC_CGR_GAIN9_Pos))) -#define ADC_CGR_GAIN10_Pos 20 -#define ADC_CGR_GAIN10_Msk (0x3u << ADC_CGR_GAIN10_Pos) /**< \brief (ADC_CGR) Gain for channel 10 */ -#define ADC_CGR_GAIN10(value) ((ADC_CGR_GAIN10_Msk & ((value) << ADC_CGR_GAIN10_Pos))) -#define ADC_CGR_GAIN11_Pos 22 -#define ADC_CGR_GAIN11_Msk (0x3u << ADC_CGR_GAIN11_Pos) /**< \brief (ADC_CGR) Gain for channel 11 */ -#define ADC_CGR_GAIN11(value) ((ADC_CGR_GAIN11_Msk & ((value) << ADC_CGR_GAIN11_Pos))) -#define ADC_CGR_GAIN12_Pos 24 -#define ADC_CGR_GAIN12_Msk (0x3u << ADC_CGR_GAIN12_Pos) /**< \brief (ADC_CGR) Gain for channel 12 */ -#define ADC_CGR_GAIN12(value) ((ADC_CGR_GAIN12_Msk & ((value) << ADC_CGR_GAIN12_Pos))) -#define ADC_CGR_GAIN13_Pos 26 -#define ADC_CGR_GAIN13_Msk (0x3u << ADC_CGR_GAIN13_Pos) /**< \brief (ADC_CGR) Gain for channel 13 */ -#define ADC_CGR_GAIN13(value) ((ADC_CGR_GAIN13_Msk & ((value) << ADC_CGR_GAIN13_Pos))) -#define ADC_CGR_GAIN14_Pos 28 -#define ADC_CGR_GAIN14_Msk (0x3u << ADC_CGR_GAIN14_Pos) /**< \brief (ADC_CGR) Gain for channel 14 */ -#define ADC_CGR_GAIN14(value) ((ADC_CGR_GAIN14_Msk & ((value) << ADC_CGR_GAIN14_Pos))) -#define ADC_CGR_GAIN15_Pos 30 -#define ADC_CGR_GAIN15_Msk (0x3u << ADC_CGR_GAIN15_Pos) /**< \brief (ADC_CGR) Gain for channel 15 */ -#define ADC_CGR_GAIN15(value) ((ADC_CGR_GAIN15_Msk & ((value) << ADC_CGR_GAIN15_Pos))) -/* -------- ADC_COR : (ADC Offset: 0x4C) Channel Offset Register -------- */ -#define ADC_COR_OFF0 (0x1u << 0) /**< \brief (ADC_COR) Offset for channel 0 */ -#define ADC_COR_OFF1 (0x1u << 1) /**< \brief (ADC_COR) Offset for channel 1 */ -#define ADC_COR_OFF2 (0x1u << 2) /**< \brief (ADC_COR) Offset for channel 2 */ -#define ADC_COR_OFF3 (0x1u << 3) /**< \brief (ADC_COR) Offset for channel 3 */ -#define ADC_COR_OFF4 (0x1u << 4) /**< \brief (ADC_COR) Offset for channel 4 */ -#define ADC_COR_OFF5 (0x1u << 5) /**< \brief (ADC_COR) Offset for channel 5 */ -#define ADC_COR_OFF6 (0x1u << 6) /**< \brief (ADC_COR) Offset for channel 6 */ -#define ADC_COR_OFF7 (0x1u << 7) /**< \brief (ADC_COR) Offset for channel 7 */ -#define ADC_COR_OFF8 (0x1u << 8) /**< \brief (ADC_COR) Offset for channel 8 */ -#define ADC_COR_OFF9 (0x1u << 9) /**< \brief (ADC_COR) Offset for channel 9 */ -#define ADC_COR_OFF10 (0x1u << 10) /**< \brief (ADC_COR) Offset for channel 10 */ -#define ADC_COR_OFF11 (0x1u << 11) /**< \brief (ADC_COR) Offset for channel 11 */ -#define ADC_COR_OFF12 (0x1u << 12) /**< \brief (ADC_COR) Offset for channel 12 */ -#define ADC_COR_OFF13 (0x1u << 13) /**< \brief (ADC_COR) Offset for channel 13 */ -#define ADC_COR_OFF14 (0x1u << 14) /**< \brief (ADC_COR) Offset for channel 14 */ -#define ADC_COR_OFF15 (0x1u << 15) /**< \brief (ADC_COR) Offset for channel 15 */ -#define ADC_COR_DIFF0 (0x1u << 16) /**< \brief (ADC_COR) Differential inputs for channel 0 */ -#define ADC_COR_DIFF1 (0x1u << 17) /**< \brief (ADC_COR) Differential inputs for channel 1 */ -#define ADC_COR_DIFF2 (0x1u << 18) /**< \brief (ADC_COR) Differential inputs for channel 2 */ -#define ADC_COR_DIFF3 (0x1u << 19) /**< \brief (ADC_COR) Differential inputs for channel 3 */ -#define ADC_COR_DIFF4 (0x1u << 20) /**< \brief (ADC_COR) Differential inputs for channel 4 */ -#define ADC_COR_DIFF5 (0x1u << 21) /**< \brief (ADC_COR) Differential inputs for channel 5 */ -#define ADC_COR_DIFF6 (0x1u << 22) /**< \brief (ADC_COR) Differential inputs for channel 6 */ -#define ADC_COR_DIFF7 (0x1u << 23) /**< \brief (ADC_COR) Differential inputs for channel 7 */ -#define ADC_COR_DIFF8 (0x1u << 24) /**< \brief (ADC_COR) Differential inputs for channel 8 */ -#define ADC_COR_DIFF9 (0x1u << 25) /**< \brief (ADC_COR) Differential inputs for channel 9 */ -#define ADC_COR_DIFF10 (0x1u << 26) /**< \brief (ADC_COR) Differential inputs for channel 10 */ -#define ADC_COR_DIFF11 (0x1u << 27) /**< \brief (ADC_COR) Differential inputs for channel 11 */ -#define ADC_COR_DIFF12 (0x1u << 28) /**< \brief (ADC_COR) Differential inputs for channel 12 */ -#define ADC_COR_DIFF13 (0x1u << 29) /**< \brief (ADC_COR) Differential inputs for channel 13 */ -#define ADC_COR_DIFF14 (0x1u << 30) /**< \brief (ADC_COR) Differential inputs for channel 14 */ -#define ADC_COR_DIFF15 (0x1u << 31) /**< \brief (ADC_COR) Differential inputs for channel 15 */ -/* -------- ADC_CDR[16] : (ADC Offset: 0x50) Channel Data Register -------- */ -#define ADC_CDR_DATA_Pos 0 -#define ADC_CDR_DATA_Msk (0x3ffu << ADC_CDR_DATA_Pos) /**< \brief (ADC_CDR[16]) Converted Data */ -/* -------- ADC_ACR : (ADC Offset: 0x94) Analog Control Register -------- */ -#define ADC_ACR_TSON (0x1u << 4) /**< \brief (ADC_ACR) Temperature Sensor On */ -#define ADC_ACR_IBCTL_Pos 8 -#define ADC_ACR_IBCTL_Msk (0x3u << ADC_ACR_IBCTL_Pos) /**< \brief (ADC_ACR) ADC Bias Current Control */ -#define ADC_ACR_IBCTL(value) ((ADC_ACR_IBCTL_Msk & ((value) << ADC_ACR_IBCTL_Pos))) -/* -------- ADC_WPMR : (ADC Offset: 0xE4) Write Protect Mode Register -------- */ -#define ADC_WPMR_WPEN (0x1u << 0) /**< \brief (ADC_WPMR) Write Protect Enable */ -#define ADC_WPMR_WPKEY_Pos 8 -#define ADC_WPMR_WPKEY_Msk (0xffffffu << ADC_WPMR_WPKEY_Pos) /**< \brief (ADC_WPMR) Write Protect KEY */ -#define ADC_WPMR_WPKEY(value) ((ADC_WPMR_WPKEY_Msk & ((value) << ADC_WPMR_WPKEY_Pos))) -/* -------- ADC_WPSR : (ADC Offset: 0xE8) Write Protect Status Register -------- */ -#define ADC_WPSR_WPVS (0x1u << 0) /**< \brief (ADC_WPSR) Write Protect Violation Status */ -#define ADC_WPSR_WPVSRC_Pos 8 -#define ADC_WPSR_WPVSRC_Msk (0xffffu << ADC_WPSR_WPVSRC_Pos) /**< \brief (ADC_WPSR) Write Protect Violation Source */ -/* -------- ADC_RPR : (ADC Offset: 0x100) Receive Pointer Register -------- */ -#define ADC_RPR_RXPTR_Pos 0 -#define ADC_RPR_RXPTR_Msk (0xffffffffu << ADC_RPR_RXPTR_Pos) /**< \brief (ADC_RPR) Receive Pointer Register */ -#define ADC_RPR_RXPTR(value) ((ADC_RPR_RXPTR_Msk & ((value) << ADC_RPR_RXPTR_Pos))) -/* -------- ADC_RCR : (ADC Offset: 0x104) Receive Counter Register -------- */ -#define ADC_RCR_RXCTR_Pos 0 -#define ADC_RCR_RXCTR_Msk (0xffffu << ADC_RCR_RXCTR_Pos) /**< \brief (ADC_RCR) Receive Counter Register */ -#define ADC_RCR_RXCTR(value) ((ADC_RCR_RXCTR_Msk & ((value) << ADC_RCR_RXCTR_Pos))) -/* -------- ADC_TPR : (ADC Offset: 0x108) Transmit Pointer Register -------- */ -#define ADC_TPR_TXPTR_Pos 0 -#define ADC_TPR_TXPTR_Msk (0xffffffffu << ADC_TPR_TXPTR_Pos) /**< \brief (ADC_TPR) Transmit Counter Register */ -#define ADC_TPR_TXPTR(value) ((ADC_TPR_TXPTR_Msk & ((value) << ADC_TPR_TXPTR_Pos))) -/* -------- ADC_TCR : (ADC Offset: 0x10C) Transmit Counter Register -------- */ -#define ADC_TCR_TXCTR_Pos 0 -#define ADC_TCR_TXCTR_Msk (0xffffu << ADC_TCR_TXCTR_Pos) /**< \brief (ADC_TCR) Transmit Counter Register */ -#define ADC_TCR_TXCTR(value) ((ADC_TCR_TXCTR_Msk & ((value) << ADC_TCR_TXCTR_Pos))) -/* -------- ADC_RNPR : (ADC Offset: 0x110) Receive Next Pointer Register -------- */ -#define ADC_RNPR_RXNPTR_Pos 0 -#define ADC_RNPR_RXNPTR_Msk (0xffffffffu << ADC_RNPR_RXNPTR_Pos) /**< \brief (ADC_RNPR) Receive Next Pointer */ -#define ADC_RNPR_RXNPTR(value) ((ADC_RNPR_RXNPTR_Msk & ((value) << ADC_RNPR_RXNPTR_Pos))) -/* -------- ADC_RNCR : (ADC Offset: 0x114) Receive Next Counter Register -------- */ -#define ADC_RNCR_RXNCTR_Pos 0 -#define ADC_RNCR_RXNCTR_Msk (0xffffu << ADC_RNCR_RXNCTR_Pos) /**< \brief (ADC_RNCR) Receive Next Counter */ -#define ADC_RNCR_RXNCTR(value) ((ADC_RNCR_RXNCTR_Msk & ((value) << ADC_RNCR_RXNCTR_Pos))) -/* -------- ADC_TNPR : (ADC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define ADC_TNPR_TXNPTR_Pos 0 -#define ADC_TNPR_TXNPTR_Msk (0xffffffffu << ADC_TNPR_TXNPTR_Pos) /**< \brief (ADC_TNPR) Transmit Next Pointer */ -#define ADC_TNPR_TXNPTR(value) ((ADC_TNPR_TXNPTR_Msk & ((value) << ADC_TNPR_TXNPTR_Pos))) -/* -------- ADC_TNCR : (ADC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define ADC_TNCR_TXNCTR_Pos 0 -#define ADC_TNCR_TXNCTR_Msk (0xffffu << ADC_TNCR_TXNCTR_Pos) /**< \brief (ADC_TNCR) Transmit Counter Next */ -#define ADC_TNCR_TXNCTR(value) ((ADC_TNCR_TXNCTR_Msk & ((value) << ADC_TNCR_TXNCTR_Pos))) -/* -------- ADC_PTCR : (ADC Offset: 0x120) Transfer Control Register -------- */ -#define ADC_PTCR_RXTEN (0x1u << 0) /**< \brief (ADC_PTCR) Receiver Transfer Enable */ -#define ADC_PTCR_RXTDIS (0x1u << 1) /**< \brief (ADC_PTCR) Receiver Transfer Disable */ -#define ADC_PTCR_TXTEN (0x1u << 8) /**< \brief (ADC_PTCR) Transmitter Transfer Enable */ -#define ADC_PTCR_TXTDIS (0x1u << 9) /**< \brief (ADC_PTCR) Transmitter Transfer Disable */ -/* -------- ADC_PTSR : (ADC Offset: 0x124) Transfer Status Register -------- */ -#define ADC_PTSR_RXTEN (0x1u << 0) /**< \brief (ADC_PTSR) Receiver Transfer Enable */ -#define ADC_PTSR_TXTEN (0x1u << 8) /**< \brief (ADC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Chip Identifier */ -/* ============================================================================= */ -/** \addtogroup SAM3S_CHIPID Chip Identifier */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Chipid hardware registers */ -typedef struct { - RoReg CHIPID_CIDR; /**< \brief (Chipid Offset: 0x0) Chip ID Register */ - RoReg CHIPID_EXID; /**< \brief (Chipid Offset: 0x4) Chip ID Extension Register */ -} Chipid; -#endif /* __ASSEMBLY__ */ -/* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */ -#define CHIPID_CIDR_VERSION_Pos 0 -#define CHIPID_CIDR_VERSION_Msk (0x1fu << CHIPID_CIDR_VERSION_Pos) /**< \brief (CHIPID_CIDR) Version of the Device */ -#define CHIPID_CIDR_EPROC_Pos 5 -#define CHIPID_CIDR_EPROC_Msk (0x7u << CHIPID_CIDR_EPROC_Pos) /**< \brief (CHIPID_CIDR) Embedded Processor */ -#define CHIPID_CIDR_EPROC_ARM946ES (0x1u << 5) /**< \brief (CHIPID_CIDR) ARM946ES */ -#define CHIPID_CIDR_EPROC_ARM7TDMI (0x2u << 5) /**< \brief (CHIPID_CIDR) ARM7TDMI */ -#define CHIPID_CIDR_EPROC_CM3 (0x3u << 5) /**< \brief (CHIPID_CIDR) Cortex-M3 */ -#define CHIPID_CIDR_EPROC_ARM920T (0x4u << 5) /**< \brief (CHIPID_CIDR) ARM920T */ -#define CHIPID_CIDR_EPROC_ARM926EJS (0x5u << 5) /**< \brief (CHIPID_CIDR) ARM926EJS */ -#define CHIPID_CIDR_EPROC_CA5 (0x6u << 5) /**< \brief (CHIPID_CIDR) Cortex-A5 */ -#define CHIPID_CIDR_NVPSIZ_Pos 8 -#define CHIPID_CIDR_NVPSIZ_Msk (0xfu << CHIPID_CIDR_NVPSIZ_Pos) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Size */ -#define CHIPID_CIDR_NVPSIZ_NONE (0x0u << 8) /**< \brief (CHIPID_CIDR) None */ -#define CHIPID_CIDR_NVPSIZ_8K (0x1u << 8) /**< \brief (CHIPID_CIDR) 8K bytes */ -#define CHIPID_CIDR_NVPSIZ_16K (0x2u << 8) /**< \brief (CHIPID_CIDR) 16K bytes */ -#define CHIPID_CIDR_NVPSIZ_32K (0x3u << 8) /**< \brief (CHIPID_CIDR) 32K bytes */ -#define CHIPID_CIDR_NVPSIZ_64K (0x5u << 8) /**< \brief (CHIPID_CIDR) 64K bytes */ -#define CHIPID_CIDR_NVPSIZ_128K (0x7u << 8) /**< \brief (CHIPID_CIDR) 128K bytes */ -#define CHIPID_CIDR_NVPSIZ_256K (0x9u << 8) /**< \brief (CHIPID_CIDR) 256K bytes */ -#define CHIPID_CIDR_NVPSIZ_512K (0xAu << 8) /**< \brief (CHIPID_CIDR) 512K bytes */ -#define CHIPID_CIDR_NVPSIZ_1024K (0xCu << 8) /**< \brief (CHIPID_CIDR) 1024K bytes */ -#define CHIPID_CIDR_NVPSIZ_2048K (0xEu << 8) /**< \brief (CHIPID_CIDR) 2048K bytes */ -#define CHIPID_CIDR_NVPSIZ2_Pos 12 -#define CHIPID_CIDR_NVPSIZ2_Msk (0xfu << CHIPID_CIDR_NVPSIZ2_Pos) /**< \brief (CHIPID_CIDR) */ -#define CHIPID_CIDR_NVPSIZ2_NONE (0x0u << 12) /**< \brief (CHIPID_CIDR) None */ -#define CHIPID_CIDR_NVPSIZ2_8K (0x1u << 12) /**< \brief (CHIPID_CIDR) 8K bytes */ -#define CHIPID_CIDR_NVPSIZ2_16K (0x2u << 12) /**< \brief (CHIPID_CIDR) 16K bytes */ -#define CHIPID_CIDR_NVPSIZ2_32K (0x3u << 12) /**< \brief (CHIPID_CIDR) 32K bytes */ -#define CHIPID_CIDR_NVPSIZ2_64K (0x5u << 12) /**< \brief (CHIPID_CIDR) 64K bytes */ -#define CHIPID_CIDR_NVPSIZ2_128K (0x7u << 12) /**< \brief (CHIPID_CIDR) 128K bytes */ -#define CHIPID_CIDR_NVPSIZ2_256K (0x9u << 12) /**< \brief (CHIPID_CIDR) 256K bytes */ -#define CHIPID_CIDR_NVPSIZ2_512K (0xAu << 12) /**< \brief (CHIPID_CIDR) 512K bytes */ -#define CHIPID_CIDR_NVPSIZ2_1024K (0xCu << 12) /**< \brief (CHIPID_CIDR) 1024K bytes */ -#define CHIPID_CIDR_NVPSIZ2_2048K (0xEu << 12) /**< \brief (CHIPID_CIDR) 2048K bytes */ -#define CHIPID_CIDR_SRAMSIZ_Pos 16 -#define CHIPID_CIDR_SRAMSIZ_Msk (0xfu << CHIPID_CIDR_SRAMSIZ_Pos) /**< \brief (CHIPID_CIDR) Internal SRAM Size */ -#define CHIPID_CIDR_SRAMSIZ_48K (0x0u << 16) /**< \brief (CHIPID_CIDR) 48K bytes */ -#define CHIPID_CIDR_SRAMSIZ_1K (0x1u << 16) /**< \brief (CHIPID_CIDR) 1K bytes */ -#define CHIPID_CIDR_SRAMSIZ_2K (0x2u << 16) /**< \brief (CHIPID_CIDR) 2K bytes */ -#define CHIPID_CIDR_SRAMSIZ_6K (0x3u << 16) /**< \brief (CHIPID_CIDR) 6K bytes */ -#define CHIPID_CIDR_SRAMSIZ_112K (0x4u << 16) /**< \brief (CHIPID_CIDR) 112K bytes */ -#define CHIPID_CIDR_SRAMSIZ_4K (0x5u << 16) /**< \brief (CHIPID_CIDR) 4K bytes */ -#define CHIPID_CIDR_SRAMSIZ_80K (0x6u << 16) /**< \brief (CHIPID_CIDR) 80K bytes */ -#define CHIPID_CIDR_SRAMSIZ_160K (0x7u << 16) /**< \brief (CHIPID_CIDR) 160K bytes */ -#define CHIPID_CIDR_SRAMSIZ_8K (0x8u << 16) /**< \brief (CHIPID_CIDR) 8K bytes */ -#define CHIPID_CIDR_SRAMSIZ_16K (0x9u << 16) /**< \brief (CHIPID_CIDR) 16K bytes */ -#define CHIPID_CIDR_SRAMSIZ_32K (0xAu << 16) /**< \brief (CHIPID_CIDR) 32K bytes */ -#define CHIPID_CIDR_SRAMSIZ_64K (0xBu << 16) /**< \brief (CHIPID_CIDR) 64K bytes */ -#define CHIPID_CIDR_SRAMSIZ_128K (0xCu << 16) /**< \brief (CHIPID_CIDR) 128K bytes */ -#define CHIPID_CIDR_SRAMSIZ_256K (0xDu << 16) /**< \brief (CHIPID_CIDR) 256K bytes */ -#define CHIPID_CIDR_SRAMSIZ_96K (0xEu << 16) /**< \brief (CHIPID_CIDR) 96K bytes */ -#define CHIPID_CIDR_SRAMSIZ_512K (0xFu << 16) /**< \brief (CHIPID_CIDR) 512K bytes */ -#define CHIPID_CIDR_ARCH_Pos 20 -#define CHIPID_CIDR_ARCH_Msk (0xffu << CHIPID_CIDR_ARCH_Pos) /**< \brief (CHIPID_CIDR) Architecture Identifier */ -#define CHIPID_CIDR_ARCH_AT91SAM9xx (0x19u << 20) /**< \brief (CHIPID_CIDR) AT91SAM9xx Series */ -#define CHIPID_CIDR_ARCH_AT91SAM9XExx (0x29u << 20) /**< \brief (CHIPID_CIDR) AT91SAM9XExx Series */ -#define CHIPID_CIDR_ARCH_AT91x34 (0x34u << 20) /**< \brief (CHIPID_CIDR) AT91x34 Series */ -#define CHIPID_CIDR_ARCH_CAP7 (0x37u << 20) /**< \brief (CHIPID_CIDR) CAP7 Series */ -#define CHIPID_CIDR_ARCH_CAP9 (0x39u << 20) /**< \brief (CHIPID_CIDR) CAP9 Series */ -#define CHIPID_CIDR_ARCH_CAP11 (0x3Bu << 20) /**< \brief (CHIPID_CIDR) CAP11 Series */ -#define CHIPID_CIDR_ARCH_AT91x40 (0x40u << 20) /**< \brief (CHIPID_CIDR) AT91x40 Series */ -#define CHIPID_CIDR_ARCH_AT91x42 (0x42u << 20) /**< \brief (CHIPID_CIDR) AT91x42 Series */ -#define CHIPID_CIDR_ARCH_AT91x55 (0x55u << 20) /**< \brief (CHIPID_CIDR) AT91x55 Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7Axx (0x60u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7Axx Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7AQxx (0x61u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7AQxx Series */ -#define CHIPID_CIDR_ARCH_AT91x63 (0x63u << 20) /**< \brief (CHIPID_CIDR) AT91x63 Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7Sxx (0x70u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7Sxx Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7XCxx (0x71u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7XCxx Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7SExx (0x72u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7SExx Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7Lxx (0x73u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7Lxx Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7Xxx (0x75u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7Xxx Series */ -#define CHIPID_CIDR_ARCH_AT91SAM7SLxx (0x76u << 20) /**< \brief (CHIPID_CIDR) AT91SAM7SLxx Series */ -#define CHIPID_CIDR_ARCH_SAM3UxC (0x80u << 20) /**< \brief (CHIPID_CIDR) SAM3UxC Series (100-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3UxE (0x81u << 20) /**< \brief (CHIPID_CIDR) SAM3UxE Series (144-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3AxC (0x83u << 20) /**< \brief (CHIPID_CIDR) SAM3AxC Series (100-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3XxC (0x84u << 20) /**< \brief (CHIPID_CIDR) SAM3XxC Series (100-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3XxE (0x85u << 20) /**< \brief (CHIPID_CIDR) SAM3XxE Series (144-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3XxG (0x86u << 20) /**< \brief (CHIPID_CIDR) SAM3XxG Series (208/217-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3SxA (0x88u << 20) /**< \brief (CHIPID_CIDR) SAM3SxA Series (48-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3SxB (0x89u << 20) /**< \brief (CHIPID_CIDR) SAM3SxB Series (64-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3SxC (0x8Au << 20) /**< \brief (CHIPID_CIDR) SAM3SxC Series (100-pin version) */ -#define CHIPID_CIDR_ARCH_AT91x92 (0x92u << 20) /**< \brief (CHIPID_CIDR) AT91x92 Series */ -#define CHIPID_CIDR_ARCH_SAM3NxA (0x93u << 20) /**< \brief (CHIPID_CIDR) SAM3NxA Series (48-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3NxB (0x94u << 20) /**< \brief (CHIPID_CIDR) SAM3NxB Series (64-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3NxC (0x95u << 20) /**< \brief (CHIPID_CIDR) SAM3NxC Series (100-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3SDxA (0x98u << 20) /**< \brief (CHIPID_CIDR) SAM3SDxA Series (48-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3SDxB (0x99u << 20) /**< \brief (CHIPID_CIDR) SAM3SDxB Series (64-pin version) */ -#define CHIPID_CIDR_ARCH_SAM3SDxC (0x9Au << 20) /**< \brief (CHIPID_CIDR) SAM3SDxC Series (100-pin version) */ -#define CHIPID_CIDR_ARCH_SAM5A (0xA5u << 20) /**< \brief (CHIPID_CIDR) SAM5A */ -#define CHIPID_CIDR_ARCH_AT75Cxx (0xF0u << 20) /**< \brief (CHIPID_CIDR) AT75Cxx Series */ -#define CHIPID_CIDR_NVPTYP_Pos 28 -#define CHIPID_CIDR_NVPTYP_Msk (0x7u << CHIPID_CIDR_NVPTYP_Pos) /**< \brief (CHIPID_CIDR) Nonvolatile Program Memory Type */ -#define CHIPID_CIDR_NVPTYP_ROM (0x0u << 28) /**< \brief (CHIPID_CIDR) ROM */ -#define CHIPID_CIDR_NVPTYP_ROMLESS (0x1u << 28) /**< \brief (CHIPID_CIDR) ROMless or on-chip Flash */ -#define CHIPID_CIDR_NVPTYP_FLASH (0x2u << 28) /**< \brief (CHIPID_CIDR) Embedded Flash Memory */ -#define CHIPID_CIDR_NVPTYP_ROM_FLASH (0x3u << 28) /**< \brief (CHIPID_CIDR) ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size */ -#define CHIPID_CIDR_NVPTYP_SRAM (0x4u << 28) /**< \brief (CHIPID_CIDR) SRAM emulating ROM */ -#define CHIPID_CIDR_EXT (0x1u << 31) /**< \brief (CHIPID_CIDR) Extension Flag */ -/* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */ -#define CHIPID_EXID_EXID_Pos 0 -#define CHIPID_EXID_EXID_Msk (0xffffffffu << CHIPID_EXID_EXID_Pos) /**< \brief (CHIPID_EXID) Chip ID Extension */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Cyclic Redundancy Check Calculation Unit */ -/* ============================================================================= */ -/** \addtogroup SAM3S_CRCCU Cyclic Redundancy Check Calculation Unit */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Crccu hardware registers */ -typedef struct { - RwReg CRCCU_DSCR; /**< \brief (Crccu Offset: 0x00000000) CRCCU Descriptor Base Register */ - RwReg Reserved1[1]; - WoReg CRCCU_DMA_EN; /**< \brief (Crccu Offset: 0x00000008) CRCCU DMA Enable Register */ - WoReg CRCCU_DMA_DIS; /**< \brief (Crccu Offset: 0x0000000C) CRCCU DMA Disable Register */ - RoReg CRCCU_DMA_SR; /**< \brief (Crccu Offset: 0x00000010) CRCCU DMA Status Register */ - WoReg CRCCU_DMA_IER; /**< \brief (Crccu Offset: 0x00000014) CRCCU DMA Interrupt Enable Register */ - WoReg CRCCU_DMA_IDR; /**< \brief (Crccu Offset: 0x00000018) CRCCU DMA Interrupt Disable Register */ - RoReg CRCCU_DMA_IMR; /**< \brief (Crccu Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register */ - RoReg CRCCU_DMA_ISR; /**< \brief (Crccu Offset: 0x00000020) CRCCU DMA Interrupt Status Register */ - RwReg Reserved2[4]; - WoReg CRCCU_CR; /**< \brief (Crccu Offset: 0x00000034) CRCCU Control Register */ - RwReg CRCCU_MR; /**< \brief (Crccu Offset: 0x00000038) CRCCU Mode Register */ - RoReg CRCCU_SR; /**< \brief (Crccu Offset: 0x0000003C) CRCCU Status Register */ - WoReg CRCCU_IER; /**< \brief (Crccu Offset: 0x00000040) CRCCU Interrupt Enable Register */ - WoReg CRCCU_IDR; /**< \brief (Crccu Offset: 0x00000044) CRCCU Interrupt Disable Register */ - RoReg CRCCU_IMR; /**< \brief (Crccu Offset: 0x00000048) CRCCU Interrupt Mask Register */ - RoReg CRCCU_ISR; /**< \brief (Crccu Offset: 0x0000004C) CRCCU Interrupt Status Register */ -} Crccu; -#endif /* __ASSEMBLY__ */ -/* -------- CRCCU_DSCR : (CRCCU Offset: 0x00000000) CRCCU Descriptor Base Register -------- */ -#define CRCCU_DSCR_DSCR_Pos 9 -#define CRCCU_DSCR_DSCR_Msk (0x7fffffu << CRCCU_DSCR_DSCR_Pos) /**< \brief (CRCCU_DSCR) Descriptor Base Address */ -#define CRCCU_DSCR_DSCR(value) ((CRCCU_DSCR_DSCR_Msk & ((value) << CRCCU_DSCR_DSCR_Pos))) -/* -------- CRCCU_DMA_EN : (CRCCU Offset: 0x00000008) CRCCU DMA Enable Register -------- */ -#define CRCCU_DMA_EN_DMAEN (0x1u << 0) /**< \brief (CRCCU_DMA_EN) DMA Enable Register */ -/* -------- CRCCU_DMA_DIS : (CRCCU Offset: 0x0000000C) CRCCU DMA Disable Register -------- */ -#define CRCCU_DMA_DIS_DMADIS (0x1u << 0) /**< \brief (CRCCU_DMA_DIS) DMA Disable Register */ -/* -------- CRCCU_DMA_SR : (CRCCU Offset: 0x00000010) CRCCU DMA Status Register -------- */ -#define CRCCU_DMA_SR_DMASR (0x1u << 0) /**< \brief (CRCCU_DMA_SR) DMA Status Register */ -/* -------- CRCCU_DMA_IER : (CRCCU Offset: 0x00000014) CRCCU DMA Interrupt Enable Register -------- */ -#define CRCCU_DMA_IER_DMAIER (0x1u << 0) /**< \brief (CRCCU_DMA_IER) Interrupt Enable register */ -/* -------- CRCCU_DMA_IDR : (CRCCU Offset: 0x00000018) CRCCU DMA Interrupt Disable Register -------- */ -#define CRCCU_DMA_IDR_DMAIDR (0x1u << 0) /**< \brief (CRCCU_DMA_IDR) Interrupt Disable register */ -/* -------- CRCCU_DMA_IMR : (CRCCU Offset: 0x0000001C) CRCCU DMA Interrupt Mask Register -------- */ -#define CRCCU_DMA_IMR_DMAIMR (0x1u << 0) /**< \brief (CRCCU_DMA_IMR) Interrupt Mask Register */ -/* -------- CRCCU_DMA_ISR : (CRCCU Offset: 0x00000020) CRCCU DMA Interrupt Status Register -------- */ -#define CRCCU_DMA_ISR_DMAISR (0x1u << 0) /**< \brief (CRCCU_DMA_ISR) Interrupt Status register */ -/* -------- CRCCU_CR : (CRCCU Offset: 0x00000034) CRCCU Control Register -------- */ -#define CRCCU_CR_RESET (0x1u << 0) /**< \brief (CRCCU_CR) CRC Computation Reset */ -/* -------- CRCCU_MR : (CRCCU Offset: 0x00000038) CRCCU Mode Register -------- */ -#define CRCCU_MR_ENABLE (0x1u << 0) /**< \brief (CRCCU_MR) CRC Enable */ -#define CRCCU_MR_COMPARE (0x1u << 1) /**< \brief (CRCCU_MR) CRC Compare */ -#define CRCCU_MR_PTYPE_Pos 2 -#define CRCCU_MR_PTYPE_Msk (0x3u << CRCCU_MR_PTYPE_Pos) /**< \brief (CRCCU_MR) Primitive Polynomial */ -#define CRCCU_MR_PTYPE_CCIT8023 (0x0u << 2) /**< \brief (CRCCU_MR) Polynom 0x04C11DB7 */ -#define CRCCU_MR_PTYPE_CASTAGNOLI (0x1u << 2) /**< \brief (CRCCU_MR) Polynom 0x1EDC6F41 */ -#define CRCCU_MR_PTYPE_CCIT16 (0x2u << 2) /**< \brief (CRCCU_MR) Polynom 0x1021 */ -#define CRCCU_MR_DIVIDER_Pos 4 -#define CRCCU_MR_DIVIDER_Msk (0xfu << CRCCU_MR_DIVIDER_Pos) /**< \brief (CRCCU_MR) Request Divider */ -#define CRCCU_MR_DIVIDER(value) ((CRCCU_MR_DIVIDER_Msk & ((value) << CRCCU_MR_DIVIDER_Pos))) -/* -------- CRCCU_SR : (CRCCU Offset: 0x0000003C) CRCCU Status Register -------- */ -#define CRCCU_SR_CRC_Pos 0 -#define CRCCU_SR_CRC_Msk (0xffffffffu << CRCCU_SR_CRC_Pos) /**< \brief (CRCCU_SR) Cyclic Redundancy Check Value */ -/* -------- CRCCU_IER : (CRCCU Offset: 0x00000040) CRCCU Interrupt Enable Register -------- */ -#define CRCCU_IER_ERRIER (0x1u << 0) /**< \brief (CRCCU_IER) CRC Error Interrupt Enable */ -/* -------- CRCCU_IDR : (CRCCU Offset: 0x00000044) CRCCU Interrupt Disable Register -------- */ -#define CRCCU_IDR_ERRIDR (0x1u << 0) /**< \brief (CRCCU_IDR) CRC Error Interrupt Disable */ -/* -------- CRCCU_IMR : (CRCCU Offset: 0x00000048) CRCCU Interrupt Mask Register -------- */ -#define CRCCU_IMR_ERRIMR (0x1u << 0) /**< \brief (CRCCU_IMR) CRC Error Interrupt Mask */ -/* -------- CRCCU_ISR : (CRCCU Offset: 0x0000004C) CRCCU Interrupt Status Register -------- */ -#define CRCCU_ISR_ERRISR (0x1u << 0) /**< \brief (CRCCU_ISR) CRC Error Interrupt Status */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Digital-to-Analog Converter Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_DACC Digital-to-Analog Converter Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Dacc hardware registers */ -typedef struct { - WoReg DACC_CR; /**< \brief (Dacc Offset: 0x00) Control Register */ - RwReg DACC_MR; /**< \brief (Dacc Offset: 0x04) Mode Register */ - RwReg Reserved1[2]; - WoReg DACC_CHER; /**< \brief (Dacc Offset: 0x10) Channel Enable Register */ - WoReg DACC_CHDR; /**< \brief (Dacc Offset: 0x14) Channel Disable Register */ - RoReg DACC_CHSR; /**< \brief (Dacc Offset: 0x18) Channel Status Register */ - RwReg Reserved2[1]; - WoReg DACC_CDR; /**< \brief (Dacc Offset: 0x20) Conversion Data Register */ - WoReg DACC_IER; /**< \brief (Dacc Offset: 0x24) Interrupt Enable Register */ - WoReg DACC_IDR; /**< \brief (Dacc Offset: 0x28) Interrupt Disable Register */ - RoReg DACC_IMR; /**< \brief (Dacc Offset: 0x2C) Interrupt Mask Register */ - RoReg DACC_ISR; /**< \brief (Dacc Offset: 0x30) Interrupt Status Register */ - RwReg Reserved3[24]; - RwReg DACC_ACR; /**< \brief (Dacc Offset: 0x94) Analog Current Register */ - RwReg Reserved4[19]; - RwReg DACC_WPMR; /**< \brief (Dacc Offset: 0xE4) Write Protect Mode register */ - RoReg DACC_WPSR; /**< \brief (Dacc Offset: 0xE8) Write Protect Status register */ - RwReg Reserved5[5]; - RwReg DACC_RPR; /**< \brief (Dacc Offset: 0x100) Receive Pointer Register */ - RwReg DACC_RCR; /**< \brief (Dacc Offset: 0x104) Receive Counter Register */ - RwReg DACC_TPR; /**< \brief (Dacc Offset: 0x108) Transmit Pointer Register */ - RwReg DACC_TCR; /**< \brief (Dacc Offset: 0x10C) Transmit Counter Register */ - RwReg DACC_RNPR; /**< \brief (Dacc Offset: 0x110) Receive Next Pointer Register */ - RwReg DACC_RNCR; /**< \brief (Dacc Offset: 0x114) Receive Next Counter Register */ - RwReg DACC_TNPR; /**< \brief (Dacc Offset: 0x118) Transmit Next Pointer Register */ - RwReg DACC_TNCR; /**< \brief (Dacc Offset: 0x11C) Transmit Next Counter Register */ - WoReg DACC_PTCR; /**< \brief (Dacc Offset: 0x120) Transfer Control Register */ - RoReg DACC_PTSR; /**< \brief (Dacc Offset: 0x124) Transfer Status Register */ -} Dacc; -#endif /* __ASSEMBLY__ */ -/* -------- DACC_CR : (DACC Offset: 0x00) Control Register -------- */ -#define DACC_CR_SWRST (0x1u << 0) /**< \brief (DACC_CR) Software Reset */ -/* -------- DACC_MR : (DACC Offset: 0x04) Mode Register -------- */ -#define DACC_MR_TRGEN (0x1u << 0) /**< \brief (DACC_MR) Trigger Enable */ -#define DACC_MR_TRGEN_DIS (0x0u << 0) /**< \brief (DACC_MR) External trigger mode disabled. DACC in free running mode. */ -#define DACC_MR_TRGEN_EN (0x1u << 0) /**< \brief (DACC_MR) External trigger mode enabled. */ -#define DACC_MR_TRGSEL_Pos 1 -#define DACC_MR_TRGSEL_Msk (0x7u << DACC_MR_TRGSEL_Pos) /**< \brief (DACC_MR) Trigger Selection */ -#define DACC_MR_TRGSEL(value) ((DACC_MR_TRGSEL_Msk & ((value) << DACC_MR_TRGSEL_Pos))) -#define DACC_MR_WORD (0x1u << 4) /**< \brief (DACC_MR) Word Transfer */ -#define DACC_MR_WORD_HALF (0x0u << 4) /**< \brief (DACC_MR) Half-Word transfer */ -#define DACC_MR_WORD_WORD (0x1u << 4) /**< \brief (DACC_MR) Word Transfer */ -#define DACC_MR_SLEEP (0x1u << 5) /**< \brief (DACC_MR) Sleep Mode */ -#define DACC_MR_FASTWKUP (0x1u << 6) /**< \brief (DACC_MR) Fast Wake up Mode */ -#define DACC_MR_REFRESH_Pos 8 -#define DACC_MR_REFRESH_Msk (0xffu << DACC_MR_REFRESH_Pos) /**< \brief (DACC_MR) Refresh Period */ -#define DACC_MR_REFRESH(value) ((DACC_MR_REFRESH_Msk & ((value) << DACC_MR_REFRESH_Pos))) -#define DACC_MR_USER_SEL_Pos 16 -#define DACC_MR_USER_SEL_Msk (0x3u << DACC_MR_USER_SEL_Pos) /**< \brief (DACC_MR) User Channel Selection */ -#define DACC_MR_USER_SEL_CHANNEL0 (0x0u << 16) /**< \brief (DACC_MR) Channel 0 */ -#define DACC_MR_USER_SEL_CHANNEL1 (0x1u << 16) /**< \brief (DACC_MR) Channel 1 */ -#define DACC_MR_TAG (0x1u << 20) /**< \brief (DACC_MR) Tag Selection Mode */ -#define DACC_MR_TAG_DIS (0x0u << 20) /**< \brief (DACC_MR) Tag selection mode disabled. Using USER_SEL to select the channel for the conversion */ -#define DACC_MR_TAG_EN (0x1u << 20) /**< \brief (DACC_MR) Tag selection mode enabled */ -#define DACC_MR_MAXS (0x1u << 21) /**< \brief (DACC_MR) Max Speed Mode */ -#define DACC_MR_STARTUP_Pos 24 -#define DACC_MR_STARTUP_Msk (0x3fu << DACC_MR_STARTUP_Pos) /**< \brief (DACC_MR) Startup Time Selection */ -#define DACC_MR_STARTUP_0 (0x0u << 24) /**< \brief (DACC_MR) 0 periods of DACClock */ -#define DACC_MR_STARTUP_8 (0x1u << 24) /**< \brief (DACC_MR) 8 periods of DACClock */ -#define DACC_MR_STARTUP_16 (0x2u << 24) /**< \brief (DACC_MR) 16 periods of DACClock */ -#define DACC_MR_STARTUP_24 (0x3u << 24) /**< \brief (DACC_MR) 24 periods of DACClock */ -#define DACC_MR_STARTUP_64 (0x4u << 24) /**< \brief (DACC_MR) 64 periods of DACClock */ -#define DACC_MR_STARTUP_80 (0x5u << 24) /**< \brief (DACC_MR) 80 periods of DACClock */ -#define DACC_MR_STARTUP_96 (0x6u << 24) /**< \brief (DACC_MR) 96 periods of DACClock */ -#define DACC_MR_STARTUP_112 (0x7u << 24) /**< \brief (DACC_MR) 112 periods of DACClock */ -#define DACC_MR_STARTUP_512 (0x8u << 24) /**< \brief (DACC_MR) 512 periods of DACClock */ -#define DACC_MR_STARTUP_576 (0x9u << 24) /**< \brief (DACC_MR) 576 periods of DACClock */ -#define DACC_MR_STARTUP_640 (0xAu << 24) /**< \brief (DACC_MR) 640 periods of DACClock */ -#define DACC_MR_STARTUP_704 (0xBu << 24) /**< \brief (DACC_MR) 704 periods of DACClock */ -#define DACC_MR_STARTUP_768 (0xCu << 24) /**< \brief (DACC_MR) 768 periods of DACClock */ -#define DACC_MR_STARTUP_832 (0xDu << 24) /**< \brief (DACC_MR) 832 periods of DACClock */ -#define DACC_MR_STARTUP_896 (0xEu << 24) /**< \brief (DACC_MR) 896 periods of DACClock */ -#define DACC_MR_STARTUP_960 (0xFu << 24) /**< \brief (DACC_MR) 960 periods of DACClock */ -/* -------- DACC_CHER : (DACC Offset: 0x10) Channel Enable Register -------- */ -#define DACC_CHER_CH0 (0x1u << 0) /**< \brief (DACC_CHER) Channel 0 Enable */ -#define DACC_CHER_CH1 (0x1u << 1) /**< \brief (DACC_CHER) Channel 1 Enable */ -/* -------- DACC_CHDR : (DACC Offset: 0x14) Channel Disable Register -------- */ -#define DACC_CHDR_CH0 (0x1u << 0) /**< \brief (DACC_CHDR) Channel 0 Disable */ -#define DACC_CHDR_CH1 (0x1u << 1) /**< \brief (DACC_CHDR) Channel 1 Disable */ -/* -------- DACC_CHSR : (DACC Offset: 0x18) Channel Status Register -------- */ -#define DACC_CHSR_CH0 (0x1u << 0) /**< \brief (DACC_CHSR) Channel 0 Status */ -#define DACC_CHSR_CH1 (0x1u << 1) /**< \brief (DACC_CHSR) Channel 1 Status */ -/* -------- DACC_CDR : (DACC Offset: 0x20) Conversion Data Register -------- */ -#define DACC_CDR_DATA_Pos 0 -#define DACC_CDR_DATA_Msk (0xffffffffu << DACC_CDR_DATA_Pos) /**< \brief (DACC_CDR) Data to Convert */ -#define DACC_CDR_DATA(value) ((DACC_CDR_DATA_Msk & ((value) << DACC_CDR_DATA_Pos))) -/* -------- DACC_IER : (DACC Offset: 0x24) Interrupt Enable Register -------- */ -#define DACC_IER_TXRDY (0x1u << 0) /**< \brief (DACC_IER) Transmit Ready Interrupt Enable */ -#define DACC_IER_EOC (0x1u << 1) /**< \brief (DACC_IER) End of Conversion Interrupt Enable */ -#define DACC_IER_ENDTX (0x1u << 2) /**< \brief (DACC_IER) End of Transmit Buffer Interrupt Enable */ -#define DACC_IER_TXBUFE (0x1u << 3) /**< \brief (DACC_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- DACC_IDR : (DACC Offset: 0x28) Interrupt Disable Register -------- */ -#define DACC_IDR_TXRDY (0x1u << 0) /**< \brief (DACC_IDR) Transmit Ready Interrupt Disable. */ -#define DACC_IDR_EOC (0x1u << 1) /**< \brief (DACC_IDR) End of Conversion Interrupt Disable */ -#define DACC_IDR_ENDTX (0x1u << 2) /**< \brief (DACC_IDR) End of Transmit Buffer Interrupt Disable */ -#define DACC_IDR_TXBUFE (0x1u << 3) /**< \brief (DACC_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- DACC_IMR : (DACC Offset: 0x2C) Interrupt Mask Register -------- */ -#define DACC_IMR_TXRDY (0x1u << 0) /**< \brief (DACC_IMR) Transmit Ready Interrupt Mask */ -#define DACC_IMR_EOC (0x1u << 1) /**< \brief (DACC_IMR) End of Conversion Interrupt Mask */ -#define DACC_IMR_ENDTX (0x1u << 2) /**< \brief (DACC_IMR) End of Transmit Buffer Interrupt Mask */ -#define DACC_IMR_TXBUFE (0x1u << 3) /**< \brief (DACC_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- DACC_ISR : (DACC Offset: 0x30) Interrupt Status Register -------- */ -#define DACC_ISR_TXRDY (0x1u << 0) /**< \brief (DACC_ISR) Transmit Ready Interrupt Flag */ -#define DACC_ISR_EOC (0x1u << 1) /**< \brief (DACC_ISR) End of Conversion Interrupt Flag */ -#define DACC_ISR_ENDTX (0x1u << 2) /**< \brief (DACC_ISR) End of DMA Interrupt Flag */ -#define DACC_ISR_TXBUFE (0x1u << 3) /**< \brief (DACC_ISR) Transmit Buffer Empty */ -/* -------- DACC_ACR : (DACC Offset: 0x94) Analog Current Register -------- */ -#define DACC_ACR_IBCTLCH0_Pos 0 -#define DACC_ACR_IBCTLCH0_Msk (0x3u << DACC_ACR_IBCTLCH0_Pos) /**< \brief (DACC_ACR) Analog Output Current Control */ -#define DACC_ACR_IBCTLCH0(value) ((DACC_ACR_IBCTLCH0_Msk & ((value) << DACC_ACR_IBCTLCH0_Pos))) -#define DACC_ACR_IBCTLCH1_Pos 2 -#define DACC_ACR_IBCTLCH1_Msk (0x3u << DACC_ACR_IBCTLCH1_Pos) /**< \brief (DACC_ACR) Analog Output Current Control */ -#define DACC_ACR_IBCTLCH1(value) ((DACC_ACR_IBCTLCH1_Msk & ((value) << DACC_ACR_IBCTLCH1_Pos))) -#define DACC_ACR_IBCTLDACCORE_Pos 8 -#define DACC_ACR_IBCTLDACCORE_Msk (0x3u << DACC_ACR_IBCTLDACCORE_Pos) /**< \brief (DACC_ACR) Bias Current Control for DAC Core */ -#define DACC_ACR_IBCTLDACCORE(value) ((DACC_ACR_IBCTLDACCORE_Msk & ((value) << DACC_ACR_IBCTLDACCORE_Pos))) -/* -------- DACC_WPMR : (DACC Offset: 0xE4) Write Protect Mode register -------- */ -#define DACC_WPMR_WPEN (0x1u << 0) /**< \brief (DACC_WPMR) Write Protect Enable */ -#define DACC_WPMR_WPKEY_Pos 8 -#define DACC_WPMR_WPKEY_Msk (0xffffffu << DACC_WPMR_WPKEY_Pos) /**< \brief (DACC_WPMR) Write Protect KEY */ -#define DACC_WPMR_WPKEY(value) ((DACC_WPMR_WPKEY_Msk & ((value) << DACC_WPMR_WPKEY_Pos))) -/* -------- DACC_WPSR : (DACC Offset: 0xE8) Write Protect Status register -------- */ -#define DACC_WPSR_WPROTERR (0x1u << 0) /**< \brief (DACC_WPSR) Write protection error */ -#define DACC_WPSR_WPROTADDR_Pos 8 -#define DACC_WPSR_WPROTADDR_Msk (0xffu << DACC_WPSR_WPROTADDR_Pos) /**< \brief (DACC_WPSR) Write protection error address */ -/* -------- DACC_RPR : (DACC Offset: 0x100) Receive Pointer Register -------- */ -#define DACC_RPR_RXPTR_Pos 0 -#define DACC_RPR_RXPTR_Msk (0xffffffffu << DACC_RPR_RXPTR_Pos) /**< \brief (DACC_RPR) Receive Pointer Register */ -#define DACC_RPR_RXPTR(value) ((DACC_RPR_RXPTR_Msk & ((value) << DACC_RPR_RXPTR_Pos))) -/* -------- DACC_RCR : (DACC Offset: 0x104) Receive Counter Register -------- */ -#define DACC_RCR_RXCTR_Pos 0 -#define DACC_RCR_RXCTR_Msk (0xffffu << DACC_RCR_RXCTR_Pos) /**< \brief (DACC_RCR) Receive Counter Register */ -#define DACC_RCR_RXCTR(value) ((DACC_RCR_RXCTR_Msk & ((value) << DACC_RCR_RXCTR_Pos))) -/* -------- DACC_TPR : (DACC Offset: 0x108) Transmit Pointer Register -------- */ -#define DACC_TPR_TXPTR_Pos 0 -#define DACC_TPR_TXPTR_Msk (0xffffffffu << DACC_TPR_TXPTR_Pos) /**< \brief (DACC_TPR) Transmit Counter Register */ -#define DACC_TPR_TXPTR(value) ((DACC_TPR_TXPTR_Msk & ((value) << DACC_TPR_TXPTR_Pos))) -/* -------- DACC_TCR : (DACC Offset: 0x10C) Transmit Counter Register -------- */ -#define DACC_TCR_TXCTR_Pos 0 -#define DACC_TCR_TXCTR_Msk (0xffffu << DACC_TCR_TXCTR_Pos) /**< \brief (DACC_TCR) Transmit Counter Register */ -#define DACC_TCR_TXCTR(value) ((DACC_TCR_TXCTR_Msk & ((value) << DACC_TCR_TXCTR_Pos))) -/* -------- DACC_RNPR : (DACC Offset: 0x110) Receive Next Pointer Register -------- */ -#define DACC_RNPR_RXNPTR_Pos 0 -#define DACC_RNPR_RXNPTR_Msk (0xffffffffu << DACC_RNPR_RXNPTR_Pos) /**< \brief (DACC_RNPR) Receive Next Pointer */ -#define DACC_RNPR_RXNPTR(value) ((DACC_RNPR_RXNPTR_Msk & ((value) << DACC_RNPR_RXNPTR_Pos))) -/* -------- DACC_RNCR : (DACC Offset: 0x114) Receive Next Counter Register -------- */ -#define DACC_RNCR_RXNCTR_Pos 0 -#define DACC_RNCR_RXNCTR_Msk (0xffffu << DACC_RNCR_RXNCTR_Pos) /**< \brief (DACC_RNCR) Receive Next Counter */ -#define DACC_RNCR_RXNCTR(value) ((DACC_RNCR_RXNCTR_Msk & ((value) << DACC_RNCR_RXNCTR_Pos))) -/* -------- DACC_TNPR : (DACC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define DACC_TNPR_TXNPTR_Pos 0 -#define DACC_TNPR_TXNPTR_Msk (0xffffffffu << DACC_TNPR_TXNPTR_Pos) /**< \brief (DACC_TNPR) Transmit Next Pointer */ -#define DACC_TNPR_TXNPTR(value) ((DACC_TNPR_TXNPTR_Msk & ((value) << DACC_TNPR_TXNPTR_Pos))) -/* -------- DACC_TNCR : (DACC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define DACC_TNCR_TXNCTR_Pos 0 -#define DACC_TNCR_TXNCTR_Msk (0xffffu << DACC_TNCR_TXNCTR_Pos) /**< \brief (DACC_TNCR) Transmit Counter Next */ -#define DACC_TNCR_TXNCTR(value) ((DACC_TNCR_TXNCTR_Msk & ((value) << DACC_TNCR_TXNCTR_Pos))) -/* -------- DACC_PTCR : (DACC Offset: 0x120) Transfer Control Register -------- */ -#define DACC_PTCR_RXTEN (0x1u << 0) /**< \brief (DACC_PTCR) Receiver Transfer Enable */ -#define DACC_PTCR_RXTDIS (0x1u << 1) /**< \brief (DACC_PTCR) Receiver Transfer Disable */ -#define DACC_PTCR_TXTEN (0x1u << 8) /**< \brief (DACC_PTCR) Transmitter Transfer Enable */ -#define DACC_PTCR_TXTDIS (0x1u << 9) /**< \brief (DACC_PTCR) Transmitter Transfer Disable */ -/* -------- DACC_PTSR : (DACC Offset: 0x124) Transfer Status Register -------- */ -#define DACC_PTSR_RXTEN (0x1u << 0) /**< \brief (DACC_PTSR) Receiver Transfer Enable */ -#define DACC_PTSR_TXTEN (0x1u << 8) /**< \brief (DACC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Embedded Flash Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_EFC Embedded Flash Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Efc hardware registers */ -typedef struct { - RwReg EEFC_FMR; /**< \brief (Efc Offset: 0x00) EEFC Flash Mode Register */ - WoReg EEFC_FCR; /**< \brief (Efc Offset: 0x04) EEFC Flash Command Register */ - RoReg EEFC_FSR; /**< \brief (Efc Offset: 0x08) EEFC Flash Status Register */ - RoReg EEFC_FRR; /**< \brief (Efc Offset: 0x0C) EEFC Flash Result Register */ -} Efc; -#endif /* __ASSEMBLY__ */ -/* -------- EEFC_FMR : (EFC Offset: 0x00) EEFC Flash Mode Register -------- */ -#define EEFC_FMR_FRDY (0x1u << 0) /**< \brief (EEFC_FMR) Ready Interrupt Enable */ -#define EEFC_FMR_FWS_Pos 8 -#define EEFC_FMR_FWS_Msk (0xfu << EEFC_FMR_FWS_Pos) /**< \brief (EEFC_FMR) Flash Wait State */ -#define EEFC_FMR_FWS(value) ((EEFC_FMR_FWS_Msk & ((value) << EEFC_FMR_FWS_Pos))) -#define EEFC_FMR_FAM (0x1u << 24) /**< \brief (EEFC_FMR) Flash Access Mode */ -/* -------- EEFC_FCR : (EFC Offset: 0x04) EEFC Flash Command Register -------- */ -#define EEFC_FCR_FCMD_Pos 0 -#define EEFC_FCR_FCMD_Msk (0xffu << EEFC_FCR_FCMD_Pos) /**< \brief (EEFC_FCR) Flash Command */ -#define EEFC_FCR_FCMD(value) ((EEFC_FCR_FCMD_Msk & ((value) << EEFC_FCR_FCMD_Pos))) -#define EEFC_FCR_FARG_Pos 8 -#define EEFC_FCR_FARG_Msk (0xffffu << EEFC_FCR_FARG_Pos) /**< \brief (EEFC_FCR) Flash Command Argument */ -#define EEFC_FCR_FARG(value) ((EEFC_FCR_FARG_Msk & ((value) << EEFC_FCR_FARG_Pos))) -#define EEFC_FCR_FKEY_Pos 24 -#define EEFC_FCR_FKEY_Msk (0xffu << EEFC_FCR_FKEY_Pos) /**< \brief (EEFC_FCR) Flash Writing Protection Key */ -#define EEFC_FCR_FKEY(value) ((EEFC_FCR_FKEY_Msk & ((value) << EEFC_FCR_FKEY_Pos))) -/* -------- EEFC_FSR : (EFC Offset: 0x08) EEFC Flash Status Register -------- */ -#define EEFC_FSR_FRDY (0x1u << 0) /**< \brief (EEFC_FSR) Flash Ready Status */ -#define EEFC_FSR_FCMDE (0x1u << 1) /**< \brief (EEFC_FSR) Flash Command Error Status */ -#define EEFC_FSR_FLOCKE (0x1u << 2) /**< \brief (EEFC_FSR) Flash Lock Error Status */ -/* -------- EEFC_FRR : (EFC Offset: 0x0C) EEFC Flash Result Register -------- */ -#define EEFC_FRR_FVALUE_Pos 0 -#define EEFC_FRR_FVALUE_Msk (0xffffffffu << EEFC_FRR_FVALUE_Pos) /**< \brief (EEFC_FRR) Flash Result Value */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR General Purpose Backup Register */ -/* ============================================================================= */ -/** \addtogroup SAM3S_GPBR General Purpose Backup Register */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Gpbr hardware registers */ -typedef struct { - RwReg SYS_GPBR0; /**< \brief (Gpbr Offset: 0x0) General Purpose Backup Register 0 */ - RwReg SYS_GPBR1; /**< \brief (Gpbr Offset: 0x4) General Purpose Backup Register 1 */ - RwReg SYS_GPBR2; /**< \brief (Gpbr Offset: 0x8) General Purpose Backup Register 2 */ - RwReg SYS_GPBR3; /**< \brief (Gpbr Offset: 0xC) General Purpose Backup Register 3 */ - RwReg SYS_GPBR4; /**< \brief (Gpbr Offset: 0x10) General Purpose Backup Register 4 */ - RwReg SYS_GPBR5; /**< \brief (Gpbr Offset: 0x14) General Purpose Backup Register 5 */ - RwReg SYS_GPBR6; /**< \brief (Gpbr Offset: 0x18) General Purpose Backup Register 6 */ - RwReg SYS_GPBR7; /**< \brief (Gpbr Offset: 0x1C) General Purpose Backup Register 7 */ -} Gpbr; -#endif /* __ASSEMBLY__ */ -/* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */ -#define SYS_GPBR0_GPBR_VALUE0_Pos 0 -#define SYS_GPBR0_GPBR_VALUE0_Msk (0xffffffffu << SYS_GPBR0_GPBR_VALUE0_Pos) /**< \brief (SYS_GPBR0) Value of GPBR x */ -#define SYS_GPBR0_GPBR_VALUE0(value) ((SYS_GPBR0_GPBR_VALUE0_Msk & ((value) << SYS_GPBR0_GPBR_VALUE0_Pos))) -/* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */ -#define SYS_GPBR1_GPBR_VALUE1_Pos 0 -#define SYS_GPBR1_GPBR_VALUE1_Msk (0xffffffffu << SYS_GPBR1_GPBR_VALUE1_Pos) /**< \brief (SYS_GPBR1) Value of GPBR x */ -#define SYS_GPBR1_GPBR_VALUE1(value) ((SYS_GPBR1_GPBR_VALUE1_Msk & ((value) << SYS_GPBR1_GPBR_VALUE1_Pos))) -/* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */ -#define SYS_GPBR2_GPBR_VALUE2_Pos 0 -#define SYS_GPBR2_GPBR_VALUE2_Msk (0xffffffffu << SYS_GPBR2_GPBR_VALUE2_Pos) /**< \brief (SYS_GPBR2) Value of GPBR x */ -#define SYS_GPBR2_GPBR_VALUE2(value) ((SYS_GPBR2_GPBR_VALUE2_Msk & ((value) << SYS_GPBR2_GPBR_VALUE2_Pos))) -/* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */ -#define SYS_GPBR3_GPBR_VALUE3_Pos 0 -#define SYS_GPBR3_GPBR_VALUE3_Msk (0xffffffffu << SYS_GPBR3_GPBR_VALUE3_Pos) /**< \brief (SYS_GPBR3) Value of GPBR x */ -#define SYS_GPBR3_GPBR_VALUE3(value) ((SYS_GPBR3_GPBR_VALUE3_Msk & ((value) << SYS_GPBR3_GPBR_VALUE3_Pos))) -/* -------- SYS_GPBR4 : (GPBR Offset: 0x10) General Purpose Backup Register 4 -------- */ -#define SYS_GPBR4_GPBR_VALUE4_Pos 0 -#define SYS_GPBR4_GPBR_VALUE4_Msk (0xffffffffu << SYS_GPBR4_GPBR_VALUE4_Pos) /**< \brief (SYS_GPBR4) Value of GPBR x */ -#define SYS_GPBR4_GPBR_VALUE4(value) ((SYS_GPBR4_GPBR_VALUE4_Msk & ((value) << SYS_GPBR4_GPBR_VALUE4_Pos))) -/* -------- SYS_GPBR5 : (GPBR Offset: 0x14) General Purpose Backup Register 5 -------- */ -#define SYS_GPBR5_GPBR_VALUE5_Pos 0 -#define SYS_GPBR5_GPBR_VALUE5_Msk (0xffffffffu << SYS_GPBR5_GPBR_VALUE5_Pos) /**< \brief (SYS_GPBR5) Value of GPBR x */ -#define SYS_GPBR5_GPBR_VALUE5(value) ((SYS_GPBR5_GPBR_VALUE5_Msk & ((value) << SYS_GPBR5_GPBR_VALUE5_Pos))) -/* -------- SYS_GPBR6 : (GPBR Offset: 0x18) General Purpose Backup Register 6 -------- */ -#define SYS_GPBR6_GPBR_VALUE6_Pos 0 -#define SYS_GPBR6_GPBR_VALUE6_Msk (0xffffffffu << SYS_GPBR6_GPBR_VALUE6_Pos) /**< \brief (SYS_GPBR6) Value of GPBR x */ -#define SYS_GPBR6_GPBR_VALUE6(value) ((SYS_GPBR6_GPBR_VALUE6_Msk & ((value) << SYS_GPBR6_GPBR_VALUE6_Pos))) -/* -------- SYS_GPBR7 : (GPBR Offset: 0x1C) General Purpose Backup Register 7 -------- */ -#define SYS_GPBR7_GPBR_VALUE7_Pos 0 -#define SYS_GPBR7_GPBR_VALUE7_Msk (0xffffffffu << SYS_GPBR7_GPBR_VALUE7_Pos) /**< \brief (SYS_GPBR7) Value of GPBR x */ -#define SYS_GPBR7_GPBR_VALUE7(value) ((SYS_GPBR7_GPBR_VALUE7_Msk & ((value) << SYS_GPBR7_GPBR_VALUE7_Pos))) - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR High Speed MultiMedia Card Interface */ -/* ============================================================================= */ -/** \addtogroup SAM3S_HSMCI High Speed MultiMedia Card Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Hsmci hardware registers */ -typedef struct { - WoReg HSMCI_CR; /**< \brief (Hsmci Offset: 0x00) Control Register */ - RwReg HSMCI_MR; /**< \brief (Hsmci Offset: 0x04) Mode Register */ - RwReg HSMCI_DTOR; /**< \brief (Hsmci Offset: 0x08) Data Timeout Register */ - RwReg HSMCI_SDCR; /**< \brief (Hsmci Offset: 0x0C) SD/SDIO Card Register */ - RwReg HSMCI_ARGR; /**< \brief (Hsmci Offset: 0x10) Argument Register */ - WoReg HSMCI_CMDR; /**< \brief (Hsmci Offset: 0x14) Command Register */ - RwReg HSMCI_BLKR; /**< \brief (Hsmci Offset: 0x18) Block Register */ - RwReg HSMCI_CSTOR; /**< \brief (Hsmci Offset: 0x1C) Completion Signal Timeout Register */ - RoReg HSMCI_RSPR[4]; /**< \brief (Hsmci Offset: 0x20) Response Register */ - RoReg HSMCI_RDR; /**< \brief (Hsmci Offset: 0x30) Receive Data Register */ - WoReg HSMCI_TDR; /**< \brief (Hsmci Offset: 0x34) Transmit Data Register */ - RwReg Reserved1[2]; - RoReg HSMCI_SR; /**< \brief (Hsmci Offset: 0x40) Status Register */ - WoReg HSMCI_IER; /**< \brief (Hsmci Offset: 0x44) Interrupt Enable Register */ - WoReg HSMCI_IDR; /**< \brief (Hsmci Offset: 0x48) Interrupt Disable Register */ - RoReg HSMCI_IMR; /**< \brief (Hsmci Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved2[1]; - RwReg HSMCI_CFG; /**< \brief (Hsmci Offset: 0x54) Configuration Register */ - RwReg Reserved3[35]; - RwReg HSMCI_WPMR; /**< \brief (Hsmci Offset: 0xE4) Write Protection Mode Register */ - RoReg HSMCI_WPSR; /**< \brief (Hsmci Offset: 0xE8) Write Protection Status Register */ - RwReg Reserved4[5]; - RwReg HSMCI_RPR; /**< \brief (Hsmci Offset: 0x100) Receive Pointer Register */ - RwReg HSMCI_RCR; /**< \brief (Hsmci Offset: 0x104) Receive Counter Register */ - RwReg HSMCI_TPR; /**< \brief (Hsmci Offset: 0x108) Transmit Pointer Register */ - RwReg HSMCI_TCR; /**< \brief (Hsmci Offset: 0x10C) Transmit Counter Register */ - RwReg HSMCI_RNPR; /**< \brief (Hsmci Offset: 0x110) Receive Next Pointer Register */ - RwReg HSMCI_RNCR; /**< \brief (Hsmci Offset: 0x114) Receive Next Counter Register */ - RwReg HSMCI_TNPR; /**< \brief (Hsmci Offset: 0x118) Transmit Next Pointer Register */ - RwReg HSMCI_TNCR; /**< \brief (Hsmci Offset: 0x11C) Transmit Next Counter Register */ - WoReg HSMCI_PTCR; /**< \brief (Hsmci Offset: 0x120) Transfer Control Register */ - RoReg HSMCI_PTSR; /**< \brief (Hsmci Offset: 0x124) Transfer Status Register */ - RwReg Reserved5[54]; - RwReg HSMCI_FIFO[256]; /**< \brief (Hsmci Offset: 0x200) FIFO Memory Aperture0 */ -} Hsmci; -#endif /* __ASSEMBLY__ */ -/* -------- HSMCI_CR : (HSMCI Offset: 0x00) Control Register -------- */ -#define HSMCI_CR_MCIEN (0x1u << 0) /**< \brief (HSMCI_CR) Multi-Media Interface Enable */ -#define HSMCI_CR_MCIDIS (0x1u << 1) /**< \brief (HSMCI_CR) Multi-Media Interface Disable */ -#define HSMCI_CR_PWSEN (0x1u << 2) /**< \brief (HSMCI_CR) Power Save Mode Enable */ -#define HSMCI_CR_PWSDIS (0x1u << 3) /**< \brief (HSMCI_CR) Power Save Mode Disable */ -#define HSMCI_CR_SWRST (0x1u << 7) /**< \brief (HSMCI_CR) Software Reset */ -/* -------- HSMCI_MR : (HSMCI Offset: 0x04) Mode Register -------- */ -#define HSMCI_MR_CLKDIV_Pos 0 -#define HSMCI_MR_CLKDIV_Msk (0xffu << HSMCI_MR_CLKDIV_Pos) /**< \brief (HSMCI_MR) Clock Divider */ -#define HSMCI_MR_CLKDIV(value) ((HSMCI_MR_CLKDIV_Msk & ((value) << HSMCI_MR_CLKDIV_Pos))) -#define HSMCI_MR_PWSDIV_Pos 8 -#define HSMCI_MR_PWSDIV_Msk (0x7u << HSMCI_MR_PWSDIV_Pos) /**< \brief (HSMCI_MR) Power Saving Divider */ -#define HSMCI_MR_PWSDIV(value) ((HSMCI_MR_PWSDIV_Msk & ((value) << HSMCI_MR_PWSDIV_Pos))) -#define HSMCI_MR_RDPROOF (0x1u << 11) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_WRPROOF (0x1u << 12) /**< \brief (HSMCI_MR) */ -#define HSMCI_MR_FBYTE (0x1u << 13) /**< \brief (HSMCI_MR) Force Byte Transfer */ -#define HSMCI_MR_PADV (0x1u << 14) /**< \brief (HSMCI_MR) Padding Value */ -#define HSMCI_MR_PDCMODE (0x1u << 15) /**< \brief (HSMCI_MR) PDC-oriented Mode */ -#define HSMCI_MR_BLKLEN_Pos 16 -#define HSMCI_MR_BLKLEN_Msk (0xffffu << HSMCI_MR_BLKLEN_Pos) /**< \brief (HSMCI_MR) Data Block Length */ -#define HSMCI_MR_BLKLEN(value) ((HSMCI_MR_BLKLEN_Msk & ((value) << HSMCI_MR_BLKLEN_Pos))) -/* -------- HSMCI_DTOR : (HSMCI Offset: 0x08) Data Timeout Register -------- */ -#define HSMCI_DTOR_DTOCYC_Pos 0 -#define HSMCI_DTOR_DTOCYC_Msk (0xfu << HSMCI_DTOR_DTOCYC_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Cycle Number */ -#define HSMCI_DTOR_DTOCYC(value) ((HSMCI_DTOR_DTOCYC_Msk & ((value) << HSMCI_DTOR_DTOCYC_Pos))) -#define HSMCI_DTOR_DTOMUL_Pos 4 -#define HSMCI_DTOR_DTOMUL_Msk (0x7u << HSMCI_DTOR_DTOMUL_Pos) /**< \brief (HSMCI_DTOR) Data Timeout Multiplier */ -#define HSMCI_DTOR_DTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_DTOR) DTOCYC */ -#define HSMCI_DTOR_DTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 16 */ -#define HSMCI_DTOR_DTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 128 */ -#define HSMCI_DTOR_DTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 256 */ -#define HSMCI_DTOR_DTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1024 */ -#define HSMCI_DTOR_DTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 4096 */ -#define HSMCI_DTOR_DTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 65536 */ -#define HSMCI_DTOR_DTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_DTOR) DTOCYC x 1048576 */ -/* -------- HSMCI_SDCR : (HSMCI Offset: 0x0C) SD/SDIO Card Register -------- */ -#define HSMCI_SDCR_SDCSEL_Pos 0 -#define HSMCI_SDCR_SDCSEL_Msk (0x3u << HSMCI_SDCR_SDCSEL_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Slot */ -#define HSMCI_SDCR_SDCSEL_SLOTA (0x0u << 0) /**< \brief (HSMCI_SDCR) Slot A is selected. */ -#define HSMCI_SDCR_SDCSEL_SLOTB (0x1u << 0) /**< \brief (HSMCI_SDCR) - */ -#define HSMCI_SDCR_SDCSEL_SLOTC (0x2u << 0) /**< \brief (HSMCI_SDCR) - */ -#define HSMCI_SDCR_SDCSEL_SLOTD (0x3u << 0) /**< \brief (HSMCI_SDCR) - */ -#define HSMCI_SDCR_SDCBUS_Pos 6 -#define HSMCI_SDCR_SDCBUS_Msk (0x3u << HSMCI_SDCR_SDCBUS_Pos) /**< \brief (HSMCI_SDCR) SDCard/SDIO Bus Width */ -#define HSMCI_SDCR_SDCBUS_1 (0x0u << 6) /**< \brief (HSMCI_SDCR) 1 bit */ -#define HSMCI_SDCR_SDCBUS_4 (0x2u << 6) /**< \brief (HSMCI_SDCR) 4 bit */ -#define HSMCI_SDCR_SDCBUS_8 (0x3u << 6) /**< \brief (HSMCI_SDCR) 8 bit */ -/* -------- HSMCI_ARGR : (HSMCI Offset: 0x10) Argument Register -------- */ -#define HSMCI_ARGR_ARG_Pos 0 -#define HSMCI_ARGR_ARG_Msk (0xffffffffu << HSMCI_ARGR_ARG_Pos) /**< \brief (HSMCI_ARGR) Command Argument */ -#define HSMCI_ARGR_ARG(value) ((HSMCI_ARGR_ARG_Msk & ((value) << HSMCI_ARGR_ARG_Pos))) -/* -------- HSMCI_CMDR : (HSMCI Offset: 0x14) Command Register -------- */ -#define HSMCI_CMDR_CMDNB_Pos 0 -#define HSMCI_CMDR_CMDNB_Msk (0x3fu << HSMCI_CMDR_CMDNB_Pos) /**< \brief (HSMCI_CMDR) Command Number */ -#define HSMCI_CMDR_CMDNB(value) ((HSMCI_CMDR_CMDNB_Msk & ((value) << HSMCI_CMDR_CMDNB_Pos))) -#define HSMCI_CMDR_RSPTYP_Pos 6 -#define HSMCI_CMDR_RSPTYP_Msk (0x3u << HSMCI_CMDR_RSPTYP_Pos) /**< \brief (HSMCI_CMDR) Response Type */ -#define HSMCI_CMDR_RSPTYP_NORESP (0x0u << 6) /**< \brief (HSMCI_CMDR) No response. */ -#define HSMCI_CMDR_RSPTYP_48_BIT (0x1u << 6) /**< \brief (HSMCI_CMDR) 48-bit response. */ -#define HSMCI_CMDR_RSPTYP_136_BIT (0x2u << 6) /**< \brief (HSMCI_CMDR) 136-bit response. */ -#define HSMCI_CMDR_RSPTYP_R1B (0x3u << 6) /**< \brief (HSMCI_CMDR) R1b response type */ -#define HSMCI_CMDR_SPCMD_Pos 8 -#define HSMCI_CMDR_SPCMD_Msk (0x7u << HSMCI_CMDR_SPCMD_Pos) /**< \brief (HSMCI_CMDR) Special Command */ -#define HSMCI_CMDR_SPCMD_STD (0x0u << 8) /**< \brief (HSMCI_CMDR) Not a special CMD. */ -#define HSMCI_CMDR_SPCMD_INIT (0x1u << 8) /**< \brief (HSMCI_CMDR) Initialization CMD:74 clock cycles for initialization sequence. */ -#define HSMCI_CMDR_SPCMD_SYNC (0x2u << 8) /**< \brief (HSMCI_CMDR) Synchronized CMD:Wait for the end of the current data block transfer before sending the pending command. */ -#define HSMCI_CMDR_SPCMD_CE_ATA (0x3u << 8) /**< \brief (HSMCI_CMDR) CE-ATA Completion Signal disable Command.The host cancels the ability for the device to return a command completion signal on the command line. */ -#define HSMCI_CMDR_SPCMD_IT_CMD (0x4u << 8) /**< \brief (HSMCI_CMDR) Interrupt command:Corresponds to the Interrupt Mode (CMD40). */ -#define HSMCI_CMDR_SPCMD_IT_RESP (0x5u << 8) /**< \brief (HSMCI_CMDR) Interrupt response:Corresponds to the Interrupt Mode (CMD40). */ -#define HSMCI_CMDR_SPCMD_BOR (0x6u << 8) /**< \brief (HSMCI_CMDR) Boot Operation Request.Start a boot operation mode, the host processor can read boot data from the MMC device directly. */ -#define HSMCI_CMDR_SPCMD_EBO (0x7u << 8) /**< \brief (HSMCI_CMDR) End Boot Operation.This command allows the host processor to terminate the boot operation mode. */ -#define HSMCI_CMDR_OPDCMD (0x1u << 11) /**< \brief (HSMCI_CMDR) Open Drain Command */ -#define HSMCI_CMDR_OPDCMD_PUSHPULL (0x0u << 11) /**< \brief (HSMCI_CMDR) Push pull command. */ -#define HSMCI_CMDR_OPDCMD_OPENDRAIN (0x1u << 11) /**< \brief (HSMCI_CMDR) Open drain command. */ -#define HSMCI_CMDR_MAXLAT (0x1u << 12) /**< \brief (HSMCI_CMDR) Max Latency for Command to Response */ -#define HSMCI_CMDR_MAXLAT_5 (0x0u << 12) /**< \brief (HSMCI_CMDR) 5-cycle max latency. */ -#define HSMCI_CMDR_MAXLAT_64 (0x1u << 12) /**< \brief (HSMCI_CMDR) 64-cycle max latency. */ -#define HSMCI_CMDR_TRCMD_Pos 16 -#define HSMCI_CMDR_TRCMD_Msk (0x3u << HSMCI_CMDR_TRCMD_Pos) /**< \brief (HSMCI_CMDR) Transfer Command */ -#define HSMCI_CMDR_TRCMD_NO_DATA (0x0u << 16) /**< \brief (HSMCI_CMDR) No data transfer */ -#define HSMCI_CMDR_TRCMD_START_DATA (0x1u << 16) /**< \brief (HSMCI_CMDR) Start data transfer */ -#define HSMCI_CMDR_TRCMD_STOP_DATA (0x2u << 16) /**< \brief (HSMCI_CMDR) Stop data transfer */ -#define HSMCI_CMDR_TRDIR (0x1u << 18) /**< \brief (HSMCI_CMDR) Transfer Direction */ -#define HSMCI_CMDR_TRDIR_WRITE (0x0u << 18) /**< \brief (HSMCI_CMDR) Write. */ -#define HSMCI_CMDR_TRDIR_READ (0x1u << 18) /**< \brief (HSMCI_CMDR) Read. */ -#define HSMCI_CMDR_TRTYP_Pos 19 -#define HSMCI_CMDR_TRTYP_Msk (0x7u << HSMCI_CMDR_TRTYP_Pos) /**< \brief (HSMCI_CMDR) Transfer Type */ -#define HSMCI_CMDR_TRTYP_SINGLE (0x0u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Single Block */ -#define HSMCI_CMDR_TRTYP_MULTIPLE (0x1u << 19) /**< \brief (HSMCI_CMDR) MMC/SDCard Multiple Block */ -#define HSMCI_CMDR_TRTYP_STREAM (0x2u << 19) /**< \brief (HSMCI_CMDR) MMC Stream */ -#define HSMCI_CMDR_TRTYP_BYTE (0x4u << 19) /**< \brief (HSMCI_CMDR) SDIO Byte */ -#define HSMCI_CMDR_TRTYP_BLOCK (0x5u << 19) /**< \brief (HSMCI_CMDR) SDIO Block */ -#define HSMCI_CMDR_IOSPCMD_Pos 24 -#define HSMCI_CMDR_IOSPCMD_Msk (0x3u << HSMCI_CMDR_IOSPCMD_Pos) /**< \brief (HSMCI_CMDR) SDIO Special Command */ -#define HSMCI_CMDR_IOSPCMD_STD (0x0u << 24) /**< \brief (HSMCI_CMDR) Not an SDIO Special Command */ -#define HSMCI_CMDR_IOSPCMD_SUSPEND (0x1u << 24) /**< \brief (HSMCI_CMDR) SDIO Suspend Command */ -#define HSMCI_CMDR_IOSPCMD_RESUME (0x2u << 24) /**< \brief (HSMCI_CMDR) SDIO Resume Command */ -#define HSMCI_CMDR_ATACS (0x1u << 26) /**< \brief (HSMCI_CMDR) ATA with Command Completion Signal */ -#define HSMCI_CMDR_ATACS_NORMAL (0x0u << 26) /**< \brief (HSMCI_CMDR) Normal operation mode. */ -#define HSMCI_CMDR_ATACS_COMPLETION (0x1u << 26) /**< \brief (HSMCI_CMDR) This bit indicates that a completion signal is expected within a programmed amount of time (HSMCI_CSTOR). */ -#define HSMCI_CMDR_BOOT_ACK (0x1u << 27) /**< \brief (HSMCI_CMDR) Boot Operation Acknowledge. */ -/* -------- HSMCI_BLKR : (HSMCI Offset: 0x18) Block Register -------- */ -#define HSMCI_BLKR_BCNT_Pos 0 -#define HSMCI_BLKR_BCNT_Msk (0xffffu << HSMCI_BLKR_BCNT_Pos) /**< \brief (HSMCI_BLKR) MMC/SDIO Block Count - SDIO Byte Count */ -#define HSMCI_BLKR_BCNT_MULTIPLE (0x0u << 0) /**< \brief (HSMCI_BLKR) MMC/SDCARD Multiple BlockFrom 1 to 65635: Value 0 corresponds to an infinite block transfer. */ -#define HSMCI_BLKR_BCNT_BYTE (0x4u << 0) /**< \brief (HSMCI_BLKR) SDIO ByteFrom 1 to 512 bytes: Value 0 corresponds to a 512-byte transfer.Values from 0x200 to 0xFFFF are forbidden. */ -#define HSMCI_BLKR_BCNT_BLOCK (0x5u << 0) /**< \brief (HSMCI_BLKR) SDIO BlockFrom 1 to 511 blocks: Value 0 corresponds to an infinite block transfer.Values from 0x200 to 0xFFFF are forbidden. */ -#define HSMCI_BLKR_BLKLEN_Pos 16 -#define HSMCI_BLKR_BLKLEN_Msk (0xffffu << HSMCI_BLKR_BLKLEN_Pos) /**< \brief (HSMCI_BLKR) Data Block Length */ -#define HSMCI_BLKR_BLKLEN(value) ((HSMCI_BLKR_BLKLEN_Msk & ((value) << HSMCI_BLKR_BLKLEN_Pos))) -/* -------- HSMCI_CSTOR : (HSMCI Offset: 0x1C) Completion Signal Timeout Register -------- */ -#define HSMCI_CSTOR_CSTOCYC_Pos 0 -#define HSMCI_CSTOR_CSTOCYC_Msk (0xfu << HSMCI_CSTOR_CSTOCYC_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Cycle Number */ -#define HSMCI_CSTOR_CSTOCYC(value) ((HSMCI_CSTOR_CSTOCYC_Msk & ((value) << HSMCI_CSTOR_CSTOCYC_Pos))) -#define HSMCI_CSTOR_CSTOMUL_Pos 4 -#define HSMCI_CSTOR_CSTOMUL_Msk (0x7u << HSMCI_CSTOR_CSTOMUL_Pos) /**< \brief (HSMCI_CSTOR) Completion Signal Timeout Multiplier */ -#define HSMCI_CSTOR_CSTOMUL_1 (0x0u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1 */ -#define HSMCI_CSTOR_CSTOMUL_16 (0x1u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 16 */ -#define HSMCI_CSTOR_CSTOMUL_128 (0x2u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 128 */ -#define HSMCI_CSTOR_CSTOMUL_256 (0x3u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 256 */ -#define HSMCI_CSTOR_CSTOMUL_1024 (0x4u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1024 */ -#define HSMCI_CSTOR_CSTOMUL_4096 (0x5u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 4096 */ -#define HSMCI_CSTOR_CSTOMUL_65536 (0x6u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 65536 */ -#define HSMCI_CSTOR_CSTOMUL_1048576 (0x7u << 4) /**< \brief (HSMCI_CSTOR) CSTOCYC x 1048576 */ -/* -------- HSMCI_RSPR[4] : (HSMCI Offset: 0x20) Response Register -------- */ -#define HSMCI_RSPR_RSP_Pos 0 -#define HSMCI_RSPR_RSP_Msk (0xffffffffu << HSMCI_RSPR_RSP_Pos) /**< \brief (HSMCI_RSPR[4]) Response */ -/* -------- HSMCI_RDR : (HSMCI Offset: 0x30) Receive Data Register -------- */ -#define HSMCI_RDR_DATA_Pos 0 -#define HSMCI_RDR_DATA_Msk (0xffffffffu << HSMCI_RDR_DATA_Pos) /**< \brief (HSMCI_RDR) Data to Read */ -/* -------- HSMCI_TDR : (HSMCI Offset: 0x34) Transmit Data Register -------- */ -#define HSMCI_TDR_DATA_Pos 0 -#define HSMCI_TDR_DATA_Msk (0xffffffffu << HSMCI_TDR_DATA_Pos) /**< \brief (HSMCI_TDR) Data to Write */ -#define HSMCI_TDR_DATA(value) ((HSMCI_TDR_DATA_Msk & ((value) << HSMCI_TDR_DATA_Pos))) -/* -------- HSMCI_SR : (HSMCI Offset: 0x40) Status Register -------- */ -#define HSMCI_SR_CMDRDY (0x1u << 0) /**< \brief (HSMCI_SR) Command Ready */ -#define HSMCI_SR_RXRDY (0x1u << 1) /**< \brief (HSMCI_SR) Receiver Ready */ -#define HSMCI_SR_TXRDY (0x1u << 2) /**< \brief (HSMCI_SR) Transmit Ready */ -#define HSMCI_SR_BLKE (0x1u << 3) /**< \brief (HSMCI_SR) Data Block Ended */ -#define HSMCI_SR_DTIP (0x1u << 4) /**< \brief (HSMCI_SR) Data Transfer in Progress */ -#define HSMCI_SR_NOTBUSY (0x1u << 5) /**< \brief (HSMCI_SR) HSMCI Not Busy */ -#define HSMCI_SR_ENDRX (0x1u << 6) /**< \brief (HSMCI_SR) End of RX Buffer */ -#define HSMCI_SR_ENDTX (0x1u << 7) /**< \brief (HSMCI_SR) End of TX Buffer */ -#define HSMCI_SR_SDIOIRQA (0x1u << 8) /**< \brief (HSMCI_SR) SDIO Interrupt for Slot A */ -#define HSMCI_SR_SDIOWAIT (0x1u << 12) /**< \brief (HSMCI_SR) SDIO Read Wait Operation Status */ -#define HSMCI_SR_CSRCV (0x1u << 13) /**< \brief (HSMCI_SR) CE-ATA Completion Signal Received */ -#define HSMCI_SR_RXBUFF (0x1u << 14) /**< \brief (HSMCI_SR) RX Buffer Full */ -#define HSMCI_SR_TXBUFE (0x1u << 15) /**< \brief (HSMCI_SR) TX Buffer Empty */ -#define HSMCI_SR_RINDE (0x1u << 16) /**< \brief (HSMCI_SR) Response Index Error */ -#define HSMCI_SR_RDIRE (0x1u << 17) /**< \brief (HSMCI_SR) Response Direction Error */ -#define HSMCI_SR_RCRCE (0x1u << 18) /**< \brief (HSMCI_SR) Response CRC Error */ -#define HSMCI_SR_RENDE (0x1u << 19) /**< \brief (HSMCI_SR) Response End Bit Error */ -#define HSMCI_SR_RTOE (0x1u << 20) /**< \brief (HSMCI_SR) Response Time-out Error */ -#define HSMCI_SR_DCRCE (0x1u << 21) /**< \brief (HSMCI_SR) Data CRC Error */ -#define HSMCI_SR_DTOE (0x1u << 22) /**< \brief (HSMCI_SR) Data Time-out Error */ -#define HSMCI_SR_CSTOE (0x1u << 23) /**< \brief (HSMCI_SR) Completion Signal Time-out Error */ -#define HSMCI_SR_FIFOEMPTY (0x1u << 26) /**< \brief (HSMCI_SR) FIFO empty flag */ -#define HSMCI_SR_XFRDONE (0x1u << 27) /**< \brief (HSMCI_SR) Transfer Done flag */ -#define HSMCI_SR_ACKRCV (0x1u << 28) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Received */ -#define HSMCI_SR_ACKRCVE (0x1u << 29) /**< \brief (HSMCI_SR) Boot Operation Acknowledge Error */ -#define HSMCI_SR_OVRE (0x1u << 30) /**< \brief (HSMCI_SR) Overrun */ -#define HSMCI_SR_UNRE (0x1u << 31) /**< \brief (HSMCI_SR) Underrun */ -/* -------- HSMCI_IER : (HSMCI Offset: 0x44) Interrupt Enable Register -------- */ -#define HSMCI_IER_CMDRDY (0x1u << 0) /**< \brief (HSMCI_IER) Command Ready Interrupt Enable */ -#define HSMCI_IER_RXRDY (0x1u << 1) /**< \brief (HSMCI_IER) Receiver Ready Interrupt Enable */ -#define HSMCI_IER_TXRDY (0x1u << 2) /**< \brief (HSMCI_IER) Transmit Ready Interrupt Enable */ -#define HSMCI_IER_BLKE (0x1u << 3) /**< \brief (HSMCI_IER) Data Block Ended Interrupt Enable */ -#define HSMCI_IER_DTIP (0x1u << 4) /**< \brief (HSMCI_IER) Data Transfer in Progress Interrupt Enable */ -#define HSMCI_IER_NOTBUSY (0x1u << 5) /**< \brief (HSMCI_IER) Data Not Busy Interrupt Enable */ -#define HSMCI_IER_ENDRX (0x1u << 6) /**< \brief (HSMCI_IER) End of Receive Buffer Interrupt Enable */ -#define HSMCI_IER_ENDTX (0x1u << 7) /**< \brief (HSMCI_IER) End of Transmit Buffer Interrupt Enable */ -#define HSMCI_IER_SDIOIRQA (0x1u << 8) /**< \brief (HSMCI_IER) SDIO Interrupt for Slot A Interrupt Enable */ -#define HSMCI_IER_SDIOWAIT (0x1u << 12) /**< \brief (HSMCI_IER) SDIO Read Wait Operation Status Interrupt Enable */ -#define HSMCI_IER_CSRCV (0x1u << 13) /**< \brief (HSMCI_IER) Completion Signal Received Interrupt Enable */ -#define HSMCI_IER_RXBUFF (0x1u << 14) /**< \brief (HSMCI_IER) Receive Buffer Full Interrupt Enable */ -#define HSMCI_IER_TXBUFE (0x1u << 15) /**< \brief (HSMCI_IER) Transmit Buffer Empty Interrupt Enable */ -#define HSMCI_IER_RINDE (0x1u << 16) /**< \brief (HSMCI_IER) Response Index Error Interrupt Enable */ -#define HSMCI_IER_RDIRE (0x1u << 17) /**< \brief (HSMCI_IER) Response Direction Error Interrupt Enable */ -#define HSMCI_IER_RCRCE (0x1u << 18) /**< \brief (HSMCI_IER) Response CRC Error Interrupt Enable */ -#define HSMCI_IER_RENDE (0x1u << 19) /**< \brief (HSMCI_IER) Response End Bit Error Interrupt Enable */ -#define HSMCI_IER_RTOE (0x1u << 20) /**< \brief (HSMCI_IER) Response Time-out Error Interrupt Enable */ -#define HSMCI_IER_DCRCE (0x1u << 21) /**< \brief (HSMCI_IER) Data CRC Error Interrupt Enable */ -#define HSMCI_IER_DTOE (0x1u << 22) /**< \brief (HSMCI_IER) Data Time-out Error Interrupt Enable */ -#define HSMCI_IER_CSTOE (0x1u << 23) /**< \brief (HSMCI_IER) Completion Signal Timeout Error Interrupt Enable */ -#define HSMCI_IER_FIFOEMPTY (0x1u << 26) /**< \brief (HSMCI_IER) FIFO empty Interrupt enable */ -#define HSMCI_IER_XFRDONE (0x1u << 27) /**< \brief (HSMCI_IER) Transfer Done Interrupt enable */ -#define HSMCI_IER_ACKRCV (0x1u << 28) /**< \brief (HSMCI_IER) Boot Acknowledge Interrupt Enable */ -#define HSMCI_IER_ACKRCVE (0x1u << 29) /**< \brief (HSMCI_IER) Boot Acknowledge Error Interrupt Enable */ -#define HSMCI_IER_OVRE (0x1u << 30) /**< \brief (HSMCI_IER) Overrun Interrupt Enable */ -#define HSMCI_IER_UNRE (0x1u << 31) /**< \brief (HSMCI_IER) Underrun Interrupt Enable */ -/* -------- HSMCI_IDR : (HSMCI Offset: 0x48) Interrupt Disable Register -------- */ -#define HSMCI_IDR_CMDRDY (0x1u << 0) /**< \brief (HSMCI_IDR) Command Ready Interrupt Disable */ -#define HSMCI_IDR_RXRDY (0x1u << 1) /**< \brief (HSMCI_IDR) Receiver Ready Interrupt Disable */ -#define HSMCI_IDR_TXRDY (0x1u << 2) /**< \brief (HSMCI_IDR) Transmit Ready Interrupt Disable */ -#define HSMCI_IDR_BLKE (0x1u << 3) /**< \brief (HSMCI_IDR) Data Block Ended Interrupt Disable */ -#define HSMCI_IDR_DTIP (0x1u << 4) /**< \brief (HSMCI_IDR) Data Transfer in Progress Interrupt Disable */ -#define HSMCI_IDR_NOTBUSY (0x1u << 5) /**< \brief (HSMCI_IDR) Data Not Busy Interrupt Disable */ -#define HSMCI_IDR_ENDRX (0x1u << 6) /**< \brief (HSMCI_IDR) End of Receive Buffer Interrupt Disable */ -#define HSMCI_IDR_ENDTX (0x1u << 7) /**< \brief (HSMCI_IDR) End of Transmit Buffer Interrupt Disable */ -#define HSMCI_IDR_SDIOIRQA (0x1u << 8) /**< \brief (HSMCI_IDR) SDIO Interrupt for Slot A Interrupt Disable */ -#define HSMCI_IDR_SDIOWAIT (0x1u << 12) /**< \brief (HSMCI_IDR) SDIO Read Wait Operation Status Interrupt Disable */ -#define HSMCI_IDR_CSRCV (0x1u << 13) /**< \brief (HSMCI_IDR) Completion Signal received interrupt Disable */ -#define HSMCI_IDR_RXBUFF (0x1u << 14) /**< \brief (HSMCI_IDR) Receive Buffer Full Interrupt Disable */ -#define HSMCI_IDR_TXBUFE (0x1u << 15) /**< \brief (HSMCI_IDR) Transmit Buffer Empty Interrupt Disable */ -#define HSMCI_IDR_RINDE (0x1u << 16) /**< \brief (HSMCI_IDR) Response Index Error Interrupt Disable */ -#define HSMCI_IDR_RDIRE (0x1u << 17) /**< \brief (HSMCI_IDR) Response Direction Error Interrupt Disable */ -#define HSMCI_IDR_RCRCE (0x1u << 18) /**< \brief (HSMCI_IDR) Response CRC Error Interrupt Disable */ -#define HSMCI_IDR_RENDE (0x1u << 19) /**< \brief (HSMCI_IDR) Response End Bit Error Interrupt Disable */ -#define HSMCI_IDR_RTOE (0x1u << 20) /**< \brief (HSMCI_IDR) Response Time-out Error Interrupt Disable */ -#define HSMCI_IDR_DCRCE (0x1u << 21) /**< \brief (HSMCI_IDR) Data CRC Error Interrupt Disable */ -#define HSMCI_IDR_DTOE (0x1u << 22) /**< \brief (HSMCI_IDR) Data Time-out Error Interrupt Disable */ -#define HSMCI_IDR_CSTOE (0x1u << 23) /**< \brief (HSMCI_IDR) Completion Signal Time out Error Interrupt Disable */ -#define HSMCI_IDR_FIFOEMPTY (0x1u << 26) /**< \brief (HSMCI_IDR) FIFO empty Interrupt Disable */ -#define HSMCI_IDR_XFRDONE (0x1u << 27) /**< \brief (HSMCI_IDR) Transfer Done Interrupt Disable */ -#define HSMCI_IDR_ACKRCV (0x1u << 28) /**< \brief (HSMCI_IDR) Boot Acknowledge Interrupt Disable */ -#define HSMCI_IDR_ACKRCVE (0x1u << 29) /**< \brief (HSMCI_IDR) Boot Acknowledge Error Interrupt Disable */ -#define HSMCI_IDR_OVRE (0x1u << 30) /**< \brief (HSMCI_IDR) Overrun Interrupt Disable */ -#define HSMCI_IDR_UNRE (0x1u << 31) /**< \brief (HSMCI_IDR) Underrun Interrupt Disable */ -/* -------- HSMCI_IMR : (HSMCI Offset: 0x4C) Interrupt Mask Register -------- */ -#define HSMCI_IMR_CMDRDY (0x1u << 0) /**< \brief (HSMCI_IMR) Command Ready Interrupt Mask */ -#define HSMCI_IMR_RXRDY (0x1u << 1) /**< \brief (HSMCI_IMR) Receiver Ready Interrupt Mask */ -#define HSMCI_IMR_TXRDY (0x1u << 2) /**< \brief (HSMCI_IMR) Transmit Ready Interrupt Mask */ -#define HSMCI_IMR_BLKE (0x1u << 3) /**< \brief (HSMCI_IMR) Data Block Ended Interrupt Mask */ -#define HSMCI_IMR_DTIP (0x1u << 4) /**< \brief (HSMCI_IMR) Data Transfer in Progress Interrupt Mask */ -#define HSMCI_IMR_NOTBUSY (0x1u << 5) /**< \brief (HSMCI_IMR) Data Not Busy Interrupt Mask */ -#define HSMCI_IMR_ENDRX (0x1u << 6) /**< \brief (HSMCI_IMR) End of Receive Buffer Interrupt Mask */ -#define HSMCI_IMR_ENDTX (0x1u << 7) /**< \brief (HSMCI_IMR) End of Transmit Buffer Interrupt Mask */ -#define HSMCI_IMR_SDIOIRQA (0x1u << 8) /**< \brief (HSMCI_IMR) SDIO Interrupt for Slot A Interrupt Mask */ -#define HSMCI_IMR_SDIOWAIT (0x1u << 12) /**< \brief (HSMCI_IMR) SDIO Read Wait Operation Status Interrupt Mask */ -#define HSMCI_IMR_CSRCV (0x1u << 13) /**< \brief (HSMCI_IMR) Completion Signal Received Interrupt Mask */ -#define HSMCI_IMR_RXBUFF (0x1u << 14) /**< \brief (HSMCI_IMR) Receive Buffer Full Interrupt Mask */ -#define HSMCI_IMR_TXBUFE (0x1u << 15) /**< \brief (HSMCI_IMR) Transmit Buffer Empty Interrupt Mask */ -#define HSMCI_IMR_RINDE (0x1u << 16) /**< \brief (HSMCI_IMR) Response Index Error Interrupt Mask */ -#define HSMCI_IMR_RDIRE (0x1u << 17) /**< \brief (HSMCI_IMR) Response Direction Error Interrupt Mask */ -#define HSMCI_IMR_RCRCE (0x1u << 18) /**< \brief (HSMCI_IMR) Response CRC Error Interrupt Mask */ -#define HSMCI_IMR_RENDE (0x1u << 19) /**< \brief (HSMCI_IMR) Response End Bit Error Interrupt Mask */ -#define HSMCI_IMR_RTOE (0x1u << 20) /**< \brief (HSMCI_IMR) Response Time-out Error Interrupt Mask */ -#define HSMCI_IMR_DCRCE (0x1u << 21) /**< \brief (HSMCI_IMR) Data CRC Error Interrupt Mask */ -#define HSMCI_IMR_DTOE (0x1u << 22) /**< \brief (HSMCI_IMR) Data Time-out Error Interrupt Mask */ -#define HSMCI_IMR_CSTOE (0x1u << 23) /**< \brief (HSMCI_IMR) Completion Signal Time-out Error Interrupt Mask */ -#define HSMCI_IMR_FIFOEMPTY (0x1u << 26) /**< \brief (HSMCI_IMR) FIFO Empty Interrupt Mask */ -#define HSMCI_IMR_XFRDONE (0x1u << 27) /**< \brief (HSMCI_IMR) Transfer Done Interrupt Mask */ -#define HSMCI_IMR_ACKRCV (0x1u << 28) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Received Interrupt Mask */ -#define HSMCI_IMR_ACKRCVE (0x1u << 29) /**< \brief (HSMCI_IMR) Boot Operation Acknowledge Error Interrupt Mask */ -#define HSMCI_IMR_OVRE (0x1u << 30) /**< \brief (HSMCI_IMR) Overrun Interrupt Mask */ -#define HSMCI_IMR_UNRE (0x1u << 31) /**< \brief (HSMCI_IMR) Underrun Interrupt Mask */ -/* -------- HSMCI_CFG : (HSMCI Offset: 0x54) Configuration Register -------- */ -#define HSMCI_CFG_FIFOMODE (0x1u << 0) /**< \brief (HSMCI_CFG) HSMCI Internal FIFO control mode */ -#define HSMCI_CFG_FERRCTRL (0x1u << 4) /**< \brief (HSMCI_CFG) Flow Error flag reset control mode */ -#define HSMCI_CFG_HSMODE (0x1u << 8) /**< \brief (HSMCI_CFG) High Speed Mode */ -#define HSMCI_CFG_LSYNC (0x1u << 12) /**< \brief (HSMCI_CFG) Synchronize on the last block */ -/* -------- HSMCI_WPMR : (HSMCI Offset: 0xE4) Write Protection Mode Register -------- */ -#define HSMCI_WPMR_WP_EN (0x1u << 0) /**< \brief (HSMCI_WPMR) Write Protection Enable */ -#define HSMCI_WPMR_WP_KEY_Pos 8 -#define HSMCI_WPMR_WP_KEY_Msk (0xffffffu << HSMCI_WPMR_WP_KEY_Pos) /**< \brief (HSMCI_WPMR) Write Protection Key password */ -#define HSMCI_WPMR_WP_KEY(value) ((HSMCI_WPMR_WP_KEY_Msk & ((value) << HSMCI_WPMR_WP_KEY_Pos))) -/* -------- HSMCI_WPSR : (HSMCI Offset: 0xE8) Write Protection Status Register -------- */ -#define HSMCI_WPSR_WP_VS_Pos 0 -#define HSMCI_WPSR_WP_VS_Msk (0xfu << HSMCI_WPSR_WP_VS_Pos) /**< \brief (HSMCI_WPSR) Write Protection Violation Status */ -#define HSMCI_WPSR_WP_VS_NONE (0x0u << 0) /**< \brief (HSMCI_WPSR) No Write Protection Violation occurred since the last read of this register (WP_SR) */ -#define HSMCI_WPSR_WP_VS_WRITE (0x1u << 0) /**< \brief (HSMCI_WPSR) Write Protection detected unauthorized attempt to write a control register had occurred (since the last read.) */ -#define HSMCI_WPSR_WP_VS_RESET (0x2u << 0) /**< \brief (HSMCI_WPSR) Software reset had been performed while Write Protection was enabled (since the last read). */ -#define HSMCI_WPSR_WP_VS_BOTH (0x3u << 0) /**< \brief (HSMCI_WPSR) Both Write Protection violation and software reset with Write Protection enabled have occurred since the last read. */ -#define HSMCI_WPSR_WP_VSRC_Pos 8 -#define HSMCI_WPSR_WP_VSRC_Msk (0xffffu << HSMCI_WPSR_WP_VSRC_Pos) /**< \brief (HSMCI_WPSR) Write Protection Violation SouRCe */ -/* -------- HSMCI_RPR : (HSMCI Offset: 0x100) Receive Pointer Register -------- */ -#define HSMCI_RPR_RXPTR_Pos 0 -#define HSMCI_RPR_RXPTR_Msk (0xffffffffu << HSMCI_RPR_RXPTR_Pos) /**< \brief (HSMCI_RPR) Receive Pointer Register */ -#define HSMCI_RPR_RXPTR(value) ((HSMCI_RPR_RXPTR_Msk & ((value) << HSMCI_RPR_RXPTR_Pos))) -/* -------- HSMCI_RCR : (HSMCI Offset: 0x104) Receive Counter Register -------- */ -#define HSMCI_RCR_RXCTR_Pos 0 -#define HSMCI_RCR_RXCTR_Msk (0xffffu << HSMCI_RCR_RXCTR_Pos) /**< \brief (HSMCI_RCR) Receive Counter Register */ -#define HSMCI_RCR_RXCTR(value) ((HSMCI_RCR_RXCTR_Msk & ((value) << HSMCI_RCR_RXCTR_Pos))) -/* -------- HSMCI_TPR : (HSMCI Offset: 0x108) Transmit Pointer Register -------- */ -#define HSMCI_TPR_TXPTR_Pos 0 -#define HSMCI_TPR_TXPTR_Msk (0xffffffffu << HSMCI_TPR_TXPTR_Pos) /**< \brief (HSMCI_TPR) Transmit Counter Register */ -#define HSMCI_TPR_TXPTR(value) ((HSMCI_TPR_TXPTR_Msk & ((value) << HSMCI_TPR_TXPTR_Pos))) -/* -------- HSMCI_TCR : (HSMCI Offset: 0x10C) Transmit Counter Register -------- */ -#define HSMCI_TCR_TXCTR_Pos 0 -#define HSMCI_TCR_TXCTR_Msk (0xffffu << HSMCI_TCR_TXCTR_Pos) /**< \brief (HSMCI_TCR) Transmit Counter Register */ -#define HSMCI_TCR_TXCTR(value) ((HSMCI_TCR_TXCTR_Msk & ((value) << HSMCI_TCR_TXCTR_Pos))) -/* -------- HSMCI_RNPR : (HSMCI Offset: 0x110) Receive Next Pointer Register -------- */ -#define HSMCI_RNPR_RXNPTR_Pos 0 -#define HSMCI_RNPR_RXNPTR_Msk (0xffffffffu << HSMCI_RNPR_RXNPTR_Pos) /**< \brief (HSMCI_RNPR) Receive Next Pointer */ -#define HSMCI_RNPR_RXNPTR(value) ((HSMCI_RNPR_RXNPTR_Msk & ((value) << HSMCI_RNPR_RXNPTR_Pos))) -/* -------- HSMCI_RNCR : (HSMCI Offset: 0x114) Receive Next Counter Register -------- */ -#define HSMCI_RNCR_RXNCTR_Pos 0 -#define HSMCI_RNCR_RXNCTR_Msk (0xffffu << HSMCI_RNCR_RXNCTR_Pos) /**< \brief (HSMCI_RNCR) Receive Next Counter */ -#define HSMCI_RNCR_RXNCTR(value) ((HSMCI_RNCR_RXNCTR_Msk & ((value) << HSMCI_RNCR_RXNCTR_Pos))) -/* -------- HSMCI_TNPR : (HSMCI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define HSMCI_TNPR_TXNPTR_Pos 0 -#define HSMCI_TNPR_TXNPTR_Msk (0xffffffffu << HSMCI_TNPR_TXNPTR_Pos) /**< \brief (HSMCI_TNPR) Transmit Next Pointer */ -#define HSMCI_TNPR_TXNPTR(value) ((HSMCI_TNPR_TXNPTR_Msk & ((value) << HSMCI_TNPR_TXNPTR_Pos))) -/* -------- HSMCI_TNCR : (HSMCI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define HSMCI_TNCR_TXNCTR_Pos 0 -#define HSMCI_TNCR_TXNCTR_Msk (0xffffu << HSMCI_TNCR_TXNCTR_Pos) /**< \brief (HSMCI_TNCR) Transmit Counter Next */ -#define HSMCI_TNCR_TXNCTR(value) ((HSMCI_TNCR_TXNCTR_Msk & ((value) << HSMCI_TNCR_TXNCTR_Pos))) -/* -------- HSMCI_PTCR : (HSMCI Offset: 0x120) Transfer Control Register -------- */ -#define HSMCI_PTCR_RXTEN (0x1u << 0) /**< \brief (HSMCI_PTCR) Receiver Transfer Enable */ -#define HSMCI_PTCR_RXTDIS (0x1u << 1) /**< \brief (HSMCI_PTCR) Receiver Transfer Disable */ -#define HSMCI_PTCR_TXTEN (0x1u << 8) /**< \brief (HSMCI_PTCR) Transmitter Transfer Enable */ -#define HSMCI_PTCR_TXTDIS (0x1u << 9) /**< \brief (HSMCI_PTCR) Transmitter Transfer Disable */ -/* -------- HSMCI_PTSR : (HSMCI Offset: 0x124) Transfer Status Register -------- */ -#define HSMCI_PTSR_RXTEN (0x1u << 0) /**< \brief (HSMCI_PTSR) Receiver Transfer Enable */ -#define HSMCI_PTSR_TXTEN (0x1u << 8) /**< \brief (HSMCI_PTSR) Transmitter Transfer Enable */ -/* -------- HSMCI_FIFO[256] : (HSMCI Offset: 0x200) FIFO Memory Aperture0 -------- */ -#define HSMCI_FIFO_DATA_Pos 0 -#define HSMCI_FIFO_DATA_Msk (0xffffffffu << HSMCI_FIFO_DATA_Pos) /**< \brief (HSMCI_FIFO[256]) Data to Read or Data to Write */ -#define HSMCI_FIFO_DATA(value) ((HSMCI_FIFO_DATA_Msk & ((value) << HSMCI_FIFO_DATA_Pos))) - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR AHB Bus Matrix */ -/* ============================================================================= */ -/** \addtogroup SAM3S_MATRIX AHB Bus Matrix */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Matrix hardware registers */ -typedef struct { - RwReg MATRIX_MCFG[4]; /**< \brief (Matrix Offset: 0x0000) Master Configuration Register */ - RwReg Reserved1[12]; - RwReg MATRIX_SCFG[5]; /**< \brief (Matrix Offset: 0x0040) Slave Configuration Register */ - RwReg Reserved2[11]; - RwReg MATRIX_PRAS0; /**< \brief (Matrix Offset: 0x0080) Priority Register A for Slave 0 */ - RwReg Reserved3[1]; - RwReg MATRIX_PRAS1; /**< \brief (Matrix Offset: 0x0088) Priority Register A for Slave 1 */ - RwReg Reserved4[1]; - RwReg MATRIX_PRAS2; /**< \brief (Matrix Offset: 0x0090) Priority Register A for Slave 2 */ - RwReg Reserved5[1]; - RwReg MATRIX_PRAS3; /**< \brief (Matrix Offset: 0x0098) Priority Register A for Slave 3 */ - RwReg Reserved6[1]; - RwReg MATRIX_PRAS4; /**< \brief (Matrix Offset: 0x00A0) Priority Register A for Slave 4 */ - RwReg Reserved7[1]; - RwReg Reserved8[27]; - RwReg CCFG_SYSIO; /**< \brief (Matrix Offset: 0x0114) System I/O Configuration register */ - RwReg Reserved9[1]; - RwReg CCFG_SMCNFCS; /**< \brief (Matrix Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register */ - RwReg Reserved10[49]; - RwReg MATRIX_WPMR; /**< \brief (Matrix Offset: 0x1E4) Write Protect Mode Register */ - RoReg MATRIX_WPSR; /**< \brief (Matrix Offset: 0x1E8) Write Protect Status Register */ -} Matrix; -#endif /* __ASSEMBLY__ */ -/* -------- MATRIX_MCFG[4] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */ -#define MATRIX_MCFG_ULBT_Pos 0 -#define MATRIX_MCFG_ULBT_Msk (0x7u << MATRIX_MCFG_ULBT_Pos) /**< \brief (MATRIX_MCFG[4]) Undefined Length Burst Type */ -#define MATRIX_MCFG_ULBT(value) ((MATRIX_MCFG_ULBT_Msk & ((value) << MATRIX_MCFG_ULBT_Pos))) -/* -------- MATRIX_SCFG[5] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */ -#define MATRIX_SCFG_SLOT_CYCLE_Pos 0 -#define MATRIX_SCFG_SLOT_CYCLE_Msk (0xffu << MATRIX_SCFG_SLOT_CYCLE_Pos) /**< \brief (MATRIX_SCFG[5]) Maximum Number of Allowed Cycles for a Burst */ -#define MATRIX_SCFG_SLOT_CYCLE(value) ((MATRIX_SCFG_SLOT_CYCLE_Msk & ((value) << MATRIX_SCFG_SLOT_CYCLE_Pos))) -#define MATRIX_SCFG_DEFMSTR_TYPE_Pos 16 -#define MATRIX_SCFG_DEFMSTR_TYPE_Msk (0x3u << MATRIX_SCFG_DEFMSTR_TYPE_Pos) /**< \brief (MATRIX_SCFG[5]) Default Master Type */ -#define MATRIX_SCFG_DEFMSTR_TYPE(value) ((MATRIX_SCFG_DEFMSTR_TYPE_Msk & ((value) << MATRIX_SCFG_DEFMSTR_TYPE_Pos))) -#define MATRIX_SCFG_FIXED_DEFMSTR_Pos 18 -#define MATRIX_SCFG_FIXED_DEFMSTR_Msk (0x7u << MATRIX_SCFG_FIXED_DEFMSTR_Pos) /**< \brief (MATRIX_SCFG[5]) Fixed Default Master */ -#define MATRIX_SCFG_FIXED_DEFMSTR(value) ((MATRIX_SCFG_FIXED_DEFMSTR_Msk & ((value) << MATRIX_SCFG_FIXED_DEFMSTR_Pos))) -#define MATRIX_SCFG_ARBT_Pos 24 -#define MATRIX_SCFG_ARBT_Msk (0x3u << MATRIX_SCFG_ARBT_Pos) /**< \brief (MATRIX_SCFG[5]) Arbitration Type */ -#define MATRIX_SCFG_ARBT(value) ((MATRIX_SCFG_ARBT_Msk & ((value) << MATRIX_SCFG_ARBT_Pos))) -/* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */ -#define MATRIX_PRAS0_M0PR_Pos 0 -#define MATRIX_PRAS0_M0PR_Msk (0x3u << MATRIX_PRAS0_M0PR_Pos) /**< \brief (MATRIX_PRAS0) Master 0 Priority */ -#define MATRIX_PRAS0_M0PR(value) ((MATRIX_PRAS0_M0PR_Msk & ((value) << MATRIX_PRAS0_M0PR_Pos))) -#define MATRIX_PRAS0_M1PR_Pos 4 -#define MATRIX_PRAS0_M1PR_Msk (0x3u << MATRIX_PRAS0_M1PR_Pos) /**< \brief (MATRIX_PRAS0) Master 1 Priority */ -#define MATRIX_PRAS0_M1PR(value) ((MATRIX_PRAS0_M1PR_Msk & ((value) << MATRIX_PRAS0_M1PR_Pos))) -#define MATRIX_PRAS0_M2PR_Pos 8 -#define MATRIX_PRAS0_M2PR_Msk (0x3u << MATRIX_PRAS0_M2PR_Pos) /**< \brief (MATRIX_PRAS0) Master 2 Priority */ -#define MATRIX_PRAS0_M2PR(value) ((MATRIX_PRAS0_M2PR_Msk & ((value) << MATRIX_PRAS0_M2PR_Pos))) -#define MATRIX_PRAS0_M3PR_Pos 12 -#define MATRIX_PRAS0_M3PR_Msk (0x3u << MATRIX_PRAS0_M3PR_Pos) /**< \brief (MATRIX_PRAS0) Master 3 Priority */ -#define MATRIX_PRAS0_M3PR(value) ((MATRIX_PRAS0_M3PR_Msk & ((value) << MATRIX_PRAS0_M3PR_Pos))) -#define MATRIX_PRAS0_M4PR_Pos 16 -#define MATRIX_PRAS0_M4PR_Msk (0x3u << MATRIX_PRAS0_M4PR_Pos) /**< \brief (MATRIX_PRAS0) Master 4 Priority */ -#define MATRIX_PRAS0_M4PR(value) ((MATRIX_PRAS0_M4PR_Msk & ((value) << MATRIX_PRAS0_M4PR_Pos))) -/* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */ -#define MATRIX_PRAS1_M0PR_Pos 0 -#define MATRIX_PRAS1_M0PR_Msk (0x3u << MATRIX_PRAS1_M0PR_Pos) /**< \brief (MATRIX_PRAS1) Master 0 Priority */ -#define MATRIX_PRAS1_M0PR(value) ((MATRIX_PRAS1_M0PR_Msk & ((value) << MATRIX_PRAS1_M0PR_Pos))) -#define MATRIX_PRAS1_M1PR_Pos 4 -#define MATRIX_PRAS1_M1PR_Msk (0x3u << MATRIX_PRAS1_M1PR_Pos) /**< \brief (MATRIX_PRAS1) Master 1 Priority */ -#define MATRIX_PRAS1_M1PR(value) ((MATRIX_PRAS1_M1PR_Msk & ((value) << MATRIX_PRAS1_M1PR_Pos))) -#define MATRIX_PRAS1_M2PR_Pos 8 -#define MATRIX_PRAS1_M2PR_Msk (0x3u << MATRIX_PRAS1_M2PR_Pos) /**< \brief (MATRIX_PRAS1) Master 2 Priority */ -#define MATRIX_PRAS1_M2PR(value) ((MATRIX_PRAS1_M2PR_Msk & ((value) << MATRIX_PRAS1_M2PR_Pos))) -#define MATRIX_PRAS1_M3PR_Pos 12 -#define MATRIX_PRAS1_M3PR_Msk (0x3u << MATRIX_PRAS1_M3PR_Pos) /**< \brief (MATRIX_PRAS1) Master 3 Priority */ -#define MATRIX_PRAS1_M3PR(value) ((MATRIX_PRAS1_M3PR_Msk & ((value) << MATRIX_PRAS1_M3PR_Pos))) -#define MATRIX_PRAS1_M4PR_Pos 16 -#define MATRIX_PRAS1_M4PR_Msk (0x3u << MATRIX_PRAS1_M4PR_Pos) /**< \brief (MATRIX_PRAS1) Master 4 Priority */ -#define MATRIX_PRAS1_M4PR(value) ((MATRIX_PRAS1_M4PR_Msk & ((value) << MATRIX_PRAS1_M4PR_Pos))) -/* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */ -#define MATRIX_PRAS2_M0PR_Pos 0 -#define MATRIX_PRAS2_M0PR_Msk (0x3u << MATRIX_PRAS2_M0PR_Pos) /**< \brief (MATRIX_PRAS2) Master 0 Priority */ -#define MATRIX_PRAS2_M0PR(value) ((MATRIX_PRAS2_M0PR_Msk & ((value) << MATRIX_PRAS2_M0PR_Pos))) -#define MATRIX_PRAS2_M1PR_Pos 4 -#define MATRIX_PRAS2_M1PR_Msk (0x3u << MATRIX_PRAS2_M1PR_Pos) /**< \brief (MATRIX_PRAS2) Master 1 Priority */ -#define MATRIX_PRAS2_M1PR(value) ((MATRIX_PRAS2_M1PR_Msk & ((value) << MATRIX_PRAS2_M1PR_Pos))) -#define MATRIX_PRAS2_M2PR_Pos 8 -#define MATRIX_PRAS2_M2PR_Msk (0x3u << MATRIX_PRAS2_M2PR_Pos) /**< \brief (MATRIX_PRAS2) Master 2 Priority */ -#define MATRIX_PRAS2_M2PR(value) ((MATRIX_PRAS2_M2PR_Msk & ((value) << MATRIX_PRAS2_M2PR_Pos))) -#define MATRIX_PRAS2_M3PR_Pos 12 -#define MATRIX_PRAS2_M3PR_Msk (0x3u << MATRIX_PRAS2_M3PR_Pos) /**< \brief (MATRIX_PRAS2) Master 3 Priority */ -#define MATRIX_PRAS2_M3PR(value) ((MATRIX_PRAS2_M3PR_Msk & ((value) << MATRIX_PRAS2_M3PR_Pos))) -#define MATRIX_PRAS2_M4PR_Pos 16 -#define MATRIX_PRAS2_M4PR_Msk (0x3u << MATRIX_PRAS2_M4PR_Pos) /**< \brief (MATRIX_PRAS2) Master 4 Priority */ -#define MATRIX_PRAS2_M4PR(value) ((MATRIX_PRAS2_M4PR_Msk & ((value) << MATRIX_PRAS2_M4PR_Pos))) -/* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */ -#define MATRIX_PRAS3_M0PR_Pos 0 -#define MATRIX_PRAS3_M0PR_Msk (0x3u << MATRIX_PRAS3_M0PR_Pos) /**< \brief (MATRIX_PRAS3) Master 0 Priority */ -#define MATRIX_PRAS3_M0PR(value) ((MATRIX_PRAS3_M0PR_Msk & ((value) << MATRIX_PRAS3_M0PR_Pos))) -#define MATRIX_PRAS3_M1PR_Pos 4 -#define MATRIX_PRAS3_M1PR_Msk (0x3u << MATRIX_PRAS3_M1PR_Pos) /**< \brief (MATRIX_PRAS3) Master 1 Priority */ -#define MATRIX_PRAS3_M1PR(value) ((MATRIX_PRAS3_M1PR_Msk & ((value) << MATRIX_PRAS3_M1PR_Pos))) -#define MATRIX_PRAS3_M2PR_Pos 8 -#define MATRIX_PRAS3_M2PR_Msk (0x3u << MATRIX_PRAS3_M2PR_Pos) /**< \brief (MATRIX_PRAS3) Master 2 Priority */ -#define MATRIX_PRAS3_M2PR(value) ((MATRIX_PRAS3_M2PR_Msk & ((value) << MATRIX_PRAS3_M2PR_Pos))) -#define MATRIX_PRAS3_M3PR_Pos 12 -#define MATRIX_PRAS3_M3PR_Msk (0x3u << MATRIX_PRAS3_M3PR_Pos) /**< \brief (MATRIX_PRAS3) Master 3 Priority */ -#define MATRIX_PRAS3_M3PR(value) ((MATRIX_PRAS3_M3PR_Msk & ((value) << MATRIX_PRAS3_M3PR_Pos))) -#define MATRIX_PRAS3_M4PR_Pos 16 -#define MATRIX_PRAS3_M4PR_Msk (0x3u << MATRIX_PRAS3_M4PR_Pos) /**< \brief (MATRIX_PRAS3) Master 4 Priority */ -#define MATRIX_PRAS3_M4PR(value) ((MATRIX_PRAS3_M4PR_Msk & ((value) << MATRIX_PRAS3_M4PR_Pos))) -/* -------- MATRIX_PRAS4 : (MATRIX Offset: 0x00A0) Priority Register A for Slave 4 -------- */ -#define MATRIX_PRAS4_M0PR_Pos 0 -#define MATRIX_PRAS4_M0PR_Msk (0x3u << MATRIX_PRAS4_M0PR_Pos) /**< \brief (MATRIX_PRAS4) Master 0 Priority */ -#define MATRIX_PRAS4_M0PR(value) ((MATRIX_PRAS4_M0PR_Msk & ((value) << MATRIX_PRAS4_M0PR_Pos))) -#define MATRIX_PRAS4_M1PR_Pos 4 -#define MATRIX_PRAS4_M1PR_Msk (0x3u << MATRIX_PRAS4_M1PR_Pos) /**< \brief (MATRIX_PRAS4) Master 1 Priority */ -#define MATRIX_PRAS4_M1PR(value) ((MATRIX_PRAS4_M1PR_Msk & ((value) << MATRIX_PRAS4_M1PR_Pos))) -#define MATRIX_PRAS4_M2PR_Pos 8 -#define MATRIX_PRAS4_M2PR_Msk (0x3u << MATRIX_PRAS4_M2PR_Pos) /**< \brief (MATRIX_PRAS4) Master 2 Priority */ -#define MATRIX_PRAS4_M2PR(value) ((MATRIX_PRAS4_M2PR_Msk & ((value) << MATRIX_PRAS4_M2PR_Pos))) -#define MATRIX_PRAS4_M3PR_Pos 12 -#define MATRIX_PRAS4_M3PR_Msk (0x3u << MATRIX_PRAS4_M3PR_Pos) /**< \brief (MATRIX_PRAS4) Master 3 Priority */ -#define MATRIX_PRAS4_M3PR(value) ((MATRIX_PRAS4_M3PR_Msk & ((value) << MATRIX_PRAS4_M3PR_Pos))) -#define MATRIX_PRAS4_M4PR_Pos 16 -#define MATRIX_PRAS4_M4PR_Msk (0x3u << MATRIX_PRAS4_M4PR_Pos) /**< \brief (MATRIX_PRAS4) Master 4 Priority */ -#define MATRIX_PRAS4_M4PR(value) ((MATRIX_PRAS4_M4PR_Msk & ((value) << MATRIX_PRAS4_M4PR_Pos))) -/* -------- CCFG_SYSIO : (MATRIX Offset: 0x0114) System I/O Configuration register -------- */ -#define CCFG_SYSIO_SYSIO4 (0x1u << 4) /**< \brief (CCFG_SYSIO) PB4 or TDI Assignment */ -#define CCFG_SYSIO_SYSIO5 (0x1u << 5) /**< \brief (CCFG_SYSIO) PB5 or TDO/TRACESWO Assignment */ -#define CCFG_SYSIO_SYSIO6 (0x1u << 6) /**< \brief (CCFG_SYSIO) PB6 or TMS/SWDIO Assignment */ -#define CCFG_SYSIO_SYSIO7 (0x1u << 7) /**< \brief (CCFG_SYSIO) PB7 or TCK/SWCLK Assignment */ -#define CCFG_SYSIO_SYSIO10 (0x1u << 10) /**< \brief (CCFG_SYSIO) PB10 or DDM Assignment */ -#define CCFG_SYSIO_SYSIO11 (0x1u << 11) /**< \brief (CCFG_SYSIO) PB11 or DDP Assignment */ -#define CCFG_SYSIO_SYSIO12 (0x1u << 12) /**< \brief (CCFG_SYSIO) PB12 or ERASE Assignment */ -/* -------- CCFG_SMCNFCS : (MATRIX Offset: 0x011C) SMC Chip Select NAND Flash Assignment Register -------- */ -#define CCFG_SMCNFCS_SMC_NFCS0 (0x1u << 0) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 0 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS1 (0x1u << 1) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 1 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS2 (0x1u << 2) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 2 Assignment */ -#define CCFG_SMCNFCS_SMC_NFCS3 (0x1u << 3) /**< \brief (CCFG_SMCNFCS) SMC NAND Flash Chip Select 3 Assignment */ -/* -------- MATRIX_WPMR : (MATRIX Offset: 0x1E4) Write Protect Mode Register -------- */ -#define MATRIX_WPMR_WPEN (0x1u << 0) /**< \brief (MATRIX_WPMR) Write Protect ENable */ -#define MATRIX_WPMR_WPKEY_Pos 8 -#define MATRIX_WPMR_WPKEY_Msk (0xffffffu << MATRIX_WPMR_WPKEY_Pos) /**< \brief (MATRIX_WPMR) Write Protect KEY (Write-only) */ -#define MATRIX_WPMR_WPKEY(value) ((MATRIX_WPMR_WPKEY_Msk & ((value) << MATRIX_WPMR_WPKEY_Pos))) -/* -------- MATRIX_WPSR : (MATRIX Offset: 0x1E8) Write Protect Status Register -------- */ -#define MATRIX_WPSR_WPVS (0x1u << 0) /**< \brief (MATRIX_WPSR) Write Protect Violation Status */ -#define MATRIX_WPSR_WPVSRC_Pos 8 -#define MATRIX_WPSR_WPVSRC_Msk (0xffffu << MATRIX_WPSR_WPVSRC_Pos) /**< \brief (MATRIX_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_PDC Peripheral DMA Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pdc hardware registers */ -typedef struct { - RwReg Reserved1[64]; - RwReg PERIPH_RPR; /**< \brief (Pdc Offset: 0x100) Receive Pointer Register */ - RwReg PERIPH_RCR; /**< \brief (Pdc Offset: 0x104) Receive Counter Register */ - RwReg PERIPH_TPR; /**< \brief (Pdc Offset: 0x108) Transmit Pointer Register */ - RwReg PERIPH_TCR; /**< \brief (Pdc Offset: 0x10C) Transmit Counter Register */ - RwReg PERIPH_RNPR; /**< \brief (Pdc Offset: 0x110) Receive Next Pointer Register */ - RwReg PERIPH_RNCR; /**< \brief (Pdc Offset: 0x114) Receive Next Counter Register */ - RwReg PERIPH_TNPR; /**< \brief (Pdc Offset: 0x118) Transmit Next Pointer Register */ - RwReg PERIPH_TNCR; /**< \brief (Pdc Offset: 0x11C) Transmit Next Counter Register */ - WoReg PERIPH_PTCR; /**< \brief (Pdc Offset: 0x120) Transfer Control Register */ - RoReg PERIPH_PTSR; /**< \brief (Pdc Offset: 0x124) Transfer Status Register */ -} Pdc; -#endif /* __ASSEMBLY__ */ -/* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */ -#define PERIPH_RPR_RXPTR_Pos 0 -#define PERIPH_RPR_RXPTR_Msk (0xffffffffu << PERIPH_RPR_RXPTR_Pos) /**< \brief (PERIPH_RPR) Receive Pointer Register */ -#define PERIPH_RPR_RXPTR(value) ((PERIPH_RPR_RXPTR_Msk & ((value) << PERIPH_RPR_RXPTR_Pos))) -/* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */ -#define PERIPH_RCR_RXCTR_Pos 0 -#define PERIPH_RCR_RXCTR_Msk (0xffffu << PERIPH_RCR_RXCTR_Pos) /**< \brief (PERIPH_RCR) Receive Counter Register */ -#define PERIPH_RCR_RXCTR(value) ((PERIPH_RCR_RXCTR_Msk & ((value) << PERIPH_RCR_RXCTR_Pos))) -/* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */ -#define PERIPH_TPR_TXPTR_Pos 0 -#define PERIPH_TPR_TXPTR_Msk (0xffffffffu << PERIPH_TPR_TXPTR_Pos) /**< \brief (PERIPH_TPR) Transmit Counter Register */ -#define PERIPH_TPR_TXPTR(value) ((PERIPH_TPR_TXPTR_Msk & ((value) << PERIPH_TPR_TXPTR_Pos))) -/* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */ -#define PERIPH_TCR_TXCTR_Pos 0 -#define PERIPH_TCR_TXCTR_Msk (0xffffu << PERIPH_TCR_TXCTR_Pos) /**< \brief (PERIPH_TCR) Transmit Counter Register */ -#define PERIPH_TCR_TXCTR(value) ((PERIPH_TCR_TXCTR_Msk & ((value) << PERIPH_TCR_TXCTR_Pos))) -/* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */ -#define PERIPH_RNPR_RXNPTR_Pos 0 -#define PERIPH_RNPR_RXNPTR_Msk (0xffffffffu << PERIPH_RNPR_RXNPTR_Pos) /**< \brief (PERIPH_RNPR) Receive Next Pointer */ -#define PERIPH_RNPR_RXNPTR(value) ((PERIPH_RNPR_RXNPTR_Msk & ((value) << PERIPH_RNPR_RXNPTR_Pos))) -/* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */ -#define PERIPH_RNCR_RXNCTR_Pos 0 -#define PERIPH_RNCR_RXNCTR_Msk (0xffffu << PERIPH_RNCR_RXNCTR_Pos) /**< \brief (PERIPH_RNCR) Receive Next Counter */ -#define PERIPH_RNCR_RXNCTR(value) ((PERIPH_RNCR_RXNCTR_Msk & ((value) << PERIPH_RNCR_RXNCTR_Pos))) -/* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PERIPH_TNPR_TXNPTR_Pos 0 -#define PERIPH_TNPR_TXNPTR_Msk (0xffffffffu << PERIPH_TNPR_TXNPTR_Pos) /**< \brief (PERIPH_TNPR) Transmit Next Pointer */ -#define PERIPH_TNPR_TXNPTR(value) ((PERIPH_TNPR_TXNPTR_Msk & ((value) << PERIPH_TNPR_TXNPTR_Pos))) -/* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PERIPH_TNCR_TXNCTR_Pos 0 -#define PERIPH_TNCR_TXNCTR_Msk (0xffffu << PERIPH_TNCR_TXNCTR_Pos) /**< \brief (PERIPH_TNCR) Transmit Counter Next */ -#define PERIPH_TNCR_TXNCTR(value) ((PERIPH_TNCR_TXNCTR_Msk & ((value) << PERIPH_TNCR_TXNCTR_Pos))) -/* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */ -#define PERIPH_PTCR_RXTEN (0x1u << 0) /**< \brief (PERIPH_PTCR) Receiver Transfer Enable */ -#define PERIPH_PTCR_RXTDIS (0x1u << 1) /**< \brief (PERIPH_PTCR) Receiver Transfer Disable */ -#define PERIPH_PTCR_TXTEN (0x1u << 8) /**< \brief (PERIPH_PTCR) Transmitter Transfer Enable */ -#define PERIPH_PTCR_TXTDIS (0x1u << 9) /**< \brief (PERIPH_PTCR) Transmitter Transfer Disable */ -/* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */ -#define PERIPH_PTSR_RXTEN (0x1u << 0) /**< \brief (PERIPH_PTSR) Receiver Transfer Enable */ -#define PERIPH_PTSR_TXTEN (0x1u << 8) /**< \brief (PERIPH_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Parallel Input/Output */ -/* ============================================================================= */ -/** \addtogroup SAM3S_PIO Parallel Input/Output */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pio hardware registers */ -typedef struct { - WoReg PIO_PER; /**< \brief (Pio Offset: 0x0000) PIO Enable Register */ - WoReg PIO_PDR; /**< \brief (Pio Offset: 0x0004) PIO Disable Register */ - RoReg PIO_PSR; /**< \brief (Pio Offset: 0x0008) PIO Status Register */ - RwReg Reserved1[1]; - WoReg PIO_OER; /**< \brief (Pio Offset: 0x0010) Output Enable Register */ - WoReg PIO_ODR; /**< \brief (Pio Offset: 0x0014) Output Disable Register */ - RoReg PIO_OSR; /**< \brief (Pio Offset: 0x0018) Output Status Register */ - RwReg Reserved2[1]; - WoReg PIO_IFER; /**< \brief (Pio Offset: 0x0020) Glitch Input Filter Enable Register */ - WoReg PIO_IFDR; /**< \brief (Pio Offset: 0x0024) Glitch Input Filter Disable Register */ - RoReg PIO_IFSR; /**< \brief (Pio Offset: 0x0028) Glitch Input Filter Status Register */ - RwReg Reserved3[1]; - WoReg PIO_SODR; /**< \brief (Pio Offset: 0x0030) Set Output Data Register */ - WoReg PIO_CODR; /**< \brief (Pio Offset: 0x0034) Clear Output Data Register */ - RwReg PIO_ODSR; /**< \brief (Pio Offset: 0x0038) Output Data Status Register */ - RoReg PIO_PDSR; /**< \brief (Pio Offset: 0x003C) Pin Data Status Register */ - WoReg PIO_IER; /**< \brief (Pio Offset: 0x0040) Interrupt Enable Register */ - WoReg PIO_IDR; /**< \brief (Pio Offset: 0x0044) Interrupt Disable Register */ - RoReg PIO_IMR; /**< \brief (Pio Offset: 0x0048) Interrupt Mask Register */ - RoReg PIO_ISR; /**< \brief (Pio Offset: 0x004C) Interrupt Status Register */ - WoReg PIO_MDER; /**< \brief (Pio Offset: 0x0050) Multi-driver Enable Register */ - WoReg PIO_MDDR; /**< \brief (Pio Offset: 0x0054) Multi-driver Disable Register */ - RoReg PIO_MDSR; /**< \brief (Pio Offset: 0x0058) Multi-driver Status Register */ - RwReg Reserved4[1]; - WoReg PIO_PUDR; /**< \brief (Pio Offset: 0x0060) Pull-up Disable Register */ - WoReg PIO_PUER; /**< \brief (Pio Offset: 0x0064) Pull-up Enable Register */ - RoReg PIO_PUSR; /**< \brief (Pio Offset: 0x0068) Pad Pull-up Status Register */ - RwReg Reserved5[1]; - RwReg PIO_ABCDSR[2]; /**< \brief (Pio Offset: 0x0070) Peripheral Select Register */ - RwReg Reserved6[2]; - WoReg PIO_IFSCDR; /**< \brief (Pio Offset: 0x0080) Input Filter Slow Clock Disable Register */ - WoReg PIO_IFSCER; /**< \brief (Pio Offset: 0x0084) Input Filter Slow Clock Enable Register */ - RoReg PIO_IFSCSR; /**< \brief (Pio Offset: 0x0088) Input Filter Slow Clock Status Register */ - RwReg PIO_SCDR; /**< \brief (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */ - WoReg PIO_PPDDR; /**< \brief (Pio Offset: 0x0090) Pad Pull-down Disable Register */ - WoReg PIO_PPDER; /**< \brief (Pio Offset: 0x0094) Pad Pull-down Enable Register */ - RoReg PIO_PPDSR; /**< \brief (Pio Offset: 0x0098) Pad Pull-down Status Register */ - RwReg Reserved7[1]; - WoReg PIO_OWER; /**< \brief (Pio Offset: 0x00A0) Output Write Enable */ - WoReg PIO_OWDR; /**< \brief (Pio Offset: 0x00A4) Output Write Disable */ - RoReg PIO_OWSR; /**< \brief (Pio Offset: 0x00A8) Output Write Status Register */ - RwReg Reserved8[1]; - WoReg PIO_AIMER; /**< \brief (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */ - WoReg PIO_AIMDR; /**< \brief (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */ - RoReg PIO_AIMMR; /**< \brief (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */ - RwReg Reserved9[1]; - WoReg PIO_ESR; /**< \brief (Pio Offset: 0x00C0) Edge Select Register */ - WoReg PIO_LSR; /**< \brief (Pio Offset: 0x00C4) Level Select Register */ - RoReg PIO_ELSR; /**< \brief (Pio Offset: 0x00C8) Edge/Level Status Register */ - RwReg Reserved10[1]; - WoReg PIO_FELLSR; /**< \brief (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */ - WoReg PIO_REHLSR; /**< \brief (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */ - RoReg PIO_FRLHSR; /**< \brief (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */ - RwReg Reserved11[1]; - RoReg PIO_LOCKSR; /**< \brief (Pio Offset: 0x00E0) Lock Status */ - RwReg PIO_WPMR; /**< \brief (Pio Offset: 0x00E4) Write Protect Mode Register */ - RoReg PIO_WPSR; /**< \brief (Pio Offset: 0x00E8) Write Protect Status Register */ - RwReg Reserved12[5]; - RwReg PIO_SCHMITT; /**< \brief (Pio Offset: 0x0100) Schmitt Trigger Register */ - RwReg Reserved13[19]; - RwReg PIO_PCMR; /**< \brief (Pio Offset: 0x150) Parallel Capture Mode Register */ - WoReg PIO_PCIER; /**< \brief (Pio Offset: 0x154) Parallel Capture Interrupt Enable Register */ - WoReg PIO_PCIDR; /**< \brief (Pio Offset: 0x158) Parallel Capture Interrupt Disable Register */ - RoReg PIO_PCIMR; /**< \brief (Pio Offset: 0x15C) Parallel Capture Interrupt Mask Register */ - RoReg PIO_PCISR; /**< \brief (Pio Offset: 0x160) Parallel Capture Interrupt Status Register */ - RoReg PIO_PCRHR; /**< \brief (Pio Offset: 0x164) Parallel Capture Reception Holding Register */ - RwReg PIO_RPR; /**< \brief (Pio Offset: 0x168) Receive Pointer Register */ - RwReg PIO_RCR; /**< \brief (Pio Offset: 0x16C) Receive Counter Register */ - RwReg PIO_TPR; /**< \brief (Pio Offset: 0x170) Transmit Pointer Register */ - RwReg PIO_TCR; /**< \brief (Pio Offset: 0x174) Transmit Counter Register */ - RwReg PIO_RNPR; /**< \brief (Pio Offset: 0x178) Receive Next Pointer Register */ - RwReg PIO_RNCR; /**< \brief (Pio Offset: 0x17C) Receive Next Counter Register */ - RwReg PIO_TNPR; /**< \brief (Pio Offset: 0x180) Transmit Next Pointer Register */ - RwReg PIO_TNCR; /**< \brief (Pio Offset: 0x184) Transmit Next Counter Register */ - WoReg PIO_PTCR; /**< \brief (Pio Offset: 0x188) Transfer Control Register */ - RoReg PIO_PTSR; /**< \brief (Pio Offset: 0x18C) Transfer Status Register */ -} Pio; -#endif /* __ASSEMBLY__ */ -/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ -#define PIO_PER_P0 (0x1u << 0) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P1 (0x1u << 1) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P2 (0x1u << 2) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P3 (0x1u << 3) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P4 (0x1u << 4) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P5 (0x1u << 5) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P6 (0x1u << 6) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P7 (0x1u << 7) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P8 (0x1u << 8) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P9 (0x1u << 9) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P10 (0x1u << 10) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P11 (0x1u << 11) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P12 (0x1u << 12) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P13 (0x1u << 13) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P14 (0x1u << 14) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P15 (0x1u << 15) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P16 (0x1u << 16) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P17 (0x1u << 17) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P18 (0x1u << 18) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P19 (0x1u << 19) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P20 (0x1u << 20) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P21 (0x1u << 21) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P22 (0x1u << 22) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P23 (0x1u << 23) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P24 (0x1u << 24) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P25 (0x1u << 25) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P26 (0x1u << 26) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P27 (0x1u << 27) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P28 (0x1u << 28) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P29 (0x1u << 29) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P30 (0x1u << 30) /**< \brief (PIO_PER) PIO Enable */ -#define PIO_PER_P31 (0x1u << 31) /**< \brief (PIO_PER) PIO Enable */ -/* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */ -#define PIO_PDR_P0 (0x1u << 0) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P1 (0x1u << 1) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P2 (0x1u << 2) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P3 (0x1u << 3) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P4 (0x1u << 4) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P5 (0x1u << 5) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P6 (0x1u << 6) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P7 (0x1u << 7) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P8 (0x1u << 8) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P9 (0x1u << 9) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P10 (0x1u << 10) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P11 (0x1u << 11) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P12 (0x1u << 12) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P13 (0x1u << 13) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P14 (0x1u << 14) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P15 (0x1u << 15) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P16 (0x1u << 16) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P17 (0x1u << 17) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P18 (0x1u << 18) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P19 (0x1u << 19) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P20 (0x1u << 20) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P21 (0x1u << 21) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P22 (0x1u << 22) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P23 (0x1u << 23) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P24 (0x1u << 24) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P25 (0x1u << 25) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P26 (0x1u << 26) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P27 (0x1u << 27) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P28 (0x1u << 28) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P29 (0x1u << 29) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P30 (0x1u << 30) /**< \brief (PIO_PDR) PIO Disable */ -#define PIO_PDR_P31 (0x1u << 31) /**< \brief (PIO_PDR) PIO Disable */ -/* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */ -#define PIO_PSR_P0 (0x1u << 0) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P1 (0x1u << 1) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P2 (0x1u << 2) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P3 (0x1u << 3) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P4 (0x1u << 4) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P5 (0x1u << 5) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P6 (0x1u << 6) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P7 (0x1u << 7) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P8 (0x1u << 8) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P9 (0x1u << 9) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P10 (0x1u << 10) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P11 (0x1u << 11) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P12 (0x1u << 12) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P13 (0x1u << 13) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P14 (0x1u << 14) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P15 (0x1u << 15) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P16 (0x1u << 16) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P17 (0x1u << 17) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P18 (0x1u << 18) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P19 (0x1u << 19) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P20 (0x1u << 20) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P21 (0x1u << 21) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P22 (0x1u << 22) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P23 (0x1u << 23) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P24 (0x1u << 24) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P25 (0x1u << 25) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P26 (0x1u << 26) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P27 (0x1u << 27) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P28 (0x1u << 28) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P29 (0x1u << 29) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P30 (0x1u << 30) /**< \brief (PIO_PSR) PIO Status */ -#define PIO_PSR_P31 (0x1u << 31) /**< \brief (PIO_PSR) PIO Status */ -/* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */ -#define PIO_OER_P0 (0x1u << 0) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P1 (0x1u << 1) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P2 (0x1u << 2) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P3 (0x1u << 3) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P4 (0x1u << 4) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P5 (0x1u << 5) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P6 (0x1u << 6) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P7 (0x1u << 7) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P8 (0x1u << 8) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P9 (0x1u << 9) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P10 (0x1u << 10) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P11 (0x1u << 11) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P12 (0x1u << 12) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P13 (0x1u << 13) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P14 (0x1u << 14) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P15 (0x1u << 15) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P16 (0x1u << 16) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P17 (0x1u << 17) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P18 (0x1u << 18) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P19 (0x1u << 19) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P20 (0x1u << 20) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P21 (0x1u << 21) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P22 (0x1u << 22) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P23 (0x1u << 23) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P24 (0x1u << 24) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P25 (0x1u << 25) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P26 (0x1u << 26) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P27 (0x1u << 27) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P28 (0x1u << 28) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P29 (0x1u << 29) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P30 (0x1u << 30) /**< \brief (PIO_OER) Output Enable */ -#define PIO_OER_P31 (0x1u << 31) /**< \brief (PIO_OER) Output Enable */ -/* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */ -#define PIO_ODR_P0 (0x1u << 0) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P1 (0x1u << 1) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P2 (0x1u << 2) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P3 (0x1u << 3) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P4 (0x1u << 4) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P5 (0x1u << 5) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P6 (0x1u << 6) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P7 (0x1u << 7) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P8 (0x1u << 8) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P9 (0x1u << 9) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P10 (0x1u << 10) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P11 (0x1u << 11) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P12 (0x1u << 12) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P13 (0x1u << 13) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P14 (0x1u << 14) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P15 (0x1u << 15) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P16 (0x1u << 16) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P17 (0x1u << 17) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P18 (0x1u << 18) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P19 (0x1u << 19) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P20 (0x1u << 20) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P21 (0x1u << 21) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P22 (0x1u << 22) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P23 (0x1u << 23) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P24 (0x1u << 24) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P25 (0x1u << 25) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P26 (0x1u << 26) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P27 (0x1u << 27) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P28 (0x1u << 28) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P29 (0x1u << 29) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P30 (0x1u << 30) /**< \brief (PIO_ODR) Output Disable */ -#define PIO_ODR_P31 (0x1u << 31) /**< \brief (PIO_ODR) Output Disable */ -/* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */ -#define PIO_OSR_P0 (0x1u << 0) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P1 (0x1u << 1) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P2 (0x1u << 2) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P3 (0x1u << 3) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P4 (0x1u << 4) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P5 (0x1u << 5) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P6 (0x1u << 6) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P7 (0x1u << 7) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P8 (0x1u << 8) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P9 (0x1u << 9) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P10 (0x1u << 10) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P11 (0x1u << 11) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P12 (0x1u << 12) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P13 (0x1u << 13) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P14 (0x1u << 14) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P15 (0x1u << 15) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P16 (0x1u << 16) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P17 (0x1u << 17) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P18 (0x1u << 18) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P19 (0x1u << 19) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P20 (0x1u << 20) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P21 (0x1u << 21) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P22 (0x1u << 22) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P23 (0x1u << 23) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P24 (0x1u << 24) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P25 (0x1u << 25) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P26 (0x1u << 26) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P27 (0x1u << 27) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P28 (0x1u << 28) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P29 (0x1u << 29) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P30 (0x1u << 30) /**< \brief (PIO_OSR) Output Status */ -#define PIO_OSR_P31 (0x1u << 31) /**< \brief (PIO_OSR) Output Status */ -/* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */ -#define PIO_IFER_P0 (0x1u << 0) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P1 (0x1u << 1) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P2 (0x1u << 2) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P3 (0x1u << 3) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P4 (0x1u << 4) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P5 (0x1u << 5) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P6 (0x1u << 6) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P7 (0x1u << 7) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P8 (0x1u << 8) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P9 (0x1u << 9) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P10 (0x1u << 10) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P11 (0x1u << 11) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P12 (0x1u << 12) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P13 (0x1u << 13) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P14 (0x1u << 14) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P15 (0x1u << 15) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P16 (0x1u << 16) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P17 (0x1u << 17) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P18 (0x1u << 18) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P19 (0x1u << 19) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P20 (0x1u << 20) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P21 (0x1u << 21) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P22 (0x1u << 22) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P23 (0x1u << 23) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P24 (0x1u << 24) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P25 (0x1u << 25) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P26 (0x1u << 26) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P27 (0x1u << 27) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P28 (0x1u << 28) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P29 (0x1u << 29) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P30 (0x1u << 30) /**< \brief (PIO_IFER) Input Filter Enable */ -#define PIO_IFER_P31 (0x1u << 31) /**< \brief (PIO_IFER) Input Filter Enable */ -/* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */ -#define PIO_IFDR_P0 (0x1u << 0) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P1 (0x1u << 1) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P2 (0x1u << 2) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P3 (0x1u << 3) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P4 (0x1u << 4) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P5 (0x1u << 5) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P6 (0x1u << 6) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P7 (0x1u << 7) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P8 (0x1u << 8) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P9 (0x1u << 9) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P10 (0x1u << 10) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P11 (0x1u << 11) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P12 (0x1u << 12) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P13 (0x1u << 13) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P14 (0x1u << 14) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P15 (0x1u << 15) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P16 (0x1u << 16) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P17 (0x1u << 17) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P18 (0x1u << 18) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P19 (0x1u << 19) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P20 (0x1u << 20) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P21 (0x1u << 21) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P22 (0x1u << 22) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P23 (0x1u << 23) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P24 (0x1u << 24) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P25 (0x1u << 25) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P26 (0x1u << 26) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P27 (0x1u << 27) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P28 (0x1u << 28) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P29 (0x1u << 29) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P30 (0x1u << 30) /**< \brief (PIO_IFDR) Input Filter Disable */ -#define PIO_IFDR_P31 (0x1u << 31) /**< \brief (PIO_IFDR) Input Filter Disable */ -/* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */ -#define PIO_IFSR_P0 (0x1u << 0) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P1 (0x1u << 1) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P2 (0x1u << 2) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P3 (0x1u << 3) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P4 (0x1u << 4) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P5 (0x1u << 5) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P6 (0x1u << 6) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P7 (0x1u << 7) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P8 (0x1u << 8) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P9 (0x1u << 9) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P10 (0x1u << 10) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P11 (0x1u << 11) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P12 (0x1u << 12) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P13 (0x1u << 13) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P14 (0x1u << 14) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P15 (0x1u << 15) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P16 (0x1u << 16) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P17 (0x1u << 17) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P18 (0x1u << 18) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P19 (0x1u << 19) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P20 (0x1u << 20) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P21 (0x1u << 21) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P22 (0x1u << 22) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P23 (0x1u << 23) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P24 (0x1u << 24) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P25 (0x1u << 25) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P26 (0x1u << 26) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P27 (0x1u << 27) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P28 (0x1u << 28) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P29 (0x1u << 29) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P30 (0x1u << 30) /**< \brief (PIO_IFSR) Input Filer Status */ -#define PIO_IFSR_P31 (0x1u << 31) /**< \brief (PIO_IFSR) Input Filer Status */ -/* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */ -#define PIO_SODR_P0 (0x1u << 0) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P1 (0x1u << 1) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P2 (0x1u << 2) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P3 (0x1u << 3) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P4 (0x1u << 4) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P5 (0x1u << 5) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P6 (0x1u << 6) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P7 (0x1u << 7) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P8 (0x1u << 8) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P9 (0x1u << 9) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P10 (0x1u << 10) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P11 (0x1u << 11) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P12 (0x1u << 12) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P13 (0x1u << 13) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P14 (0x1u << 14) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P15 (0x1u << 15) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P16 (0x1u << 16) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P17 (0x1u << 17) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P18 (0x1u << 18) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P19 (0x1u << 19) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P20 (0x1u << 20) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P21 (0x1u << 21) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P22 (0x1u << 22) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P23 (0x1u << 23) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P24 (0x1u << 24) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P25 (0x1u << 25) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P26 (0x1u << 26) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P27 (0x1u << 27) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P28 (0x1u << 28) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P29 (0x1u << 29) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P30 (0x1u << 30) /**< \brief (PIO_SODR) Set Output Data */ -#define PIO_SODR_P31 (0x1u << 31) /**< \brief (PIO_SODR) Set Output Data */ -/* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */ -#define PIO_CODR_P0 (0x1u << 0) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P1 (0x1u << 1) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P2 (0x1u << 2) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P3 (0x1u << 3) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P4 (0x1u << 4) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P5 (0x1u << 5) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P6 (0x1u << 6) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P7 (0x1u << 7) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P8 (0x1u << 8) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P9 (0x1u << 9) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P10 (0x1u << 10) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P11 (0x1u << 11) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P12 (0x1u << 12) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P13 (0x1u << 13) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P14 (0x1u << 14) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P15 (0x1u << 15) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P16 (0x1u << 16) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P17 (0x1u << 17) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P18 (0x1u << 18) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P19 (0x1u << 19) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P20 (0x1u << 20) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P21 (0x1u << 21) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P22 (0x1u << 22) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P23 (0x1u << 23) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P24 (0x1u << 24) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P25 (0x1u << 25) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P26 (0x1u << 26) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P27 (0x1u << 27) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P28 (0x1u << 28) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P29 (0x1u << 29) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P30 (0x1u << 30) /**< \brief (PIO_CODR) Clear Output Data */ -#define PIO_CODR_P31 (0x1u << 31) /**< \brief (PIO_CODR) Clear Output Data */ -/* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */ -#define PIO_ODSR_P0 (0x1u << 0) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P1 (0x1u << 1) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P2 (0x1u << 2) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P3 (0x1u << 3) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P4 (0x1u << 4) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P5 (0x1u << 5) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P6 (0x1u << 6) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P7 (0x1u << 7) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P8 (0x1u << 8) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P9 (0x1u << 9) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P10 (0x1u << 10) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P11 (0x1u << 11) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P12 (0x1u << 12) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P13 (0x1u << 13) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P14 (0x1u << 14) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P15 (0x1u << 15) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P16 (0x1u << 16) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P17 (0x1u << 17) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P18 (0x1u << 18) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P19 (0x1u << 19) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P20 (0x1u << 20) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P21 (0x1u << 21) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P22 (0x1u << 22) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P23 (0x1u << 23) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P24 (0x1u << 24) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P25 (0x1u << 25) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P26 (0x1u << 26) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P27 (0x1u << 27) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P28 (0x1u << 28) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P29 (0x1u << 29) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P30 (0x1u << 30) /**< \brief (PIO_ODSR) Output Data Status */ -#define PIO_ODSR_P31 (0x1u << 31) /**< \brief (PIO_ODSR) Output Data Status */ -/* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */ -#define PIO_PDSR_P0 (0x1u << 0) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P1 (0x1u << 1) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P2 (0x1u << 2) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P3 (0x1u << 3) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P4 (0x1u << 4) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P5 (0x1u << 5) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P6 (0x1u << 6) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P7 (0x1u << 7) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P8 (0x1u << 8) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P9 (0x1u << 9) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P10 (0x1u << 10) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P11 (0x1u << 11) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P12 (0x1u << 12) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P13 (0x1u << 13) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P14 (0x1u << 14) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P15 (0x1u << 15) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P16 (0x1u << 16) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P17 (0x1u << 17) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P18 (0x1u << 18) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P19 (0x1u << 19) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P20 (0x1u << 20) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P21 (0x1u << 21) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P22 (0x1u << 22) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P23 (0x1u << 23) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P24 (0x1u << 24) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P25 (0x1u << 25) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P26 (0x1u << 26) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P27 (0x1u << 27) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P28 (0x1u << 28) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P29 (0x1u << 29) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P30 (0x1u << 30) /**< \brief (PIO_PDSR) Output Data Status */ -#define PIO_PDSR_P31 (0x1u << 31) /**< \brief (PIO_PDSR) Output Data Status */ -/* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */ -#define PIO_IER_P0 (0x1u << 0) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P1 (0x1u << 1) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P2 (0x1u << 2) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P3 (0x1u << 3) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P4 (0x1u << 4) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P5 (0x1u << 5) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P6 (0x1u << 6) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P7 (0x1u << 7) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P8 (0x1u << 8) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P9 (0x1u << 9) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P10 (0x1u << 10) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P11 (0x1u << 11) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P12 (0x1u << 12) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P13 (0x1u << 13) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P14 (0x1u << 14) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P15 (0x1u << 15) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P16 (0x1u << 16) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P17 (0x1u << 17) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P18 (0x1u << 18) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P19 (0x1u << 19) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P20 (0x1u << 20) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P21 (0x1u << 21) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P22 (0x1u << 22) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P23 (0x1u << 23) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P24 (0x1u << 24) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P25 (0x1u << 25) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P26 (0x1u << 26) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P27 (0x1u << 27) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P28 (0x1u << 28) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P29 (0x1u << 29) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P30 (0x1u << 30) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -#define PIO_IER_P31 (0x1u << 31) /**< \brief (PIO_IER) Input Change Interrupt Enable */ -/* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */ -#define PIO_IDR_P0 (0x1u << 0) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P1 (0x1u << 1) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P2 (0x1u << 2) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P3 (0x1u << 3) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P4 (0x1u << 4) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P5 (0x1u << 5) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P6 (0x1u << 6) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P7 (0x1u << 7) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P8 (0x1u << 8) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P9 (0x1u << 9) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P10 (0x1u << 10) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P11 (0x1u << 11) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P12 (0x1u << 12) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P13 (0x1u << 13) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P14 (0x1u << 14) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P15 (0x1u << 15) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P16 (0x1u << 16) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P17 (0x1u << 17) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P18 (0x1u << 18) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P19 (0x1u << 19) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P20 (0x1u << 20) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P21 (0x1u << 21) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P22 (0x1u << 22) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P23 (0x1u << 23) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P24 (0x1u << 24) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P25 (0x1u << 25) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P26 (0x1u << 26) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P27 (0x1u << 27) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P28 (0x1u << 28) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P29 (0x1u << 29) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P30 (0x1u << 30) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -#define PIO_IDR_P31 (0x1u << 31) /**< \brief (PIO_IDR) Input Change Interrupt Disable */ -/* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */ -#define PIO_IMR_P0 (0x1u << 0) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P1 (0x1u << 1) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P2 (0x1u << 2) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P3 (0x1u << 3) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P4 (0x1u << 4) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P5 (0x1u << 5) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P6 (0x1u << 6) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P7 (0x1u << 7) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P8 (0x1u << 8) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P9 (0x1u << 9) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P10 (0x1u << 10) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P11 (0x1u << 11) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P12 (0x1u << 12) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P13 (0x1u << 13) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P14 (0x1u << 14) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P15 (0x1u << 15) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P16 (0x1u << 16) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P17 (0x1u << 17) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P18 (0x1u << 18) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P19 (0x1u << 19) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P20 (0x1u << 20) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P21 (0x1u << 21) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P22 (0x1u << 22) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P23 (0x1u << 23) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P24 (0x1u << 24) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P25 (0x1u << 25) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P26 (0x1u << 26) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P27 (0x1u << 27) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P28 (0x1u << 28) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P29 (0x1u << 29) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P30 (0x1u << 30) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -#define PIO_IMR_P31 (0x1u << 31) /**< \brief (PIO_IMR) Input Change Interrupt Mask */ -/* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */ -#define PIO_ISR_P0 (0x1u << 0) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P1 (0x1u << 1) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P2 (0x1u << 2) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P3 (0x1u << 3) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P4 (0x1u << 4) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P5 (0x1u << 5) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P6 (0x1u << 6) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P7 (0x1u << 7) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P8 (0x1u << 8) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P9 (0x1u << 9) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P10 (0x1u << 10) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P11 (0x1u << 11) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P12 (0x1u << 12) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P13 (0x1u << 13) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P14 (0x1u << 14) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P15 (0x1u << 15) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P16 (0x1u << 16) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P17 (0x1u << 17) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P18 (0x1u << 18) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P19 (0x1u << 19) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P20 (0x1u << 20) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P21 (0x1u << 21) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P22 (0x1u << 22) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P23 (0x1u << 23) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P24 (0x1u << 24) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P25 (0x1u << 25) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P26 (0x1u << 26) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P27 (0x1u << 27) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P28 (0x1u << 28) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P29 (0x1u << 29) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P30 (0x1u << 30) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -#define PIO_ISR_P31 (0x1u << 31) /**< \brief (PIO_ISR) Input Change Interrupt Status */ -/* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */ -#define PIO_MDER_P0 (0x1u << 0) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P1 (0x1u << 1) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P2 (0x1u << 2) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P3 (0x1u << 3) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P4 (0x1u << 4) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P5 (0x1u << 5) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P6 (0x1u << 6) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P7 (0x1u << 7) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P8 (0x1u << 8) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P9 (0x1u << 9) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P10 (0x1u << 10) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P11 (0x1u << 11) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P12 (0x1u << 12) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P13 (0x1u << 13) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P14 (0x1u << 14) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P15 (0x1u << 15) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P16 (0x1u << 16) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P17 (0x1u << 17) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P18 (0x1u << 18) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P19 (0x1u << 19) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P20 (0x1u << 20) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P21 (0x1u << 21) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P22 (0x1u << 22) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P23 (0x1u << 23) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P24 (0x1u << 24) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P25 (0x1u << 25) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P26 (0x1u << 26) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P27 (0x1u << 27) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P28 (0x1u << 28) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P29 (0x1u << 29) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P30 (0x1u << 30) /**< \brief (PIO_MDER) Multi Drive Enable. */ -#define PIO_MDER_P31 (0x1u << 31) /**< \brief (PIO_MDER) Multi Drive Enable. */ -/* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */ -#define PIO_MDDR_P0 (0x1u << 0) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P1 (0x1u << 1) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P2 (0x1u << 2) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P3 (0x1u << 3) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P4 (0x1u << 4) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P5 (0x1u << 5) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P6 (0x1u << 6) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P7 (0x1u << 7) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P8 (0x1u << 8) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P9 (0x1u << 9) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P10 (0x1u << 10) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P11 (0x1u << 11) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P12 (0x1u << 12) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P13 (0x1u << 13) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P14 (0x1u << 14) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P15 (0x1u << 15) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P16 (0x1u << 16) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P17 (0x1u << 17) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P18 (0x1u << 18) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P19 (0x1u << 19) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P20 (0x1u << 20) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P21 (0x1u << 21) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P22 (0x1u << 22) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P23 (0x1u << 23) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P24 (0x1u << 24) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P25 (0x1u << 25) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P26 (0x1u << 26) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P27 (0x1u << 27) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P28 (0x1u << 28) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P29 (0x1u << 29) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P30 (0x1u << 30) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -#define PIO_MDDR_P31 (0x1u << 31) /**< \brief (PIO_MDDR) Multi Drive Disable. */ -/* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */ -#define PIO_MDSR_P0 (0x1u << 0) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P1 (0x1u << 1) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P2 (0x1u << 2) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P3 (0x1u << 3) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P4 (0x1u << 4) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P5 (0x1u << 5) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P6 (0x1u << 6) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P7 (0x1u << 7) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P8 (0x1u << 8) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P9 (0x1u << 9) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P10 (0x1u << 10) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P11 (0x1u << 11) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P12 (0x1u << 12) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P13 (0x1u << 13) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P14 (0x1u << 14) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P15 (0x1u << 15) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P16 (0x1u << 16) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P17 (0x1u << 17) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P18 (0x1u << 18) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P19 (0x1u << 19) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P20 (0x1u << 20) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P21 (0x1u << 21) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P22 (0x1u << 22) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P23 (0x1u << 23) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P24 (0x1u << 24) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P25 (0x1u << 25) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P26 (0x1u << 26) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P27 (0x1u << 27) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P28 (0x1u << 28) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P29 (0x1u << 29) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P30 (0x1u << 30) /**< \brief (PIO_MDSR) Multi Drive Status. */ -#define PIO_MDSR_P31 (0x1u << 31) /**< \brief (PIO_MDSR) Multi Drive Status. */ -/* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */ -#define PIO_PUDR_P0 (0x1u << 0) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P1 (0x1u << 1) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P2 (0x1u << 2) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P3 (0x1u << 3) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P4 (0x1u << 4) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P5 (0x1u << 5) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P6 (0x1u << 6) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P7 (0x1u << 7) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P8 (0x1u << 8) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P9 (0x1u << 9) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P10 (0x1u << 10) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P11 (0x1u << 11) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P12 (0x1u << 12) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P13 (0x1u << 13) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P14 (0x1u << 14) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P15 (0x1u << 15) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P16 (0x1u << 16) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P17 (0x1u << 17) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P18 (0x1u << 18) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P19 (0x1u << 19) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P20 (0x1u << 20) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P21 (0x1u << 21) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P22 (0x1u << 22) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P23 (0x1u << 23) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P24 (0x1u << 24) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P25 (0x1u << 25) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P26 (0x1u << 26) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P27 (0x1u << 27) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P28 (0x1u << 28) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P29 (0x1u << 29) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P30 (0x1u << 30) /**< \brief (PIO_PUDR) Pull Up Disable. */ -#define PIO_PUDR_P31 (0x1u << 31) /**< \brief (PIO_PUDR) Pull Up Disable. */ -/* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */ -#define PIO_PUER_P0 (0x1u << 0) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P1 (0x1u << 1) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P2 (0x1u << 2) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P3 (0x1u << 3) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P4 (0x1u << 4) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P5 (0x1u << 5) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P6 (0x1u << 6) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P7 (0x1u << 7) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P8 (0x1u << 8) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P9 (0x1u << 9) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P10 (0x1u << 10) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P11 (0x1u << 11) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P12 (0x1u << 12) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P13 (0x1u << 13) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P14 (0x1u << 14) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P15 (0x1u << 15) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P16 (0x1u << 16) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P17 (0x1u << 17) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P18 (0x1u << 18) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P19 (0x1u << 19) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P20 (0x1u << 20) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P21 (0x1u << 21) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P22 (0x1u << 22) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P23 (0x1u << 23) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P24 (0x1u << 24) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P25 (0x1u << 25) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P26 (0x1u << 26) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P27 (0x1u << 27) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P28 (0x1u << 28) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P29 (0x1u << 29) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P30 (0x1u << 30) /**< \brief (PIO_PUER) Pull Up Enable. */ -#define PIO_PUER_P31 (0x1u << 31) /**< \brief (PIO_PUER) Pull Up Enable. */ -/* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */ -#define PIO_PUSR_P0 (0x1u << 0) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P1 (0x1u << 1) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P2 (0x1u << 2) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P3 (0x1u << 3) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P4 (0x1u << 4) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P5 (0x1u << 5) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P6 (0x1u << 6) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P7 (0x1u << 7) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P8 (0x1u << 8) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P9 (0x1u << 9) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P10 (0x1u << 10) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P11 (0x1u << 11) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P12 (0x1u << 12) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P13 (0x1u << 13) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P14 (0x1u << 14) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P15 (0x1u << 15) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P16 (0x1u << 16) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P17 (0x1u << 17) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P18 (0x1u << 18) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P19 (0x1u << 19) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P20 (0x1u << 20) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P21 (0x1u << 21) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P22 (0x1u << 22) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P23 (0x1u << 23) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P24 (0x1u << 24) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P25 (0x1u << 25) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P26 (0x1u << 26) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P27 (0x1u << 27) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P28 (0x1u << 28) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P29 (0x1u << 29) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P30 (0x1u << 30) /**< \brief (PIO_PUSR) Pull Up Status. */ -#define PIO_PUSR_P31 (0x1u << 31) /**< \brief (PIO_PUSR) Pull Up Status. */ -/* -------- PIO_ABCDSR[2] : (PIO Offset: 0x0070) Peripheral Select Register -------- */ -#define PIO_ABCDSR_P0 (0x1u << 0) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P1 (0x1u << 1) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P2 (0x1u << 2) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P3 (0x1u << 3) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P4 (0x1u << 4) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P5 (0x1u << 5) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P6 (0x1u << 6) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P7 (0x1u << 7) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P8 (0x1u << 8) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P9 (0x1u << 9) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P10 (0x1u << 10) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P11 (0x1u << 11) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P12 (0x1u << 12) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P13 (0x1u << 13) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P14 (0x1u << 14) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P15 (0x1u << 15) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P16 (0x1u << 16) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P17 (0x1u << 17) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P18 (0x1u << 18) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P19 (0x1u << 19) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P20 (0x1u << 20) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P21 (0x1u << 21) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P22 (0x1u << 22) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P23 (0x1u << 23) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P24 (0x1u << 24) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P25 (0x1u << 25) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P26 (0x1u << 26) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P27 (0x1u << 27) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P28 (0x1u << 28) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P29 (0x1u << 29) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P30 (0x1u << 30) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -#define PIO_ABCDSR_P31 (0x1u << 31) /**< \brief (PIO_ABCDSR[2]) Peripheral Select. */ -/* -------- PIO_IFSCDR : (PIO Offset: 0x0080) Input Filter Slow Clock Disable Register -------- */ -#define PIO_IFSCDR_P0 (0x1u << 0) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P1 (0x1u << 1) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P2 (0x1u << 2) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P3 (0x1u << 3) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P4 (0x1u << 4) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P5 (0x1u << 5) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P6 (0x1u << 6) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P7 (0x1u << 7) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P8 (0x1u << 8) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P9 (0x1u << 9) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P10 (0x1u << 10) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P11 (0x1u << 11) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P12 (0x1u << 12) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P13 (0x1u << 13) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P14 (0x1u << 14) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P15 (0x1u << 15) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P16 (0x1u << 16) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P17 (0x1u << 17) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P18 (0x1u << 18) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P19 (0x1u << 19) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P20 (0x1u << 20) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P21 (0x1u << 21) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P22 (0x1u << 22) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P23 (0x1u << 23) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P24 (0x1u << 24) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P25 (0x1u << 25) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P26 (0x1u << 26) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P27 (0x1u << 27) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P28 (0x1u << 28) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P29 (0x1u << 29) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P30 (0x1u << 30) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -#define PIO_IFSCDR_P31 (0x1u << 31) /**< \brief (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ -/* -------- PIO_IFSCER : (PIO Offset: 0x0084) Input Filter Slow Clock Enable Register -------- */ -#define PIO_IFSCER_P0 (0x1u << 0) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P1 (0x1u << 1) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P2 (0x1u << 2) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P3 (0x1u << 3) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P4 (0x1u << 4) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P5 (0x1u << 5) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P6 (0x1u << 6) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P7 (0x1u << 7) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P8 (0x1u << 8) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P9 (0x1u << 9) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P10 (0x1u << 10) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P11 (0x1u << 11) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P12 (0x1u << 12) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P13 (0x1u << 13) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P14 (0x1u << 14) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P15 (0x1u << 15) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P16 (0x1u << 16) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P17 (0x1u << 17) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P18 (0x1u << 18) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P19 (0x1u << 19) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P20 (0x1u << 20) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P21 (0x1u << 21) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P22 (0x1u << 22) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P23 (0x1u << 23) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P24 (0x1u << 24) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P25 (0x1u << 25) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P26 (0x1u << 26) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P27 (0x1u << 27) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P28 (0x1u << 28) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P29 (0x1u << 29) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P30 (0x1u << 30) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -#define PIO_IFSCER_P31 (0x1u << 31) /**< \brief (PIO_IFSCER) Debouncing Filtering Select. */ -/* -------- PIO_IFSCSR : (PIO Offset: 0x0088) Input Filter Slow Clock Status Register -------- */ -#define PIO_IFSCSR_P0 (0x1u << 0) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P1 (0x1u << 1) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P2 (0x1u << 2) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P3 (0x1u << 3) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P4 (0x1u << 4) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P5 (0x1u << 5) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P6 (0x1u << 6) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P7 (0x1u << 7) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P8 (0x1u << 8) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P9 (0x1u << 9) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P10 (0x1u << 10) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P11 (0x1u << 11) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P12 (0x1u << 12) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P13 (0x1u << 13) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P14 (0x1u << 14) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P15 (0x1u << 15) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P16 (0x1u << 16) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P17 (0x1u << 17) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P18 (0x1u << 18) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P19 (0x1u << 19) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P20 (0x1u << 20) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P21 (0x1u << 21) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P22 (0x1u << 22) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P23 (0x1u << 23) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P24 (0x1u << 24) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P25 (0x1u << 25) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P26 (0x1u << 26) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P27 (0x1u << 27) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P28 (0x1u << 28) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P29 (0x1u << 29) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P30 (0x1u << 30) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -#define PIO_IFSCSR_P31 (0x1u << 31) /**< \brief (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ -/* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */ -#define PIO_SCDR_DIV0 (0x1u << 0) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV1 (0x1u << 1) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV2 (0x1u << 2) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV3 (0x1u << 3) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV4 (0x1u << 4) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV5 (0x1u << 5) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV6 (0x1u << 6) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV7 (0x1u << 7) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV8 (0x1u << 8) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV9 (0x1u << 9) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV10 (0x1u << 10) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV11 (0x1u << 11) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV12 (0x1u << 12) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -#define PIO_SCDR_DIV13 (0x1u << 13) /**< \brief (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ -/* -------- PIO_PPDDR : (PIO Offset: 0x0090) Pad Pull-down Disable Register -------- */ -#define PIO_PPDDR_P0 (0x1u << 0) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P1 (0x1u << 1) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P2 (0x1u << 2) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P3 (0x1u << 3) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P4 (0x1u << 4) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P5 (0x1u << 5) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P6 (0x1u << 6) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P7 (0x1u << 7) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P8 (0x1u << 8) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P9 (0x1u << 9) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P10 (0x1u << 10) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P11 (0x1u << 11) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P12 (0x1u << 12) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P13 (0x1u << 13) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P14 (0x1u << 14) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P15 (0x1u << 15) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P16 (0x1u << 16) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P17 (0x1u << 17) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P18 (0x1u << 18) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P19 (0x1u << 19) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P20 (0x1u << 20) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P21 (0x1u << 21) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P22 (0x1u << 22) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P23 (0x1u << 23) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P24 (0x1u << 24) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P25 (0x1u << 25) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P26 (0x1u << 26) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P27 (0x1u << 27) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P28 (0x1u << 28) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P29 (0x1u << 29) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P30 (0x1u << 30) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -#define PIO_PPDDR_P31 (0x1u << 31) /**< \brief (PIO_PPDDR) Pull Down Disable. */ -/* -------- PIO_PPDER : (PIO Offset: 0x0094) Pad Pull-down Enable Register -------- */ -#define PIO_PPDER_P0 (0x1u << 0) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P1 (0x1u << 1) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P2 (0x1u << 2) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P3 (0x1u << 3) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P4 (0x1u << 4) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P5 (0x1u << 5) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P6 (0x1u << 6) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P7 (0x1u << 7) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P8 (0x1u << 8) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P9 (0x1u << 9) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P10 (0x1u << 10) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P11 (0x1u << 11) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P12 (0x1u << 12) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P13 (0x1u << 13) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P14 (0x1u << 14) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P15 (0x1u << 15) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P16 (0x1u << 16) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P17 (0x1u << 17) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P18 (0x1u << 18) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P19 (0x1u << 19) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P20 (0x1u << 20) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P21 (0x1u << 21) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P22 (0x1u << 22) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P23 (0x1u << 23) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P24 (0x1u << 24) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P25 (0x1u << 25) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P26 (0x1u << 26) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P27 (0x1u << 27) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P28 (0x1u << 28) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P29 (0x1u << 29) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P30 (0x1u << 30) /**< \brief (PIO_PPDER) Pull Down Enable. */ -#define PIO_PPDER_P31 (0x1u << 31) /**< \brief (PIO_PPDER) Pull Down Enable. */ -/* -------- PIO_PPDSR : (PIO Offset: 0x0098) Pad Pull-down Status Register -------- */ -#define PIO_PPDSR_P0 (0x1u << 0) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P1 (0x1u << 1) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P2 (0x1u << 2) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P3 (0x1u << 3) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P4 (0x1u << 4) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P5 (0x1u << 5) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P6 (0x1u << 6) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P7 (0x1u << 7) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P8 (0x1u << 8) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P9 (0x1u << 9) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P10 (0x1u << 10) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P11 (0x1u << 11) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P12 (0x1u << 12) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P13 (0x1u << 13) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P14 (0x1u << 14) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P15 (0x1u << 15) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P16 (0x1u << 16) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P17 (0x1u << 17) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P18 (0x1u << 18) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P19 (0x1u << 19) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P20 (0x1u << 20) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P21 (0x1u << 21) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P22 (0x1u << 22) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P23 (0x1u << 23) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P24 (0x1u << 24) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P25 (0x1u << 25) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P26 (0x1u << 26) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P27 (0x1u << 27) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P28 (0x1u << 28) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P29 (0x1u << 29) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P30 (0x1u << 30) /**< \brief (PIO_PPDSR) Pull Down Status. */ -#define PIO_PPDSR_P31 (0x1u << 31) /**< \brief (PIO_PPDSR) Pull Down Status. */ -/* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */ -#define PIO_OWER_P0 (0x1u << 0) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P1 (0x1u << 1) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P2 (0x1u << 2) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P3 (0x1u << 3) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P4 (0x1u << 4) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P5 (0x1u << 5) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P6 (0x1u << 6) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P7 (0x1u << 7) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P8 (0x1u << 8) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P9 (0x1u << 9) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P10 (0x1u << 10) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P11 (0x1u << 11) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P12 (0x1u << 12) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P13 (0x1u << 13) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P14 (0x1u << 14) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P15 (0x1u << 15) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P16 (0x1u << 16) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P17 (0x1u << 17) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P18 (0x1u << 18) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P19 (0x1u << 19) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P20 (0x1u << 20) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P21 (0x1u << 21) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P22 (0x1u << 22) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P23 (0x1u << 23) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P24 (0x1u << 24) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P25 (0x1u << 25) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P26 (0x1u << 26) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P27 (0x1u << 27) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P28 (0x1u << 28) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P29 (0x1u << 29) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P30 (0x1u << 30) /**< \brief (PIO_OWER) Output Write Enable. */ -#define PIO_OWER_P31 (0x1u << 31) /**< \brief (PIO_OWER) Output Write Enable. */ -/* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */ -#define PIO_OWDR_P0 (0x1u << 0) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P1 (0x1u << 1) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P2 (0x1u << 2) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P3 (0x1u << 3) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P4 (0x1u << 4) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P5 (0x1u << 5) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P6 (0x1u << 6) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P7 (0x1u << 7) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P8 (0x1u << 8) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P9 (0x1u << 9) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P10 (0x1u << 10) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P11 (0x1u << 11) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P12 (0x1u << 12) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P13 (0x1u << 13) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P14 (0x1u << 14) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P15 (0x1u << 15) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P16 (0x1u << 16) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P17 (0x1u << 17) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P18 (0x1u << 18) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P19 (0x1u << 19) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P20 (0x1u << 20) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P21 (0x1u << 21) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P22 (0x1u << 22) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P23 (0x1u << 23) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P24 (0x1u << 24) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P25 (0x1u << 25) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P26 (0x1u << 26) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P27 (0x1u << 27) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P28 (0x1u << 28) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P29 (0x1u << 29) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P30 (0x1u << 30) /**< \brief (PIO_OWDR) Output Write Disable. */ -#define PIO_OWDR_P31 (0x1u << 31) /**< \brief (PIO_OWDR) Output Write Disable. */ -/* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */ -#define PIO_OWSR_P0 (0x1u << 0) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P1 (0x1u << 1) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P2 (0x1u << 2) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P3 (0x1u << 3) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P4 (0x1u << 4) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P5 (0x1u << 5) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P6 (0x1u << 6) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P7 (0x1u << 7) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P8 (0x1u << 8) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P9 (0x1u << 9) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P10 (0x1u << 10) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P11 (0x1u << 11) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P12 (0x1u << 12) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P13 (0x1u << 13) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P14 (0x1u << 14) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P15 (0x1u << 15) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P16 (0x1u << 16) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P17 (0x1u << 17) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P18 (0x1u << 18) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P19 (0x1u << 19) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P20 (0x1u << 20) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P21 (0x1u << 21) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P22 (0x1u << 22) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P23 (0x1u << 23) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P24 (0x1u << 24) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P25 (0x1u << 25) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P26 (0x1u << 26) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P27 (0x1u << 27) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P28 (0x1u << 28) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P29 (0x1u << 29) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P30 (0x1u << 30) /**< \brief (PIO_OWSR) Output Write Status. */ -#define PIO_OWSR_P31 (0x1u << 31) /**< \brief (PIO_OWSR) Output Write Status. */ -/* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */ -#define PIO_AIMER_P0 (0x1u << 0) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P1 (0x1u << 1) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P2 (0x1u << 2) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P3 (0x1u << 3) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P4 (0x1u << 4) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P5 (0x1u << 5) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P6 (0x1u << 6) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P7 (0x1u << 7) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P8 (0x1u << 8) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P9 (0x1u << 9) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P10 (0x1u << 10) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P11 (0x1u << 11) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P12 (0x1u << 12) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P13 (0x1u << 13) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P14 (0x1u << 14) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P15 (0x1u << 15) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P16 (0x1u << 16) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P17 (0x1u << 17) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P18 (0x1u << 18) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P19 (0x1u << 19) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P20 (0x1u << 20) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P21 (0x1u << 21) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P22 (0x1u << 22) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P23 (0x1u << 23) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P24 (0x1u << 24) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P25 (0x1u << 25) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P26 (0x1u << 26) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P27 (0x1u << 27) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P28 (0x1u << 28) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P29 (0x1u << 29) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P30 (0x1u << 30) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -#define PIO_AIMER_P31 (0x1u << 31) /**< \brief (PIO_AIMER) Additional Interrupt Modes Enable. */ -/* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */ -#define PIO_AIMDR_P0 (0x1u << 0) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P1 (0x1u << 1) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P2 (0x1u << 2) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P3 (0x1u << 3) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P4 (0x1u << 4) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P5 (0x1u << 5) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P6 (0x1u << 6) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P7 (0x1u << 7) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P8 (0x1u << 8) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P9 (0x1u << 9) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P10 (0x1u << 10) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P11 (0x1u << 11) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P12 (0x1u << 12) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P13 (0x1u << 13) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P14 (0x1u << 14) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P15 (0x1u << 15) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P16 (0x1u << 16) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P17 (0x1u << 17) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P18 (0x1u << 18) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P19 (0x1u << 19) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P20 (0x1u << 20) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P21 (0x1u << 21) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P22 (0x1u << 22) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P23 (0x1u << 23) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P24 (0x1u << 24) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P25 (0x1u << 25) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P26 (0x1u << 26) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P27 (0x1u << 27) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P28 (0x1u << 28) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P29 (0x1u << 29) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P30 (0x1u << 30) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -#define PIO_AIMDR_P31 (0x1u << 31) /**< \brief (PIO_AIMDR) Additional Interrupt Modes Disable. */ -/* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */ -#define PIO_AIMMR_P0 (0x1u << 0) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P1 (0x1u << 1) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P2 (0x1u << 2) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P3 (0x1u << 3) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P4 (0x1u << 4) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P5 (0x1u << 5) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P6 (0x1u << 6) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P7 (0x1u << 7) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P8 (0x1u << 8) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P9 (0x1u << 9) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P10 (0x1u << 10) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P11 (0x1u << 11) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P12 (0x1u << 12) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P13 (0x1u << 13) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P14 (0x1u << 14) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P15 (0x1u << 15) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P16 (0x1u << 16) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P17 (0x1u << 17) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P18 (0x1u << 18) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P19 (0x1u << 19) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P20 (0x1u << 20) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P21 (0x1u << 21) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P22 (0x1u << 22) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P23 (0x1u << 23) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P24 (0x1u << 24) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P25 (0x1u << 25) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P26 (0x1u << 26) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P27 (0x1u << 27) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P28 (0x1u << 28) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P29 (0x1u << 29) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P30 (0x1u << 30) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -#define PIO_AIMMR_P31 (0x1u << 31) /**< \brief (PIO_AIMMR) Peripheral CD Status. */ -/* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */ -#define PIO_ESR_P0 (0x1u << 0) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P1 (0x1u << 1) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P2 (0x1u << 2) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P3 (0x1u << 3) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P4 (0x1u << 4) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P5 (0x1u << 5) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P6 (0x1u << 6) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P7 (0x1u << 7) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P8 (0x1u << 8) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P9 (0x1u << 9) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P10 (0x1u << 10) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P11 (0x1u << 11) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P12 (0x1u << 12) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P13 (0x1u << 13) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P14 (0x1u << 14) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P15 (0x1u << 15) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P16 (0x1u << 16) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P17 (0x1u << 17) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P18 (0x1u << 18) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P19 (0x1u << 19) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P20 (0x1u << 20) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P21 (0x1u << 21) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P22 (0x1u << 22) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P23 (0x1u << 23) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P24 (0x1u << 24) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P25 (0x1u << 25) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P26 (0x1u << 26) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P27 (0x1u << 27) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P28 (0x1u << 28) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P29 (0x1u << 29) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P30 (0x1u << 30) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -#define PIO_ESR_P31 (0x1u << 31) /**< \brief (PIO_ESR) Edge Interrupt Selection. */ -/* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */ -#define PIO_LSR_P0 (0x1u << 0) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P1 (0x1u << 1) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P2 (0x1u << 2) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P3 (0x1u << 3) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P4 (0x1u << 4) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P5 (0x1u << 5) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P6 (0x1u << 6) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P7 (0x1u << 7) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P8 (0x1u << 8) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P9 (0x1u << 9) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P10 (0x1u << 10) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P11 (0x1u << 11) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P12 (0x1u << 12) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P13 (0x1u << 13) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P14 (0x1u << 14) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P15 (0x1u << 15) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P16 (0x1u << 16) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P17 (0x1u << 17) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P18 (0x1u << 18) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P19 (0x1u << 19) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P20 (0x1u << 20) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P21 (0x1u << 21) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P22 (0x1u << 22) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P23 (0x1u << 23) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P24 (0x1u << 24) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P25 (0x1u << 25) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P26 (0x1u << 26) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P27 (0x1u << 27) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P28 (0x1u << 28) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P29 (0x1u << 29) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P30 (0x1u << 30) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -#define PIO_LSR_P31 (0x1u << 31) /**< \brief (PIO_LSR) Level Interrupt Selection. */ -/* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */ -#define PIO_ELSR_P0 (0x1u << 0) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P1 (0x1u << 1) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P2 (0x1u << 2) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P3 (0x1u << 3) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P4 (0x1u << 4) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P5 (0x1u << 5) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P6 (0x1u << 6) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P7 (0x1u << 7) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P8 (0x1u << 8) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P9 (0x1u << 9) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P10 (0x1u << 10) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P11 (0x1u << 11) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P12 (0x1u << 12) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P13 (0x1u << 13) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P14 (0x1u << 14) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P15 (0x1u << 15) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P16 (0x1u << 16) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P17 (0x1u << 17) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P18 (0x1u << 18) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P19 (0x1u << 19) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P20 (0x1u << 20) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P21 (0x1u << 21) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P22 (0x1u << 22) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P23 (0x1u << 23) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P24 (0x1u << 24) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P25 (0x1u << 25) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P26 (0x1u << 26) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P27 (0x1u << 27) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P28 (0x1u << 28) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P29 (0x1u << 29) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P30 (0x1u << 30) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -#define PIO_ELSR_P31 (0x1u << 31) /**< \brief (PIO_ELSR) Edge/Level Interrupt source selection. */ -/* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */ -#define PIO_FELLSR_P0 (0x1u << 0) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P1 (0x1u << 1) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P2 (0x1u << 2) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P3 (0x1u << 3) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P4 (0x1u << 4) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P5 (0x1u << 5) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P6 (0x1u << 6) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P7 (0x1u << 7) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P8 (0x1u << 8) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P9 (0x1u << 9) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P10 (0x1u << 10) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P11 (0x1u << 11) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P12 (0x1u << 12) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P13 (0x1u << 13) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P14 (0x1u << 14) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P15 (0x1u << 15) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P16 (0x1u << 16) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P17 (0x1u << 17) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P18 (0x1u << 18) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P19 (0x1u << 19) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P20 (0x1u << 20) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P21 (0x1u << 21) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P22 (0x1u << 22) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P23 (0x1u << 23) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P24 (0x1u << 24) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P25 (0x1u << 25) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P26 (0x1u << 26) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P27 (0x1u << 27) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P28 (0x1u << 28) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P29 (0x1u << 29) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P30 (0x1u << 30) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -#define PIO_FELLSR_P31 (0x1u << 31) /**< \brief (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ -/* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */ -#define PIO_REHLSR_P0 (0x1u << 0) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P1 (0x1u << 1) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P2 (0x1u << 2) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P3 (0x1u << 3) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P4 (0x1u << 4) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P5 (0x1u << 5) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P6 (0x1u << 6) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P7 (0x1u << 7) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P8 (0x1u << 8) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P9 (0x1u << 9) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P10 (0x1u << 10) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P11 (0x1u << 11) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P12 (0x1u << 12) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P13 (0x1u << 13) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P14 (0x1u << 14) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P15 (0x1u << 15) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P16 (0x1u << 16) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P17 (0x1u << 17) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P18 (0x1u << 18) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P19 (0x1u << 19) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P20 (0x1u << 20) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P21 (0x1u << 21) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P22 (0x1u << 22) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P23 (0x1u << 23) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P24 (0x1u << 24) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P25 (0x1u << 25) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P26 (0x1u << 26) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P27 (0x1u << 27) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P28 (0x1u << 28) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P29 (0x1u << 29) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P30 (0x1u << 30) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -#define PIO_REHLSR_P31 (0x1u << 31) /**< \brief (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ -/* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */ -#define PIO_FRLHSR_P0 (0x1u << 0) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P1 (0x1u << 1) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P2 (0x1u << 2) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P3 (0x1u << 3) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P4 (0x1u << 4) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P5 (0x1u << 5) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P6 (0x1u << 6) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P7 (0x1u << 7) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P8 (0x1u << 8) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P9 (0x1u << 9) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P10 (0x1u << 10) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P11 (0x1u << 11) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P12 (0x1u << 12) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P13 (0x1u << 13) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P14 (0x1u << 14) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P15 (0x1u << 15) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P16 (0x1u << 16) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P17 (0x1u << 17) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P18 (0x1u << 18) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P19 (0x1u << 19) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P20 (0x1u << 20) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P21 (0x1u << 21) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P22 (0x1u << 22) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P23 (0x1u << 23) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P24 (0x1u << 24) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P25 (0x1u << 25) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P26 (0x1u << 26) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P27 (0x1u << 27) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P28 (0x1u << 28) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P29 (0x1u << 29) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P30 (0x1u << 30) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -#define PIO_FRLHSR_P31 (0x1u << 31) /**< \brief (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ -/* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */ -#define PIO_LOCKSR_P0 (0x1u << 0) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P1 (0x1u << 1) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P2 (0x1u << 2) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P3 (0x1u << 3) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P4 (0x1u << 4) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P5 (0x1u << 5) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P6 (0x1u << 6) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P7 (0x1u << 7) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P8 (0x1u << 8) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P9 (0x1u << 9) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P10 (0x1u << 10) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P11 (0x1u << 11) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P12 (0x1u << 12) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P13 (0x1u << 13) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P14 (0x1u << 14) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P15 (0x1u << 15) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P16 (0x1u << 16) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P17 (0x1u << 17) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P18 (0x1u << 18) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P19 (0x1u << 19) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P20 (0x1u << 20) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P21 (0x1u << 21) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P22 (0x1u << 22) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P23 (0x1u << 23) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P24 (0x1u << 24) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P25 (0x1u << 25) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P26 (0x1u << 26) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P27 (0x1u << 27) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P28 (0x1u << 28) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P29 (0x1u << 29) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P30 (0x1u << 30) /**< \brief (PIO_LOCKSR) Lock Status. */ -#define PIO_LOCKSR_P31 (0x1u << 31) /**< \brief (PIO_LOCKSR) Lock Status. */ -/* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PIO_WPMR_WPEN (0x1u << 0) /**< \brief (PIO_WPMR) Write Protect Enable */ -#define PIO_WPMR_WPKEY_Pos 8 -#define PIO_WPMR_WPKEY_Msk (0xffffffu << PIO_WPMR_WPKEY_Pos) /**< \brief (PIO_WPMR) Write Protect KEY */ -#define PIO_WPMR_WPKEY(value) ((PIO_WPMR_WPKEY_Msk & ((value) << PIO_WPMR_WPKEY_Pos))) -/* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */ -#define PIO_WPSR_WPVS (0x1u << 0) /**< \brief (PIO_WPSR) Write Protect Violation Status */ -#define PIO_WPSR_WPVSRC_Pos 8 -#define PIO_WPSR_WPVSRC_Msk (0xffffu << PIO_WPSR_WPVSRC_Pos) /**< \brief (PIO_WPSR) Write Protect Violation Source */ -/* -------- PIO_SCHMITT : (PIO Offset: 0x0100) Schmitt Trigger Register -------- */ -#define PIO_SCHMITT_SCHMITT0 (0x1u << 0) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT1 (0x1u << 1) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT2 (0x1u << 2) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT3 (0x1u << 3) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT4 (0x1u << 4) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT5 (0x1u << 5) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT6 (0x1u << 6) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT7 (0x1u << 7) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT8 (0x1u << 8) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT9 (0x1u << 9) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT10 (0x1u << 10) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT11 (0x1u << 11) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT12 (0x1u << 12) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT13 (0x1u << 13) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT14 (0x1u << 14) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT15 (0x1u << 15) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT16 (0x1u << 16) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT17 (0x1u << 17) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT18 (0x1u << 18) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT19 (0x1u << 19) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT20 (0x1u << 20) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT21 (0x1u << 21) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT22 (0x1u << 22) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT23 (0x1u << 23) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT24 (0x1u << 24) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT25 (0x1u << 25) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT26 (0x1u << 26) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT27 (0x1u << 27) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT28 (0x1u << 28) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT29 (0x1u << 29) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT30 (0x1u << 30) /**< \brief (PIO_SCHMITT) */ -#define PIO_SCHMITT_SCHMITT31 (0x1u << 31) /**< \brief (PIO_SCHMITT) */ -/* -------- PIO_PCMR : (PIO Offset: 0x150) Parallel Capture Mode Register -------- */ -#define PIO_PCMR_PCEN (0x1u << 0) /**< \brief (PIO_PCMR) Parallel Capture Mode Enable */ -#define PIO_PCMR_DSIZE_Pos 4 -#define PIO_PCMR_DSIZE_Msk (0x3u << PIO_PCMR_DSIZE_Pos) /**< \brief (PIO_PCMR) Parallel Capture Mode Data Size */ -#define PIO_PCMR_DSIZE(value) ((PIO_PCMR_DSIZE_Msk & ((value) << PIO_PCMR_DSIZE_Pos))) -#define PIO_PCMR_ALWYS (0x1u << 9) /**< \brief (PIO_PCMR) Parallel Capture Mode Always Sampling */ -#define PIO_PCMR_HALFS (0x1u << 10) /**< \brief (PIO_PCMR) Parallel Capture Mode Half Sampling */ -#define PIO_PCMR_FRSTS (0x1u << 11) /**< \brief (PIO_PCMR) Parallel Capture Mode First Sample */ -/* -------- PIO_PCIER : (PIO Offset: 0x154) Parallel Capture Interrupt Enable Register -------- */ -#define PIO_PCIER_DRDY (0x1u << 0) /**< \brief (PIO_PCIER) Parallel Capture Mode Data Ready Interrupt Enable */ -#define PIO_PCIER_OVRE (0x1u << 1) /**< \brief (PIO_PCIER) Parallel Capture Mode Overrun Error Interrupt Enable */ -#define PIO_PCIER_ENDRX (0x1u << 2) /**< \brief (PIO_PCIER) End of Reception Transfer Interrupt Enable */ -#define PIO_PCIER_RXBUFF (0x1u << 3) /**< \brief (PIO_PCIER) Reception Buffer Full Interrupt Enable */ -/* -------- PIO_PCIDR : (PIO Offset: 0x158) Parallel Capture Interrupt Disable Register -------- */ -#define PIO_PCIDR_DRDY (0x1u << 0) /**< \brief (PIO_PCIDR) Parallel Capture Mode Data Ready Interrupt Disable */ -#define PIO_PCIDR_OVRE (0x1u << 1) /**< \brief (PIO_PCIDR) Parallel Capture Mode Overrun Error Interrupt Disable */ -#define PIO_PCIDR_ENDRX (0x1u << 2) /**< \brief (PIO_PCIDR) End of Reception Transfer Interrupt Disable */ -#define PIO_PCIDR_RXBUFF (0x1u << 3) /**< \brief (PIO_PCIDR) Reception Buffer Full Interrupt Disable */ -/* -------- PIO_PCIMR : (PIO Offset: 0x15C) Parallel Capture Interrupt Mask Register -------- */ -#define PIO_PCIMR_DRDY (0x1u << 0) /**< \brief (PIO_PCIMR) Parallel Capture Mode Data Ready Interrupt Mask */ -#define PIO_PCIMR_OVRE (0x1u << 1) /**< \brief (PIO_PCIMR) Parallel Capture Mode Overrun Error Interrupt Mask */ -#define PIO_PCIMR_ENDRX (0x1u << 2) /**< \brief (PIO_PCIMR) End of Reception Transfer Interrupt Mask */ -#define PIO_PCIMR_RXBUFF (0x1u << 3) /**< \brief (PIO_PCIMR) Reception Buffer Full Interrupt Mask */ -/* -------- PIO_PCISR : (PIO Offset: 0x160) Parallel Capture Interrupt Status Register -------- */ -#define PIO_PCISR_DRDY (0x1u << 0) /**< \brief (PIO_PCISR) Parallel Capture Mode Data Ready */ -#define PIO_PCISR_OVRE (0x1u << 1) /**< \brief (PIO_PCISR) Parallel Capture Mode Overrun Error. */ -#define PIO_PCISR_ENDRX (0x1u << 2) /**< \brief (PIO_PCISR) End of Reception Transfer. */ -#define PIO_PCISR_RXBUFF (0x1u << 3) /**< \brief (PIO_PCISR) Reception Buffer Full */ -/* -------- PIO_PCRHR : (PIO Offset: 0x164) Parallel Capture Reception Holding Register -------- */ -#define PIO_PCRHR_RDATA_Pos 0 -#define PIO_PCRHR_RDATA_Msk (0xffffffffu << PIO_PCRHR_RDATA_Pos) /**< \brief (PIO_PCRHR) Parallel Capture Mode Reception Data. */ -/* -------- PIO_RPR : (PIO Offset: 0x168) Receive Pointer Register -------- */ -#define PIO_RPR_RXPTR_Pos 0 -#define PIO_RPR_RXPTR_Msk (0xffffffffu << PIO_RPR_RXPTR_Pos) /**< \brief (PIO_RPR) Receive Pointer Register */ -#define PIO_RPR_RXPTR(value) ((PIO_RPR_RXPTR_Msk & ((value) << PIO_RPR_RXPTR_Pos))) -/* -------- PIO_RCR : (PIO Offset: 0x16C) Receive Counter Register -------- */ -#define PIO_RCR_RXCTR_Pos 0 -#define PIO_RCR_RXCTR_Msk (0xffffu << PIO_RCR_RXCTR_Pos) /**< \brief (PIO_RCR) Receive Counter Register */ -#define PIO_RCR_RXCTR(value) ((PIO_RCR_RXCTR_Msk & ((value) << PIO_RCR_RXCTR_Pos))) -/* -------- PIO_TPR : (PIO Offset: 0x170) Transmit Pointer Register -------- */ -#define PIO_TPR_TXPTR_Pos 0 -#define PIO_TPR_TXPTR_Msk (0xffffffffu << PIO_TPR_TXPTR_Pos) /**< \brief (PIO_TPR) Transmit Counter Register */ -#define PIO_TPR_TXPTR(value) ((PIO_TPR_TXPTR_Msk & ((value) << PIO_TPR_TXPTR_Pos))) -/* -------- PIO_TCR : (PIO Offset: 0x174) Transmit Counter Register -------- */ -#define PIO_TCR_TXCTR_Pos 0 -#define PIO_TCR_TXCTR_Msk (0xffffu << PIO_TCR_TXCTR_Pos) /**< \brief (PIO_TCR) Transmit Counter Register */ -#define PIO_TCR_TXCTR(value) ((PIO_TCR_TXCTR_Msk & ((value) << PIO_TCR_TXCTR_Pos))) -/* -------- PIO_RNPR : (PIO Offset: 0x178) Receive Next Pointer Register -------- */ -#define PIO_RNPR_RXNPTR_Pos 0 -#define PIO_RNPR_RXNPTR_Msk (0xffffffffu << PIO_RNPR_RXNPTR_Pos) /**< \brief (PIO_RNPR) Receive Next Pointer */ -#define PIO_RNPR_RXNPTR(value) ((PIO_RNPR_RXNPTR_Msk & ((value) << PIO_RNPR_RXNPTR_Pos))) -/* -------- PIO_RNCR : (PIO Offset: 0x17C) Receive Next Counter Register -------- */ -#define PIO_RNCR_RXNCTR_Pos 0 -#define PIO_RNCR_RXNCTR_Msk (0xffffu << PIO_RNCR_RXNCTR_Pos) /**< \brief (PIO_RNCR) Receive Next Counter */ -#define PIO_RNCR_RXNCTR(value) ((PIO_RNCR_RXNCTR_Msk & ((value) << PIO_RNCR_RXNCTR_Pos))) -/* -------- PIO_TNPR : (PIO Offset: 0x180) Transmit Next Pointer Register -------- */ -#define PIO_TNPR_TXNPTR_Pos 0 -#define PIO_TNPR_TXNPTR_Msk (0xffffffffu << PIO_TNPR_TXNPTR_Pos) /**< \brief (PIO_TNPR) Transmit Next Pointer */ -#define PIO_TNPR_TXNPTR(value) ((PIO_TNPR_TXNPTR_Msk & ((value) << PIO_TNPR_TXNPTR_Pos))) -/* -------- PIO_TNCR : (PIO Offset: 0x184) Transmit Next Counter Register -------- */ -#define PIO_TNCR_TXNCTR_Pos 0 -#define PIO_TNCR_TXNCTR_Msk (0xffffu << PIO_TNCR_TXNCTR_Pos) /**< \brief (PIO_TNCR) Transmit Counter Next */ -#define PIO_TNCR_TXNCTR(value) ((PIO_TNCR_TXNCTR_Msk & ((value) << PIO_TNCR_TXNCTR_Pos))) -/* -------- PIO_PTCR : (PIO Offset: 0x188) Transfer Control Register -------- */ -#define PIO_PTCR_RXTEN (0x1u << 0) /**< \brief (PIO_PTCR) Receiver Transfer Enable */ -#define PIO_PTCR_RXTDIS (0x1u << 1) /**< \brief (PIO_PTCR) Receiver Transfer Disable */ -#define PIO_PTCR_TXTEN (0x1u << 8) /**< \brief (PIO_PTCR) Transmitter Transfer Enable */ -#define PIO_PTCR_TXTDIS (0x1u << 9) /**< \brief (PIO_PTCR) Transmitter Transfer Disable */ -/* -------- PIO_PTSR : (PIO Offset: 0x18C) Transfer Status Register -------- */ -#define PIO_PTSR_RXTEN (0x1u << 0) /**< \brief (PIO_PTSR) Receiver Transfer Enable */ -#define PIO_PTSR_TXTEN (0x1u << 8) /**< \brief (PIO_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Power Management Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_PMC Power Management Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Pmc hardware registers */ -typedef struct { - WoReg PMC_SCER; /**< \brief (Pmc Offset: 0x0000) System Clock Enable Register */ - WoReg PMC_SCDR; /**< \brief (Pmc Offset: 0x0004) System Clock Disable Register */ - RoReg PMC_SCSR; /**< \brief (Pmc Offset: 0x0008) System Clock Status Register */ - RwReg Reserved1[1]; - WoReg PMC_PCER0; /**< \brief (Pmc Offset: 0x0010) Peripheral Clock Enable Register 0 */ - WoReg PMC_PCDR0; /**< \brief (Pmc Offset: 0x0014) Peripheral Clock Disable Register 0 */ - RoReg PMC_PCSR0; /**< \brief (Pmc Offset: 0x0018) Peripheral Clock Status Register 0 */ - RwReg Reserved2[1]; - RwReg CKGR_MOR; /**< \brief (Pmc Offset: 0x0020) Main Oscillator Register */ - RoReg CKGR_MCFR; /**< \brief (Pmc Offset: 0x0024) Main Clock Frequency Register */ - RwReg CKGR_PLLAR; /**< \brief (Pmc Offset: 0x0028) PLLA Register */ - RwReg CKGR_PLLBR; /**< \brief (Pmc Offset: 0x002C) PLLB Register */ - RwReg PMC_MCKR; /**< \brief (Pmc Offset: 0x0030) Master Clock Register */ - RwReg Reserved3[1]; - RwReg PMC_USB; /**< \brief (Pmc Offset: 0x0038) USB Clock Register */ - RwReg Reserved4[1]; - RwReg PMC_PCK[3]; /**< \brief (Pmc Offset: 0x0040) Programmable Clock 0 Register */ - RwReg Reserved5[5]; - WoReg PMC_IER; /**< \brief (Pmc Offset: 0x0060) Interrupt Enable Register */ - WoReg PMC_IDR; /**< \brief (Pmc Offset: 0x0064) Interrupt Disable Register */ - RoReg PMC_SR; /**< \brief (Pmc Offset: 0x0068) Status Register */ - RoReg PMC_IMR; /**< \brief (Pmc Offset: 0x006C) Interrupt Mask Register */ - RwReg PMC_FSMR; /**< \brief (Pmc Offset: 0x0070) Fast Startup Mode Register */ - RwReg PMC_FSPR; /**< \brief (Pmc Offset: 0x0074) Fast Startup Polarity Register */ - WoReg PMC_FOCR; /**< \brief (Pmc Offset: 0x0078) Fault Output Clear Register */ - RwReg Reserved6[26]; - RwReg PMC_WPMR; /**< \brief (Pmc Offset: 0x00E4) Write Protect Mode Register */ - RoReg PMC_WPSR; /**< \brief (Pmc Offset: 0x00E8) Write Protect Status Register */ - RwReg Reserved7[5]; - WoReg PMC_PCER1; /**< \brief (Pmc Offset: 0x0100) Peripheral Clock Enable Register 1 */ - WoReg PMC_PCDR1; /**< \brief (Pmc Offset: 0x0104) Peripheral Clock Disable Register 1 */ - RoReg PMC_PCSR1; /**< \brief (Pmc Offset: 0x0108) Peripheral Clock Status Register 1 */ - RwReg Reserved8[1]; - RwReg PMC_OCR; /**< \brief (Pmc Offset: 0x0110) Oscillator Calibration Register */ -} Pmc; -#endif /* __ASSEMBLY__ */ -/* -------- PMC_SCER : (PMC Offset: 0x0000) System Clock Enable Register -------- */ -#define PMC_SCER_UDP (0x1u << 7) /**< \brief (PMC_SCER) USB Device Port Clock Enable */ -#define PMC_SCER_PCK0 (0x1u << 8) /**< \brief (PMC_SCER) Programmable Clock 0 Output Enable */ -#define PMC_SCER_PCK1 (0x1u << 9) /**< \brief (PMC_SCER) Programmable Clock 1 Output Enable */ -#define PMC_SCER_PCK2 (0x1u << 10) /**< \brief (PMC_SCER) Programmable Clock 2 Output Enable */ -/* -------- PMC_SCDR : (PMC Offset: 0x0004) System Clock Disable Register -------- */ -#define PMC_SCDR_UDP (0x1u << 7) /**< \brief (PMC_SCDR) USB Device Port Clock Disable */ -#define PMC_SCDR_PCK0 (0x1u << 8) /**< \brief (PMC_SCDR) Programmable Clock 0 Output Disable */ -#define PMC_SCDR_PCK1 (0x1u << 9) /**< \brief (PMC_SCDR) Programmable Clock 1 Output Disable */ -#define PMC_SCDR_PCK2 (0x1u << 10) /**< \brief (PMC_SCDR) Programmable Clock 2 Output Disable */ -/* -------- PMC_SCSR : (PMC Offset: 0x0008) System Clock Status Register -------- */ -#define PMC_SCSR_UDP (0x1u << 7) /**< \brief (PMC_SCSR) USB Device Port Clock Status */ -#define PMC_SCSR_PCK0 (0x1u << 8) /**< \brief (PMC_SCSR) Programmable Clock 0 Output Status */ -#define PMC_SCSR_PCK1 (0x1u << 9) /**< \brief (PMC_SCSR) Programmable Clock 1 Output Status */ -#define PMC_SCSR_PCK2 (0x1u << 10) /**< \brief (PMC_SCSR) Programmable Clock 2 Output Status */ -/* -------- PMC_PCER0 : (PMC Offset: 0x0010) Peripheral Clock Enable Register 0 -------- */ -#define PMC_PCER0_PID2 (0x1u << 2) /**< \brief (PMC_PCER0) Peripheral Clock 2 Enable */ -#define PMC_PCER0_PID3 (0x1u << 3) /**< \brief (PMC_PCER0) Peripheral Clock 3 Enable */ -#define PMC_PCER0_PID4 (0x1u << 4) /**< \brief (PMC_PCER0) Peripheral Clock 4 Enable */ -#define PMC_PCER0_PID5 (0x1u << 5) /**< \brief (PMC_PCER0) Peripheral Clock 5 Enable */ -#define PMC_PCER0_PID6 (0x1u << 6) /**< \brief (PMC_PCER0) Peripheral Clock 6 Enable */ -#define PMC_PCER0_PID7 (0x1u << 7) /**< \brief (PMC_PCER0) Peripheral Clock 7 Enable */ -#define PMC_PCER0_PID8 (0x1u << 8) /**< \brief (PMC_PCER0) Peripheral Clock 8 Enable */ -#define PMC_PCER0_PID9 (0x1u << 9) /**< \brief (PMC_PCER0) Peripheral Clock 9 Enable */ -#define PMC_PCER0_PID10 (0x1u << 10) /**< \brief (PMC_PCER0) Peripheral Clock 10 Enable */ -#define PMC_PCER0_PID11 (0x1u << 11) /**< \brief (PMC_PCER0) Peripheral Clock 11 Enable */ -#define PMC_PCER0_PID12 (0x1u << 12) /**< \brief (PMC_PCER0) Peripheral Clock 12 Enable */ -#define PMC_PCER0_PID13 (0x1u << 13) /**< \brief (PMC_PCER0) Peripheral Clock 13 Enable */ -#define PMC_PCER0_PID14 (0x1u << 14) /**< \brief (PMC_PCER0) Peripheral Clock 14 Enable */ -#define PMC_PCER0_PID15 (0x1u << 15) /**< \brief (PMC_PCER0) Peripheral Clock 15 Enable */ -#define PMC_PCER0_PID16 (0x1u << 16) /**< \brief (PMC_PCER0) Peripheral Clock 16 Enable */ -#define PMC_PCER0_PID17 (0x1u << 17) /**< \brief (PMC_PCER0) Peripheral Clock 17 Enable */ -#define PMC_PCER0_PID18 (0x1u << 18) /**< \brief (PMC_PCER0) Peripheral Clock 18 Enable */ -#define PMC_PCER0_PID19 (0x1u << 19) /**< \brief (PMC_PCER0) Peripheral Clock 19 Enable */ -#define PMC_PCER0_PID20 (0x1u << 20) /**< \brief (PMC_PCER0) Peripheral Clock 20 Enable */ -#define PMC_PCER0_PID21 (0x1u << 21) /**< \brief (PMC_PCER0) Peripheral Clock 21 Enable */ -#define PMC_PCER0_PID22 (0x1u << 22) /**< \brief (PMC_PCER0) Peripheral Clock 22 Enable */ -#define PMC_PCER0_PID23 (0x1u << 23) /**< \brief (PMC_PCER0) Peripheral Clock 23 Enable */ -#define PMC_PCER0_PID24 (0x1u << 24) /**< \brief (PMC_PCER0) Peripheral Clock 24 Enable */ -#define PMC_PCER0_PID25 (0x1u << 25) /**< \brief (PMC_PCER0) Peripheral Clock 25 Enable */ -#define PMC_PCER0_PID26 (0x1u << 26) /**< \brief (PMC_PCER0) Peripheral Clock 26 Enable */ -#define PMC_PCER0_PID27 (0x1u << 27) /**< \brief (PMC_PCER0) Peripheral Clock 27 Enable */ -#define PMC_PCER0_PID28 (0x1u << 28) /**< \brief (PMC_PCER0) Peripheral Clock 28 Enable */ -#define PMC_PCER0_PID29 (0x1u << 29) /**< \brief (PMC_PCER0) Peripheral Clock 29 Enable */ -#define PMC_PCER0_PID30 (0x1u << 30) /**< \brief (PMC_PCER0) Peripheral Clock 30 Enable */ -#define PMC_PCER0_PID31 (0x1u << 31) /**< \brief (PMC_PCER0) Peripheral Clock 31 Enable */ -/* -------- PMC_PCDR0 : (PMC Offset: 0x0014) Peripheral Clock Disable Register 0 -------- */ -#define PMC_PCDR0_PID2 (0x1u << 2) /**< \brief (PMC_PCDR0) Peripheral Clock 2 Disable */ -#define PMC_PCDR0_PID3 (0x1u << 3) /**< \brief (PMC_PCDR0) Peripheral Clock 3 Disable */ -#define PMC_PCDR0_PID4 (0x1u << 4) /**< \brief (PMC_PCDR0) Peripheral Clock 4 Disable */ -#define PMC_PCDR0_PID5 (0x1u << 5) /**< \brief (PMC_PCDR0) Peripheral Clock 5 Disable */ -#define PMC_PCDR0_PID6 (0x1u << 6) /**< \brief (PMC_PCDR0) Peripheral Clock 6 Disable */ -#define PMC_PCDR0_PID7 (0x1u << 7) /**< \brief (PMC_PCDR0) Peripheral Clock 7 Disable */ -#define PMC_PCDR0_PID8 (0x1u << 8) /**< \brief (PMC_PCDR0) Peripheral Clock 8 Disable */ -#define PMC_PCDR0_PID9 (0x1u << 9) /**< \brief (PMC_PCDR0) Peripheral Clock 9 Disable */ -#define PMC_PCDR0_PID10 (0x1u << 10) /**< \brief (PMC_PCDR0) Peripheral Clock 10 Disable */ -#define PMC_PCDR0_PID11 (0x1u << 11) /**< \brief (PMC_PCDR0) Peripheral Clock 11 Disable */ -#define PMC_PCDR0_PID12 (0x1u << 12) /**< \brief (PMC_PCDR0) Peripheral Clock 12 Disable */ -#define PMC_PCDR0_PID13 (0x1u << 13) /**< \brief (PMC_PCDR0) Peripheral Clock 13 Disable */ -#define PMC_PCDR0_PID14 (0x1u << 14) /**< \brief (PMC_PCDR0) Peripheral Clock 14 Disable */ -#define PMC_PCDR0_PID15 (0x1u << 15) /**< \brief (PMC_PCDR0) Peripheral Clock 15 Disable */ -#define PMC_PCDR0_PID16 (0x1u << 16) /**< \brief (PMC_PCDR0) Peripheral Clock 16 Disable */ -#define PMC_PCDR0_PID17 (0x1u << 17) /**< \brief (PMC_PCDR0) Peripheral Clock 17 Disable */ -#define PMC_PCDR0_PID18 (0x1u << 18) /**< \brief (PMC_PCDR0) Peripheral Clock 18 Disable */ -#define PMC_PCDR0_PID19 (0x1u << 19) /**< \brief (PMC_PCDR0) Peripheral Clock 19 Disable */ -#define PMC_PCDR0_PID20 (0x1u << 20) /**< \brief (PMC_PCDR0) Peripheral Clock 20 Disable */ -#define PMC_PCDR0_PID21 (0x1u << 21) /**< \brief (PMC_PCDR0) Peripheral Clock 21 Disable */ -#define PMC_PCDR0_PID22 (0x1u << 22) /**< \brief (PMC_PCDR0) Peripheral Clock 22 Disable */ -#define PMC_PCDR0_PID23 (0x1u << 23) /**< \brief (PMC_PCDR0) Peripheral Clock 23 Disable */ -#define PMC_PCDR0_PID24 (0x1u << 24) /**< \brief (PMC_PCDR0) Peripheral Clock 24 Disable */ -#define PMC_PCDR0_PID25 (0x1u << 25) /**< \brief (PMC_PCDR0) Peripheral Clock 25 Disable */ -#define PMC_PCDR0_PID26 (0x1u << 26) /**< \brief (PMC_PCDR0) Peripheral Clock 26 Disable */ -#define PMC_PCDR0_PID27 (0x1u << 27) /**< \brief (PMC_PCDR0) Peripheral Clock 27 Disable */ -#define PMC_PCDR0_PID28 (0x1u << 28) /**< \brief (PMC_PCDR0) Peripheral Clock 28 Disable */ -#define PMC_PCDR0_PID29 (0x1u << 29) /**< \brief (PMC_PCDR0) Peripheral Clock 29 Disable */ -#define PMC_PCDR0_PID30 (0x1u << 30) /**< \brief (PMC_PCDR0) Peripheral Clock 30 Disable */ -#define PMC_PCDR0_PID31 (0x1u << 31) /**< \brief (PMC_PCDR0) Peripheral Clock 31 Disable */ -/* -------- PMC_PCSR0 : (PMC Offset: 0x0018) Peripheral Clock Status Register 0 -------- */ -#define PMC_PCSR0_PID2 (0x1u << 2) /**< \brief (PMC_PCSR0) Peripheral Clock 2 Status */ -#define PMC_PCSR0_PID3 (0x1u << 3) /**< \brief (PMC_PCSR0) Peripheral Clock 3 Status */ -#define PMC_PCSR0_PID4 (0x1u << 4) /**< \brief (PMC_PCSR0) Peripheral Clock 4 Status */ -#define PMC_PCSR0_PID5 (0x1u << 5) /**< \brief (PMC_PCSR0) Peripheral Clock 5 Status */ -#define PMC_PCSR0_PID6 (0x1u << 6) /**< \brief (PMC_PCSR0) Peripheral Clock 6 Status */ -#define PMC_PCSR0_PID7 (0x1u << 7) /**< \brief (PMC_PCSR0) Peripheral Clock 7 Status */ -#define PMC_PCSR0_PID8 (0x1u << 8) /**< \brief (PMC_PCSR0) Peripheral Clock 8 Status */ -#define PMC_PCSR0_PID9 (0x1u << 9) /**< \brief (PMC_PCSR0) Peripheral Clock 9 Status */ -#define PMC_PCSR0_PID10 (0x1u << 10) /**< \brief (PMC_PCSR0) Peripheral Clock 10 Status */ -#define PMC_PCSR0_PID11 (0x1u << 11) /**< \brief (PMC_PCSR0) Peripheral Clock 11 Status */ -#define PMC_PCSR0_PID12 (0x1u << 12) /**< \brief (PMC_PCSR0) Peripheral Clock 12 Status */ -#define PMC_PCSR0_PID13 (0x1u << 13) /**< \brief (PMC_PCSR0) Peripheral Clock 13 Status */ -#define PMC_PCSR0_PID14 (0x1u << 14) /**< \brief (PMC_PCSR0) Peripheral Clock 14 Status */ -#define PMC_PCSR0_PID15 (0x1u << 15) /**< \brief (PMC_PCSR0) Peripheral Clock 15 Status */ -#define PMC_PCSR0_PID16 (0x1u << 16) /**< \brief (PMC_PCSR0) Peripheral Clock 16 Status */ -#define PMC_PCSR0_PID17 (0x1u << 17) /**< \brief (PMC_PCSR0) Peripheral Clock 17 Status */ -#define PMC_PCSR0_PID18 (0x1u << 18) /**< \brief (PMC_PCSR0) Peripheral Clock 18 Status */ -#define PMC_PCSR0_PID19 (0x1u << 19) /**< \brief (PMC_PCSR0) Peripheral Clock 19 Status */ -#define PMC_PCSR0_PID20 (0x1u << 20) /**< \brief (PMC_PCSR0) Peripheral Clock 20 Status */ -#define PMC_PCSR0_PID21 (0x1u << 21) /**< \brief (PMC_PCSR0) Peripheral Clock 21 Status */ -#define PMC_PCSR0_PID22 (0x1u << 22) /**< \brief (PMC_PCSR0) Peripheral Clock 22 Status */ -#define PMC_PCSR0_PID23 (0x1u << 23) /**< \brief (PMC_PCSR0) Peripheral Clock 23 Status */ -#define PMC_PCSR0_PID24 (0x1u << 24) /**< \brief (PMC_PCSR0) Peripheral Clock 24 Status */ -#define PMC_PCSR0_PID25 (0x1u << 25) /**< \brief (PMC_PCSR0) Peripheral Clock 25 Status */ -#define PMC_PCSR0_PID26 (0x1u << 26) /**< \brief (PMC_PCSR0) Peripheral Clock 26 Status */ -#define PMC_PCSR0_PID27 (0x1u << 27) /**< \brief (PMC_PCSR0) Peripheral Clock 27 Status */ -#define PMC_PCSR0_PID28 (0x1u << 28) /**< \brief (PMC_PCSR0) Peripheral Clock 28 Status */ -#define PMC_PCSR0_PID29 (0x1u << 29) /**< \brief (PMC_PCSR0) Peripheral Clock 29 Status */ -#define PMC_PCSR0_PID30 (0x1u << 30) /**< \brief (PMC_PCSR0) Peripheral Clock 30 Status */ -#define PMC_PCSR0_PID31 (0x1u << 31) /**< \brief (PMC_PCSR0) Peripheral Clock 31 Status */ -/* -------- CKGR_MOR : (PMC Offset: 0x0020) Main Oscillator Register -------- */ -#define CKGR_MOR_MOSCXTEN (0x1u << 0) /**< \brief (CKGR_MOR) Main Crystal Oscillator Enable */ -#define CKGR_MOR_MOSCXTBY (0x1u << 1) /**< \brief (CKGR_MOR) Main Crystal Oscillator Bypass */ -#define CKGR_MOR_WAITMODE (0x1u << 2) /**< \brief (CKGR_MOR) Wait Mode Command */ -#define CKGR_MOR_MOSCRCEN (0x1u << 3) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Enable */ -#define CKGR_MOR_MOSCRCF_Pos 4 -#define CKGR_MOR_MOSCRCF_Msk (0x7u << CKGR_MOR_MOSCRCF_Pos) /**< \brief (CKGR_MOR) Main On-Chip RC Oscillator Frequency Selection */ -#define CKGR_MOR_MOSCRCF_4MHZ (0x0u << 4) /**< \brief (CKGR_MOR) Fast RC Oscillator Frequency is at 4 MHz */ -#define CKGR_MOR_MOSCRCF_8MHZ (0x1u << 4) /**< \brief (CKGR_MOR) Fast RC Oscillator Frequency is at 8 MHz */ -#define CKGR_MOR_MOSCRCF_12MHZ (0x2u << 4) /**< \brief (CKGR_MOR) Fast RC Oscillator Frequency is at 12 MHz */ -#define CKGR_MOR_MOSCXTST_Pos 8 -#define CKGR_MOR_MOSCXTST_Msk (0xffu << CKGR_MOR_MOSCXTST_Pos) /**< \brief (CKGR_MOR) Main Crystal Oscillator Start-up Time */ -#define CKGR_MOR_MOSCXTST(value) ((CKGR_MOR_MOSCXTST_Msk & ((value) << CKGR_MOR_MOSCXTST_Pos))) -#define CKGR_MOR_KEY_Pos 16 -#define CKGR_MOR_KEY_Msk (0xffu << CKGR_MOR_KEY_Pos) /**< \brief (CKGR_MOR) Password */ -#define CKGR_MOR_KEY(value) ((CKGR_MOR_KEY_Msk & ((value) << CKGR_MOR_KEY_Pos))) -#define CKGR_MOR_MOSCSEL (0x1u << 24) /**< \brief (CKGR_MOR) Main Oscillator Selection */ -#define CKGR_MOR_CFDEN (0x1u << 25) /**< \brief (CKGR_MOR) Clock Failure Detector Enable */ -/* -------- CKGR_MCFR : (PMC Offset: 0x0024) Main Clock Frequency Register -------- */ -#define CKGR_MCFR_MAINF_Pos 0 -#define CKGR_MCFR_MAINF_Msk (0xffffu << CKGR_MCFR_MAINF_Pos) /**< \brief (CKGR_MCFR) Main Clock Frequency */ -#define CKGR_MCFR_MAINFRDY (0x1u << 16) /**< \brief (CKGR_MCFR) Main Clock Ready */ -/* -------- CKGR_PLLAR : (PMC Offset: 0x0028) PLLA Register -------- */ -#define CKGR_PLLAR_DIVA_Pos 0 -#define CKGR_PLLAR_DIVA_Msk (0xffu << CKGR_PLLAR_DIVA_Pos) /**< \brief (CKGR_PLLAR) Divider */ -#define CKGR_PLLAR_DIVA(value) ((CKGR_PLLAR_DIVA_Msk & ((value) << CKGR_PLLAR_DIVA_Pos))) -#define CKGR_PLLAR_PLLACOUNT_Pos 8 -#define CKGR_PLLAR_PLLACOUNT_Msk (0x3fu << CKGR_PLLAR_PLLACOUNT_Pos) /**< \brief (CKGR_PLLAR) PLLA Counter */ -#define CKGR_PLLAR_PLLACOUNT(value) ((CKGR_PLLAR_PLLACOUNT_Msk & ((value) << CKGR_PLLAR_PLLACOUNT_Pos))) -#define CKGR_PLLAR_MULA_Pos 16 -#define CKGR_PLLAR_MULA_Msk (0x7ffu << CKGR_PLLAR_MULA_Pos) /**< \brief (CKGR_PLLAR) PLLA Multiplier */ -#define CKGR_PLLAR_MULA(value) ((CKGR_PLLAR_MULA_Msk & ((value) << CKGR_PLLAR_MULA_Pos))) -#define CKGR_PLLAR_STUCKTO1 (0x1u << 29) /**< \brief (CKGR_PLLAR) */ -/* -------- CKGR_PLLBR : (PMC Offset: 0x002C) PLLB Register -------- */ -#define CKGR_PLLBR_DIVB_Pos 0 -#define CKGR_PLLBR_DIVB_Msk (0xffu << CKGR_PLLBR_DIVB_Pos) /**< \brief (CKGR_PLLBR) Divider */ -#define CKGR_PLLBR_DIVB(value) ((CKGR_PLLBR_DIVB_Msk & ((value) << CKGR_PLLBR_DIVB_Pos))) -#define CKGR_PLLBR_PLLBCOUNT_Pos 8 -#define CKGR_PLLBR_PLLBCOUNT_Msk (0x3fu << CKGR_PLLBR_PLLBCOUNT_Pos) /**< \brief (CKGR_PLLBR) PLLB Counter */ -#define CKGR_PLLBR_PLLBCOUNT(value) ((CKGR_PLLBR_PLLBCOUNT_Msk & ((value) << CKGR_PLLBR_PLLBCOUNT_Pos))) -#define CKGR_PLLBR_MULB_Pos 16 -#define CKGR_PLLBR_MULB_Msk (0x7ffu << CKGR_PLLBR_MULB_Pos) /**< \brief (CKGR_PLLBR) PLLB Multiplier */ -#define CKGR_PLLBR_MULB(value) ((CKGR_PLLBR_MULB_Msk & ((value) << CKGR_PLLBR_MULB_Pos))) -/* -------- PMC_MCKR : (PMC Offset: 0x0030) Master Clock Register -------- */ -#define PMC_MCKR_CSS_Pos 0 -#define PMC_MCKR_CSS_Msk (0x3u << PMC_MCKR_CSS_Pos) /**< \brief (PMC_MCKR) Master Clock Source Selection */ -#define PMC_MCKR_CSS_SLOW_CLK (0x0u << 0) /**< \brief (PMC_MCKR) Slow Clock is selected */ -#define PMC_MCKR_CSS_MAIN_CLK (0x1u << 0) /**< \brief (PMC_MCKR) Main Clock is selected */ -#define PMC_MCKR_CSS_PLLA_CLK (0x2u << 0) /**< \brief (PMC_MCKR) PLLA Clock is selected */ -#define PMC_MCKR_CSS_PLLB_CLK (0x3u << 0) /**< \brief (PMC_MCKR) PLLB Clock is selected */ -#define PMC_MCKR_PRES_Pos 4 -#define PMC_MCKR_PRES_Msk (0x7u << PMC_MCKR_PRES_Pos) /**< \brief (PMC_MCKR) Processor Clock Prescaler */ -#define PMC_MCKR_PRES_CLK (0x0u << 4) /**< \brief (PMC_MCKR) Selected clock */ -#define PMC_MCKR_PRES_CLK_2 (0x1u << 4) /**< \brief (PMC_MCKR) Selected clock divided by 2 */ -#define PMC_MCKR_PRES_CLK_4 (0x2u << 4) /**< \brief (PMC_MCKR) Selected clock divided by 4 */ -#define PMC_MCKR_PRES_CLK_8 (0x3u << 4) /**< \brief (PMC_MCKR) Selected clock divided by 8 */ -#define PMC_MCKR_PRES_CLK_16 (0x4u << 4) /**< \brief (PMC_MCKR) Selected clock divided by 16 */ -#define PMC_MCKR_PRES_CLK_32 (0x5u << 4) /**< \brief (PMC_MCKR) Selected clock divided by 32 */ -#define PMC_MCKR_PRES_CLK_64 (0x6u << 4) /**< \brief (PMC_MCKR) Selected clock divided by 64 */ -#define PMC_MCKR_PRES_CLK_3 (0x7u << 4) /**< \brief (PMC_MCKR) Selected clock divided by 3 */ -#define PMC_MCKR_PLLADIV2 (0x1u << 12) /**< \brief (PMC_MCKR) PLLA Divisor by 2 */ -#define PMC_MCKR_PLLBDIV2 (0x1u << 13) /**< \brief (PMC_MCKR) PLLB Divisor by 2 */ -/* -------- PMC_USB : (PMC Offset: 0x0038) USB Clock Register -------- */ -#define PMC_USB_USBS (0x1u << 0) /**< \brief (PMC_USB) USB Input Clock Selection */ -#define PMC_USB_USBDIV_Pos 8 -#define PMC_USB_USBDIV_Msk (0xfu << PMC_USB_USBDIV_Pos) /**< \brief (PMC_USB) Divider for USB Clock. */ -#define PMC_USB_USBDIV(value) ((PMC_USB_USBDIV_Msk & ((value) << PMC_USB_USBDIV_Pos))) -/* -------- PMC_PCK[3] : (PMC Offset: 0x0040) Programmable Clock 0 Register -------- */ -#define PMC_PCK_CSS_Pos 0 -#define PMC_PCK_CSS_Msk (0x7u << PMC_PCK_CSS_Pos) /**< \brief (PMC_PCK[3]) Master Clock Source Selection */ -#define PMC_PCK_CSS_SLOW_CLK (0x0u << 0) /**< \brief (PMC_PCK[3]) Slow Clock is selected */ -#define PMC_PCK_CSS_MAIN_CLK (0x1u << 0) /**< \brief (PMC_PCK[3]) Main Clock is selected */ -#define PMC_PCK_CSS_PLLA_CLK (0x2u << 0) /**< \brief (PMC_PCK[3]) PLLA Clock is selected */ -#define PMC_PCK_CSS_PLLB_CLK (0x3u << 0) /**< \brief (PMC_PCK[3]) PLLB Clock is selected */ -#define PMC_PCK_CSS_MCK (0x4u << 0) /**< \brief (PMC_PCK[3]) Master Clock is selected */ -#define PMC_PCK_PRES_Pos 4 -#define PMC_PCK_PRES_Msk (0x7u << PMC_PCK_PRES_Pos) /**< \brief (PMC_PCK[3]) Programmable Clock Prescaler */ -#define PMC_PCK_PRES_CLK (0x0u << 4) /**< \brief (PMC_PCK[3]) Selected clock */ -#define PMC_PCK_PRES_CLK_2 (0x1u << 4) /**< \brief (PMC_PCK[3]) Selected clock divided by 2 */ -#define PMC_PCK_PRES_CLK_4 (0x2u << 4) /**< \brief (PMC_PCK[3]) Selected clock divided by 4 */ -#define PMC_PCK_PRES_CLK_8 (0x3u << 4) /**< \brief (PMC_PCK[3]) Selected clock divided by 8 */ -#define PMC_PCK_PRES_CLK_16 (0x4u << 4) /**< \brief (PMC_PCK[3]) Selected clock divided by 16 */ -#define PMC_PCK_PRES_CLK_32 (0x5u << 4) /**< \brief (PMC_PCK[3]) Selected clock divided by 32 */ -#define PMC_PCK_PRES_CLK_64 (0x6u << 4) /**< \brief (PMC_PCK[3]) Selected clock divided by 64 */ -/* -------- PMC_IER : (PMC Offset: 0x0060) Interrupt Enable Register -------- */ -#define PMC_IER_MOSCXTS (0x1u << 0) /**< \brief (PMC_IER) Main Crystal Oscillator Status Interrupt Enable */ -#define PMC_IER_LOCKA (0x1u << 1) /**< \brief (PMC_IER) PLLA Lock Interrupt Enable */ -#define PMC_IER_LOCKB (0x1u << 2) /**< \brief (PMC_IER) PLLB Lock Interrupt Enable */ -#define PMC_IER_MCKRDY (0x1u << 3) /**< \brief (PMC_IER) Master Clock Ready Interrupt Enable */ -#define PMC_IER_PCKRDY0 (0x1u << 8) /**< \brief (PMC_IER) Programmable Clock Ready 0 Interrupt Enable */ -#define PMC_IER_PCKRDY1 (0x1u << 9) /**< \brief (PMC_IER) Programmable Clock Ready 1 Interrupt Enable */ -#define PMC_IER_PCKRDY2 (0x1u << 10) /**< \brief (PMC_IER) Programmable Clock Ready 2 Interrupt Enable */ -#define PMC_IER_MOSCSELS (0x1u << 16) /**< \brief (PMC_IER) Main Oscillator Selection Status Interrupt Enable */ -#define PMC_IER_MOSCRCS (0x1u << 17) /**< \brief (PMC_IER) Main On-Chip RC Status Interrupt Enable */ -#define PMC_IER_CFDEV (0x1u << 18) /**< \brief (PMC_IER) Clock Failure Detector Event Interrupt Enable */ -/* -------- PMC_IDR : (PMC Offset: 0x0064) Interrupt Disable Register -------- */ -#define PMC_IDR_MOSCXTS (0x1u << 0) /**< \brief (PMC_IDR) Main Crystal Oscillator Status Interrupt Disable */ -#define PMC_IDR_LOCKA (0x1u << 1) /**< \brief (PMC_IDR) PLLA Lock Interrupt Disable */ -#define PMC_IDR_LOCKB (0x1u << 2) /**< \brief (PMC_IDR) PLLB Lock Interrupt Disable */ -#define PMC_IDR_MCKRDY (0x1u << 3) /**< \brief (PMC_IDR) Master Clock Ready Interrupt Disable */ -#define PMC_IDR_PCKRDY0 (0x1u << 8) /**< \brief (PMC_IDR) Programmable Clock Ready 0 Interrupt Disable */ -#define PMC_IDR_PCKRDY1 (0x1u << 9) /**< \brief (PMC_IDR) Programmable Clock Ready 1 Interrupt Disable */ -#define PMC_IDR_PCKRDY2 (0x1u << 10) /**< \brief (PMC_IDR) Programmable Clock Ready 2 Interrupt Disable */ -#define PMC_IDR_MOSCSELS (0x1u << 16) /**< \brief (PMC_IDR) Main Oscillator Selection Status Interrupt Disable */ -#define PMC_IDR_MOSCRCS (0x1u << 17) /**< \brief (PMC_IDR) Main On-Chip RC Status Interrupt Disable */ -#define PMC_IDR_CFDEV (0x1u << 18) /**< \brief (PMC_IDR) Clock Failure Detector Event Interrupt Disable */ -/* -------- PMC_SR : (PMC Offset: 0x0068) Status Register -------- */ -#define PMC_SR_MOSCXTS (0x1u << 0) /**< \brief (PMC_SR) Main XTAL Oscillator Status */ -#define PMC_SR_LOCKA (0x1u << 1) /**< \brief (PMC_SR) PLLA Lock Status */ -#define PMC_SR_LOCKB (0x1u << 2) /**< \brief (PMC_SR) PLLB Lock Status */ -#define PMC_SR_MCKRDY (0x1u << 3) /**< \brief (PMC_SR) Master Clock Status */ -#define PMC_SR_OSCSELS (0x1u << 7) /**< \brief (PMC_SR) Slow Clock Oscillator Selection */ -#define PMC_SR_PCKRDY0 (0x1u << 8) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY1 (0x1u << 9) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_PCKRDY2 (0x1u << 10) /**< \brief (PMC_SR) Programmable Clock Ready Status */ -#define PMC_SR_MOSCSELS (0x1u << 16) /**< \brief (PMC_SR) Main Oscillator Selection Status */ -#define PMC_SR_MOSCRCS (0x1u << 17) /**< \brief (PMC_SR) Main On-Chip RC Oscillator Status */ -#define PMC_SR_CFDEV (0x1u << 18) /**< \brief (PMC_SR) Clock Failure Detector Event */ -#define PMC_SR_CFDS (0x1u << 19) /**< \brief (PMC_SR) Clock Failure Detector Status */ -#define PMC_SR_FOS (0x1u << 20) /**< \brief (PMC_SR) Clock Failure Detector Fault Output Status */ -/* -------- PMC_IMR : (PMC Offset: 0x006C) Interrupt Mask Register -------- */ -#define PMC_IMR_MOSCXTS (0x1u << 0) /**< \brief (PMC_IMR) Main Crystal Oscillator Status Interrupt Mask */ -#define PMC_IMR_LOCKA (0x1u << 1) /**< \brief (PMC_IMR) PLLA Lock Interrupt Mask */ -#define PMC_IMR_LOCKB (0x1u << 2) /**< \brief (PMC_IMR) PLLB Lock Interrupt Mask */ -#define PMC_IMR_MCKRDY (0x1u << 3) /**< \brief (PMC_IMR) Master Clock Ready Interrupt Mask */ -#define PMC_IMR_PCKRDY0 (0x1u << 8) /**< \brief (PMC_IMR) Programmable Clock Ready 0 Interrupt Mask */ -#define PMC_IMR_PCKRDY1 (0x1u << 9) /**< \brief (PMC_IMR) Programmable Clock Ready 1 Interrupt Mask */ -#define PMC_IMR_PCKRDY2 (0x1u << 10) /**< \brief (PMC_IMR) Programmable Clock Ready 2 Interrupt Mask */ -#define PMC_IMR_MOSCSELS (0x1u << 16) /**< \brief (PMC_IMR) Main Oscillator Selection Status Interrupt Mask */ -#define PMC_IMR_MOSCRCS (0x1u << 17) /**< \brief (PMC_IMR) Main On-Chip RC Status Interrupt Mask */ -#define PMC_IMR_CFDEV (0x1u << 18) /**< \brief (PMC_IMR) Clock Failure Detector Event Interrupt Mask */ -/* -------- PMC_FSMR : (PMC Offset: 0x0070) Fast Startup Mode Register -------- */ -#define PMC_FSMR_FSTT0 (0x1u << 0) /**< \brief (PMC_FSMR) Fast Startup Input Enable 0 */ -#define PMC_FSMR_FSTT1 (0x1u << 1) /**< \brief (PMC_FSMR) Fast Startup Input Enable 1 */ -#define PMC_FSMR_FSTT2 (0x1u << 2) /**< \brief (PMC_FSMR) Fast Startup Input Enable 2 */ -#define PMC_FSMR_FSTT3 (0x1u << 3) /**< \brief (PMC_FSMR) Fast Startup Input Enable 3 */ -#define PMC_FSMR_FSTT4 (0x1u << 4) /**< \brief (PMC_FSMR) Fast Startup Input Enable 4 */ -#define PMC_FSMR_FSTT5 (0x1u << 5) /**< \brief (PMC_FSMR) Fast Startup Input Enable 5 */ -#define PMC_FSMR_FSTT6 (0x1u << 6) /**< \brief (PMC_FSMR) Fast Startup Input Enable 6 */ -#define PMC_FSMR_FSTT7 (0x1u << 7) /**< \brief (PMC_FSMR) Fast Startup Input Enable 7 */ -#define PMC_FSMR_FSTT8 (0x1u << 8) /**< \brief (PMC_FSMR) Fast Startup Input Enable 8 */ -#define PMC_FSMR_FSTT9 (0x1u << 9) /**< \brief (PMC_FSMR) Fast Startup Input Enable 9 */ -#define PMC_FSMR_FSTT10 (0x1u << 10) /**< \brief (PMC_FSMR) Fast Startup Input Enable 10 */ -#define PMC_FSMR_FSTT11 (0x1u << 11) /**< \brief (PMC_FSMR) Fast Startup Input Enable 11 */ -#define PMC_FSMR_FSTT12 (0x1u << 12) /**< \brief (PMC_FSMR) Fast Startup Input Enable 12 */ -#define PMC_FSMR_FSTT13 (0x1u << 13) /**< \brief (PMC_FSMR) Fast Startup Input Enable 13 */ -#define PMC_FSMR_FSTT14 (0x1u << 14) /**< \brief (PMC_FSMR) Fast Startup Input Enable 14 */ -#define PMC_FSMR_FSTT15 (0x1u << 15) /**< \brief (PMC_FSMR) Fast Startup Input Enable 15 */ -#define PMC_FSMR_RTTAL (0x1u << 16) /**< \brief (PMC_FSMR) RTT Alarm Enable */ -#define PMC_FSMR_RTCAL (0x1u << 17) /**< \brief (PMC_FSMR) RTC Alarm Enable */ -#define PMC_FSMR_USBAL (0x1u << 18) /**< \brief (PMC_FSMR) USB Alarm Enable */ -#define PMC_FSMR_LPM (0x1u << 20) /**< \brief (PMC_FSMR) Low Power Mode */ -/* -------- PMC_FSPR : (PMC Offset: 0x0074) Fast Startup Polarity Register -------- */ -#define PMC_FSPR_FSTP0 (0x1u << 0) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP1 (0x1u << 1) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP2 (0x1u << 2) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP3 (0x1u << 3) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP4 (0x1u << 4) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP5 (0x1u << 5) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP6 (0x1u << 6) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP7 (0x1u << 7) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP8 (0x1u << 8) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP9 (0x1u << 9) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP10 (0x1u << 10) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP11 (0x1u << 11) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP12 (0x1u << 12) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP13 (0x1u << 13) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP14 (0x1u << 14) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -#define PMC_FSPR_FSTP15 (0x1u << 15) /**< \brief (PMC_FSPR) Fast Startup Input Polarityx */ -/* -------- PMC_FOCR : (PMC Offset: 0x0078) Fault Output Clear Register -------- */ -#define PMC_FOCR_FOCLR (0x1u << 0) /**< \brief (PMC_FOCR) Fault Output Clear */ -/* -------- PMC_WPMR : (PMC Offset: 0x00E4) Write Protect Mode Register -------- */ -#define PMC_WPMR_WPEN (0x1u << 0) /**< \brief (PMC_WPMR) Write Protect Enable */ -#define PMC_WPMR_WPKEY_Pos 8 -#define PMC_WPMR_WPKEY_Msk (0xffffffu << PMC_WPMR_WPKEY_Pos) /**< \brief (PMC_WPMR) Write Protect KEY */ -#define PMC_WPMR_WPKEY(value) ((PMC_WPMR_WPKEY_Msk & ((value) << PMC_WPMR_WPKEY_Pos))) -/* -------- PMC_WPSR : (PMC Offset: 0x00E8) Write Protect Status Register -------- */ -#define PMC_WPSR_WPVS (0x1u << 0) /**< \brief (PMC_WPSR) Write Protect Violation Status */ -#define PMC_WPSR_WPVSRC_Pos 8 -#define PMC_WPSR_WPVSRC_Msk (0xffffu << PMC_WPSR_WPVSRC_Pos) /**< \brief (PMC_WPSR) Write Protect Violation Source */ -/* -------- PMC_PCER1 : (PMC Offset: 0x0100) Peripheral Clock Enable Register 1 -------- */ -#define PMC_PCER1_PID32 (0x1u << 0) /**< \brief (PMC_PCER1) Peripheral Clock 32 Enable */ -#define PMC_PCER1_PID33 (0x1u << 1) /**< \brief (PMC_PCER1) Peripheral Clock 33 Enable */ -#define PMC_PCER1_PID34 (0x1u << 2) /**< \brief (PMC_PCER1) Peripheral Clock 34 Enable */ -#define PMC_PCER1_PID35 (0x1u << 3) /**< \brief (PMC_PCER1) Peripheral Clock 35 Enable */ -#define PMC_PCER1_PID36 (0x1u << 4) /**< \brief (PMC_PCER1) Peripheral Clock 36 Enable */ -#define PMC_PCER1_PID37 (0x1u << 5) /**< \brief (PMC_PCER1) Peripheral Clock 37 Enable */ -#define PMC_PCER1_PID38 (0x1u << 6) /**< \brief (PMC_PCER1) Peripheral Clock 38 Enable */ -#define PMC_PCER1_PID39 (0x1u << 7) /**< \brief (PMC_PCER1) Peripheral Clock 39 Enable */ -#define PMC_PCER1_PID40 (0x1u << 8) /**< \brief (PMC_PCER1) Peripheral Clock 40 Enable */ -#define PMC_PCER1_PID41 (0x1u << 9) /**< \brief (PMC_PCER1) Peripheral Clock 41 Enable */ -#define PMC_PCER1_PID42 (0x1u << 10) /**< \brief (PMC_PCER1) Peripheral Clock 42 Enable */ -#define PMC_PCER1_PID43 (0x1u << 11) /**< \brief (PMC_PCER1) Peripheral Clock 43 Enable */ -#define PMC_PCER1_PID44 (0x1u << 12) /**< \brief (PMC_PCER1) Peripheral Clock 44 Enable */ -#define PMC_PCER1_PID45 (0x1u << 13) /**< \brief (PMC_PCER1) Peripheral Clock 45 Enable */ -#define PMC_PCER1_PID46 (0x1u << 14) /**< \brief (PMC_PCER1) Peripheral Clock 46 Enable */ -#define PMC_PCER1_PID47 (0x1u << 15) /**< \brief (PMC_PCER1) Peripheral Clock 47 Enable */ -#define PMC_PCER1_PID48 (0x1u << 16) /**< \brief (PMC_PCER1) Peripheral Clock 48 Enable */ -#define PMC_PCER1_PID49 (0x1u << 17) /**< \brief (PMC_PCER1) Peripheral Clock 49 Enable */ -#define PMC_PCER1_PID50 (0x1u << 18) /**< \brief (PMC_PCER1) Peripheral Clock 50 Enable */ -#define PMC_PCER1_PID51 (0x1u << 19) /**< \brief (PMC_PCER1) Peripheral Clock 51 Enable */ -#define PMC_PCER1_PID52 (0x1u << 20) /**< \brief (PMC_PCER1) Peripheral Clock 52 Enable */ -#define PMC_PCER1_PID53 (0x1u << 21) /**< \brief (PMC_PCER1) Peripheral Clock 53 Enable */ -#define PMC_PCER1_PID54 (0x1u << 22) /**< \brief (PMC_PCER1) Peripheral Clock 54 Enable */ -#define PMC_PCER1_PID55 (0x1u << 23) /**< \brief (PMC_PCER1) Peripheral Clock 55 Enable */ -#define PMC_PCER1_PID56 (0x1u << 24) /**< \brief (PMC_PCER1) Peripheral Clock 56 Enable */ -#define PMC_PCER1_PID57 (0x1u << 25) /**< \brief (PMC_PCER1) Peripheral Clock 57 Enable */ -#define PMC_PCER1_PID58 (0x1u << 26) /**< \brief (PMC_PCER1) Peripheral Clock 58 Enable */ -#define PMC_PCER1_PID59 (0x1u << 27) /**< \brief (PMC_PCER1) Peripheral Clock 59 Enable */ -#define PMC_PCER1_PID60 (0x1u << 28) /**< \brief (PMC_PCER1) Peripheral Clock 60 Enable */ -#define PMC_PCER1_PID61 (0x1u << 29) /**< \brief (PMC_PCER1) Peripheral Clock 61 Enable */ -#define PMC_PCER1_PID62 (0x1u << 30) /**< \brief (PMC_PCER1) Peripheral Clock 62 Enable */ -#define PMC_PCER1_PID63 (0x1u << 31) /**< \brief (PMC_PCER1) Peripheral Clock 63 Enable */ -/* -------- PMC_PCDR1 : (PMC Offset: 0x0104) Peripheral Clock Disable Register 1 -------- */ -#define PMC_PCDR1_PID32 (0x1u << 0) /**< \brief (PMC_PCDR1) Peripheral Clock 32 Disable */ -#define PMC_PCDR1_PID33 (0x1u << 1) /**< \brief (PMC_PCDR1) Peripheral Clock 33 Disable */ -#define PMC_PCDR1_PID34 (0x1u << 2) /**< \brief (PMC_PCDR1) Peripheral Clock 34 Disable */ -#define PMC_PCDR1_PID35 (0x1u << 3) /**< \brief (PMC_PCDR1) Peripheral Clock 35 Disable */ -#define PMC_PCDR1_PID36 (0x1u << 4) /**< \brief (PMC_PCDR1) Peripheral Clock 36 Disable */ -#define PMC_PCDR1_PID37 (0x1u << 5) /**< \brief (PMC_PCDR1) Peripheral Clock 37 Disable */ -#define PMC_PCDR1_PID38 (0x1u << 6) /**< \brief (PMC_PCDR1) Peripheral Clock 38 Disable */ -#define PMC_PCDR1_PID39 (0x1u << 7) /**< \brief (PMC_PCDR1) Peripheral Clock 39 Disable */ -#define PMC_PCDR1_PID40 (0x1u << 8) /**< \brief (PMC_PCDR1) Peripheral Clock 40 Disable */ -#define PMC_PCDR1_PID41 (0x1u << 9) /**< \brief (PMC_PCDR1) Peripheral Clock 41 Disable */ -#define PMC_PCDR1_PID42 (0x1u << 10) /**< \brief (PMC_PCDR1) Peripheral Clock 42 Disable */ -#define PMC_PCDR1_PID43 (0x1u << 11) /**< \brief (PMC_PCDR1) Peripheral Clock 43 Disable */ -#define PMC_PCDR1_PID44 (0x1u << 12) /**< \brief (PMC_PCDR1) Peripheral Clock 44 Disable */ -#define PMC_PCDR1_PID45 (0x1u << 13) /**< \brief (PMC_PCDR1) Peripheral Clock 45 Disable */ -#define PMC_PCDR1_PID46 (0x1u << 14) /**< \brief (PMC_PCDR1) Peripheral Clock 46 Disable */ -#define PMC_PCDR1_PID47 (0x1u << 15) /**< \brief (PMC_PCDR1) Peripheral Clock 47 Disable */ -#define PMC_PCDR1_PID48 (0x1u << 16) /**< \brief (PMC_PCDR1) Peripheral Clock 48 Disable */ -#define PMC_PCDR1_PID49 (0x1u << 17) /**< \brief (PMC_PCDR1) Peripheral Clock 49 Disable */ -#define PMC_PCDR1_PID50 (0x1u << 18) /**< \brief (PMC_PCDR1) Peripheral Clock 50 Disable */ -#define PMC_PCDR1_PID51 (0x1u << 19) /**< \brief (PMC_PCDR1) Peripheral Clock 51 Disable */ -#define PMC_PCDR1_PID52 (0x1u << 20) /**< \brief (PMC_PCDR1) Peripheral Clock 52 Disable */ -#define PMC_PCDR1_PID53 (0x1u << 21) /**< \brief (PMC_PCDR1) Peripheral Clock 53 Disable */ -#define PMC_PCDR1_PID54 (0x1u << 22) /**< \brief (PMC_PCDR1) Peripheral Clock 54 Disable */ -#define PMC_PCDR1_PID55 (0x1u << 23) /**< \brief (PMC_PCDR1) Peripheral Clock 55 Disable */ -#define PMC_PCDR1_PID56 (0x1u << 24) /**< \brief (PMC_PCDR1) Peripheral Clock 56 Disable */ -#define PMC_PCDR1_PID57 (0x1u << 25) /**< \brief (PMC_PCDR1) Peripheral Clock 57 Disable */ -#define PMC_PCDR1_PID58 (0x1u << 26) /**< \brief (PMC_PCDR1) Peripheral Clock 58 Disable */ -#define PMC_PCDR1_PID59 (0x1u << 27) /**< \brief (PMC_PCDR1) Peripheral Clock 59 Disable */ -#define PMC_PCDR1_PID60 (0x1u << 28) /**< \brief (PMC_PCDR1) Peripheral Clock 60 Disable */ -#define PMC_PCDR1_PID61 (0x1u << 29) /**< \brief (PMC_PCDR1) Peripheral Clock 61 Disable */ -#define PMC_PCDR1_PID62 (0x1u << 30) /**< \brief (PMC_PCDR1) Peripheral Clock 62 Disable */ -#define PMC_PCDR1_PID63 (0x1u << 31) /**< \brief (PMC_PCDR1) Peripheral Clock 63 Disable */ -/* -------- PMC_PCSR1 : (PMC Offset: 0x0108) Peripheral Clock Status Register 1 -------- */ -#define PMC_PCSR1_PID32 (0x1u << 0) /**< \brief (PMC_PCSR1) Peripheral Clock 32 Status */ -#define PMC_PCSR1_PID33 (0x1u << 1) /**< \brief (PMC_PCSR1) Peripheral Clock 33 Status */ -#define PMC_PCSR1_PID34 (0x1u << 2) /**< \brief (PMC_PCSR1) Peripheral Clock 34 Status */ -#define PMC_PCSR1_PID35 (0x1u << 3) /**< \brief (PMC_PCSR1) Peripheral Clock 35 Status */ -#define PMC_PCSR1_PID36 (0x1u << 4) /**< \brief (PMC_PCSR1) Peripheral Clock 36 Status */ -#define PMC_PCSR1_PID37 (0x1u << 5) /**< \brief (PMC_PCSR1) Peripheral Clock 37 Status */ -#define PMC_PCSR1_PID38 (0x1u << 6) /**< \brief (PMC_PCSR1) Peripheral Clock 38 Status */ -#define PMC_PCSR1_PID39 (0x1u << 7) /**< \brief (PMC_PCSR1) Peripheral Clock 39 Status */ -#define PMC_PCSR1_PID40 (0x1u << 8) /**< \brief (PMC_PCSR1) Peripheral Clock 40 Status */ -#define PMC_PCSR1_PID41 (0x1u << 9) /**< \brief (PMC_PCSR1) Peripheral Clock 41 Status */ -#define PMC_PCSR1_PID42 (0x1u << 10) /**< \brief (PMC_PCSR1) Peripheral Clock 42 Status */ -#define PMC_PCSR1_PID43 (0x1u << 11) /**< \brief (PMC_PCSR1) Peripheral Clock 43 Status */ -#define PMC_PCSR1_PID44 (0x1u << 12) /**< \brief (PMC_PCSR1) Peripheral Clock 44 Status */ -#define PMC_PCSR1_PID45 (0x1u << 13) /**< \brief (PMC_PCSR1) Peripheral Clock 45 Status */ -#define PMC_PCSR1_PID46 (0x1u << 14) /**< \brief (PMC_PCSR1) Peripheral Clock 46 Status */ -#define PMC_PCSR1_PID47 (0x1u << 15) /**< \brief (PMC_PCSR1) Peripheral Clock 47 Status */ -#define PMC_PCSR1_PID48 (0x1u << 16) /**< \brief (PMC_PCSR1) Peripheral Clock 48 Status */ -#define PMC_PCSR1_PID49 (0x1u << 17) /**< \brief (PMC_PCSR1) Peripheral Clock 49 Status */ -#define PMC_PCSR1_PID50 (0x1u << 18) /**< \brief (PMC_PCSR1) Peripheral Clock 50 Status */ -#define PMC_PCSR1_PID51 (0x1u << 19) /**< \brief (PMC_PCSR1) Peripheral Clock 51 Status */ -#define PMC_PCSR1_PID52 (0x1u << 20) /**< \brief (PMC_PCSR1) Peripheral Clock 52 Status */ -#define PMC_PCSR1_PID53 (0x1u << 21) /**< \brief (PMC_PCSR1) Peripheral Clock 53 Status */ -#define PMC_PCSR1_PID54 (0x1u << 22) /**< \brief (PMC_PCSR1) Peripheral Clock 54 Status */ -#define PMC_PCSR1_PID55 (0x1u << 23) /**< \brief (PMC_PCSR1) Peripheral Clock 55 Status */ -#define PMC_PCSR1_PID56 (0x1u << 24) /**< \brief (PMC_PCSR1) Peripheral Clock 56 Status */ -#define PMC_PCSR1_PID57 (0x1u << 25) /**< \brief (PMC_PCSR1) Peripheral Clock 57 Status */ -#define PMC_PCSR1_PID58 (0x1u << 26) /**< \brief (PMC_PCSR1) Peripheral Clock 58 Status */ -#define PMC_PCSR1_PID59 (0x1u << 27) /**< \brief (PMC_PCSR1) Peripheral Clock 59 Status */ -#define PMC_PCSR1_PID60 (0x1u << 28) /**< \brief (PMC_PCSR1) Peripheral Clock 60 Status */ -#define PMC_PCSR1_PID61 (0x1u << 29) /**< \brief (PMC_PCSR1) Peripheral Clock 61 Status */ -#define PMC_PCSR1_PID62 (0x1u << 30) /**< \brief (PMC_PCSR1) Peripheral Clock 62 Status */ -#define PMC_PCSR1_PID63 (0x1u << 31) /**< \brief (PMC_PCSR1) Peripheral Clock 63 Status */ -/* -------- PMC_OCR : (PMC Offset: 0x0110) Oscillator Calibration Register -------- */ -#define PMC_OCR_CAL4_Pos 0 -#define PMC_OCR_CAL4_Msk (0x7fu << PMC_OCR_CAL4_Pos) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 4 Mhz */ -#define PMC_OCR_CAL4(value) ((PMC_OCR_CAL4_Msk & ((value) << PMC_OCR_CAL4_Pos))) -#define PMC_OCR_SEL4 (0x1u << 7) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 4 Mhz */ -#define PMC_OCR_CAL8_Pos 8 -#define PMC_OCR_CAL8_Msk (0x7fu << PMC_OCR_CAL8_Pos) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 8 Mhz */ -#define PMC_OCR_CAL8(value) ((PMC_OCR_CAL8_Msk & ((value) << PMC_OCR_CAL8_Pos))) -#define PMC_OCR_SEL8 (0x1u << 15) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 8 Mhz */ -#define PMC_OCR_CAL12_Pos 16 -#define PMC_OCR_CAL12_Msk (0x7fu << PMC_OCR_CAL12_Pos) /**< \brief (PMC_OCR) RC Oscillator Calibration bits for 12 Mhz */ -#define PMC_OCR_CAL12(value) ((PMC_OCR_CAL12_Msk & ((value) << PMC_OCR_CAL12_Pos))) -#define PMC_OCR_SEL12 (0x1u << 23) /**< \brief (PMC_OCR) Selection of RC Oscillator Calibration bits for 12 Mhz */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_PWM Pulse Width Modulation Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief PwmCh_num hardware registers */ -typedef struct { - RwReg PWM_CMR; /**< \brief (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ - RwReg PWM_CDTY; /**< \brief (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ - RwReg PWM_CDTYUPD; /**< \brief (PwmCh_num Offset: 0x8) PWM Channel Duty Cycle Update Register */ - RwReg PWM_CPRD; /**< \brief (PwmCh_num Offset: 0xC) PWM Channel Period Register */ - RwReg PWM_CPRDUPD; /**< \brief (PwmCh_num Offset: 0x10) PWM Channel Period Update Register */ - RwReg PWM_CCNT; /**< \brief (PwmCh_num Offset: 0x14) PWM Channel Counter Register */ - RwReg PWM_DT; /**< \brief (PwmCh_num Offset: 0x18) PWM Channel Dead Time Register */ - RwReg PWM_DTUPD; /**< \brief (PwmCh_num Offset: 0x1C) PWM Channel Dead Time Update Register */ -} PwmCh_num; -/** \brief PwmCmp hardware registers */ -typedef struct { - RwReg PWM_CMPxV; /**< \brief (PwmCmp Offset: 0x0) PWM Comparison 0 Value Register */ - RwReg PWM_CMPxVUPD; /**< \brief (PwmCmp Offset: 0x4) PWM Comparison 0 Value Update Register */ - RwReg PWM_CMPxM; /**< \brief (PwmCmp Offset: 0x8) PWM Comparison 0 Mode Register */ - RwReg PWM_CMPxMUPD; /**< \brief (PwmCmp Offset: 0xC) PWM Comparison 0 Mode Update Register */ -} PwmCmp; -/** \brief Pwm hardware registers */ -typedef struct { - RwReg PWM_CLK; /**< \brief (Pwm Offset: 0x00) PWM Clock Register */ - WoReg PWM_ENA; /**< \brief (Pwm Offset: 0x04) PWM Enable Register */ - WoReg PWM_DIS; /**< \brief (Pwm Offset: 0x08) PWM Disable Register */ - RoReg PWM_SR; /**< \brief (Pwm Offset: 0x0C) PWM Status Register */ - WoReg PWM_IER1; /**< \brief (Pwm Offset: 0x10) PWM Interrupt Enable Register 1 */ - WoReg PWM_IDR1; /**< \brief (Pwm Offset: 0x14) PWM Interrupt Disable Register 1 */ - RoReg PWM_IMR1; /**< \brief (Pwm Offset: 0x18) PWM Interrupt Mask Register 1 */ - RoReg PWM_ISR1; /**< \brief (Pwm Offset: 0x1C) PWM Interrupt Status Register 1 */ - RwReg PWM_SCM; /**< \brief (Pwm Offset: 0x20) PWM Sync Channels Mode Register */ - RwReg Reserved1[1]; - RwReg PWM_SCUC; /**< \brief (Pwm Offset: 0x28) PWM Sync Channels Update Control Register */ - RwReg PWM_SCUP; /**< \brief (Pwm Offset: 0x2C) PWM Sync Channels Update Period Register */ - WoReg PWM_SCUPUPD; /**< \brief (Pwm Offset: 0x30) PWM Sync Channels Update Period Update Register */ - WoReg PWM_IER2; /**< \brief (Pwm Offset: 0x34) PWM Interrupt Enable Register 2 */ - WoReg PWM_IDR2; /**< \brief (Pwm Offset: 0x38) PWM Interrupt Disable Register 2 */ - RoReg PWM_IMR2; /**< \brief (Pwm Offset: 0x3C) PWM Interrupt Mask Register 2 */ - RoReg PWM_ISR2; /**< \brief (Pwm Offset: 0x40) PWM Interrupt Status Register 2 */ - RwReg PWM_OOV; /**< \brief (Pwm Offset: 0x44) PWM Output Override Value Register */ - RwReg PWM_OS; /**< \brief (Pwm Offset: 0x48) PWM Output Selection Register */ - WoReg PWM_OSS; /**< \brief (Pwm Offset: 0x4C) PWM Output Selection Set Register */ - WoReg PWM_OSC; /**< \brief (Pwm Offset: 0x50) PWM Output Selection Clear Register */ - WoReg PWM_OSSUPD; /**< \brief (Pwm Offset: 0x54) PWM Output Selection Set Update Register */ - WoReg PWM_OSCUPD; /**< \brief (Pwm Offset: 0x58) PWM Output Selection Clear Update Register */ - RwReg PWM_FMR; /**< \brief (Pwm Offset: 0x5C) PWM Fault Mode Register */ - RoReg PWM_FSR; /**< \brief (Pwm Offset: 0x60) PWM Fault Status Register */ - WoReg PWM_FCR; /**< \brief (Pwm Offset: 0x64) PWM Fault Clear Register */ - RwReg PWM_FPV; /**< \brief (Pwm Offset: 0x68) PWM Fault Protection Value Register */ - RwReg PWM_FPE; /**< \brief (Pwm Offset: 0x6C) PWM Fault Protection Enable Register */ - RwReg Reserved2[3]; - RwReg PWM_ELxMR[2]; /**< \brief (Pwm Offset: 0x7C) PWM Event Line 0 Mode Register */ - RwReg Reserved3[11]; - RwReg PWM_SMMR; /**< \brief (Pwm Offset: 0xB0) PWM Stepper Motor Mode Register */ - RwReg Reserved4[12]; - WoReg PWM_WPCR; /**< \brief (Pwm Offset: 0xE4) PWM Write Protect Control Register */ - RoReg PWM_WPSR; /**< \brief (Pwm Offset: 0xE8) PWM Write Protect Status Register */ - RwReg Reserved5[5]; - RwReg PWM_RPR; /**< \brief (Pwm Offset: 0x100) Receive Pointer Register */ - RwReg PWM_RCR; /**< \brief (Pwm Offset: 0x104) Receive Counter Register */ - RwReg PWM_TPR; /**< \brief (Pwm Offset: 0x108) Transmit Pointer Register */ - RwReg PWM_TCR; /**< \brief (Pwm Offset: 0x10C) Transmit Counter Register */ - RwReg PWM_RNPR; /**< \brief (Pwm Offset: 0x110) Receive Next Pointer Register */ - RwReg PWM_RNCR; /**< \brief (Pwm Offset: 0x114) Receive Next Counter Register */ - RwReg PWM_TNPR; /**< \brief (Pwm Offset: 0x118) Transmit Next Pointer Register */ - RwReg PWM_TNCR; /**< \brief (Pwm Offset: 0x11C) Transmit Next Counter Register */ - WoReg PWM_PTCR; /**< \brief (Pwm Offset: 0x120) Transfer Control Register */ - RoReg PWM_PTSR; /**< \brief (Pwm Offset: 0x124) Transfer Status Register */ - RwReg Reserved6[2]; - PwmCmp PWM_CMP[8]; /**< \brief (Pwm Offset: 0x130) cmp = 0 .. 7 */ - RwReg Reserved7[20]; - PwmCh_num PWM_CH_NUM[4]; /**< \brief (Pwm Offset: 0x200) ch_num = 0 .. 3 */ -} Pwm; -#endif /* __ASSEMBLY__ */ -/* -------- PWM_CLK : (PWM Offset: 0x00) PWM Clock Register -------- */ -#define PWM_CLK_DIVA_Pos 0 -#define PWM_CLK_DIVA_Msk (0xffu << PWM_CLK_DIVA_Pos) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_DIVA(value) ((PWM_CLK_DIVA_Msk & ((value) << PWM_CLK_DIVA_Pos))) -#define PWM_CLK_PREA_Pos 8 -#define PWM_CLK_PREA_Msk (0xfu << PWM_CLK_PREA_Pos) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -#define PWM_CLK_PREA(value) ((PWM_CLK_PREA_Msk & ((value) << PWM_CLK_PREA_Pos))) -#define PWM_CLK_DIVB_Pos 16 -#define PWM_CLK_DIVB_Msk (0xffu << PWM_CLK_DIVB_Pos) /**< \brief (PWM_CLK) CLKA, CLKB Divide Factor */ -#define PWM_CLK_DIVB(value) ((PWM_CLK_DIVB_Msk & ((value) << PWM_CLK_DIVB_Pos))) -#define PWM_CLK_PREB_Pos 24 -#define PWM_CLK_PREB_Msk (0xfu << PWM_CLK_PREB_Pos) /**< \brief (PWM_CLK) CLKA, CLKB Source Clock Selection */ -#define PWM_CLK_PREB(value) ((PWM_CLK_PREB_Msk & ((value) << PWM_CLK_PREB_Pos))) -/* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */ -#define PWM_ENA_CHID0 (0x1u << 0) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID1 (0x1u << 1) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID2 (0x1u << 2) /**< \brief (PWM_ENA) Channel ID */ -#define PWM_ENA_CHID3 (0x1u << 3) /**< \brief (PWM_ENA) Channel ID */ -/* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */ -#define PWM_DIS_CHID0 (0x1u << 0) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID1 (0x1u << 1) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID2 (0x1u << 2) /**< \brief (PWM_DIS) Channel ID */ -#define PWM_DIS_CHID3 (0x1u << 3) /**< \brief (PWM_DIS) Channel ID */ -/* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */ -#define PWM_SR_CHID0 (0x1u << 0) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID1 (0x1u << 1) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID2 (0x1u << 2) /**< \brief (PWM_SR) Channel ID */ -#define PWM_SR_CHID3 (0x1u << 3) /**< \brief (PWM_SR) Channel ID */ -/* -------- PWM_IER1 : (PWM Offset: 0x10) PWM Interrupt Enable Register 1 -------- */ -#define PWM_IER1_CHID0 (0x1u << 0) /**< \brief (PWM_IER1) Counter Event on Channel 0 Interrupt Enable */ -#define PWM_IER1_CHID1 (0x1u << 1) /**< \brief (PWM_IER1) Counter Event on Channel 1 Interrupt Enable */ -#define PWM_IER1_CHID2 (0x1u << 2) /**< \brief (PWM_IER1) Counter Event on Channel 2 Interrupt Enable */ -#define PWM_IER1_CHID3 (0x1u << 3) /**< \brief (PWM_IER1) Counter Event on Channel 3 Interrupt Enable */ -#define PWM_IER1_FCHID0 (0x1u << 16) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 0 Interrupt Enable */ -#define PWM_IER1_FCHID1 (0x1u << 17) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 1 Interrupt Enable */ -#define PWM_IER1_FCHID2 (0x1u << 18) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 2 Interrupt Enable */ -#define PWM_IER1_FCHID3 (0x1u << 19) /**< \brief (PWM_IER1) Fault Protection Trigger on Channel 3 Interrupt Enable */ -/* -------- PWM_IDR1 : (PWM Offset: 0x14) PWM Interrupt Disable Register 1 -------- */ -#define PWM_IDR1_CHID0 (0x1u << 0) /**< \brief (PWM_IDR1) Counter Event on Channel 0 Interrupt Disable */ -#define PWM_IDR1_CHID1 (0x1u << 1) /**< \brief (PWM_IDR1) Counter Event on Channel 1 Interrupt Disable */ -#define PWM_IDR1_CHID2 (0x1u << 2) /**< \brief (PWM_IDR1) Counter Event on Channel 2 Interrupt Disable */ -#define PWM_IDR1_CHID3 (0x1u << 3) /**< \brief (PWM_IDR1) Counter Event on Channel 3 Interrupt Disable */ -#define PWM_IDR1_FCHID0 (0x1u << 16) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 0 Interrupt Disable */ -#define PWM_IDR1_FCHID1 (0x1u << 17) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 1 Interrupt Disable */ -#define PWM_IDR1_FCHID2 (0x1u << 18) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 2 Interrupt Disable */ -#define PWM_IDR1_FCHID3 (0x1u << 19) /**< \brief (PWM_IDR1) Fault Protection Trigger on Channel 3 Interrupt Disable */ -/* -------- PWM_IMR1 : (PWM Offset: 0x18) PWM Interrupt Mask Register 1 -------- */ -#define PWM_IMR1_CHID0 (0x1u << 0) /**< \brief (PWM_IMR1) Counter Event on Channel 0 Interrupt Mask */ -#define PWM_IMR1_CHID1 (0x1u << 1) /**< \brief (PWM_IMR1) Counter Event on Channel 1 Interrupt Mask */ -#define PWM_IMR1_CHID2 (0x1u << 2) /**< \brief (PWM_IMR1) Counter Event on Channel 2 Interrupt Mask */ -#define PWM_IMR1_CHID3 (0x1u << 3) /**< \brief (PWM_IMR1) Counter Event on Channel 3 Interrupt Mask */ -#define PWM_IMR1_FCHID0 (0x1u << 16) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 0 Interrupt Mask */ -#define PWM_IMR1_FCHID1 (0x1u << 17) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 1 Interrupt Mask */ -#define PWM_IMR1_FCHID2 (0x1u << 18) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 2 Interrupt Mask */ -#define PWM_IMR1_FCHID3 (0x1u << 19) /**< \brief (PWM_IMR1) Fault Protection Trigger on Channel 3 Interrupt Mask */ -/* -------- PWM_ISR1 : (PWM Offset: 0x1C) PWM Interrupt Status Register 1 -------- */ -#define PWM_ISR1_CHID0 (0x1u << 0) /**< \brief (PWM_ISR1) Counter Event on Channel 0 */ -#define PWM_ISR1_CHID1 (0x1u << 1) /**< \brief (PWM_ISR1) Counter Event on Channel 1 */ -#define PWM_ISR1_CHID2 (0x1u << 2) /**< \brief (PWM_ISR1) Counter Event on Channel 2 */ -#define PWM_ISR1_CHID3 (0x1u << 3) /**< \brief (PWM_ISR1) Counter Event on Channel 3 */ -#define PWM_ISR1_FCHID0 (0x1u << 16) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 0 */ -#define PWM_ISR1_FCHID1 (0x1u << 17) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 1 */ -#define PWM_ISR1_FCHID2 (0x1u << 18) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 2 */ -#define PWM_ISR1_FCHID3 (0x1u << 19) /**< \brief (PWM_ISR1) Fault Protection Trigger on Channel 3 */ -/* -------- PWM_SCM : (PWM Offset: 0x20) PWM Sync Channels Mode Register -------- */ -#define PWM_SCM_SYNC0 (0x1u << 0) /**< \brief (PWM_SCM) Synchronous Channel 0 */ -#define PWM_SCM_SYNC1 (0x1u << 1) /**< \brief (PWM_SCM) Synchronous Channel 1 */ -#define PWM_SCM_SYNC2 (0x1u << 2) /**< \brief (PWM_SCM) Synchronous Channel 2 */ -#define PWM_SCM_SYNC3 (0x1u << 3) /**< \brief (PWM_SCM) Synchronous Channel 3 */ -#define PWM_SCM_UPDM_Pos 16 -#define PWM_SCM_UPDM_Msk (0x3u << PWM_SCM_UPDM_Pos) /**< \brief (PWM_SCM) Synchronous Channels Update Mode */ -#define PWM_SCM_UPDM_MODE0 (0x0u << 16) /**< \brief (PWM_SCM) Manual write of double buffer registers and manual update of synchronous channels. The update occurs at the begin- ning of the next PWM period, when the bit UPDULOCK in "PWM Sync Channels Update Control Register" on page 55 is set. */ -#define PWM_SCM_UPDM_MODE1 (0x1u << 16) /**< \brief (PWM_SCM) Manual write of double buffer registers and automatic update of synchronous channels. The update occurs when the Update Period is elapsed. */ -#define PWM_SCM_UPDM_MODE2 (0x2u << 16) /**< \brief (PWM_SCM) Automatic write of duty-cycle update registers by the PDC and automatic update of synchronous channels. The update occurs when the Update Period is elapsed. */ -#define PWM_SCM_PTRM (0x1u << 20) /**< \brief (PWM_SCM) PDC Transfer Request Mode */ -#define PWM_SCM_PTRCS_Pos 21 -#define PWM_SCM_PTRCS_Msk (0x7u << PWM_SCM_PTRCS_Pos) /**< \brief (PWM_SCM) PDC Transfer Request Comparison Selection */ -#define PWM_SCM_PTRCS(value) ((PWM_SCM_PTRCS_Msk & ((value) << PWM_SCM_PTRCS_Pos))) -/* -------- PWM_SCUC : (PWM Offset: 0x28) PWM Sync Channels Update Control Register -------- */ -#define PWM_SCUC_UPDULOCK (0x1u << 0) /**< \brief (PWM_SCUC) Synchronous Channels Update Unlock */ -/* -------- PWM_SCUP : (PWM Offset: 0x2C) PWM Sync Channels Update Period Register -------- */ -#define PWM_SCUP_UPR_Pos 0 -#define PWM_SCUP_UPR_Msk (0xfu << PWM_SCUP_UPR_Pos) /**< \brief (PWM_SCUP) Update Period */ -#define PWM_SCUP_UPR(value) ((PWM_SCUP_UPR_Msk & ((value) << PWM_SCUP_UPR_Pos))) -#define PWM_SCUP_UPRCNT_Pos 4 -#define PWM_SCUP_UPRCNT_Msk (0xfu << PWM_SCUP_UPRCNT_Pos) /**< \brief (PWM_SCUP) Update Period Counter */ -#define PWM_SCUP_UPRCNT(value) ((PWM_SCUP_UPRCNT_Msk & ((value) << PWM_SCUP_UPRCNT_Pos))) -/* -------- PWM_SCUPUPD : (PWM Offset: 0x30) PWM Sync Channels Update Period Update Register -------- */ -#define PWM_SCUPUPD_UPRUPD_Pos 0 -#define PWM_SCUPUPD_UPRUPD_Msk (0xfu << PWM_SCUPUPD_UPRUPD_Pos) /**< \brief (PWM_SCUPUPD) Update Period Update */ -#define PWM_SCUPUPD_UPRUPD(value) ((PWM_SCUPUPD_UPRUPD_Msk & ((value) << PWM_SCUPUPD_UPRUPD_Pos))) -/* -------- PWM_IER2 : (PWM Offset: 0x34) PWM Interrupt Enable Register 2 -------- */ -#define PWM_IER2_WRDY (0x1u << 0) /**< \brief (PWM_IER2) Write Ready for Synchronous Channels Update Interrupt Enable */ -#define PWM_IER2_ENDTX (0x1u << 1) /**< \brief (PWM_IER2) PDC End of TX Buffer Interrupt Enable */ -#define PWM_IER2_TXBUFE (0x1u << 2) /**< \brief (PWM_IER2) PDC TX Buffer Empty Interrupt Enable */ -#define PWM_IER2_UNRE (0x1u << 3) /**< \brief (PWM_IER2) Synchronous Channels Update Underrun Error Interrupt Enable */ -#define PWM_IER2_CMPM0 (0x1u << 8) /**< \brief (PWM_IER2) Comparison 0 Match Interrupt Enable */ -#define PWM_IER2_CMPM1 (0x1u << 9) /**< \brief (PWM_IER2) Comparison 1 Match Interrupt Enable */ -#define PWM_IER2_CMPM2 (0x1u << 10) /**< \brief (PWM_IER2) Comparison 2 Match Interrupt Enable */ -#define PWM_IER2_CMPM3 (0x1u << 11) /**< \brief (PWM_IER2) Comparison 3 Match Interrupt Enable */ -#define PWM_IER2_CMPM4 (0x1u << 12) /**< \brief (PWM_IER2) Comparison 4 Match Interrupt Enable */ -#define PWM_IER2_CMPM5 (0x1u << 13) /**< \brief (PWM_IER2) Comparison 5 Match Interrupt Enable */ -#define PWM_IER2_CMPM6 (0x1u << 14) /**< \brief (PWM_IER2) Comparison 6 Match Interrupt Enable */ -#define PWM_IER2_CMPM7 (0x1u << 15) /**< \brief (PWM_IER2) Comparison 7 Match Interrupt Enable */ -#define PWM_IER2_CMPU0 (0x1u << 16) /**< \brief (PWM_IER2) Comparison 0 Update Interrupt Enable */ -#define PWM_IER2_CMPU1 (0x1u << 17) /**< \brief (PWM_IER2) Comparison 1 Update Interrupt Enable */ -#define PWM_IER2_CMPU2 (0x1u << 18) /**< \brief (PWM_IER2) Comparison 2 Update Interrupt Enable */ -#define PWM_IER2_CMPU3 (0x1u << 19) /**< \brief (PWM_IER2) Comparison 3 Update Interrupt Enable */ -#define PWM_IER2_CMPU4 (0x1u << 20) /**< \brief (PWM_IER2) Comparison 4 Update Interrupt Enable */ -#define PWM_IER2_CMPU5 (0x1u << 21) /**< \brief (PWM_IER2) Comparison 5 Update Interrupt Enable */ -#define PWM_IER2_CMPU6 (0x1u << 22) /**< \brief (PWM_IER2) Comparison 6 Update Interrupt Enable */ -#define PWM_IER2_CMPU7 (0x1u << 23) /**< \brief (PWM_IER2) Comparison 7 Update Interrupt Enable */ -/* -------- PWM_IDR2 : (PWM Offset: 0x38) PWM Interrupt Disable Register 2 -------- */ -#define PWM_IDR2_WRDY (0x1u << 0) /**< \brief (PWM_IDR2) Write Ready for Synchronous Channels Update Interrupt Disable */ -#define PWM_IDR2_ENDTX (0x1u << 1) /**< \brief (PWM_IDR2) PDC End of TX Buffer Interrupt Disable */ -#define PWM_IDR2_TXBUFE (0x1u << 2) /**< \brief (PWM_IDR2) PDC TX Buffer Empty Interrupt Disable */ -#define PWM_IDR2_UNRE (0x1u << 3) /**< \brief (PWM_IDR2) Synchronous Channels Update Underrun Error Interrupt Disable */ -#define PWM_IDR2_CMPM0 (0x1u << 8) /**< \brief (PWM_IDR2) Comparison 0 Match Interrupt Disable */ -#define PWM_IDR2_CMPM1 (0x1u << 9) /**< \brief (PWM_IDR2) Comparison 1 Match Interrupt Disable */ -#define PWM_IDR2_CMPM2 (0x1u << 10) /**< \brief (PWM_IDR2) Comparison 2 Match Interrupt Disable */ -#define PWM_IDR2_CMPM3 (0x1u << 11) /**< \brief (PWM_IDR2) Comparison 3 Match Interrupt Disable */ -#define PWM_IDR2_CMPM4 (0x1u << 12) /**< \brief (PWM_IDR2) Comparison 4 Match Interrupt Disable */ -#define PWM_IDR2_CMPM5 (0x1u << 13) /**< \brief (PWM_IDR2) Comparison 5 Match Interrupt Disable */ -#define PWM_IDR2_CMPM6 (0x1u << 14) /**< \brief (PWM_IDR2) Comparison 6 Match Interrupt Disable */ -#define PWM_IDR2_CMPM7 (0x1u << 15) /**< \brief (PWM_IDR2) Comparison 7 Match Interrupt Disable */ -#define PWM_IDR2_CMPU0 (0x1u << 16) /**< \brief (PWM_IDR2) Comparison 0 Update Interrupt Disable */ -#define PWM_IDR2_CMPU1 (0x1u << 17) /**< \brief (PWM_IDR2) Comparison 1 Update Interrupt Disable */ -#define PWM_IDR2_CMPU2 (0x1u << 18) /**< \brief (PWM_IDR2) Comparison 2 Update Interrupt Disable */ -#define PWM_IDR2_CMPU3 (0x1u << 19) /**< \brief (PWM_IDR2) Comparison 3 Update Interrupt Disable */ -#define PWM_IDR2_CMPU4 (0x1u << 20) /**< \brief (PWM_IDR2) Comparison 4 Update Interrupt Disable */ -#define PWM_IDR2_CMPU5 (0x1u << 21) /**< \brief (PWM_IDR2) Comparison 5 Update Interrupt Disable */ -#define PWM_IDR2_CMPU6 (0x1u << 22) /**< \brief (PWM_IDR2) Comparison 6 Update Interrupt Disable */ -#define PWM_IDR2_CMPU7 (0x1u << 23) /**< \brief (PWM_IDR2) Comparison 7 Update Interrupt Disable */ -/* -------- PWM_IMR2 : (PWM Offset: 0x3C) PWM Interrupt Mask Register 2 -------- */ -#define PWM_IMR2_WRDY (0x1u << 0) /**< \brief (PWM_IMR2) Write Ready for Synchronous Channels Update Interrupt Mask */ -#define PWM_IMR2_ENDTX (0x1u << 1) /**< \brief (PWM_IMR2) PDC End of TX Buffer Interrupt Mask */ -#define PWM_IMR2_TXBUFE (0x1u << 2) /**< \brief (PWM_IMR2) PDC TX Buffer Empty Interrupt Mask */ -#define PWM_IMR2_UNRE (0x1u << 3) /**< \brief (PWM_IMR2) Synchronous Channels Update Underrun Error Interrupt Mask */ -#define PWM_IMR2_CMPM0 (0x1u << 8) /**< \brief (PWM_IMR2) Comparison 0 Match Interrupt Mask */ -#define PWM_IMR2_CMPM1 (0x1u << 9) /**< \brief (PWM_IMR2) Comparison 1 Match Interrupt Mask */ -#define PWM_IMR2_CMPM2 (0x1u << 10) /**< \brief (PWM_IMR2) Comparison 2 Match Interrupt Mask */ -#define PWM_IMR2_CMPM3 (0x1u << 11) /**< \brief (PWM_IMR2) Comparison 3 Match Interrupt Mask */ -#define PWM_IMR2_CMPM4 (0x1u << 12) /**< \brief (PWM_IMR2) Comparison 4 Match Interrupt Mask */ -#define PWM_IMR2_CMPM5 (0x1u << 13) /**< \brief (PWM_IMR2) Comparison 5 Match Interrupt Mask */ -#define PWM_IMR2_CMPM6 (0x1u << 14) /**< \brief (PWM_IMR2) Comparison 6 Match Interrupt Mask */ -#define PWM_IMR2_CMPM7 (0x1u << 15) /**< \brief (PWM_IMR2) Comparison 7 Match Interrupt Mask */ -#define PWM_IMR2_CMPU0 (0x1u << 16) /**< \brief (PWM_IMR2) Comparison 0 Update Interrupt Mask */ -#define PWM_IMR2_CMPU1 (0x1u << 17) /**< \brief (PWM_IMR2) Comparison 1 Update Interrupt Mask */ -#define PWM_IMR2_CMPU2 (0x1u << 18) /**< \brief (PWM_IMR2) Comparison 2 Update Interrupt Mask */ -#define PWM_IMR2_CMPU3 (0x1u << 19) /**< \brief (PWM_IMR2) Comparison 3 Update Interrupt Mask */ -#define PWM_IMR2_CMPU4 (0x1u << 20) /**< \brief (PWM_IMR2) Comparison 4 Update Interrupt Mask */ -#define PWM_IMR2_CMPU5 (0x1u << 21) /**< \brief (PWM_IMR2) Comparison 5 Update Interrupt Mask */ -#define PWM_IMR2_CMPU6 (0x1u << 22) /**< \brief (PWM_IMR2) Comparison 6 Update Interrupt Mask */ -#define PWM_IMR2_CMPU7 (0x1u << 23) /**< \brief (PWM_IMR2) Comparison 7 Update Interrupt Mask */ -/* -------- PWM_ISR2 : (PWM Offset: 0x40) PWM Interrupt Status Register 2 -------- */ -#define PWM_ISR2_WRDY (0x1u << 0) /**< \brief (PWM_ISR2) Write Ready for Synchronous Channels Update */ -#define PWM_ISR2_ENDTX (0x1u << 1) /**< \brief (PWM_ISR2) PDC End of TX Buffer */ -#define PWM_ISR2_TXBUFE (0x1u << 2) /**< \brief (PWM_ISR2) PDC TX Buffer Empty */ -#define PWM_ISR2_UNRE (0x1u << 3) /**< \brief (PWM_ISR2) Synchronous Channels Update Underrun Error */ -#define PWM_ISR2_CMPM0 (0x1u << 8) /**< \brief (PWM_ISR2) Comparison 0 Match */ -#define PWM_ISR2_CMPM1 (0x1u << 9) /**< \brief (PWM_ISR2) Comparison 1 Match */ -#define PWM_ISR2_CMPM2 (0x1u << 10) /**< \brief (PWM_ISR2) Comparison 2 Match */ -#define PWM_ISR2_CMPM3 (0x1u << 11) /**< \brief (PWM_ISR2) Comparison 3 Match */ -#define PWM_ISR2_CMPM4 (0x1u << 12) /**< \brief (PWM_ISR2) Comparison 4 Match */ -#define PWM_ISR2_CMPM5 (0x1u << 13) /**< \brief (PWM_ISR2) Comparison 5 Match */ -#define PWM_ISR2_CMPM6 (0x1u << 14) /**< \brief (PWM_ISR2) Comparison 6 Match */ -#define PWM_ISR2_CMPM7 (0x1u << 15) /**< \brief (PWM_ISR2) Comparison 7 Match */ -#define PWM_ISR2_CMPU0 (0x1u << 16) /**< \brief (PWM_ISR2) Comparison 0 Update */ -#define PWM_ISR2_CMPU1 (0x1u << 17) /**< \brief (PWM_ISR2) Comparison 1 Update */ -#define PWM_ISR2_CMPU2 (0x1u << 18) /**< \brief (PWM_ISR2) Comparison 2 Update */ -#define PWM_ISR2_CMPU3 (0x1u << 19) /**< \brief (PWM_ISR2) Comparison 3 Update */ -#define PWM_ISR2_CMPU4 (0x1u << 20) /**< \brief (PWM_ISR2) Comparison 4 Update */ -#define PWM_ISR2_CMPU5 (0x1u << 21) /**< \brief (PWM_ISR2) Comparison 5 Update */ -#define PWM_ISR2_CMPU6 (0x1u << 22) /**< \brief (PWM_ISR2) Comparison 6 Update */ -#define PWM_ISR2_CMPU7 (0x1u << 23) /**< \brief (PWM_ISR2) Comparison 7 Update */ -/* -------- PWM_OOV : (PWM Offset: 0x44) PWM Output Override Value Register -------- */ -#define PWM_OOV_OOVH0 (0x1u << 0) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 0 */ -#define PWM_OOV_OOVH1 (0x1u << 1) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 1 */ -#define PWM_OOV_OOVH2 (0x1u << 2) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 2 */ -#define PWM_OOV_OOVH3 (0x1u << 3) /**< \brief (PWM_OOV) Output Override Value for PWMH output of the channel 3 */ -#define PWM_OOV_OOVL0 (0x1u << 16) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 0 */ -#define PWM_OOV_OOVL1 (0x1u << 17) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 1 */ -#define PWM_OOV_OOVL2 (0x1u << 18) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 2 */ -#define PWM_OOV_OOVL3 (0x1u << 19) /**< \brief (PWM_OOV) Output Override Value for PWML output of the channel 3 */ -/* -------- PWM_OS : (PWM Offset: 0x48) PWM Output Selection Register -------- */ -#define PWM_OS_OSH0 (0x1u << 0) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 0 */ -#define PWM_OS_OSH1 (0x1u << 1) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 1 */ -#define PWM_OS_OSH2 (0x1u << 2) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 2 */ -#define PWM_OS_OSH3 (0x1u << 3) /**< \brief (PWM_OS) Output Selection for PWMH output of the channel 3 */ -#define PWM_OS_OSL0 (0x1u << 16) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 0 */ -#define PWM_OS_OSL1 (0x1u << 17) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 1 */ -#define PWM_OS_OSL2 (0x1u << 18) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 2 */ -#define PWM_OS_OSL3 (0x1u << 19) /**< \brief (PWM_OS) Output Selection for PWML output of the channel 3 */ -/* -------- PWM_OSS : (PWM Offset: 0x4C) PWM Output Selection Set Register -------- */ -#define PWM_OSS_OSSH0 (0x1u << 0) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSS_OSSH1 (0x1u << 1) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSS_OSSH2 (0x1u << 2) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSS_OSSH3 (0x1u << 3) /**< \brief (PWM_OSS) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSS_OSSL0 (0x1u << 16) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSS_OSSL1 (0x1u << 17) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSS_OSSL2 (0x1u << 18) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSS_OSSL3 (0x1u << 19) /**< \brief (PWM_OSS) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSC : (PWM Offset: 0x50) PWM Output Selection Clear Register -------- */ -#define PWM_OSC_OSCH0 (0x1u << 0) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSC_OSCH1 (0x1u << 1) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSC_OSCH2 (0x1u << 2) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSC_OSCH3 (0x1u << 3) /**< \brief (PWM_OSC) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSC_OSCL0 (0x1u << 16) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSC_OSCL1 (0x1u << 17) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSC_OSCL2 (0x1u << 18) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSC_OSCL3 (0x1u << 19) /**< \brief (PWM_OSC) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_OSSUPD : (PWM Offset: 0x54) PWM Output Selection Set Update Register -------- */ -#define PWM_OSSUPD_OSSUPH0 (0x1u << 0) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 0 */ -#define PWM_OSSUPD_OSSUPH1 (0x1u << 1) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 1 */ -#define PWM_OSSUPD_OSSUPH2 (0x1u << 2) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 2 */ -#define PWM_OSSUPD_OSSUPH3 (0x1u << 3) /**< \brief (PWM_OSSUPD) Output Selection Set for PWMH output of the channel 3 */ -#define PWM_OSSUPD_OSSUPL0 (0x1u << 16) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 0 */ -#define PWM_OSSUPD_OSSUPL1 (0x1u << 17) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 1 */ -#define PWM_OSSUPD_OSSUPL2 (0x1u << 18) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 2 */ -#define PWM_OSSUPD_OSSUPL3 (0x1u << 19) /**< \brief (PWM_OSSUPD) Output Selection Set for PWML output of the channel 3 */ -/* -------- PWM_OSCUPD : (PWM Offset: 0x58) PWM Output Selection Clear Update Register -------- */ -#define PWM_OSCUPD_OSCUPH0 (0x1u << 0) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 0 */ -#define PWM_OSCUPD_OSCUPH1 (0x1u << 1) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 1 */ -#define PWM_OSCUPD_OSCUPH2 (0x1u << 2) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 2 */ -#define PWM_OSCUPD_OSCUPH3 (0x1u << 3) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWMH output of the channel 3 */ -#define PWM_OSCUPD_OSCUPL0 (0x1u << 16) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 0 */ -#define PWM_OSCUPD_OSCUPL1 (0x1u << 17) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 1 */ -#define PWM_OSCUPD_OSCUPL2 (0x1u << 18) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 2 */ -#define PWM_OSCUPD_OSCUPL3 (0x1u << 19) /**< \brief (PWM_OSCUPD) Output Selection Clear for PWML output of the channel 3 */ -/* -------- PWM_FMR : (PWM Offset: 0x5C) PWM Fault Mode Register -------- */ -#define PWM_FMR_FPOL_Pos 0 -#define PWM_FMR_FPOL_Msk (0xffu << PWM_FMR_FPOL_Pos) /**< \brief (PWM_FMR) Fault Polarity (fault input bit varies from 0 to 5) */ -#define PWM_FMR_FPOL(value) ((PWM_FMR_FPOL_Msk & ((value) << PWM_FMR_FPOL_Pos))) -#define PWM_FMR_FMOD_Pos 8 -#define PWM_FMR_FMOD_Msk (0xffu << PWM_FMR_FMOD_Pos) /**< \brief (PWM_FMR) Fault Activation Mode (fault input bit varies from 0 to 5) */ -#define PWM_FMR_FMOD(value) ((PWM_FMR_FMOD_Msk & ((value) << PWM_FMR_FMOD_Pos))) -#define PWM_FMR_FFIL_Pos 16 -#define PWM_FMR_FFIL_Msk (0xffu << PWM_FMR_FFIL_Pos) /**< \brief (PWM_FMR) Fault Filtering (fault input bit varies from 0 to 5) */ -#define PWM_FMR_FFIL(value) ((PWM_FMR_FFIL_Msk & ((value) << PWM_FMR_FFIL_Pos))) -/* -------- PWM_FSR : (PWM Offset: 0x60) PWM Fault Status Register -------- */ -#define PWM_FSR_FIV_Pos 0 -#define PWM_FSR_FIV_Msk (0xffu << PWM_FSR_FIV_Pos) /**< \brief (PWM_FSR) Fault Input Value (fault input bit varies from 0 to 5) */ -#define PWM_FSR_FS_Pos 8 -#define PWM_FSR_FS_Msk (0xffu << PWM_FSR_FS_Pos) /**< \brief (PWM_FSR) Fault Status (fault input bit varies from 0 to 5) */ -/* -------- PWM_FCR : (PWM Offset: 0x64) PWM Fault Clear Register -------- */ -#define PWM_FCR_FCLR_Pos 0 -#define PWM_FCR_FCLR_Msk (0xffu << PWM_FCR_FCLR_Pos) /**< \brief (PWM_FCR) Fault Clear (fault input bit varies from 0 to 5) */ -#define PWM_FCR_FCLR(value) ((PWM_FCR_FCLR_Msk & ((value) << PWM_FCR_FCLR_Pos))) -/* -------- PWM_FPV : (PWM Offset: 0x68) PWM Fault Protection Value Register -------- */ -#define PWM_FPV_FPVH0 (0x1u << 0) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 0 */ -#define PWM_FPV_FPVH1 (0x1u << 1) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 1 */ -#define PWM_FPV_FPVH2 (0x1u << 2) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 2 */ -#define PWM_FPV_FPVH3 (0x1u << 3) /**< \brief (PWM_FPV) Fault Protection Value for PWMH output on channel 3 */ -#define PWM_FPV_FPVL0 (0x1u << 16) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 0 */ -#define PWM_FPV_FPVL1 (0x1u << 17) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 1 */ -#define PWM_FPV_FPVL2 (0x1u << 18) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 2 */ -#define PWM_FPV_FPVL3 (0x1u << 19) /**< \brief (PWM_FPV) Fault Protection Value for PWML output on channel 3 */ -/* -------- PWM_FPE : (PWM Offset: 0x6C) PWM Fault Protection Enable Register -------- */ -#define PWM_FPE_FPE0_Pos 0 -#define PWM_FPE_FPE0_Msk (0xffu << PWM_FPE_FPE0_Pos) /**< \brief (PWM_FPE) Fault Protection Enable for channel 0 (fault input bit varies from 0 to 5) */ -#define PWM_FPE_FPE0(value) ((PWM_FPE_FPE0_Msk & ((value) << PWM_FPE_FPE0_Pos))) -#define PWM_FPE_FPE1_Pos 8 -#define PWM_FPE_FPE1_Msk (0xffu << PWM_FPE_FPE1_Pos) /**< \brief (PWM_FPE) Fault Protection Enable for channel 1 (fault input bit varies from 0 to 5) */ -#define PWM_FPE_FPE1(value) ((PWM_FPE_FPE1_Msk & ((value) << PWM_FPE_FPE1_Pos))) -#define PWM_FPE_FPE2_Pos 16 -#define PWM_FPE_FPE2_Msk (0xffu << PWM_FPE_FPE2_Pos) /**< \brief (PWM_FPE) Fault Protection Enable for channel 2 (fault input bit varies from 0 to 5) */ -#define PWM_FPE_FPE2(value) ((PWM_FPE_FPE2_Msk & ((value) << PWM_FPE_FPE2_Pos))) -#define PWM_FPE_FPE3_Pos 24 -#define PWM_FPE_FPE3_Msk (0xffu << PWM_FPE_FPE3_Pos) /**< \brief (PWM_FPE) Fault Protection Enable for channel 3 (fault input bit varies from 0 to 5) */ -#define PWM_FPE_FPE3(value) ((PWM_FPE_FPE3_Msk & ((value) << PWM_FPE_FPE3_Pos))) -/* -------- PWM_EL0MR : (PWM Offset: 0x7C) PWM Event Line 0 Mode Register -------- */ -#define PWM_EL0MR_CSEL0 (0x1u << 0) /**< \brief (PWM_EL0MR) Comparison 0 Selection */ -#define PWM_EL0MR_CSEL1 (0x1u << 1) /**< \brief (PWM_EL0MR) Comparison 1 Selection */ -#define PWM_EL0MR_CSEL2 (0x1u << 2) /**< \brief (PWM_EL0MR) Comparison 2 Selection */ -#define PWM_EL0MR_CSEL3 (0x1u << 3) /**< \brief (PWM_EL0MR) Comparison 3 Selection */ -#define PWM_EL0MR_CSEL4 (0x1u << 4) /**< \brief (PWM_EL0MR) Comparison 4 Selection */ -#define PWM_EL0MR_CSEL5 (0x1u << 5) /**< \brief (PWM_EL0MR) Comparison 5 Selection */ -#define PWM_EL0MR_CSEL6 (0x1u << 6) /**< \brief (PWM_EL0MR) Comparison 6 Selection */ -#define PWM_EL0MR_CSEL7 (0x1u << 7) /**< \brief (PWM_EL0MR) Comparison 7 Selection */ -/* -------- PWM_EL1MR : (PWM Offset: 0x80) PWM Event Line 1 Mode Register -------- */ -#define PWM_EL1MR_CSEL0 (0x1u << 0) /**< \brief (PWM_EL1MR) Comparison 0 Selection */ -#define PWM_EL1MR_CSEL1 (0x1u << 1) /**< \brief (PWM_EL1MR) Comparison 1 Selection */ -#define PWM_EL1MR_CSEL2 (0x1u << 2) /**< \brief (PWM_EL1MR) Comparison 2 Selection */ -#define PWM_EL1MR_CSEL3 (0x1u << 3) /**< \brief (PWM_EL1MR) Comparison 3 Selection */ -#define PWM_EL1MR_CSEL4 (0x1u << 4) /**< \brief (PWM_EL1MR) Comparison 4 Selection */ -#define PWM_EL1MR_CSEL5 (0x1u << 5) /**< \brief (PWM_EL1MR) Comparison 5 Selection */ -#define PWM_EL1MR_CSEL6 (0x1u << 6) /**< \brief (PWM_EL1MR) Comparison 6 Selection */ -#define PWM_EL1MR_CSEL7 (0x1u << 7) /**< \brief (PWM_EL1MR) Comparison 7 Selection */ -/* -------- PWM_SMMR : (PWM Offset: 0xB0) PWM Stepper Motor Mode Register -------- */ -#define PWM_SMMR_GCEN0 (0x1u << 0) /**< \brief (PWM_SMMR) Gray Count ENable */ -#define PWM_SMMR_GCEN1 (0x1u << 1) /**< \brief (PWM_SMMR) Gray Count ENable */ -#define PWM_SMMR_DOWN0 (0x1u << 16) /**< \brief (PWM_SMMR) DOWN Count */ -#define PWM_SMMR_DOWN1 (0x1u << 17) /**< \brief (PWM_SMMR) DOWN Count */ -/* -------- PWM_WPCR : (PWM Offset: 0xE4) PWM Write Protect Control Register -------- */ -#define PWM_WPCR_WPCMD_Pos 0 -#define PWM_WPCR_WPCMD_Msk (0x3u << PWM_WPCR_WPCMD_Pos) /**< \brief (PWM_WPCR) Write Protect Command */ -#define PWM_WPCR_WPCMD(value) ((PWM_WPCR_WPCMD_Msk & ((value) << PWM_WPCR_WPCMD_Pos))) -#define PWM_WPCR_WPRG0 (0x1u << 2) /**< \brief (PWM_WPCR) Write Protect Register Group 0 */ -#define PWM_WPCR_WPRG1 (0x1u << 3) /**< \brief (PWM_WPCR) Write Protect Register Group 1 */ -#define PWM_WPCR_WPRG2 (0x1u << 4) /**< \brief (PWM_WPCR) Write Protect Register Group 2 */ -#define PWM_WPCR_WPRG3 (0x1u << 5) /**< \brief (PWM_WPCR) Write Protect Register Group 3 */ -#define PWM_WPCR_WPRG4 (0x1u << 6) /**< \brief (PWM_WPCR) Write Protect Register Group 4 */ -#define PWM_WPCR_WPRG5 (0x1u << 7) /**< \brief (PWM_WPCR) Write Protect Register Group 5 */ -#define PWM_WPCR_WPKEY_Pos 8 -#define PWM_WPCR_WPKEY_Msk (0xffffffu << PWM_WPCR_WPKEY_Pos) /**< \brief (PWM_WPCR) Write Protect Key */ -#define PWM_WPCR_WPKEY(value) ((PWM_WPCR_WPKEY_Msk & ((value) << PWM_WPCR_WPKEY_Pos))) -/* -------- PWM_WPSR : (PWM Offset: 0xE8) PWM Write Protect Status Register -------- */ -#define PWM_WPSR_WPSWS0 (0x1u << 0) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS1 (0x1u << 1) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS2 (0x1u << 2) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS3 (0x1u << 3) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS4 (0x1u << 4) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPSWS5 (0x1u << 5) /**< \brief (PWM_WPSR) Write Protect SW Status */ -#define PWM_WPSR_WPVS (0x1u << 7) /**< \brief (PWM_WPSR) Write Protect Violation Status */ -#define PWM_WPSR_WPHWS0 (0x1u << 8) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS1 (0x1u << 9) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS2 (0x1u << 10) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS3 (0x1u << 11) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS4 (0x1u << 12) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPHWS5 (0x1u << 13) /**< \brief (PWM_WPSR) Write Protect HW Status */ -#define PWM_WPSR_WPVSRC_Pos 16 -#define PWM_WPSR_WPVSRC_Msk (0xffffu << PWM_WPSR_WPVSRC_Pos) /**< \brief (PWM_WPSR) Write Protect Violation Source */ -/* -------- PWM_RPR : (PWM Offset: 0x100) Receive Pointer Register -------- */ -#define PWM_RPR_RXPTR_Pos 0 -#define PWM_RPR_RXPTR_Msk (0xffffffffu << PWM_RPR_RXPTR_Pos) /**< \brief (PWM_RPR) Receive Pointer Register */ -#define PWM_RPR_RXPTR(value) ((PWM_RPR_RXPTR_Msk & ((value) << PWM_RPR_RXPTR_Pos))) -/* -------- PWM_RCR : (PWM Offset: 0x104) Receive Counter Register -------- */ -#define PWM_RCR_RXCTR_Pos 0 -#define PWM_RCR_RXCTR_Msk (0xffffu << PWM_RCR_RXCTR_Pos) /**< \brief (PWM_RCR) Receive Counter Register */ -#define PWM_RCR_RXCTR(value) ((PWM_RCR_RXCTR_Msk & ((value) << PWM_RCR_RXCTR_Pos))) -/* -------- PWM_TPR : (PWM Offset: 0x108) Transmit Pointer Register -------- */ -#define PWM_TPR_TXPTR_Pos 0 -#define PWM_TPR_TXPTR_Msk (0xffffffffu << PWM_TPR_TXPTR_Pos) /**< \brief (PWM_TPR) Transmit Counter Register */ -#define PWM_TPR_TXPTR(value) ((PWM_TPR_TXPTR_Msk & ((value) << PWM_TPR_TXPTR_Pos))) -/* -------- PWM_TCR : (PWM Offset: 0x10C) Transmit Counter Register -------- */ -#define PWM_TCR_TXCTR_Pos 0 -#define PWM_TCR_TXCTR_Msk (0xffffu << PWM_TCR_TXCTR_Pos) /**< \brief (PWM_TCR) Transmit Counter Register */ -#define PWM_TCR_TXCTR(value) ((PWM_TCR_TXCTR_Msk & ((value) << PWM_TCR_TXCTR_Pos))) -/* -------- PWM_RNPR : (PWM Offset: 0x110) Receive Next Pointer Register -------- */ -#define PWM_RNPR_RXNPTR_Pos 0 -#define PWM_RNPR_RXNPTR_Msk (0xffffffffu << PWM_RNPR_RXNPTR_Pos) /**< \brief (PWM_RNPR) Receive Next Pointer */ -#define PWM_RNPR_RXNPTR(value) ((PWM_RNPR_RXNPTR_Msk & ((value) << PWM_RNPR_RXNPTR_Pos))) -/* -------- PWM_RNCR : (PWM Offset: 0x114) Receive Next Counter Register -------- */ -#define PWM_RNCR_RXNCTR_Pos 0 -#define PWM_RNCR_RXNCTR_Msk (0xffffu << PWM_RNCR_RXNCTR_Pos) /**< \brief (PWM_RNCR) Receive Next Counter */ -#define PWM_RNCR_RXNCTR(value) ((PWM_RNCR_RXNCTR_Msk & ((value) << PWM_RNCR_RXNCTR_Pos))) -/* -------- PWM_TNPR : (PWM Offset: 0x118) Transmit Next Pointer Register -------- */ -#define PWM_TNPR_TXNPTR_Pos 0 -#define PWM_TNPR_TXNPTR_Msk (0xffffffffu << PWM_TNPR_TXNPTR_Pos) /**< \brief (PWM_TNPR) Transmit Next Pointer */ -#define PWM_TNPR_TXNPTR(value) ((PWM_TNPR_TXNPTR_Msk & ((value) << PWM_TNPR_TXNPTR_Pos))) -/* -------- PWM_TNCR : (PWM Offset: 0x11C) Transmit Next Counter Register -------- */ -#define PWM_TNCR_TXNCTR_Pos 0 -#define PWM_TNCR_TXNCTR_Msk (0xffffu << PWM_TNCR_TXNCTR_Pos) /**< \brief (PWM_TNCR) Transmit Counter Next */ -#define PWM_TNCR_TXNCTR(value) ((PWM_TNCR_TXNCTR_Msk & ((value) << PWM_TNCR_TXNCTR_Pos))) -/* -------- PWM_PTCR : (PWM Offset: 0x120) Transfer Control Register -------- */ -#define PWM_PTCR_RXTEN (0x1u << 0) /**< \brief (PWM_PTCR) Receiver Transfer Enable */ -#define PWM_PTCR_RXTDIS (0x1u << 1) /**< \brief (PWM_PTCR) Receiver Transfer Disable */ -#define PWM_PTCR_TXTEN (0x1u << 8) /**< \brief (PWM_PTCR) Transmitter Transfer Enable */ -#define PWM_PTCR_TXTDIS (0x1u << 9) /**< \brief (PWM_PTCR) Transmitter Transfer Disable */ -/* -------- PWM_PTSR : (PWM Offset: 0x124) Transfer Status Register -------- */ -#define PWM_PTSR_RXTEN (0x1u << 0) /**< \brief (PWM_PTSR) Receiver Transfer Enable */ -#define PWM_PTSR_TXTEN (0x1u << 8) /**< \brief (PWM_PTSR) Transmitter Transfer Enable */ -/* -------- PWM_CMPxV : (PWM Offset: N/A) PWM Comparison 0 Value Register -------- */ -#define PWM_CMPxV_CV_Pos 0 -#define PWM_CMPxV_CV_Msk (0xffffffu << PWM_CMPxV_CV_Pos) /**< \brief (PWM_CMPxV) Comparison x Value */ -#define PWM_CMPxV_CV(value) ((PWM_CMPxV_CV_Msk & ((value) << PWM_CMPxV_CV_Pos))) -#define PWM_CMPxV_CVM (0x1u << 24) /**< \brief (PWM_CMPxV) Comparison x Value Mode */ -/* -------- PWM_CMPxVUPD : (PWM Offset: N/A) PWM Comparison 0 Value Update Register -------- */ -#define PWM_CMPxVUPD_CVUPD_Pos 0 -#define PWM_CMPxVUPD_CVUPD_Msk (0xffffffu << PWM_CMPxVUPD_CVUPD_Pos) /**< \brief (PWM_CMPxVUPD) Comparison x Value Update */ -#define PWM_CMPxVUPD_CVUPD(value) ((PWM_CMPxVUPD_CVUPD_Msk & ((value) << PWM_CMPxVUPD_CVUPD_Pos))) -#define PWM_CMPxVUPD_CVMUPD (0x1u << 24) /**< \brief (PWM_CMPxVUPD) Comparison x Value Mode Update */ -/* -------- PWM_CMPxM : (PWM Offset: N/A) PWM Comparison 0 Mode Register -------- */ -#define PWM_CMPxM_CEN (0x1u << 0) /**< \brief (PWM_CMPxM) Comparison x Enable */ -#define PWM_CMPxM_CTR_Pos 4 -#define PWM_CMPxM_CTR_Msk (0xfu << PWM_CMPxM_CTR_Pos) /**< \brief (PWM_CMPxM) Comparison x Trigger */ -#define PWM_CMPxM_CTR(value) ((PWM_CMPxM_CTR_Msk & ((value) << PWM_CMPxM_CTR_Pos))) -#define PWM_CMPxM_CPR_Pos 8 -#define PWM_CMPxM_CPR_Msk (0xfu << PWM_CMPxM_CPR_Pos) /**< \brief (PWM_CMPxM) Comparison x Period */ -#define PWM_CMPxM_CPR(value) ((PWM_CMPxM_CPR_Msk & ((value) << PWM_CMPxM_CPR_Pos))) -#define PWM_CMPxM_CPRCNT_Pos 12 -#define PWM_CMPxM_CPRCNT_Msk (0xfu << PWM_CMPxM_CPRCNT_Pos) /**< \brief (PWM_CMPxM) Comparison x Period Counter */ -#define PWM_CMPxM_CPRCNT(value) ((PWM_CMPxM_CPRCNT_Msk & ((value) << PWM_CMPxM_CPRCNT_Pos))) -#define PWM_CMPxM_CUPR_Pos 16 -#define PWM_CMPxM_CUPR_Msk (0xfu << PWM_CMPxM_CUPR_Pos) /**< \brief (PWM_CMPxM) Comparison x Update Period */ -#define PWM_CMPxM_CUPR(value) ((PWM_CMPxM_CUPR_Msk & ((value) << PWM_CMPxM_CUPR_Pos))) -#define PWM_CMPxM_CUPRCNT_Pos 20 -#define PWM_CMPxM_CUPRCNT_Msk (0xfu << PWM_CMPxM_CUPRCNT_Pos) /**< \brief (PWM_CMPxM) Comparison x Update Period Counter */ -#define PWM_CMPxM_CUPRCNT(value) ((PWM_CMPxM_CUPRCNT_Msk & ((value) << PWM_CMPxM_CUPRCNT_Pos))) -/* -------- PWM_CMPxMUPD : (PWM Offset: N/A) PWM Comparison 0 Mode Update Register -------- */ -#define PWM_CMPxMUPD_CENUPD (0x1u << 0) /**< \brief (PWM_CMPxMUPD) Comparison x Enable Update */ -#define PWM_CMPxMUPD_CTRUPD_Pos 4 -#define PWM_CMPxMUPD_CTRUPD_Msk (0xfu << PWM_CMPxMUPD_CTRUPD_Pos) /**< \brief (PWM_CMPxMUPD) Comparison x Trigger Update */ -#define PWM_CMPxMUPD_CTRUPD(value) ((PWM_CMPxMUPD_CTRUPD_Msk & ((value) << PWM_CMPxMUPD_CTRUPD_Pos))) -#define PWM_CMPxMUPD_CPRUPD_Pos 8 -#define PWM_CMPxMUPD_CPRUPD_Msk (0xfu << PWM_CMPxMUPD_CPRUPD_Pos) /**< \brief (PWM_CMPxMUPD) Comparison x Period Update */ -#define PWM_CMPxMUPD_CPRUPD(value) ((PWM_CMPxMUPD_CPRUPD_Msk & ((value) << PWM_CMPxMUPD_CPRUPD_Pos))) -#define PWM_CMPxMUPD_CUPRUPD_Pos 16 -#define PWM_CMPxMUPD_CUPRUPD_Msk (0xfu << PWM_CMPxMUPD_CUPRUPD_Pos) /**< \brief (PWM_CMPxMUPD) Comparison x Update Period Update */ -#define PWM_CMPxMUPD_CUPRUPD(value) ((PWM_CMPxMUPD_CUPRUPD_Msk & ((value) << PWM_CMPxMUPD_CUPRUPD_Pos))) -/* -------- PWM_CMR : (PWM Offset: N/A) PWM Channel Mode Register -------- */ -#define PWM_CMR_CPRE_Pos 0 -#define PWM_CMR_CPRE_Msk (0xfu << PWM_CMR_CPRE_Pos) /**< \brief (PWM_CMR) Channel Pre-scaler */ -#define PWM_CMR_CPRE_MCK (0x0u << 0) /**< \brief (PWM_CMR) MCK */ -#define PWM_CMR_CPRE_MCK_DIV_2 (0x1u << 0) /**< \brief (PWM_CMR) MCK/2 */ -#define PWM_CMR_CPRE_MCK_DIV_4 (0x2u << 0) /**< \brief (PWM_CMR) MCK/4 */ -#define PWM_CMR_CPRE_MCK_DIV_8 (0x3u << 0) /**< \brief (PWM_CMR) MCK/8 */ -#define PWM_CMR_CPRE_MCK_DIV_16 (0x4u << 0) /**< \brief (PWM_CMR) MCK/16 */ -#define PWM_CMR_CPRE_MCK_DIV_32 (0x5u << 0) /**< \brief (PWM_CMR) MCK/32 */ -#define PWM_CMR_CPRE_MCK_DIV_64 (0x6u << 0) /**< \brief (PWM_CMR) MCK/64 */ -#define PWM_CMR_CPRE_MCK_DIV_128 (0x7u << 0) /**< \brief (PWM_CMR) MCK/128 */ -#define PWM_CMR_CPRE_MCK_DIV_256 (0x8u << 0) /**< \brief (PWM_CMR) MCK/256 */ -#define PWM_CMR_CPRE_MCK_DIV_512 (0x9u << 0) /**< \brief (PWM_CMR) MCK/512 */ -#define PWM_CMR_CPRE_MCK_DIV_1024 (0xAu << 0) /**< \brief (PWM_CMR) MCK/1024 */ -#define PWM_CMR_CPRE_CKA (0xBu << 0) /**< \brief (PWM_CMR) CLKA */ -#define PWM_CMR_CPRE_CKB (0xCu << 0) /**< \brief (PWM_CMR) CLKB */ -#define PWM_CMR_CALG (0x1u << 8) /**< \brief (PWM_CMR) Channel Alignment */ -#define PWM_CMR_CPOL (0x1u << 9) /**< \brief (PWM_CMR) Channel Polarity */ -#define PWM_CMR_CES (0x1u << 10) /**< \brief (PWM_CMR) Counter Event Selection */ -#define PWM_CMR_DTE (0x1u << 16) /**< \brief (PWM_CMR) Dead-Time Generator Enable */ -#define PWM_CMR_DTHI (0x1u << 17) /**< \brief (PWM_CMR) Dead-Time PWMHx Output Inverted */ -#define PWM_CMR_DTLI (0x1u << 18) /**< \brief (PWM_CMR) Dead-Time PWMLx Output Inverted */ -/* -------- PWM_CDTY : (PWM Offset: N/A) PWM Channel Duty Cycle Register -------- */ -#define PWM_CDTY_CDTY_Pos 0 -#define PWM_CDTY_CDTY_Msk (0xffffffu << PWM_CDTY_CDTY_Pos) /**< \brief (PWM_CDTY) Channel Duty-Cycle */ -#define PWM_CDTY_CDTY(value) ((PWM_CDTY_CDTY_Msk & ((value) << PWM_CDTY_CDTY_Pos))) -/* -------- PWM_CDTYUPD : (PWM Offset: N/A) PWM Channel Duty Cycle Update Register -------- */ -#define PWM_CDTYUPD_CDTYUPD_Pos 0 -#define PWM_CDTYUPD_CDTYUPD_Msk (0xffffffu << PWM_CDTYUPD_CDTYUPD_Pos) /**< \brief (PWM_CDTYUPD) Channel Duty-Cycle Update */ -#define PWM_CDTYUPD_CDTYUPD(value) ((PWM_CDTYUPD_CDTYUPD_Msk & ((value) << PWM_CDTYUPD_CDTYUPD_Pos))) -/* -------- PWM_CPRD : (PWM Offset: N/A) PWM Channel Period Register -------- */ -#define PWM_CPRD_CPRD_Pos 0 -#define PWM_CPRD_CPRD_Msk (0xffffffu << PWM_CPRD_CPRD_Pos) /**< \brief (PWM_CPRD) Channel Period */ -#define PWM_CPRD_CPRD(value) ((PWM_CPRD_CPRD_Msk & ((value) << PWM_CPRD_CPRD_Pos))) -/* -------- PWM_CPRDUPD : (PWM Offset: N/A) PWM Channel Period Update Register -------- */ -#define PWM_CPRDUPD_CPRDUPD_Pos 0 -#define PWM_CPRDUPD_CPRDUPD_Msk (0xffffffu << PWM_CPRDUPD_CPRDUPD_Pos) /**< \brief (PWM_CPRDUPD) Channel Period Update */ -#define PWM_CPRDUPD_CPRDUPD(value) ((PWM_CPRDUPD_CPRDUPD_Msk & ((value) << PWM_CPRDUPD_CPRDUPD_Pos))) -/* -------- PWM_CCNT : (PWM Offset: N/A) PWM Channel Counter Register -------- */ -#define PWM_CCNT_CNT_Pos 0 -#define PWM_CCNT_CNT_Msk (0xffffffu << PWM_CCNT_CNT_Pos) /**< \brief (PWM_CCNT) Channel Counter Register */ -/* -------- PWM_DT : (PWM Offset: N/A) PWM Channel Dead Time Register -------- */ -#define PWM_DT_DTH_Pos 0 -#define PWM_DT_DTH_Msk (0xffffu << PWM_DT_DTH_Pos) /**< \brief (PWM_DT) Dead-Time Value for PWMHx Output */ -#define PWM_DT_DTH(value) ((PWM_DT_DTH_Msk & ((value) << PWM_DT_DTH_Pos))) -#define PWM_DT_DTL_Pos 16 -#define PWM_DT_DTL_Msk (0xffffu << PWM_DT_DTL_Pos) /**< \brief (PWM_DT) Dead-Time Value for PWMLx Output */ -#define PWM_DT_DTL(value) ((PWM_DT_DTL_Msk & ((value) << PWM_DT_DTL_Pos))) -/* -------- PWM_DTUPD : (PWM Offset: N/A) PWM Channel Dead Time Update Register -------- */ -#define PWM_DTUPD_DTHUPD_Pos 0 -#define PWM_DTUPD_DTHUPD_Msk (0xffffu << PWM_DTUPD_DTHUPD_Pos) /**< \brief (PWM_DTUPD) Dead-Time Value Update for PWMHx Output */ -#define PWM_DTUPD_DTHUPD(value) ((PWM_DTUPD_DTHUPD_Msk & ((value) << PWM_DTUPD_DTHUPD_Pos))) -#define PWM_DTUPD_DTLUPD_Pos 16 -#define PWM_DTUPD_DTLUPD_Msk (0xffffu << PWM_DTUPD_DTLUPD_Pos) /**< \brief (PWM_DTUPD) Dead-Time Value Update for PWMLx Output */ -#define PWM_DTUPD_DTLUPD(value) ((PWM_DTUPD_DTLUPD_Msk & ((value) << PWM_DTUPD_DTLUPD_Pos))) - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Reset Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_RSTC Reset Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rstc hardware registers */ -typedef struct { - WoReg RSTC_CR; /**< \brief (Rstc Offset: 0x00) Control Register */ - RoReg RSTC_SR; /**< \brief (Rstc Offset: 0x04) Status Register */ - RwReg RSTC_MR; /**< \brief (Rstc Offset: 0x08) Mode Register */ -} Rstc; -#endif /* __ASSEMBLY__ */ -/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ -#define RSTC_CR_PROCRST (0x1u << 0) /**< \brief (RSTC_CR) Processor Reset */ -#define RSTC_CR_PERRST (0x1u << 2) /**< \brief (RSTC_CR) Peripheral Reset */ -#define RSTC_CR_EXTRST (0x1u << 3) /**< \brief (RSTC_CR) External Reset */ -#define RSTC_CR_KEY_Pos 24 -#define RSTC_CR_KEY_Msk (0xffu << RSTC_CR_KEY_Pos) /**< \brief (RSTC_CR) Password */ -#define RSTC_CR_KEY(value) ((RSTC_CR_KEY_Msk & ((value) << RSTC_CR_KEY_Pos))) -/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ -#define RSTC_SR_URSTS (0x1u << 0) /**< \brief (RSTC_SR) User Reset Status */ -#define RSTC_SR_RSTTYP_Pos 8 -#define RSTC_SR_RSTTYP_Msk (0x7u << RSTC_SR_RSTTYP_Pos) /**< \brief (RSTC_SR) Reset Type */ -#define RSTC_SR_NRSTL (0x1u << 16) /**< \brief (RSTC_SR) NRST Pin Level */ -#define RSTC_SR_SRCMP (0x1u << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ -/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ -#define RSTC_MR_URSTEN (0x1u << 0) /**< \brief (RSTC_MR) User Reset Enable */ -#define RSTC_MR_URSTIEN (0x1u << 4) /**< \brief (RSTC_MR) User Reset Interrupt Enable */ -#define RSTC_MR_ERSTL_Pos 8 -#define RSTC_MR_ERSTL_Msk (0xfu << RSTC_MR_ERSTL_Pos) /**< \brief (RSTC_MR) External Reset Length */ -#define RSTC_MR_ERSTL(value) ((RSTC_MR_ERSTL_Msk & ((value) << RSTC_MR_ERSTL_Pos))) -#define RSTC_MR_KEY_Pos 24 -#define RSTC_MR_KEY_Msk (0xffu << RSTC_MR_KEY_Pos) /**< \brief (RSTC_MR) Password */ -#define RSTC_MR_KEY(value) ((RSTC_MR_KEY_Msk & ((value) << RSTC_MR_KEY_Pos))) - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Clock */ -/* ============================================================================= */ -/** \addtogroup SAM3S_RTC Real-time Clock */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtc hardware registers */ -typedef struct { - RwReg RTC_CR; /**< \brief (Rtc Offset: 0x00) Control Register */ - RwReg RTC_MR; /**< \brief (Rtc Offset: 0x04) Mode Register */ - RwReg RTC_TIMR; /**< \brief (Rtc Offset: 0x08) Time Register */ - RwReg RTC_CALR; /**< \brief (Rtc Offset: 0x0C) Calendar Register */ - RwReg RTC_TIMALR; /**< \brief (Rtc Offset: 0x10) Time Alarm Register */ - RwReg RTC_CALALR; /**< \brief (Rtc Offset: 0x14) Calendar Alarm Register */ - RoReg RTC_SR; /**< \brief (Rtc Offset: 0x18) Status Register */ - WoReg RTC_SCCR; /**< \brief (Rtc Offset: 0x1C) Status Clear Command Register */ - WoReg RTC_IER; /**< \brief (Rtc Offset: 0x20) Interrupt Enable Register */ - WoReg RTC_IDR; /**< \brief (Rtc Offset: 0x24) Interrupt Disable Register */ - RoReg RTC_IMR; /**< \brief (Rtc Offset: 0x28) Interrupt Mask Register */ - RoReg RTC_VER; /**< \brief (Rtc Offset: 0x2C) Valid Entry Register */ -} Rtc; -#endif /* __ASSEMBLY__ */ -/* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */ -#define RTC_CR_UPDTIM (0x1u << 0) /**< \brief (RTC_CR) Update Request Time Register */ -#define RTC_CR_UPDCAL (0x1u << 1) /**< \brief (RTC_CR) Update Request Calendar Register */ -#define RTC_CR_TIMEVSEL_Pos 8 -#define RTC_CR_TIMEVSEL_Msk (0x3u << RTC_CR_TIMEVSEL_Pos) /**< \brief (RTC_CR) Time Event Selection */ -#define RTC_CR_TIMEVSEL_MINUTE (0x0u << 8) /**< \brief (RTC_CR) Minute change */ -#define RTC_CR_TIMEVSEL_HOUR (0x1u << 8) /**< \brief (RTC_CR) Hour change */ -#define RTC_CR_TIMEVSEL_MIDNIGHT (0x2u << 8) /**< \brief (RTC_CR) Every day at midnight */ -#define RTC_CR_TIMEVSEL_NOON (0x3u << 8) /**< \brief (RTC_CR) Every day at noon */ -#define RTC_CR_CALEVSEL_Pos 16 -#define RTC_CR_CALEVSEL_Msk (0x3u << RTC_CR_CALEVSEL_Pos) /**< \brief (RTC_CR) Calendar Event Selection */ -#define RTC_CR_CALEVSEL_WEEK (0x0u << 16) /**< \brief (RTC_CR) Week change (every Monday at time 00:00:00) */ -#define RTC_CR_CALEVSEL_MONTH (0x1u << 16) /**< \brief (RTC_CR) Month change (every 01 of each month at time 00:00:00) */ -#define RTC_CR_CALEVSEL_YEAR (0x2u << 16) /**< \brief (RTC_CR) Year change (every January 1 at time 00:00:00) */ -/* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */ -#define RTC_MR_HRMOD (0x1u << 0) /**< \brief (RTC_MR) 12-/24-hour Mode */ -/* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */ -#define RTC_TIMR_SEC_Pos 0 -#define RTC_TIMR_SEC_Msk (0x7fu << RTC_TIMR_SEC_Pos) /**< \brief (RTC_TIMR) Current Second */ -#define RTC_TIMR_SEC(value) ((RTC_TIMR_SEC_Msk & ((value) << RTC_TIMR_SEC_Pos))) -#define RTC_TIMR_MIN_Pos 8 -#define RTC_TIMR_MIN_Msk (0x7fu << RTC_TIMR_MIN_Pos) /**< \brief (RTC_TIMR) Current Minute */ -#define RTC_TIMR_MIN(value) ((RTC_TIMR_MIN_Msk & ((value) << RTC_TIMR_MIN_Pos))) -#define RTC_TIMR_HOUR_Pos 16 -#define RTC_TIMR_HOUR_Msk (0x3fu << RTC_TIMR_HOUR_Pos) /**< \brief (RTC_TIMR) Current Hour */ -#define RTC_TIMR_HOUR(value) ((RTC_TIMR_HOUR_Msk & ((value) << RTC_TIMR_HOUR_Pos))) -#define RTC_TIMR_AMPM (0x1u << 22) /**< \brief (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */ -/* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */ -#define RTC_CALR_CENT_Pos 0 -#define RTC_CALR_CENT_Msk (0x7fu << RTC_CALR_CENT_Pos) /**< \brief (RTC_CALR) Current Century */ -#define RTC_CALR_CENT(value) ((RTC_CALR_CENT_Msk & ((value) << RTC_CALR_CENT_Pos))) -#define RTC_CALR_YEAR_Pos 8 -#define RTC_CALR_YEAR_Msk (0xffu << RTC_CALR_YEAR_Pos) /**< \brief (RTC_CALR) Current Year */ -#define RTC_CALR_YEAR(value) ((RTC_CALR_YEAR_Msk & ((value) << RTC_CALR_YEAR_Pos))) -#define RTC_CALR_MONTH_Pos 16 -#define RTC_CALR_MONTH_Msk (0x1fu << RTC_CALR_MONTH_Pos) /**< \brief (RTC_CALR) Current Month */ -#define RTC_CALR_MONTH(value) ((RTC_CALR_MONTH_Msk & ((value) << RTC_CALR_MONTH_Pos))) -#define RTC_CALR_DAY_Pos 21 -#define RTC_CALR_DAY_Msk (0x7u << RTC_CALR_DAY_Pos) /**< \brief (RTC_CALR) Current Day in Current Week */ -#define RTC_CALR_DAY(value) ((RTC_CALR_DAY_Msk & ((value) << RTC_CALR_DAY_Pos))) -#define RTC_CALR_DATE_Pos 24 -#define RTC_CALR_DATE_Msk (0x3fu << RTC_CALR_DATE_Pos) /**< \brief (RTC_CALR) Current Day in Current Month */ -#define RTC_CALR_DATE(value) ((RTC_CALR_DATE_Msk & ((value) << RTC_CALR_DATE_Pos))) -/* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */ -#define RTC_TIMALR_SEC_Pos 0 -#define RTC_TIMALR_SEC_Msk (0x7fu << RTC_TIMALR_SEC_Pos) /**< \brief (RTC_TIMALR) Second Alarm */ -#define RTC_TIMALR_SEC(value) ((RTC_TIMALR_SEC_Msk & ((value) << RTC_TIMALR_SEC_Pos))) -#define RTC_TIMALR_SECEN (0x1u << 7) /**< \brief (RTC_TIMALR) Second Alarm Enable */ -#define RTC_TIMALR_MIN_Pos 8 -#define RTC_TIMALR_MIN_Msk (0x7fu << RTC_TIMALR_MIN_Pos) /**< \brief (RTC_TIMALR) Minute Alarm */ -#define RTC_TIMALR_MIN(value) ((RTC_TIMALR_MIN_Msk & ((value) << RTC_TIMALR_MIN_Pos))) -#define RTC_TIMALR_MINEN (0x1u << 15) /**< \brief (RTC_TIMALR) Minute Alarm Enable */ -#define RTC_TIMALR_HOUR_Pos 16 -#define RTC_TIMALR_HOUR_Msk (0x3fu << RTC_TIMALR_HOUR_Pos) /**< \brief (RTC_TIMALR) Hour Alarm */ -#define RTC_TIMALR_HOUR(value) ((RTC_TIMALR_HOUR_Msk & ((value) << RTC_TIMALR_HOUR_Pos))) -#define RTC_TIMALR_AMPM (0x1u << 22) /**< \brief (RTC_TIMALR) AM/PM Indicator */ -#define RTC_TIMALR_HOUREN (0x1u << 23) /**< \brief (RTC_TIMALR) Hour Alarm Enable */ -/* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */ -#define RTC_CALALR_MONTH_Pos 16 -#define RTC_CALALR_MONTH_Msk (0x1fu << RTC_CALALR_MONTH_Pos) /**< \brief (RTC_CALALR) Month Alarm */ -#define RTC_CALALR_MONTH(value) ((RTC_CALALR_MONTH_Msk & ((value) << RTC_CALALR_MONTH_Pos))) -#define RTC_CALALR_MTHEN (0x1u << 23) /**< \brief (RTC_CALALR) Month Alarm Enable */ -#define RTC_CALALR_DATE_Pos 24 -#define RTC_CALALR_DATE_Msk (0x3fu << RTC_CALALR_DATE_Pos) /**< \brief (RTC_CALALR) Date Alarm */ -#define RTC_CALALR_DATE(value) ((RTC_CALALR_DATE_Msk & ((value) << RTC_CALALR_DATE_Pos))) -#define RTC_CALALR_DATEEN (0x1u << 31) /**< \brief (RTC_CALALR) Date Alarm Enable */ -/* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */ -#define RTC_SR_ACKUPD (0x1u << 0) /**< \brief (RTC_SR) Acknowledge for Update */ -#define RTC_SR_ALARM (0x1u << 1) /**< \brief (RTC_SR) Alarm Flag */ -#define RTC_SR_SEC (0x1u << 2) /**< \brief (RTC_SR) Second Event */ -#define RTC_SR_TIMEV (0x1u << 3) /**< \brief (RTC_SR) Time Event */ -#define RTC_SR_CALEV (0x1u << 4) /**< \brief (RTC_SR) Calendar Event */ -/* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */ -#define RTC_SCCR_ACKCLR (0x1u << 0) /**< \brief (RTC_SCCR) Acknowledge Clear */ -#define RTC_SCCR_ALRCLR (0x1u << 1) /**< \brief (RTC_SCCR) Alarm Clear */ -#define RTC_SCCR_SECCLR (0x1u << 2) /**< \brief (RTC_SCCR) Second Clear */ -#define RTC_SCCR_TIMCLR (0x1u << 3) /**< \brief (RTC_SCCR) Time Clear */ -#define RTC_SCCR_CALCLR (0x1u << 4) /**< \brief (RTC_SCCR) Calendar Clear */ -/* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */ -#define RTC_IER_ACKEN (0x1u << 0) /**< \brief (RTC_IER) Acknowledge Update Interrupt Enable */ -#define RTC_IER_ALREN (0x1u << 1) /**< \brief (RTC_IER) Alarm Interrupt Enable */ -#define RTC_IER_SECEN (0x1u << 2) /**< \brief (RTC_IER) Second Event Interrupt Enable */ -#define RTC_IER_TIMEN (0x1u << 3) /**< \brief (RTC_IER) Time Event Interrupt Enable */ -#define RTC_IER_CALEN (0x1u << 4) /**< \brief (RTC_IER) Calendar Event Interrupt Enable */ -/* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */ -#define RTC_IDR_ACKDIS (0x1u << 0) /**< \brief (RTC_IDR) Acknowledge Update Interrupt Disable */ -#define RTC_IDR_ALRDIS (0x1u << 1) /**< \brief (RTC_IDR) Alarm Interrupt Disable */ -#define RTC_IDR_SECDIS (0x1u << 2) /**< \brief (RTC_IDR) Second Event Interrupt Disable */ -#define RTC_IDR_TIMDIS (0x1u << 3) /**< \brief (RTC_IDR) Time Event Interrupt Disable */ -#define RTC_IDR_CALDIS (0x1u << 4) /**< \brief (RTC_IDR) Calendar Event Interrupt Disable */ -/* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */ -#define RTC_IMR_ACK (0x1u << 0) /**< \brief (RTC_IMR) Acknowledge Update Interrupt Mask */ -#define RTC_IMR_ALR (0x1u << 1) /**< \brief (RTC_IMR) Alarm Interrupt Mask */ -#define RTC_IMR_SEC (0x1u << 2) /**< \brief (RTC_IMR) Second Event Interrupt Mask */ -#define RTC_IMR_TIM (0x1u << 3) /**< \brief (RTC_IMR) Time Event Interrupt Mask */ -#define RTC_IMR_CAL (0x1u << 4) /**< \brief (RTC_IMR) Calendar Event Interrupt Mask */ -/* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */ -#define RTC_VER_NVTIM (0x1u << 0) /**< \brief (RTC_VER) Non-valid Time */ -#define RTC_VER_NVCAL (0x1u << 1) /**< \brief (RTC_VER) Non-valid Calendar */ -#define RTC_VER_NVTIMALR (0x1u << 2) /**< \brief (RTC_VER) Non-valid Time Alarm */ -#define RTC_VER_NVCALALR (0x1u << 3) /**< \brief (RTC_VER) Non-valid Calendar Alarm */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Real-time Timer */ -/* ============================================================================= */ -/** \addtogroup SAM3S_RTT Real-time Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Rtt hardware registers */ -typedef struct { - RwReg RTT_MR; /**< \brief (Rtt Offset: 0x00) Mode Register */ - RwReg RTT_AR; /**< \brief (Rtt Offset: 0x04) Alarm Register */ - RoReg RTT_VR; /**< \brief (Rtt Offset: 0x08) Value Register */ - RoReg RTT_SR; /**< \brief (Rtt Offset: 0x0C) Status Register */ -} Rtt; -#endif /* __ASSEMBLY__ */ -/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ -#define RTT_MR_RTPRES_Pos 0 -#define RTT_MR_RTPRES_Msk (0xffffu << RTT_MR_RTPRES_Pos) /**< \brief (RTT_MR) Real-time Timer Prescaler Value */ -#define RTT_MR_RTPRES(value) ((RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos))) -#define RTT_MR_ALMIEN (0x1u << 16) /**< \brief (RTT_MR) Alarm Interrupt Enable */ -#define RTT_MR_RTTINCIEN (0x1u << 17) /**< \brief (RTT_MR) Real-time Timer Increment Interrupt Enable */ -#define RTT_MR_RTTRST (0x1u << 18) /**< \brief (RTT_MR) Real-time Timer Restart */ -/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ -#define RTT_AR_ALMV_Pos 0 -#define RTT_AR_ALMV_Msk (0xffffffffu << RTT_AR_ALMV_Pos) /**< \brief (RTT_AR) Alarm Value */ -#define RTT_AR_ALMV(value) ((RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos))) -/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ -#define RTT_VR_CRTV_Pos 0 -#define RTT_VR_CRTV_Msk (0xffffffffu << RTT_VR_CRTV_Pos) /**< \brief (RTT_VR) Current Real-time Value */ -/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ -#define RTT_SR_ALMS (0x1u << 0) /**< \brief (RTT_SR) Real-time Alarm Status */ -#define RTT_SR_RTTINC (0x1u << 1) /**< \brief (RTT_SR) Real-time Timer Increment */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Static Memory Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_SMC Static Memory Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief SmcCs_number hardware registers */ -typedef struct { - RwReg SMC_SETUP; /**< \brief (SmcCs_number Offset: 0x0) SMC Setup Register */ - RwReg SMC_PULSE; /**< \brief (SmcCs_number Offset: 0x4) SMC Pulse Register */ - RwReg SMC_CYCLE; /**< \brief (SmcCs_number Offset: 0x8) SMC Cycle Register */ - RwReg SMC_MODE; /**< \brief (SmcCs_number Offset: 0xC) SMC Mode Register */ -} SmcCs_number; -/** \brief Smc hardware registers */ -typedef struct { - SmcCs_number SMC_CS_NUMBER[5]; /**< \brief (Smc Offset: 0x0) CS_number = 0 .. 4 */ - RwReg Reserved1[12]; - RwReg SMC_OCMS; /**< \brief (Smc Offset: 0x80) SMC OCMS MODE Register */ - WoReg SMC_KEY1; /**< \brief (Smc Offset: 0x84) SMC OCMS KEY1 Register */ - WoReg SMC_KEY2; /**< \brief (Smc Offset: 0x88) SMC OCMS KEY2 Register */ - RwReg Reserved2[22]; - RwReg SMC_WPMR; /**< \brief (Smc Offset: 0xE4) SMC Write Protect Mode Register */ - RoReg SMC_WPSR; /**< \brief (Smc Offset: 0xE8) SMC Write Protect Status Register */ -} Smc; -#endif /* __ASSEMBLY__ */ -/* -------- SMC_SETUP : (SMC Offset: N/A) SMC Setup Register -------- */ -#define SMC_SETUP_NWE_SETUP_Pos 0 -#define SMC_SETUP_NWE_SETUP_Msk (0x3fu << SMC_SETUP_NWE_SETUP_Pos) /**< \brief (SMC_SETUP) NWE Setup Length */ -#define SMC_SETUP_NWE_SETUP(value) ((SMC_SETUP_NWE_SETUP_Msk & ((value) << SMC_SETUP_NWE_SETUP_Pos))) -#define SMC_SETUP_NCS_WR_SETUP_Pos 8 -#define SMC_SETUP_NCS_WR_SETUP_Msk (0x3fu << SMC_SETUP_NCS_WR_SETUP_Pos) /**< \brief (SMC_SETUP) NCS Setup Length in WRITE Access */ -#define SMC_SETUP_NCS_WR_SETUP(value) ((SMC_SETUP_NCS_WR_SETUP_Msk & ((value) << SMC_SETUP_NCS_WR_SETUP_Pos))) -#define SMC_SETUP_NRD_SETUP_Pos 16 -#define SMC_SETUP_NRD_SETUP_Msk (0x3fu << SMC_SETUP_NRD_SETUP_Pos) /**< \brief (SMC_SETUP) NRD Setup Length */ -#define SMC_SETUP_NRD_SETUP(value) ((SMC_SETUP_NRD_SETUP_Msk & ((value) << SMC_SETUP_NRD_SETUP_Pos))) -#define SMC_SETUP_NCS_RD_SETUP_Pos 24 -#define SMC_SETUP_NCS_RD_SETUP_Msk (0x3fu << SMC_SETUP_NCS_RD_SETUP_Pos) /**< \brief (SMC_SETUP) NCS Setup Length in READ Access */ -#define SMC_SETUP_NCS_RD_SETUP(value) ((SMC_SETUP_NCS_RD_SETUP_Msk & ((value) << SMC_SETUP_NCS_RD_SETUP_Pos))) -/* -------- SMC_PULSE : (SMC Offset: N/A) SMC Pulse Register -------- */ -#define SMC_PULSE_NWE_PULSE_Pos 0 -#define SMC_PULSE_NWE_PULSE_Msk (0x7fu << SMC_PULSE_NWE_PULSE_Pos) /**< \brief (SMC_PULSE) NWE Pulse Length */ -#define SMC_PULSE_NWE_PULSE(value) ((SMC_PULSE_NWE_PULSE_Msk & ((value) << SMC_PULSE_NWE_PULSE_Pos))) -#define SMC_PULSE_NCS_WR_PULSE_Pos 8 -#define SMC_PULSE_NCS_WR_PULSE_Msk (0x7fu << SMC_PULSE_NCS_WR_PULSE_Pos) /**< \brief (SMC_PULSE) NCS Pulse Length in WRITE Access */ -#define SMC_PULSE_NCS_WR_PULSE(value) ((SMC_PULSE_NCS_WR_PULSE_Msk & ((value) << SMC_PULSE_NCS_WR_PULSE_Pos))) -#define SMC_PULSE_NRD_PULSE_Pos 16 -#define SMC_PULSE_NRD_PULSE_Msk (0x7fu << SMC_PULSE_NRD_PULSE_Pos) /**< \brief (SMC_PULSE) NRD Pulse Length */ -#define SMC_PULSE_NRD_PULSE(value) ((SMC_PULSE_NRD_PULSE_Msk & ((value) << SMC_PULSE_NRD_PULSE_Pos))) -#define SMC_PULSE_NCS_RD_PULSE_Pos 24 -#define SMC_PULSE_NCS_RD_PULSE_Msk (0x7fu << SMC_PULSE_NCS_RD_PULSE_Pos) /**< \brief (SMC_PULSE) NCS Pulse Length in READ Access */ -#define SMC_PULSE_NCS_RD_PULSE(value) ((SMC_PULSE_NCS_RD_PULSE_Msk & ((value) << SMC_PULSE_NCS_RD_PULSE_Pos))) -/* -------- SMC_CYCLE : (SMC Offset: N/A) SMC Cycle Register -------- */ -#define SMC_CYCLE_NWE_CYCLE_Pos 0 -#define SMC_CYCLE_NWE_CYCLE_Msk (0x1ffu << SMC_CYCLE_NWE_CYCLE_Pos) /**< \brief (SMC_CYCLE) Total Write Cycle Length */ -#define SMC_CYCLE_NWE_CYCLE(value) ((SMC_CYCLE_NWE_CYCLE_Msk & ((value) << SMC_CYCLE_NWE_CYCLE_Pos))) -#define SMC_CYCLE_NRD_CYCLE_Pos 16 -#define SMC_CYCLE_NRD_CYCLE_Msk (0x1ffu << SMC_CYCLE_NRD_CYCLE_Pos) /**< \brief (SMC_CYCLE) Total Read Cycle Length */ -#define SMC_CYCLE_NRD_CYCLE(value) ((SMC_CYCLE_NRD_CYCLE_Msk & ((value) << SMC_CYCLE_NRD_CYCLE_Pos))) -/* -------- SMC_MODE : (SMC Offset: N/A) SMC Mode Register -------- */ -#define SMC_MODE_READ_MODE (0x1u << 0) /**< \brief (SMC_MODE) */ -#define SMC_MODE_WRITE_MODE (0x1u << 1) /**< \brief (SMC_MODE) */ -#define SMC_MODE_EXNW_MODE_Pos 4 -#define SMC_MODE_EXNW_MODE_Msk (0x3u << SMC_MODE_EXNW_MODE_Pos) /**< \brief (SMC_MODE) NWAIT Mode */ -#define SMC_MODE_EXNW_MODE_DISABLED (0x0u << 4) /**< \brief (SMC_MODE) Disabled */ -#define SMC_MODE_EXNW_MODE_FROZEN (0x2u << 4) /**< \brief (SMC_MODE) Frozen Mode */ -#define SMC_MODE_EXNW_MODE_READY (0x3u << 4) /**< \brief (SMC_MODE) Ready Mode */ -#define SMC_MODE_DBW_Pos 12 -#define SMC_MODE_DBW_Msk (0x3u << SMC_MODE_DBW_Pos) /**< \brief (SMC_MODE) Data Bus Width */ -#define SMC_MODE_DBW_8_BIT (0x0u << 12) /**< \brief (SMC_MODE) 8-bit bus */ -#define SMC_MODE_DBW_16_BIT (0x1u << 12) /**< \brief (SMC_MODE) 16-bit bus */ -#define SMC_MODE_DBW_32_BIT (0x2u << 12) /**< \brief (SMC_MODE) 32-bit bus */ -#define SMC_MODE_TDF_CYCLES_Pos 16 -#define SMC_MODE_TDF_CYCLES_Msk (0xfu << SMC_MODE_TDF_CYCLES_Pos) /**< \brief (SMC_MODE) Data Float Time */ -#define SMC_MODE_TDF_CYCLES(value) ((SMC_MODE_TDF_CYCLES_Msk & ((value) << SMC_MODE_TDF_CYCLES_Pos))) -#define SMC_MODE_TDF_MODE (0x1u << 20) /**< \brief (SMC_MODE) TDF Optimization */ -#define SMC_MODE_PMEN (0x1u << 24) /**< \brief (SMC_MODE) Page Mode Enabled */ -#define SMC_MODE_PS_Pos 28 -#define SMC_MODE_PS_Msk (0x3u << SMC_MODE_PS_Pos) /**< \brief (SMC_MODE) Page Size */ -#define SMC_MODE_PS_4_BYTE (0x0u << 28) /**< \brief (SMC_MODE) 4-byte page */ -#define SMC_MODE_PS_8_BYTE (0x1u << 28) /**< \brief (SMC_MODE) 8-byte page */ -#define SMC_MODE_PS_16_BYTE (0x2u << 28) /**< \brief (SMC_MODE) 16-byte page */ -#define SMC_MODE_PS_32_BYTE (0x3u << 28) /**< \brief (SMC_MODE) 32-byte page */ -/* -------- SMC_OCMS : (SMC Offset: 0x80) SMC OCMS MODE Register -------- */ -#define SMC_OCMS_SMSE (0x1u << 0) /**< \brief (SMC_OCMS) Static Memory Controller Scrambling Enable */ -#define SMC_OCMS_CS0SE (0x1u << 16) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS1SE (0x1u << 17) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS2SE (0x1u << 18) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -#define SMC_OCMS_CS3SE (0x1u << 19) /**< \brief (SMC_OCMS) Chip Select (x = 0 to 3) Scrambling Enable */ -/* -------- SMC_KEY1 : (SMC Offset: 0x84) SMC OCMS KEY1 Register -------- */ -#define SMC_KEY1_KEY1_Pos 0 -#define SMC_KEY1_KEY1_Msk (0xffffffffu << SMC_KEY1_KEY1_Pos) /**< \brief (SMC_KEY1) Off Chip Memory Scrambling (OCMS) Key Part 1 */ -#define SMC_KEY1_KEY1(value) ((SMC_KEY1_KEY1_Msk & ((value) << SMC_KEY1_KEY1_Pos))) -/* -------- SMC_KEY2 : (SMC Offset: 0x88) SMC OCMS KEY2 Register -------- */ -#define SMC_KEY2_KEY2_Pos 0 -#define SMC_KEY2_KEY2_Msk (0xffffffffu << SMC_KEY2_KEY2_Pos) /**< \brief (SMC_KEY2) Off Chip Memory Scrambling (OCMS) Key Part 2 */ -#define SMC_KEY2_KEY2(value) ((SMC_KEY2_KEY2_Msk & ((value) << SMC_KEY2_KEY2_Pos))) -/* -------- SMC_WPMR : (SMC Offset: 0xE4) SMC Write Protect Mode Register -------- */ -#define SMC_WPMR_WPEN (0x1u << 0) /**< \brief (SMC_WPMR) Write Protect Enable */ -#define SMC_WPMR_WPKEY_Pos 8 -#define SMC_WPMR_WPKEY_Msk (0xffffffu << SMC_WPMR_WPKEY_Pos) /**< \brief (SMC_WPMR) Write Protect KEY */ -#define SMC_WPMR_WPKEY(value) ((SMC_WPMR_WPKEY_Msk & ((value) << SMC_WPMR_WPKEY_Pos))) -/* -------- SMC_WPSR : (SMC Offset: 0xE8) SMC Write Protect Status Register -------- */ -#define SMC_WPSR_WPVS (0x1u << 0) /**< \brief (SMC_WPSR) Write Protect Enable */ -#define SMC_WPSR_WPVSRC_Pos 8 -#define SMC_WPSR_WPVSRC_Msk (0xffffu << SMC_WPSR_WPVSRC_Pos) /**< \brief (SMC_WPSR) Write Protect Violation Source */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Serial Peripheral Interface */ -/* ============================================================================= */ -/** \addtogroup SAM3S_SPI Serial Peripheral Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Spi hardware registers */ -typedef struct { - WoReg SPI_CR; /**< \brief (Spi Offset: 0x00) Control Register */ - RwReg SPI_MR; /**< \brief (Spi Offset: 0x04) Mode Register */ - RoReg SPI_RDR; /**< \brief (Spi Offset: 0x08) Receive Data Register */ - WoReg SPI_TDR; /**< \brief (Spi Offset: 0x0C) Transmit Data Register */ - RoReg SPI_SR; /**< \brief (Spi Offset: 0x10) Status Register */ - WoReg SPI_IER; /**< \brief (Spi Offset: 0x14) Interrupt Enable Register */ - WoReg SPI_IDR; /**< \brief (Spi Offset: 0x18) Interrupt Disable Register */ - RoReg SPI_IMR; /**< \brief (Spi Offset: 0x1C) Interrupt Mask Register */ - RwReg Reserved1[4]; - RwReg SPI_CSR[4]; /**< \brief (Spi Offset: 0x30) Chip Select Register */ - RwReg Reserved2[41]; - RwReg SPI_WPMR; /**< \brief (Spi Offset: 0xE4) Write Protection Control Register */ - RoReg SPI_WPSR; /**< \brief (Spi Offset: 0xE8) Write Protection Status Register */ - RwReg Reserved3[5]; - RwReg SPI_RPR; /**< \brief (Spi Offset: 0x100) Receive Pointer Register */ - RwReg SPI_RCR; /**< \brief (Spi Offset: 0x104) Receive Counter Register */ - RwReg SPI_TPR; /**< \brief (Spi Offset: 0x108) Transmit Pointer Register */ - RwReg SPI_TCR; /**< \brief (Spi Offset: 0x10C) Transmit Counter Register */ - RwReg SPI_RNPR; /**< \brief (Spi Offset: 0x110) Receive Next Pointer Register */ - RwReg SPI_RNCR; /**< \brief (Spi Offset: 0x114) Receive Next Counter Register */ - RwReg SPI_TNPR; /**< \brief (Spi Offset: 0x118) Transmit Next Pointer Register */ - RwReg SPI_TNCR; /**< \brief (Spi Offset: 0x11C) Transmit Next Counter Register */ - WoReg SPI_PTCR; /**< \brief (Spi Offset: 0x120) Transfer Control Register */ - RoReg SPI_PTSR; /**< \brief (Spi Offset: 0x124) Transfer Status Register */ -} Spi; -#endif /* __ASSEMBLY__ */ -/* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ -#define SPI_CR_SPIEN (0x1u << 0) /**< \brief (SPI_CR) SPI Enable */ -#define SPI_CR_SPIDIS (0x1u << 1) /**< \brief (SPI_CR) SPI Disable */ -#define SPI_CR_SWRST (0x1u << 7) /**< \brief (SPI_CR) SPI Software Reset */ -#define SPI_CR_LASTXFER (0x1u << 24) /**< \brief (SPI_CR) Last Transfer */ -/* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */ -#define SPI_MR_MSTR (0x1u << 0) /**< \brief (SPI_MR) Master/Slave Mode */ -#define SPI_MR_PS (0x1u << 1) /**< \brief (SPI_MR) Peripheral Select */ -#define SPI_MR_PCSDEC (0x1u << 2) /**< \brief (SPI_MR) Chip Select Decode */ -#define SPI_MR_MODFDIS (0x1u << 4) /**< \brief (SPI_MR) Mode Fault Detection */ -#define SPI_MR_WDRBT (0x1u << 5) /**< \brief (SPI_MR) Wait Data Read Before Transfer */ -#define SPI_MR_LLB (0x1u << 7) /**< \brief (SPI_MR) Local Loopback Enable */ -#define SPI_MR_PCS_Pos 16 -#define SPI_MR_PCS_Msk (0xfu << SPI_MR_PCS_Pos) /**< \brief (SPI_MR) Peripheral Chip Select */ -#define SPI_MR_PCS(value) ((SPI_MR_PCS_Msk & ((value) << SPI_MR_PCS_Pos))) -#define SPI_MR_DLYBCS_Pos 24 -#define SPI_MR_DLYBCS_Msk (0xffu << SPI_MR_DLYBCS_Pos) /**< \brief (SPI_MR) Delay Between Chip Selects */ -#define SPI_MR_DLYBCS(value) ((SPI_MR_DLYBCS_Msk & ((value) << SPI_MR_DLYBCS_Pos))) -/* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */ -#define SPI_RDR_RD_Pos 0 -#define SPI_RDR_RD_Msk (0xffffu << SPI_RDR_RD_Pos) /**< \brief (SPI_RDR) Receive Data */ -#define SPI_RDR_PCS_Pos 16 -#define SPI_RDR_PCS_Msk (0xfu << SPI_RDR_PCS_Pos) /**< \brief (SPI_RDR) Peripheral Chip Select */ -/* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */ -#define SPI_TDR_TD_Pos 0 -#define SPI_TDR_TD_Msk (0xffffu << SPI_TDR_TD_Pos) /**< \brief (SPI_TDR) Transmit Data */ -#define SPI_TDR_TD(value) ((SPI_TDR_TD_Msk & ((value) << SPI_TDR_TD_Pos))) -#define SPI_TDR_PCS_Pos 16 -#define SPI_TDR_PCS_Msk (0xfu << SPI_TDR_PCS_Pos) /**< \brief (SPI_TDR) Peripheral Chip Select */ -#define SPI_TDR_PCS(value) ((SPI_TDR_PCS_Msk & ((value) << SPI_TDR_PCS_Pos))) -#define SPI_TDR_LASTXFER (0x1u << 24) /**< \brief (SPI_TDR) Last Transfer */ -/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ -#define SPI_SR_RDRF (0x1u << 0) /**< \brief (SPI_SR) Receive Data Register Full */ -#define SPI_SR_TDRE (0x1u << 1) /**< \brief (SPI_SR) Transmit Data Register Empty */ -#define SPI_SR_MODF (0x1u << 2) /**< \brief (SPI_SR) Mode Fault Error */ -#define SPI_SR_OVRES (0x1u << 3) /**< \brief (SPI_SR) Overrun Error Status */ -#define SPI_SR_ENDRX (0x1u << 4) /**< \brief (SPI_SR) End of RX buffer */ -#define SPI_SR_ENDTX (0x1u << 5) /**< \brief (SPI_SR) End of TX buffer */ -#define SPI_SR_RXBUFF (0x1u << 6) /**< \brief (SPI_SR) RX Buffer Full */ -#define SPI_SR_TXBUFE (0x1u << 7) /**< \brief (SPI_SR) TX Buffer Empty */ -#define SPI_SR_NSSR (0x1u << 8) /**< \brief (SPI_SR) NSS Rising */ -#define SPI_SR_TXEMPTY (0x1u << 9) /**< \brief (SPI_SR) Transmission Registers Empty */ -#define SPI_SR_UNDES (0x1u << 10) /**< \brief (SPI_SR) Underrun Error Status (Slave Mode Only) */ -#define SPI_SR_SPIENS (0x1u << 16) /**< \brief (SPI_SR) SPI Enable Status */ -/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ -#define SPI_IER_RDRF (0x1u << 0) /**< \brief (SPI_IER) Receive Data Register Full Interrupt Enable */ -#define SPI_IER_TDRE (0x1u << 1) /**< \brief (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */ -#define SPI_IER_MODF (0x1u << 2) /**< \brief (SPI_IER) Mode Fault Error Interrupt Enable */ -#define SPI_IER_OVRES (0x1u << 3) /**< \brief (SPI_IER) Overrun Error Interrupt Enable */ -#define SPI_IER_ENDRX (0x1u << 4) /**< \brief (SPI_IER) End of Receive Buffer Interrupt Enable */ -#define SPI_IER_ENDTX (0x1u << 5) /**< \brief (SPI_IER) End of Transmit Buffer Interrupt Enable */ -#define SPI_IER_RXBUFF (0x1u << 6) /**< \brief (SPI_IER) Receive Buffer Full Interrupt Enable */ -#define SPI_IER_TXBUFE (0x1u << 7) /**< \brief (SPI_IER) Transmit Buffer Empty Interrupt Enable */ -#define SPI_IER_NSSR (0x1u << 8) /**< \brief (SPI_IER) NSS Rising Interrupt Enable */ -#define SPI_IER_TXEMPTY (0x1u << 9) /**< \brief (SPI_IER) Transmission Registers Empty Enable */ -#define SPI_IER_UNDES (0x1u << 10) /**< \brief (SPI_IER) Underrun Error Interrupt Enable */ -/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ -#define SPI_IDR_RDRF (0x1u << 0) /**< \brief (SPI_IDR) Receive Data Register Full Interrupt Disable */ -#define SPI_IDR_TDRE (0x1u << 1) /**< \brief (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */ -#define SPI_IDR_MODF (0x1u << 2) /**< \brief (SPI_IDR) Mode Fault Error Interrupt Disable */ -#define SPI_IDR_OVRES (0x1u << 3) /**< \brief (SPI_IDR) Overrun Error Interrupt Disable */ -#define SPI_IDR_ENDRX (0x1u << 4) /**< \brief (SPI_IDR) End of Receive Buffer Interrupt Disable */ -#define SPI_IDR_ENDTX (0x1u << 5) /**< \brief (SPI_IDR) End of Transmit Buffer Interrupt Disable */ -#define SPI_IDR_RXBUFF (0x1u << 6) /**< \brief (SPI_IDR) Receive Buffer Full Interrupt Disable */ -#define SPI_IDR_TXBUFE (0x1u << 7) /**< \brief (SPI_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SPI_IDR_NSSR (0x1u << 8) /**< \brief (SPI_IDR) NSS Rising Interrupt Disable */ -#define SPI_IDR_TXEMPTY (0x1u << 9) /**< \brief (SPI_IDR) Transmission Registers Empty Disable */ -#define SPI_IDR_UNDES (0x1u << 10) /**< \brief (SPI_IDR) Underrun Error Interrupt Disable */ -/* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */ -#define SPI_IMR_RDRF (0x1u << 0) /**< \brief (SPI_IMR) Receive Data Register Full Interrupt Mask */ -#define SPI_IMR_TDRE (0x1u << 1) /**< \brief (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */ -#define SPI_IMR_MODF (0x1u << 2) /**< \brief (SPI_IMR) Mode Fault Error Interrupt Mask */ -#define SPI_IMR_OVRES (0x1u << 3) /**< \brief (SPI_IMR) Overrun Error Interrupt Mask */ -#define SPI_IMR_ENDRX (0x1u << 4) /**< \brief (SPI_IMR) End of Receive Buffer Interrupt Mask */ -#define SPI_IMR_ENDTX (0x1u << 5) /**< \brief (SPI_IMR) End of Transmit Buffer Interrupt Mask */ -#define SPI_IMR_RXBUFF (0x1u << 6) /**< \brief (SPI_IMR) Receive Buffer Full Interrupt Mask */ -#define SPI_IMR_TXBUFE (0x1u << 7) /**< \brief (SPI_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SPI_IMR_NSSR (0x1u << 8) /**< \brief (SPI_IMR) NSS Rising Interrupt Mask */ -#define SPI_IMR_TXEMPTY (0x1u << 9) /**< \brief (SPI_IMR) Transmission Registers Empty Mask */ -#define SPI_IMR_UNDES (0x1u << 10) /**< \brief (SPI_IMR) Underrun Error Interrupt Mask */ -/* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */ -#define SPI_CSR_CPOL (0x1u << 0) /**< \brief (SPI_CSR[4]) Clock Polarity */ -#define SPI_CSR_NCPHA (0x1u << 1) /**< \brief (SPI_CSR[4]) Clock Phase */ -#define SPI_CSR_CSNAAT (0x1u << 2) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_CSAAT (0x1u << 3) /**< \brief (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ -#define SPI_CSR_BITS_Pos 4 -#define SPI_CSR_BITS_Msk (0xfu << SPI_CSR_BITS_Pos) /**< \brief (SPI_CSR[4]) Bits Per Transfer */ -#define SPI_CSR_BITS_8_BIT (0x0u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_BITS_9_BIT (0x1u << 4) /**< \brief (SPI_CSR[4]) 9_bits for transfer */ -#define SPI_CSR_BITS_10_BIT (0x2u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_BITS_11_BIT (0x3u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_BITS_12_BIT (0x4u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_BITS_13_BIT (0x5u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_BITS_14_BIT (0x6u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_BITS_15_BIT (0x7u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_BITS_16_BIT (0x8u << 4) /**< \brief (SPI_CSR[4]) 8_bits for transfer */ -#define SPI_CSR_SCBR_Pos 8 -#define SPI_CSR_SCBR_Msk (0xffu << SPI_CSR_SCBR_Pos) /**< \brief (SPI_CSR[4]) Serial Clock Baud Rate */ -#define SPI_CSR_SCBR(value) ((SPI_CSR_SCBR_Msk & ((value) << SPI_CSR_SCBR_Pos))) -#define SPI_CSR_DLYBS_Pos 16 -#define SPI_CSR_DLYBS_Msk (0xffu << SPI_CSR_DLYBS_Pos) /**< \brief (SPI_CSR[4]) Delay Before SPCK */ -#define SPI_CSR_DLYBS(value) ((SPI_CSR_DLYBS_Msk & ((value) << SPI_CSR_DLYBS_Pos))) -#define SPI_CSR_DLYBCT_Pos 24 -#define SPI_CSR_DLYBCT_Msk (0xffu << SPI_CSR_DLYBCT_Pos) /**< \brief (SPI_CSR[4]) Delay Between Consecutive Transfers */ -#define SPI_CSR_DLYBCT(value) ((SPI_CSR_DLYBCT_Msk & ((value) << SPI_CSR_DLYBCT_Pos))) -/* -------- SPI_WPMR : (SPI Offset: 0xE4) Write Protection Control Register -------- */ -#define SPI_WPMR_SPIWPEN (0x1u << 0) /**< \brief (SPI_WPMR) SPI Write Protection Enable */ -#define SPI_WPMR_SPIWPKEY_Pos 8 -#define SPI_WPMR_SPIWPKEY_Msk (0xffffffu << SPI_WPMR_SPIWPKEY_Pos) /**< \brief (SPI_WPMR) SPI Write Protection Key Password */ -#define SPI_WPMR_SPIWPKEY(value) ((SPI_WPMR_SPIWPKEY_Msk & ((value) << SPI_WPMR_SPIWPKEY_Pos))) -/* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */ -#define SPI_WPSR_SPIWPVS_Pos 0 -#define SPI_WPSR_SPIWPVS_Msk (0x7u << SPI_WPSR_SPIWPVS_Pos) /**< \brief (SPI_WPSR) SPI Write Protection Violation Status */ -#define SPI_WPSR_SPIWPVSRC_Pos 8 -#define SPI_WPSR_SPIWPVSRC_Msk (0xffu << SPI_WPSR_SPIWPVSRC_Pos) /**< \brief (SPI_WPSR) SPI Write Protection Violation Source */ -/* -------- SPI_RPR : (SPI Offset: 0x100) Receive Pointer Register -------- */ -#define SPI_RPR_RXPTR_Pos 0 -#define SPI_RPR_RXPTR_Msk (0xffffffffu << SPI_RPR_RXPTR_Pos) /**< \brief (SPI_RPR) Receive Pointer Register */ -#define SPI_RPR_RXPTR(value) ((SPI_RPR_RXPTR_Msk & ((value) << SPI_RPR_RXPTR_Pos))) -/* -------- SPI_RCR : (SPI Offset: 0x104) Receive Counter Register -------- */ -#define SPI_RCR_RXCTR_Pos 0 -#define SPI_RCR_RXCTR_Msk (0xffffu << SPI_RCR_RXCTR_Pos) /**< \brief (SPI_RCR) Receive Counter Register */ -#define SPI_RCR_RXCTR(value) ((SPI_RCR_RXCTR_Msk & ((value) << SPI_RCR_RXCTR_Pos))) -/* -------- SPI_TPR : (SPI Offset: 0x108) Transmit Pointer Register -------- */ -#define SPI_TPR_TXPTR_Pos 0 -#define SPI_TPR_TXPTR_Msk (0xffffffffu << SPI_TPR_TXPTR_Pos) /**< \brief (SPI_TPR) Transmit Counter Register */ -#define SPI_TPR_TXPTR(value) ((SPI_TPR_TXPTR_Msk & ((value) << SPI_TPR_TXPTR_Pos))) -/* -------- SPI_TCR : (SPI Offset: 0x10C) Transmit Counter Register -------- */ -#define SPI_TCR_TXCTR_Pos 0 -#define SPI_TCR_TXCTR_Msk (0xffffu << SPI_TCR_TXCTR_Pos) /**< \brief (SPI_TCR) Transmit Counter Register */ -#define SPI_TCR_TXCTR(value) ((SPI_TCR_TXCTR_Msk & ((value) << SPI_TCR_TXCTR_Pos))) -/* -------- SPI_RNPR : (SPI Offset: 0x110) Receive Next Pointer Register -------- */ -#define SPI_RNPR_RXNPTR_Pos 0 -#define SPI_RNPR_RXNPTR_Msk (0xffffffffu << SPI_RNPR_RXNPTR_Pos) /**< \brief (SPI_RNPR) Receive Next Pointer */ -#define SPI_RNPR_RXNPTR(value) ((SPI_RNPR_RXNPTR_Msk & ((value) << SPI_RNPR_RXNPTR_Pos))) -/* -------- SPI_RNCR : (SPI Offset: 0x114) Receive Next Counter Register -------- */ -#define SPI_RNCR_RXNCTR_Pos 0 -#define SPI_RNCR_RXNCTR_Msk (0xffffu << SPI_RNCR_RXNCTR_Pos) /**< \brief (SPI_RNCR) Receive Next Counter */ -#define SPI_RNCR_RXNCTR(value) ((SPI_RNCR_RXNCTR_Msk & ((value) << SPI_RNCR_RXNCTR_Pos))) -/* -------- SPI_TNPR : (SPI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define SPI_TNPR_TXNPTR_Pos 0 -#define SPI_TNPR_TXNPTR_Msk (0xffffffffu << SPI_TNPR_TXNPTR_Pos) /**< \brief (SPI_TNPR) Transmit Next Pointer */ -#define SPI_TNPR_TXNPTR(value) ((SPI_TNPR_TXNPTR_Msk & ((value) << SPI_TNPR_TXNPTR_Pos))) -/* -------- SPI_TNCR : (SPI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define SPI_TNCR_TXNCTR_Pos 0 -#define SPI_TNCR_TXNCTR_Msk (0xffffu << SPI_TNCR_TXNCTR_Pos) /**< \brief (SPI_TNCR) Transmit Counter Next */ -#define SPI_TNCR_TXNCTR(value) ((SPI_TNCR_TXNCTR_Msk & ((value) << SPI_TNCR_TXNCTR_Pos))) -/* -------- SPI_PTCR : (SPI Offset: 0x120) Transfer Control Register -------- */ -#define SPI_PTCR_RXTEN (0x1u << 0) /**< \brief (SPI_PTCR) Receiver Transfer Enable */ -#define SPI_PTCR_RXTDIS (0x1u << 1) /**< \brief (SPI_PTCR) Receiver Transfer Disable */ -#define SPI_PTCR_TXTEN (0x1u << 8) /**< \brief (SPI_PTCR) Transmitter Transfer Enable */ -#define SPI_PTCR_TXTDIS (0x1u << 9) /**< \brief (SPI_PTCR) Transmitter Transfer Disable */ -/* -------- SPI_PTSR : (SPI Offset: 0x124) Transfer Status Register -------- */ -#define SPI_PTSR_RXTEN (0x1u << 0) /**< \brief (SPI_PTSR) Receiver Transfer Enable */ -#define SPI_PTSR_TXTEN (0x1u << 8) /**< \brief (SPI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Synchronous Serial Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_SSC Synchronous Serial Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Ssc hardware registers */ -typedef struct { - WoReg SSC_CR; /**< \brief (Ssc Offset: 0x0) Control Register */ - RwReg SSC_CMR; /**< \brief (Ssc Offset: 0x4) Clock Mode Register */ - RwReg Reserved1[2]; - RwReg SSC_RCMR; /**< \brief (Ssc Offset: 0x10) Receive Clock Mode Register */ - RwReg SSC_RFMR; /**< \brief (Ssc Offset: 0x14) Receive Frame Mode Register */ - RwReg SSC_TCMR; /**< \brief (Ssc Offset: 0x18) Transmit Clock Mode Register */ - RwReg SSC_TFMR; /**< \brief (Ssc Offset: 0x1C) Transmit Frame Mode Register */ - RoReg SSC_RHR; /**< \brief (Ssc Offset: 0x20) Receive Holding Register */ - WoReg SSC_THR; /**< \brief (Ssc Offset: 0x24) Transmit Holding Register */ - RwReg Reserved2[2]; - RoReg SSC_RSHR; /**< \brief (Ssc Offset: 0x30) Receive Sync. Holding Register */ - RwReg SSC_TSHR; /**< \brief (Ssc Offset: 0x34) Transmit Sync. Holding Register */ - RwReg SSC_RC0R; /**< \brief (Ssc Offset: 0x38) Receive Compare 0 Register */ - RwReg SSC_RC1R; /**< \brief (Ssc Offset: 0x3C) Receive Compare 1 Register */ - RoReg SSC_SR; /**< \brief (Ssc Offset: 0x40) Status Register */ - WoReg SSC_IER; /**< \brief (Ssc Offset: 0x44) Interrupt Enable Register */ - WoReg SSC_IDR; /**< \brief (Ssc Offset: 0x48) Interrupt Disable Register */ - RoReg SSC_IMR; /**< \brief (Ssc Offset: 0x4C) Interrupt Mask Register */ - RwReg Reserved3[37]; - RwReg SSC_WPMR; /**< \brief (Ssc Offset: 0xE4) Write Protect Mode Register */ - RoReg SSC_WPSR; /**< \brief (Ssc Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[5]; - RwReg SSC_RPR; /**< \brief (Ssc Offset: 0x100) Receive Pointer Register */ - RwReg SSC_RCR; /**< \brief (Ssc Offset: 0x104) Receive Counter Register */ - RwReg SSC_TPR; /**< \brief (Ssc Offset: 0x108) Transmit Pointer Register */ - RwReg SSC_TCR; /**< \brief (Ssc Offset: 0x10C) Transmit Counter Register */ - RwReg SSC_RNPR; /**< \brief (Ssc Offset: 0x110) Receive Next Pointer Register */ - RwReg SSC_RNCR; /**< \brief (Ssc Offset: 0x114) Receive Next Counter Register */ - RwReg SSC_TNPR; /**< \brief (Ssc Offset: 0x118) Transmit Next Pointer Register */ - RwReg SSC_TNCR; /**< \brief (Ssc Offset: 0x11C) Transmit Next Counter Register */ - WoReg SSC_PTCR; /**< \brief (Ssc Offset: 0x120) Transfer Control Register */ - RoReg SSC_PTSR; /**< \brief (Ssc Offset: 0x124) Transfer Status Register */ -} Ssc; -#endif /* __ASSEMBLY__ */ -/* -------- SSC_CR : (SSC Offset: 0x0) Control Register -------- */ -#define SSC_CR_RXEN (0x1u << 0) /**< \brief (SSC_CR) Receive Enable */ -#define SSC_CR_RXDIS (0x1u << 1) /**< \brief (SSC_CR) Receive Disable */ -#define SSC_CR_TXEN (0x1u << 8) /**< \brief (SSC_CR) Transmit Enable */ -#define SSC_CR_TXDIS (0x1u << 9) /**< \brief (SSC_CR) Transmit Disable */ -#define SSC_CR_SWRST (0x1u << 15) /**< \brief (SSC_CR) Software Reset */ -/* -------- SSC_CMR : (SSC Offset: 0x4) Clock Mode Register -------- */ -#define SSC_CMR_DIV_Pos 0 -#define SSC_CMR_DIV_Msk (0xfffu << SSC_CMR_DIV_Pos) /**< \brief (SSC_CMR) Clock Divider */ -#define SSC_CMR_DIV(value) ((SSC_CMR_DIV_Msk & ((value) << SSC_CMR_DIV_Pos))) -/* -------- SSC_RCMR : (SSC Offset: 0x10) Receive Clock Mode Register -------- */ -#define SSC_RCMR_CKS_Pos 0 -#define SSC_RCMR_CKS_Msk (0x3u << SSC_RCMR_CKS_Pos) /**< \brief (SSC_RCMR) Receive Clock Selection */ -#define SSC_RCMR_CKS_MCK (0x0u << 0) /**< \brief (SSC_RCMR) Divided Clock */ -#define SSC_RCMR_CKS_TK (0x1u << 0) /**< \brief (SSC_RCMR) TK Clock signal */ -#define SSC_RCMR_CKS_RK (0x2u << 0) /**< \brief (SSC_RCMR) RK pin */ -#define SSC_RCMR_CKO_Pos 2 -#define SSC_RCMR_CKO_Msk (0x7u << SSC_RCMR_CKO_Pos) /**< \brief (SSC_RCMR) Receive Clock Output Mode Selection */ -#define SSC_RCMR_CKO_NONE (0x0u << 2) /**< \brief (SSC_RCMR) None */ -#define SSC_RCMR_CKO_CONTINUOUS (0x1u << 2) /**< \brief (SSC_RCMR) Continuous Receive Clock */ -#define SSC_RCMR_CKO_TRANSFER (0x2u << 2) /**< \brief (SSC_RCMR) Receive Clock only during data transfers */ -#define SSC_RCMR_CKI (0x1u << 5) /**< \brief (SSC_RCMR) Receive Clock Inversion */ -#define SSC_RCMR_CKG_Pos 6 -#define SSC_RCMR_CKG_Msk (0x3u << SSC_RCMR_CKG_Pos) /**< \brief (SSC_RCMR) Receive Clock Gating Selection */ -#define SSC_RCMR_CKG_NONE (0x0u << 6) /**< \brief (SSC_RCMR) None */ -#define SSC_RCMR_CKG_CONTINUOUS (0x1u << 6) /**< \brief (SSC_RCMR) Continuous Receive Clock */ -#define SSC_RCMR_CKG_TRANSFER (0x2u << 6) /**< \brief (SSC_RCMR) Receive Clock only during data transfers */ -#define SSC_RCMR_START_Pos 8 -#define SSC_RCMR_START_Msk (0xfu << SSC_RCMR_START_Pos) /**< \brief (SSC_RCMR) Receive Start Selection */ -#define SSC_RCMR_START_CONTINUOUS (0x0u << 8) /**< \brief (SSC_RCMR) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data. */ -#define SSC_RCMR_START_TRANSMIT (0x1u << 8) /**< \brief (SSC_RCMR) Transmit start */ -#define SSC_RCMR_START_RF_LOW (0x2u << 8) /**< \brief (SSC_RCMR) Detection of a low level on RF signal */ -#define SSC_RCMR_START_RF_HIGH (0x3u << 8) /**< \brief (SSC_RCMR) Detection of a high level on RF signal */ -#define SSC_RCMR_START_RF_FALLING (0x4u << 8) /**< \brief (SSC_RCMR) Detection of a falling edge on RF signal */ -#define SSC_RCMR_START_RF_RISING (0x5u << 8) /**< \brief (SSC_RCMR) Detection of a rising edge on RF signal */ -#define SSC_RCMR_START_RF_LEVEL (0x6u << 8) /**< \brief (SSC_RCMR) Detection of any level change on RF signal */ -#define SSC_RCMR_START_RF_EDGE (0x7u << 8) /**< \brief (SSC_RCMR) Detection of any edge on RF signal */ -#define SSC_RCMR_START_CMP_0 (0x8u << 8) /**< \brief (SSC_RCMR) Compare 0 */ -#define SSC_RCMR_STOP (0x1u << 12) /**< \brief (SSC_RCMR) Receive Stop Selection */ -#define SSC_RCMR_STTDLY_Pos 16 -#define SSC_RCMR_STTDLY_Msk (0xffu << SSC_RCMR_STTDLY_Pos) /**< \brief (SSC_RCMR) Receive Start Delay */ -#define SSC_RCMR_STTDLY(value) ((SSC_RCMR_STTDLY_Msk & ((value) << SSC_RCMR_STTDLY_Pos))) -#define SSC_RCMR_PERIOD_Pos 24 -#define SSC_RCMR_PERIOD_Msk (0xffu << SSC_RCMR_PERIOD_Pos) /**< \brief (SSC_RCMR) Receive Period Divider Selection */ -#define SSC_RCMR_PERIOD(value) ((SSC_RCMR_PERIOD_Msk & ((value) << SSC_RCMR_PERIOD_Pos))) -/* -------- SSC_RFMR : (SSC Offset: 0x14) Receive Frame Mode Register -------- */ -#define SSC_RFMR_DATLEN_Pos 0 -#define SSC_RFMR_DATLEN_Msk (0x1fu << SSC_RFMR_DATLEN_Pos) /**< \brief (SSC_RFMR) Data Length */ -#define SSC_RFMR_DATLEN(value) ((SSC_RFMR_DATLEN_Msk & ((value) << SSC_RFMR_DATLEN_Pos))) -#define SSC_RFMR_LOOP (0x1u << 5) /**< \brief (SSC_RFMR) Loop Mode */ -#define SSC_RFMR_MSBF (0x1u << 7) /**< \brief (SSC_RFMR) Most Significant Bit First */ -#define SSC_RFMR_DATNB_Pos 8 -#define SSC_RFMR_DATNB_Msk (0xfu << SSC_RFMR_DATNB_Pos) /**< \brief (SSC_RFMR) Data Number per Frame */ -#define SSC_RFMR_DATNB(value) ((SSC_RFMR_DATNB_Msk & ((value) << SSC_RFMR_DATNB_Pos))) -#define SSC_RFMR_FSLEN_Pos 16 -#define SSC_RFMR_FSLEN_Msk (0xfu << SSC_RFMR_FSLEN_Pos) /**< \brief (SSC_RFMR) Receive Frame Sync Length */ -#define SSC_RFMR_FSLEN(value) ((SSC_RFMR_FSLEN_Msk & ((value) << SSC_RFMR_FSLEN_Pos))) -#define SSC_RFMR_FSOS_Pos 20 -#define SSC_RFMR_FSOS_Msk (0x7u << SSC_RFMR_FSOS_Pos) /**< \brief (SSC_RFMR) Receive Frame Sync Output Selection */ -#define SSC_RFMR_FSOS_NONE (0x0u << 20) /**< \brief (SSC_RFMR) None */ -#define SSC_RFMR_FSOS_NEGATIVE (0x1u << 20) /**< \brief (SSC_RFMR) Negative Pulse */ -#define SSC_RFMR_FSOS_POSITIVE (0x2u << 20) /**< \brief (SSC_RFMR) Positive Pulse */ -#define SSC_RFMR_FSOS_LOW (0x3u << 20) /**< \brief (SSC_RFMR) Driven Low during data transfer */ -#define SSC_RFMR_FSOS_HIGH (0x4u << 20) /**< \brief (SSC_RFMR) Driven High during data transfer */ -#define SSC_RFMR_FSOS_TOGGLING (0x5u << 20) /**< \brief (SSC_RFMR) Toggling at each start of data transfer */ -#define SSC_RFMR_FSEDGE (0x1u << 24) /**< \brief (SSC_RFMR) Frame Sync Edge Detection */ -#define SSC_RFMR_FSEDGE_POSITIVE (0x0u << 24) /**< \brief (SSC_RFMR) Positive Edge Detection */ -#define SSC_RFMR_FSEDGE_NEGATIVE (0x1u << 24) /**< \brief (SSC_RFMR) Negative Edge Detection */ -#define SSC_RFMR_FSLEN_EXT_Pos 28 -#define SSC_RFMR_FSLEN_EXT_Msk (0xfu << SSC_RFMR_FSLEN_EXT_Pos) /**< \brief (SSC_RFMR) FSLEN Field Extension */ -#define SSC_RFMR_FSLEN_EXT(value) ((SSC_RFMR_FSLEN_EXT_Msk & ((value) << SSC_RFMR_FSLEN_EXT_Pos))) -/* -------- SSC_TCMR : (SSC Offset: 0x18) Transmit Clock Mode Register -------- */ -#define SSC_TCMR_CKS_Pos 0 -#define SSC_TCMR_CKS_Msk (0x3u << SSC_TCMR_CKS_Pos) /**< \brief (SSC_TCMR) Transmit Clock Selection */ -#define SSC_TCMR_CKS_MCK (0x0u << 0) /**< \brief (SSC_TCMR) Divided Clock */ -#define SSC_TCMR_CKS_TK (0x1u << 0) /**< \brief (SSC_TCMR) TK Clock signal */ -#define SSC_TCMR_CKS_RK (0x2u << 0) /**< \brief (SSC_TCMR) RK pin */ -#define SSC_TCMR_CKO_Pos 2 -#define SSC_TCMR_CKO_Msk (0x7u << SSC_TCMR_CKO_Pos) /**< \brief (SSC_TCMR) Transmit Clock Output Mode Selection */ -#define SSC_TCMR_CKO_NONE (0x0u << 2) /**< \brief (SSC_TCMR) None */ -#define SSC_TCMR_CKO_CONTINUOUS (0x1u << 2) /**< \brief (SSC_TCMR) Continuous Receive Clock */ -#define SSC_TCMR_CKO_TRANSFER (0x2u << 2) /**< \brief (SSC_TCMR) Transmit Clock only during data transfers */ -#define SSC_TCMR_CKI (0x1u << 5) /**< \brief (SSC_TCMR) Transmit Clock Inversion */ -#define SSC_TCMR_CKG_Pos 6 -#define SSC_TCMR_CKG_Msk (0x3u << SSC_TCMR_CKG_Pos) /**< \brief (SSC_TCMR) Transmit Clock Gating Selection */ -#define SSC_TCMR_CKG_NONE (0x0u << 6) /**< \brief (SSC_TCMR) None */ -#define SSC_TCMR_CKG_CONTINUOUS (0x1u << 6) /**< \brief (SSC_TCMR) Transmit Clock enabled only if TF Low */ -#define SSC_TCMR_CKG_TRANSFER (0x2u << 6) /**< \brief (SSC_TCMR) Transmit Clock enabled only if TF High */ -#define SSC_TCMR_START_Pos 8 -#define SSC_TCMR_START_Msk (0xfu << SSC_TCMR_START_Pos) /**< \brief (SSC_TCMR) Transmit Start Selection */ -#define SSC_TCMR_START_CONTINUOUS (0x0u << 8) /**< \brief (SSC_TCMR) Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled), and immediately after the end of transfer of the previous data. */ -#define SSC_TCMR_START_RECEIVE (0x1u << 8) /**< \brief (SSC_TCMR) Receive start */ -#define SSC_TCMR_START_RF_LOW (0x2u << 8) /**< \brief (SSC_TCMR) Detection of a low level on TF signal */ -#define SSC_TCMR_START_RF_HIGH (0x3u << 8) /**< \brief (SSC_TCMR) Detection of a high level on TF signal */ -#define SSC_TCMR_START_RF_FALLING (0x4u << 8) /**< \brief (SSC_TCMR) Detection of a falling edge on TF signal */ -#define SSC_TCMR_START_RF_RISING (0x5u << 8) /**< \brief (SSC_TCMR) Detection of a rising edge on TF signal */ -#define SSC_TCMR_START_RF_LEVEL (0x6u << 8) /**< \brief (SSC_TCMR) Detection of any level change on TF signal */ -#define SSC_TCMR_START_RF_EDGE (0x7u << 8) /**< \brief (SSC_TCMR) Detection of any edge on TF signal */ -#define SSC_TCMR_START_CMP_0 (0x8u << 8) /**< \brief (SSC_TCMR) Compare 0 */ -#define SSC_TCMR_STTDLY_Pos 16 -#define SSC_TCMR_STTDLY_Msk (0xffu << SSC_TCMR_STTDLY_Pos) /**< \brief (SSC_TCMR) Transmit Start Delay */ -#define SSC_TCMR_STTDLY(value) ((SSC_TCMR_STTDLY_Msk & ((value) << SSC_TCMR_STTDLY_Pos))) -#define SSC_TCMR_PERIOD_Pos 24 -#define SSC_TCMR_PERIOD_Msk (0xffu << SSC_TCMR_PERIOD_Pos) /**< \brief (SSC_TCMR) Transmit Period Divider Selection */ -#define SSC_TCMR_PERIOD(value) ((SSC_TCMR_PERIOD_Msk & ((value) << SSC_TCMR_PERIOD_Pos))) -/* -------- SSC_TFMR : (SSC Offset: 0x1C) Transmit Frame Mode Register -------- */ -#define SSC_TFMR_DATLEN_Pos 0 -#define SSC_TFMR_DATLEN_Msk (0x1fu << SSC_TFMR_DATLEN_Pos) /**< \brief (SSC_TFMR) Data Length */ -#define SSC_TFMR_DATLEN(value) ((SSC_TFMR_DATLEN_Msk & ((value) << SSC_TFMR_DATLEN_Pos))) -#define SSC_TFMR_DATDEF (0x1u << 5) /**< \brief (SSC_TFMR) Data Default Value */ -#define SSC_TFMR_MSBF (0x1u << 7) /**< \brief (SSC_TFMR) Most Significant Bit First */ -#define SSC_TFMR_DATNB_Pos 8 -#define SSC_TFMR_DATNB_Msk (0xfu << SSC_TFMR_DATNB_Pos) /**< \brief (SSC_TFMR) Data Number per frame */ -#define SSC_TFMR_DATNB(value) ((SSC_TFMR_DATNB_Msk & ((value) << SSC_TFMR_DATNB_Pos))) -#define SSC_TFMR_FSLEN_Pos 16 -#define SSC_TFMR_FSLEN_Msk (0xfu << SSC_TFMR_FSLEN_Pos) /**< \brief (SSC_TFMR) Transmit Frame Sync Length */ -#define SSC_TFMR_FSLEN(value) ((SSC_TFMR_FSLEN_Msk & ((value) << SSC_TFMR_FSLEN_Pos))) -#define SSC_TFMR_FSOS_Pos 20 -#define SSC_TFMR_FSOS_Msk (0x7u << SSC_TFMR_FSOS_Pos) /**< \brief (SSC_TFMR) Transmit Frame Sync Output Selection */ -#define SSC_TFMR_FSOS_NONE (0x0u << 20) /**< \brief (SSC_TFMR) None */ -#define SSC_TFMR_FSOS_NEGATIVE (0x1u << 20) /**< \brief (SSC_TFMR) Negative Pulse */ -#define SSC_TFMR_FSOS_POSITIVE (0x2u << 20) /**< \brief (SSC_TFMR) Positive Pulse */ -#define SSC_TFMR_FSOS_LOW (0x3u << 20) /**< \brief (SSC_TFMR) Driven Low during data transfer */ -#define SSC_TFMR_FSOS_HIGH (0x4u << 20) /**< \brief (SSC_TFMR) Driven High during data transfer */ -#define SSC_TFMR_FSOS_TOGGLING (0x5u << 20) /**< \brief (SSC_TFMR) Toggling at each start of data transfer */ -#define SSC_TFMR_FSDEN (0x1u << 23) /**< \brief (SSC_TFMR) Frame Sync Data Enable */ -#define SSC_TFMR_FSEDGE (0x1u << 24) /**< \brief (SSC_TFMR) Frame Sync Edge Detection */ -#define SSC_TFMR_FSEDGE_POSITIVE (0x0u << 24) /**< \brief (SSC_TFMR) Positive Edge Detection */ -#define SSC_TFMR_FSEDGE_NEGATIVE (0x1u << 24) /**< \brief (SSC_TFMR) Negative Edge Detection */ -#define SSC_TFMR_FSLEN_EXT_Pos 28 -#define SSC_TFMR_FSLEN_EXT_Msk (0xfu << SSC_TFMR_FSLEN_EXT_Pos) /**< \brief (SSC_TFMR) FSLEN Field Extension */ -#define SSC_TFMR_FSLEN_EXT(value) ((SSC_TFMR_FSLEN_EXT_Msk & ((value) << SSC_TFMR_FSLEN_EXT_Pos))) -/* -------- SSC_RHR : (SSC Offset: 0x20) Receive Holding Register -------- */ -#define SSC_RHR_RDAT_Pos 0 -#define SSC_RHR_RDAT_Msk (0xffffffffu << SSC_RHR_RDAT_Pos) /**< \brief (SSC_RHR) Receive Data */ -/* -------- SSC_THR : (SSC Offset: 0x24) Transmit Holding Register -------- */ -#define SSC_THR_TDAT_Pos 0 -#define SSC_THR_TDAT_Msk (0xffffffffu << SSC_THR_TDAT_Pos) /**< \brief (SSC_THR) Transmit Data */ -#define SSC_THR_TDAT(value) ((SSC_THR_TDAT_Msk & ((value) << SSC_THR_TDAT_Pos))) -/* -------- SSC_RSHR : (SSC Offset: 0x30) Receive Sync. Holding Register -------- */ -#define SSC_RSHR_RSDAT_Pos 0 -#define SSC_RSHR_RSDAT_Msk (0xffffu << SSC_RSHR_RSDAT_Pos) /**< \brief (SSC_RSHR) Receive Synchronization Data */ -/* -------- SSC_TSHR : (SSC Offset: 0x34) Transmit Sync. Holding Register -------- */ -#define SSC_TSHR_TSDAT_Pos 0 -#define SSC_TSHR_TSDAT_Msk (0xffffu << SSC_TSHR_TSDAT_Pos) /**< \brief (SSC_TSHR) Transmit Synchronization Data */ -#define SSC_TSHR_TSDAT(value) ((SSC_TSHR_TSDAT_Msk & ((value) << SSC_TSHR_TSDAT_Pos))) -/* -------- SSC_RC0R : (SSC Offset: 0x38) Receive Compare 0 Register -------- */ -#define SSC_RC0R_CP0_Pos 0 -#define SSC_RC0R_CP0_Msk (0xffffu << SSC_RC0R_CP0_Pos) /**< \brief (SSC_RC0R) Receive Compare Data 0 */ -#define SSC_RC0R_CP0(value) ((SSC_RC0R_CP0_Msk & ((value) << SSC_RC0R_CP0_Pos))) -/* -------- SSC_RC1R : (SSC Offset: 0x3C) Receive Compare 1 Register -------- */ -#define SSC_RC1R_CP1_Pos 0 -#define SSC_RC1R_CP1_Msk (0xffffu << SSC_RC1R_CP1_Pos) /**< \brief (SSC_RC1R) Receive Compare Data 1 */ -#define SSC_RC1R_CP1(value) ((SSC_RC1R_CP1_Msk & ((value) << SSC_RC1R_CP1_Pos))) -/* -------- SSC_SR : (SSC Offset: 0x40) Status Register -------- */ -#define SSC_SR_TXRDY (0x1u << 0) /**< \brief (SSC_SR) Transmit Ready */ -#define SSC_SR_TXEMPTY (0x1u << 1) /**< \brief (SSC_SR) Transmit Empty */ -#define SSC_SR_ENDTX (0x1u << 2) /**< \brief (SSC_SR) End of Transmission */ -#define SSC_SR_TXBUFE (0x1u << 3) /**< \brief (SSC_SR) Transmit Buffer Empty */ -#define SSC_SR_RXRDY (0x1u << 4) /**< \brief (SSC_SR) Receive Ready */ -#define SSC_SR_OVRUN (0x1u << 5) /**< \brief (SSC_SR) Receive Overrun */ -#define SSC_SR_ENDRX (0x1u << 6) /**< \brief (SSC_SR) End of Reception */ -#define SSC_SR_RXBUFF (0x1u << 7) /**< \brief (SSC_SR) Receive Buffer Full */ -#define SSC_SR_CP0 (0x1u << 8) /**< \brief (SSC_SR) Compare 0 */ -#define SSC_SR_CP1 (0x1u << 9) /**< \brief (SSC_SR) Compare 1 */ -#define SSC_SR_TXSYN (0x1u << 10) /**< \brief (SSC_SR) Transmit Sync */ -#define SSC_SR_RXSYN (0x1u << 11) /**< \brief (SSC_SR) Receive Sync */ -#define SSC_SR_TXEN (0x1u << 16) /**< \brief (SSC_SR) Transmit Enable */ -#define SSC_SR_RXEN (0x1u << 17) /**< \brief (SSC_SR) Receive Enable */ -/* -------- SSC_IER : (SSC Offset: 0x44) Interrupt Enable Register -------- */ -#define SSC_IER_TXRDY (0x1u << 0) /**< \brief (SSC_IER) Transmit Ready Interrupt Enable */ -#define SSC_IER_TXEMPTY (0x1u << 1) /**< \brief (SSC_IER) Transmit Empty Interrupt Enable */ -#define SSC_IER_ENDTX (0x1u << 2) /**< \brief (SSC_IER) End of Transmission Interrupt Enable */ -#define SSC_IER_TXBUFE (0x1u << 3) /**< \brief (SSC_IER) Transmit Buffer Empty Interrupt Enable */ -#define SSC_IER_RXRDY (0x1u << 4) /**< \brief (SSC_IER) Receive Ready Interrupt Enable */ -#define SSC_IER_OVRUN (0x1u << 5) /**< \brief (SSC_IER) Receive Overrun Interrupt Enable */ -#define SSC_IER_ENDRX (0x1u << 6) /**< \brief (SSC_IER) End of Reception Interrupt Enable */ -#define SSC_IER_RXBUFF (0x1u << 7) /**< \brief (SSC_IER) Receive Buffer Full Interrupt Enable */ -#define SSC_IER_CP0 (0x1u << 8) /**< \brief (SSC_IER) Compare 0 Interrupt Enable */ -#define SSC_IER_CP1 (0x1u << 9) /**< \brief (SSC_IER) Compare 1 Interrupt Enable */ -#define SSC_IER_TXSYN (0x1u << 10) /**< \brief (SSC_IER) Tx Sync Interrupt Enable */ -#define SSC_IER_RXSYN (0x1u << 11) /**< \brief (SSC_IER) Rx Sync Interrupt Enable */ -/* -------- SSC_IDR : (SSC Offset: 0x48) Interrupt Disable Register -------- */ -#define SSC_IDR_TXRDY (0x1u << 0) /**< \brief (SSC_IDR) Transmit Ready Interrupt Disable */ -#define SSC_IDR_TXEMPTY (0x1u << 1) /**< \brief (SSC_IDR) Transmit Empty Interrupt Disable */ -#define SSC_IDR_ENDTX (0x1u << 2) /**< \brief (SSC_IDR) End of Transmission Interrupt Disable */ -#define SSC_IDR_TXBUFE (0x1u << 3) /**< \brief (SSC_IDR) Transmit Buffer Empty Interrupt Disable */ -#define SSC_IDR_RXRDY (0x1u << 4) /**< \brief (SSC_IDR) Receive Ready Interrupt Disable */ -#define SSC_IDR_OVRUN (0x1u << 5) /**< \brief (SSC_IDR) Receive Overrun Interrupt Disable */ -#define SSC_IDR_ENDRX (0x1u << 6) /**< \brief (SSC_IDR) End of Reception Interrupt Disable */ -#define SSC_IDR_RXBUFF (0x1u << 7) /**< \brief (SSC_IDR) Receive Buffer Full Interrupt Disable */ -#define SSC_IDR_CP0 (0x1u << 8) /**< \brief (SSC_IDR) Compare 0 Interrupt Disable */ -#define SSC_IDR_CP1 (0x1u << 9) /**< \brief (SSC_IDR) Compare 1 Interrupt Disable */ -#define SSC_IDR_TXSYN (0x1u << 10) /**< \brief (SSC_IDR) Tx Sync Interrupt Enable */ -#define SSC_IDR_RXSYN (0x1u << 11) /**< \brief (SSC_IDR) Rx Sync Interrupt Enable */ -/* -------- SSC_IMR : (SSC Offset: 0x4C) Interrupt Mask Register -------- */ -#define SSC_IMR_TXRDY (0x1u << 0) /**< \brief (SSC_IMR) Transmit Ready Interrupt Mask */ -#define SSC_IMR_TXEMPTY (0x1u << 1) /**< \brief (SSC_IMR) Transmit Empty Interrupt Mask */ -#define SSC_IMR_ENDTX (0x1u << 2) /**< \brief (SSC_IMR) End of Transmission Interrupt Mask */ -#define SSC_IMR_TXBUFE (0x1u << 3) /**< \brief (SSC_IMR) Transmit Buffer Empty Interrupt Mask */ -#define SSC_IMR_RXRDY (0x1u << 4) /**< \brief (SSC_IMR) Receive Ready Interrupt Mask */ -#define SSC_IMR_OVRUN (0x1u << 5) /**< \brief (SSC_IMR) Receive Overrun Interrupt Mask */ -#define SSC_IMR_ENDRX (0x1u << 6) /**< \brief (SSC_IMR) End of Reception Interrupt Mask */ -#define SSC_IMR_RXBUFF (0x1u << 7) /**< \brief (SSC_IMR) Receive Buffer Full Interrupt Mask */ -#define SSC_IMR_CP0 (0x1u << 8) /**< \brief (SSC_IMR) Compare 0 Interrupt Mask */ -#define SSC_IMR_CP1 (0x1u << 9) /**< \brief (SSC_IMR) Compare 1 Interrupt Mask */ -#define SSC_IMR_TXSYN (0x1u << 10) /**< \brief (SSC_IMR) Tx Sync Interrupt Mask */ -#define SSC_IMR_RXSYN (0x1u << 11) /**< \brief (SSC_IMR) Rx Sync Interrupt Mask */ -/* -------- SSC_WPMR : (SSC Offset: 0xE4) Write Protect Mode Register -------- */ -#define SSC_WPMR_WPEN (0x1u << 0) /**< \brief (SSC_WPMR) Write Protect Enable */ -#define SSC_WPMR_WPKEY_Pos 8 -#define SSC_WPMR_WPKEY_Msk (0xffffffu << SSC_WPMR_WPKEY_Pos) /**< \brief (SSC_WPMR) Write Protect KEY */ -#define SSC_WPMR_WPKEY(value) ((SSC_WPMR_WPKEY_Msk & ((value) << SSC_WPMR_WPKEY_Pos))) -/* -------- SSC_WPSR : (SSC Offset: 0xE8) Write Protect Status Register -------- */ -#define SSC_WPSR_WPVS (0x1u << 0) /**< \brief (SSC_WPSR) Write Protect Violation Status */ -#define SSC_WPSR_WPVSRC_Pos 8 -#define SSC_WPSR_WPVSRC_Msk (0xffffu << SSC_WPSR_WPVSRC_Pos) /**< \brief (SSC_WPSR) Write Protect Violation Source */ -/* -------- SSC_RPR : (SSC Offset: 0x100) Receive Pointer Register -------- */ -#define SSC_RPR_RXPTR_Pos 0 -#define SSC_RPR_RXPTR_Msk (0xffffffffu << SSC_RPR_RXPTR_Pos) /**< \brief (SSC_RPR) Receive Pointer Register */ -#define SSC_RPR_RXPTR(value) ((SSC_RPR_RXPTR_Msk & ((value) << SSC_RPR_RXPTR_Pos))) -/* -------- SSC_RCR : (SSC Offset: 0x104) Receive Counter Register -------- */ -#define SSC_RCR_RXCTR_Pos 0 -#define SSC_RCR_RXCTR_Msk (0xffffu << SSC_RCR_RXCTR_Pos) /**< \brief (SSC_RCR) Receive Counter Register */ -#define SSC_RCR_RXCTR(value) ((SSC_RCR_RXCTR_Msk & ((value) << SSC_RCR_RXCTR_Pos))) -/* -------- SSC_TPR : (SSC Offset: 0x108) Transmit Pointer Register -------- */ -#define SSC_TPR_TXPTR_Pos 0 -#define SSC_TPR_TXPTR_Msk (0xffffffffu << SSC_TPR_TXPTR_Pos) /**< \brief (SSC_TPR) Transmit Counter Register */ -#define SSC_TPR_TXPTR(value) ((SSC_TPR_TXPTR_Msk & ((value) << SSC_TPR_TXPTR_Pos))) -/* -------- SSC_TCR : (SSC Offset: 0x10C) Transmit Counter Register -------- */ -#define SSC_TCR_TXCTR_Pos 0 -#define SSC_TCR_TXCTR_Msk (0xffffu << SSC_TCR_TXCTR_Pos) /**< \brief (SSC_TCR) Transmit Counter Register */ -#define SSC_TCR_TXCTR(value) ((SSC_TCR_TXCTR_Msk & ((value) << SSC_TCR_TXCTR_Pos))) -/* -------- SSC_RNPR : (SSC Offset: 0x110) Receive Next Pointer Register -------- */ -#define SSC_RNPR_RXNPTR_Pos 0 -#define SSC_RNPR_RXNPTR_Msk (0xffffffffu << SSC_RNPR_RXNPTR_Pos) /**< \brief (SSC_RNPR) Receive Next Pointer */ -#define SSC_RNPR_RXNPTR(value) ((SSC_RNPR_RXNPTR_Msk & ((value) << SSC_RNPR_RXNPTR_Pos))) -/* -------- SSC_RNCR : (SSC Offset: 0x114) Receive Next Counter Register -------- */ -#define SSC_RNCR_RXNCTR_Pos 0 -#define SSC_RNCR_RXNCTR_Msk (0xffffu << SSC_RNCR_RXNCTR_Pos) /**< \brief (SSC_RNCR) Receive Next Counter */ -#define SSC_RNCR_RXNCTR(value) ((SSC_RNCR_RXNCTR_Msk & ((value) << SSC_RNCR_RXNCTR_Pos))) -/* -------- SSC_TNPR : (SSC Offset: 0x118) Transmit Next Pointer Register -------- */ -#define SSC_TNPR_TXNPTR_Pos 0 -#define SSC_TNPR_TXNPTR_Msk (0xffffffffu << SSC_TNPR_TXNPTR_Pos) /**< \brief (SSC_TNPR) Transmit Next Pointer */ -#define SSC_TNPR_TXNPTR(value) ((SSC_TNPR_TXNPTR_Msk & ((value) << SSC_TNPR_TXNPTR_Pos))) -/* -------- SSC_TNCR : (SSC Offset: 0x11C) Transmit Next Counter Register -------- */ -#define SSC_TNCR_TXNCTR_Pos 0 -#define SSC_TNCR_TXNCTR_Msk (0xffffu << SSC_TNCR_TXNCTR_Pos) /**< \brief (SSC_TNCR) Transmit Counter Next */ -#define SSC_TNCR_TXNCTR(value) ((SSC_TNCR_TXNCTR_Msk & ((value) << SSC_TNCR_TXNCTR_Pos))) -/* -------- SSC_PTCR : (SSC Offset: 0x120) Transfer Control Register -------- */ -#define SSC_PTCR_RXTEN (0x1u << 0) /**< \brief (SSC_PTCR) Receiver Transfer Enable */ -#define SSC_PTCR_RXTDIS (0x1u << 1) /**< \brief (SSC_PTCR) Receiver Transfer Disable */ -#define SSC_PTCR_TXTEN (0x1u << 8) /**< \brief (SSC_PTCR) Transmitter Transfer Enable */ -#define SSC_PTCR_TXTDIS (0x1u << 9) /**< \brief (SSC_PTCR) Transmitter Transfer Disable */ -/* -------- SSC_PTSR : (SSC Offset: 0x124) Transfer Status Register -------- */ -#define SSC_PTSR_RXTEN (0x1u << 0) /**< \brief (SSC_PTSR) Receiver Transfer Enable */ -#define SSC_PTSR_TXTEN (0x1u << 8) /**< \brief (SSC_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Supply Controller */ -/* ============================================================================= */ -/** \addtogroup SAM3S_SUPC Supply Controller */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Supc hardware registers */ -typedef struct { - WoReg SUPC_CR; /**< \brief (Supc Offset: 0x00) Supply Controller Control Register */ - RwReg SUPC_SMMR; /**< \brief (Supc Offset: 0x04) Supply Controller Supply Monitor Mode Register */ - RwReg SUPC_MR; /**< \brief (Supc Offset: 0x08) Supply Controller Mode Register */ - RwReg SUPC_WUMR; /**< \brief (Supc Offset: 0x0C) Supply Controller Wake Up Mode Register */ - RwReg SUPC_WUIR; /**< \brief (Supc Offset: 0x10) Supply Controller Wake Up Inputs Register */ - RoReg SUPC_SR; /**< \brief (Supc Offset: 0x14) Supply Controller Status Register */ -} Supc; -#endif /* __ASSEMBLY__ */ -/* -------- SUPC_CR : (SUPC Offset: 0x00) Supply Controller Control Register -------- */ -#define SUPC_CR_VROFF (0x1u << 2) /**< \brief (SUPC_CR) Voltage Regulator Off */ -#define SUPC_CR_VROFF_NO_EFFECT (0x0u << 2) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_VROFF_STOP_VREG (0x1u << 2) /**< \brief (SUPC_CR) if KEY is correct, asserts vddcore_nreset and stops the voltage regulator. */ -#define SUPC_CR_XTALSEL (0x1u << 3) /**< \brief (SUPC_CR) Crystal Oscillator Select */ -#define SUPC_CR_XTALSEL_NO_EFFECT (0x0u << 3) /**< \brief (SUPC_CR) no effect. */ -#define SUPC_CR_XTALSEL_CRYSTAL_SEL (0x1u << 3) /**< \brief (SUPC_CR) if KEY is correct, switches the slow clock on the crystal oscillator output. */ -#define SUPC_CR_KEY_Pos 24 -#define SUPC_CR_KEY_Msk (0xffu << SUPC_CR_KEY_Pos) /**< \brief (SUPC_CR) Password */ -#define SUPC_CR_KEY(value) ((uint32_t)(SUPC_CR_KEY_Msk & ((value) << SUPC_CR_KEY_Pos))) -/* -------- SUPC_SMMR : (SUPC Offset: 0x04) Supply Controller Supply Monitor Mode Register -------- */ -#define SUPC_SMMR_SMTH_Pos 0 -#define SUPC_SMMR_SMTH_Msk (0xfu << SUPC_SMMR_SMTH_Pos) /**< \brief (SUPC_SMMR) Supply Monitor Threshold */ -#define SUPC_SMMR_SMTH_1_9V (0x0u << 0) /**< \brief (SUPC_SMMR) 1.9 V */ -#define SUPC_SMMR_SMTH_2_0V (0x1u << 0) /**< \brief (SUPC_SMMR) 2.0 V */ -#define SUPC_SMMR_SMTH_2_1V (0x2u << 0) /**< \brief (SUPC_SMMR) 2.1 V */ -#define SUPC_SMMR_SMTH_2_2V (0x3u << 0) /**< \brief (SUPC_SMMR) 2.2 V */ -#define SUPC_SMMR_SMTH_2_3V (0x4u << 0) /**< \brief (SUPC_SMMR) 2.3 V */ -#define SUPC_SMMR_SMTH_2_4V (0x5u << 0) /**< \brief (SUPC_SMMR) 2.4 V */ -#define SUPC_SMMR_SMTH_2_5V (0x6u << 0) /**< \brief (SUPC_SMMR) 2.5 V */ -#define SUPC_SMMR_SMTH_2_6V (0x7u << 0) /**< \brief (SUPC_SMMR) 2.6 V */ -#define SUPC_SMMR_SMTH_2_7V (0x8u << 0) /**< \brief (SUPC_SMMR) 2.7 V */ -#define SUPC_SMMR_SMTH_2_8V (0x9u << 0) /**< \brief (SUPC_SMMR) 2.8 V */ -#define SUPC_SMMR_SMTH_2_9V (0xAu << 0) /**< \brief (SUPC_SMMR) 2.9 V */ -#define SUPC_SMMR_SMTH_3_0V (0xBu << 0) /**< \brief (SUPC_SMMR) 3.0 V */ -#define SUPC_SMMR_SMTH_3_1V (0xCu << 0) /**< \brief (SUPC_SMMR) 3.1 V */ -#define SUPC_SMMR_SMTH_3_2V (0xDu << 0) /**< \brief (SUPC_SMMR) 3.2 V */ -#define SUPC_SMMR_SMTH_3_3V (0xEu << 0) /**< \brief (SUPC_SMMR) 3.3 V */ -#define SUPC_SMMR_SMTH_3_4V (0xFu << 0) /**< \brief (SUPC_SMMR) 3.4 V */ -#define SUPC_SMMR_SMSMPL_Pos 8 -#define SUPC_SMMR_SMSMPL_Msk (0x7u << SUPC_SMMR_SMSMPL_Pos) /**< \brief (SUPC_SMMR) Supply Monitor Sampling Period */ -#define SUPC_SMMR_SMSMPL_SMD (0x0u << 8) /**< \brief (SUPC_SMMR) Supply Monitor disabled */ -#define SUPC_SMMR_SMSMPL_CSM (0x1u << 8) /**< \brief (SUPC_SMMR) Continuous Supply Monitor */ -#define SUPC_SMMR_SMSMPL_32SLCK (0x2u << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 32 SLCK periods */ -#define SUPC_SMMR_SMSMPL_256SLCK (0x3u << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 256 SLCK periods */ -#define SUPC_SMMR_SMSMPL_2048SLCK (0x4u << 8) /**< \brief (SUPC_SMMR) Supply Monitor enabled one SLCK period every 2,048 SLCK periods */ -#define SUPC_SMMR_SMRSTEN (0x1u << 12) /**< \brief (SUPC_SMMR) Supply Monitor Reset Enable */ -#define SUPC_SMMR_SMRSTEN_NOT_ENABLE (0x0u << 12) /**< \brief (SUPC_SMMR) the core reset signal "vddcore_nreset" is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMRSTEN_ENABLE (0x1u << 12) /**< \brief (SUPC_SMMR) the core reset signal, vddcore_nreset is asserted when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN (0x1u << 13) /**< \brief (SUPC_SMMR) Supply Monitor Interrupt Enable */ -#define SUPC_SMMR_SMIEN_NOT_ENABLE (0x0u << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is not affected when a supply monitor detection occurs. */ -#define SUPC_SMMR_SMIEN_ENABLE (0x1u << 13) /**< \brief (SUPC_SMMR) the SUPC interrupt signal is asserted when a supply monitor detection occurs. */ -/* -------- SUPC_MR : (SUPC Offset: 0x08) Supply Controller Mode Register -------- */ -#define SUPC_MR_BODRSTEN (0x1u << 12) /**< \brief (SUPC_MR) Brownout Detector Reset Enable */ -#define SUPC_MR_BODRSTEN_NOT_ENABLE (0x0u << 12) /**< \brief (SUPC_MR) the core reset signal "vddcore_nreset" is not affected when a brownout detection occurs. */ -#define SUPC_MR_BODRSTEN_ENABLE (0x1u << 12) /**< \brief (SUPC_MR) the core reset signal, vddcore_nreset is asserted when a brownout detection occurs. */ -#define SUPC_MR_BODDIS (0x1u << 13) /**< \brief (SUPC_MR) Brownout Detector Disable */ -#define SUPC_MR_BODDIS_ENABLE (0x0u << 13) /**< \brief (SUPC_MR) the core brownout detector is enabled. */ -#define SUPC_MR_BODDIS_DISABLE (0x1u << 13) /**< \brief (SUPC_MR) the core brownout detector is disabled. */ -#define SUPC_MR_ONREG (0x1u << 14) /**< \brief (SUPC_MR) Voltage Regulator enable */ -#define SUPC_MR_ONREG_ONREG_UNUSED (0x0u << 14) /**< \brief (SUPC_MR) Voltage Regulator is not used */ -#define SUPC_MR_ONREG_ONREG_USED (0x1u << 14) /**< \brief (SUPC_MR) Voltage Regulator is used */ -#define SUPC_MR_OSCBYPASS (0x1u << 20) /**< \brief (SUPC_MR) Oscillator Bypass */ -#define SUPC_MR_OSCBYPASS_NO_EFFECT (0x0u << 20) /**< \brief (SUPC_MR) no effect. Clock selection depends on XTALSEL value. */ -#define SUPC_MR_OSCBYPASS_BYPASS (0x1u << 20) /**< \brief (SUPC_MR) the 32-KHz XTAL oscillator is selected and is put in bypass mode. */ -#define SUPC_MR_KEY_Pos 24 -#define SUPC_MR_KEY_Msk (0xffu << SUPC_MR_KEY_Pos) /**< \brief (SUPC_MR) Password Key */ -#define SUPC_MR_KEY(value) ((SUPC_MR_KEY_Msk & ((value) << SUPC_MR_KEY_Pos))) -/* -------- SUPC_WUMR : (SUPC Offset: 0x0C) Supply Controller Wake Up Mode Register -------- */ -#define SUPC_WUMR_SMEN (0x1u << 1) /**< \brief (SUPC_WUMR) Supply Monitor Wake Up Enable */ -#define SUPC_WUMR_SMEN_NOT_ENABLE (0x0u << 1) /**< \brief (SUPC_WUMR) the supply monitor detection has no wake up effect. */ -#define SUPC_WUMR_SMEN_ENABLE (0x1u << 1) /**< \brief (SUPC_WUMR) the supply monitor detection forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTTEN (0x1u << 2) /**< \brief (SUPC_WUMR) Real Time Timer Wake Up Enable */ -#define SUPC_WUMR_RTTEN_NOT_ENABLE (0x0u << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTTEN_ENABLE (0x1u << 2) /**< \brief (SUPC_WUMR) the RTT alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_RTCEN (0x1u << 3) /**< \brief (SUPC_WUMR) Real Time Clock Wake Up Enable */ -#define SUPC_WUMR_RTCEN_NOT_ENABLE (0x0u << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal has no wake up effect. */ -#define SUPC_WUMR_RTCEN_ENABLE (0x1u << 3) /**< \brief (SUPC_WUMR) the RTC alarm signal forces the wake up of the core power supply. */ -#define SUPC_WUMR_WKUPDBC_Pos 12 -#define SUPC_WUMR_WKUPDBC_Msk (0x7u << SUPC_WUMR_WKUPDBC_Pos) /**< \brief (SUPC_WUMR) Wake Up Inputs Debouncer Period */ -#define SUPC_WUMR_WKUPDBC_IMMEDIATE (0x0u << 12) /**< \brief (SUPC_WUMR) Immediate, no debouncing, detected active at least on one Slow Clock edge. */ -#define SUPC_WUMR_WKUPDBC_3_SCLK (0x1u << 12) /**< \brief (SUPC_WUMR) WKUPx shall be in its active state for at least 3 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32_SCLK (0x2u << 12) /**< \brief (SUPC_WUMR) WKUPx shall be in its active state for at least 32 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_512_SCLK (0x3u << 12) /**< \brief (SUPC_WUMR) WKUPx shall be in its active state for at least 512 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_4096_SCLK (0x4u << 12) /**< \brief (SUPC_WUMR) WKUPx shall be in its active state for at least 4,096 SLCK periods */ -#define SUPC_WUMR_WKUPDBC_32768_SCLK (0x5u << 12) /**< \brief (SUPC_WUMR) WKUPx shall be in its active state for at least 32,768 SLCK periods */ -/* -------- SUPC_WUIR : (SUPC Offset: 0x10) Supply Controller Wake Up Inputs Register -------- */ -#define SUPC_WUIR_WKUPEN0 (0x1u << 0) /**< \brief (SUPC_WUIR) Wake Up Input Enable 0 */ -#define SUPC_WUIR_WKUPEN0_NOT_ENABLE (0x0u << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN0_ENABLE (0x1u << 0) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN1 (0x1u << 1) /**< \brief (SUPC_WUIR) Wake Up Input Enable 1 */ -#define SUPC_WUIR_WKUPEN1_NOT_ENABLE (0x0u << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN1_ENABLE (0x1u << 1) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN2 (0x1u << 2) /**< \brief (SUPC_WUIR) Wake Up Input Enable 2 */ -#define SUPC_WUIR_WKUPEN2_NOT_ENABLE (0x0u << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN2_ENABLE (0x1u << 2) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN3 (0x1u << 3) /**< \brief (SUPC_WUIR) Wake Up Input Enable 3 */ -#define SUPC_WUIR_WKUPEN3_NOT_ENABLE (0x0u << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN3_ENABLE (0x1u << 3) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN4 (0x1u << 4) /**< \brief (SUPC_WUIR) Wake Up Input Enable 4 */ -#define SUPC_WUIR_WKUPEN4_NOT_ENABLE (0x0u << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN4_ENABLE (0x1u << 4) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN5 (0x1u << 5) /**< \brief (SUPC_WUIR) Wake Up Input Enable 5 */ -#define SUPC_WUIR_WKUPEN5_NOT_ENABLE (0x0u << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN5_ENABLE (0x1u << 5) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN6 (0x1u << 6) /**< \brief (SUPC_WUIR) Wake Up Input Enable 6 */ -#define SUPC_WUIR_WKUPEN6_NOT_ENABLE (0x0u << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN6_ENABLE (0x1u << 6) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN7 (0x1u << 7) /**< \brief (SUPC_WUIR) Wake Up Input Enable 7 */ -#define SUPC_WUIR_WKUPEN7_NOT_ENABLE (0x0u << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN7_ENABLE (0x1u << 7) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN8 (0x1u << 8) /**< \brief (SUPC_WUIR) Wake Up Input Enable 8 */ -#define SUPC_WUIR_WKUPEN8_NOT_ENABLE (0x0u << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN8_ENABLE (0x1u << 8) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN9 (0x1u << 9) /**< \brief (SUPC_WUIR) Wake Up Input Enable 9 */ -#define SUPC_WUIR_WKUPEN9_NOT_ENABLE (0x0u << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN9_ENABLE (0x1u << 9) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN10 (0x1u << 10) /**< \brief (SUPC_WUIR) Wake Up Input Enable 10 */ -#define SUPC_WUIR_WKUPEN10_NOT_ENABLE (0x0u << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN10_ENABLE (0x1u << 10) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN11 (0x1u << 11) /**< \brief (SUPC_WUIR) Wake Up Input Enable 11 */ -#define SUPC_WUIR_WKUPEN11_NOT_ENABLE (0x0u << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN11_ENABLE (0x1u << 11) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN12 (0x1u << 12) /**< \brief (SUPC_WUIR) Wake Up Input Enable 12 */ -#define SUPC_WUIR_WKUPEN12_NOT_ENABLE (0x0u << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN12_ENABLE (0x1u << 12) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN13 (0x1u << 13) /**< \brief (SUPC_WUIR) Wake Up Input Enable 13 */ -#define SUPC_WUIR_WKUPEN13_NOT_ENABLE (0x0u << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN13_ENABLE (0x1u << 13) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN14 (0x1u << 14) /**< \brief (SUPC_WUIR) Wake Up Input Enable 14 */ -#define SUPC_WUIR_WKUPEN14_NOT_ENABLE (0x0u << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN14_ENABLE (0x1u << 14) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPEN15 (0x1u << 15) /**< \brief (SUPC_WUIR) Wake Up Input Enable 15 */ -#define SUPC_WUIR_WKUPEN15_NOT_ENABLE (0x0u << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input has no wake up effect. */ -#define SUPC_WUIR_WKUPEN15_ENABLE (0x1u << 15) /**< \brief (SUPC_WUIR) the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0 (0x1u << 16) /**< \brief (SUPC_WUIR) Wake Up Input Transition 0 */ -#define SUPC_WUIR_WKUPT0_HIGH_TO_LOW (0x0u << 16) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT0_LOW_TO_HIGH (0x1u << 16) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1 (0x1u << 17) /**< \brief (SUPC_WUIR) Wake Up Input Transition 1 */ -#define SUPC_WUIR_WKUPT1_HIGH_TO_LOW (0x0u << 17) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT1_LOW_TO_HIGH (0x1u << 17) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2 (0x1u << 18) /**< \brief (SUPC_WUIR) Wake Up Input Transition 2 */ -#define SUPC_WUIR_WKUPT2_HIGH_TO_LOW (0x0u << 18) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT2_LOW_TO_HIGH (0x1u << 18) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3 (0x1u << 19) /**< \brief (SUPC_WUIR) Wake Up Input Transition 3 */ -#define SUPC_WUIR_WKUPT3_HIGH_TO_LOW (0x0u << 19) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT3_LOW_TO_HIGH (0x1u << 19) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4 (0x1u << 20) /**< \brief (SUPC_WUIR) Wake Up Input Transition 4 */ -#define SUPC_WUIR_WKUPT4_HIGH_TO_LOW (0x0u << 20) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT4_LOW_TO_HIGH (0x1u << 20) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5 (0x1u << 21) /**< \brief (SUPC_WUIR) Wake Up Input Transition 5 */ -#define SUPC_WUIR_WKUPT5_HIGH_TO_LOW (0x0u << 21) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT5_LOW_TO_HIGH (0x1u << 21) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6 (0x1u << 22) /**< \brief (SUPC_WUIR) Wake Up Input Transition 6 */ -#define SUPC_WUIR_WKUPT6_HIGH_TO_LOW (0x0u << 22) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT6_LOW_TO_HIGH (0x1u << 22) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7 (0x1u << 23) /**< \brief (SUPC_WUIR) Wake Up Input Transition 7 */ -#define SUPC_WUIR_WKUPT7_HIGH_TO_LOW (0x0u << 23) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT7_LOW_TO_HIGH (0x1u << 23) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8 (0x1u << 24) /**< \brief (SUPC_WUIR) Wake Up Input Transition 8 */ -#define SUPC_WUIR_WKUPT8_HIGH_TO_LOW (0x0u << 24) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT8_LOW_TO_HIGH (0x1u << 24) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9 (0x1u << 25) /**< \brief (SUPC_WUIR) Wake Up Input Transition 9 */ -#define SUPC_WUIR_WKUPT9_HIGH_TO_LOW (0x0u << 25) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT9_LOW_TO_HIGH (0x1u << 25) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10 (0x1u << 26) /**< \brief (SUPC_WUIR) Wake Up Input Transition 10 */ -#define SUPC_WUIR_WKUPT10_HIGH_TO_LOW (0x0u << 26) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT10_LOW_TO_HIGH (0x1u << 26) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11 (0x1u << 27) /**< \brief (SUPC_WUIR) Wake Up Input Transition 11 */ -#define SUPC_WUIR_WKUPT11_HIGH_TO_LOW (0x0u << 27) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT11_LOW_TO_HIGH (0x1u << 27) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12 (0x1u << 28) /**< \brief (SUPC_WUIR) Wake Up Input Transition 12 */ -#define SUPC_WUIR_WKUPT12_HIGH_TO_LOW (0x0u << 28) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT12_LOW_TO_HIGH (0x1u << 28) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13 (0x1u << 29) /**< \brief (SUPC_WUIR) Wake Up Input Transition 13 */ -#define SUPC_WUIR_WKUPT13_HIGH_TO_LOW (0x0u << 29) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT13_LOW_TO_HIGH (0x1u << 29) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14 (0x1u << 30) /**< \brief (SUPC_WUIR) Wake Up Input Transition 14 */ -#define SUPC_WUIR_WKUPT14_HIGH_TO_LOW (0x0u << 30) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT14_LOW_TO_HIGH (0x1u << 30) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15 (0x1u << 31) /**< \brief (SUPC_WUIR) Wake Up Input Transition 15 */ -#define SUPC_WUIR_WKUPT15_HIGH_TO_LOW (0x0u << 31) /**< \brief (SUPC_WUIR) a high to low level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -#define SUPC_WUIR_WKUPT15_LOW_TO_HIGH (0x1u << 31) /**< \brief (SUPC_WUIR) a low to high level transition on the corresponding wake-up input forces the wake up of the core power supply. */ -/* -------- SUPC_SR : (SUPC Offset: 0x14) Supply Controller Status Register -------- */ -#define SUPC_SR_WKUPS (0x1u << 1) /**< \brief (SUPC_SR) WKUP Wake Up Status */ -#define SUPC_SR_WKUPS_NO (0x0u << 1) /**< \brief (SUPC_SR) no wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_WKUPS_PRESENT (0x1u << 1) /**< \brief (SUPC_SR) at least one wake up due to the assertion of the WKUP pins has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS (0x1u << 2) /**< \brief (SUPC_SR) Supply Monitor Detection Wake Up Status */ -#define SUPC_SR_SMWS_NO (0x0u << 2) /**< \brief (SUPC_SR) no wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_SMWS_PRESENT (0x1u << 2) /**< \brief (SUPC_SR) at least one wake up due to a supply monitor detection has occurred since the last read of SUPC_SR. */ -#define SUPC_SR_BODRSTS (0x1u << 3) /**< \brief (SUPC_SR) Brownout Detector Reset Status */ -#define SUPC_SR_BODRSTS_NO (0x0u << 3) /**< \brief (SUPC_SR) no core brownout rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_BODRSTS_PRESENT (0x1u << 3) /**< \brief (SUPC_SR) at least one brownout output rising edge event has been detected since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS (0x1u << 4) /**< \brief (SUPC_SR) Supply Monitor Reset Status */ -#define SUPC_SR_SMRSTS_NO (0x0u << 4) /**< \brief (SUPC_SR) no supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMRSTS_PRESENT (0x1u << 4) /**< \brief (SUPC_SR) at least one supply monitor detection has generated a core reset since the last read of the SUPC_SR. */ -#define SUPC_SR_SMS (0x1u << 5) /**< \brief (SUPC_SR) Supply Monitor Status */ -#define SUPC_SR_SMS_NO (0x0u << 5) /**< \brief (SUPC_SR) no supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMS_PRESENT (0x1u << 5) /**< \brief (SUPC_SR) at least one supply monitor detection since the last read of SUPC_SR. */ -#define SUPC_SR_SMOS (0x1u << 6) /**< \brief (SUPC_SR) Supply Monitor Output Status */ -#define SUPC_SR_SMOS_HIGH (0x0u << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO higher than its threshold at its last measurement. */ -#define SUPC_SR_SMOS_LOW (0x1u << 6) /**< \brief (SUPC_SR) the supply monitor detected VDDIO lower than its threshold at its last measurement. */ -#define SUPC_SR_OSCSEL (0x1u << 7) /**< \brief (SUPC_SR) 32-kHz Oscillator Selection Status */ -#define SUPC_SR_OSCSEL_RC (0x0u << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the embedded 32-kHz RC oscillator. */ -#define SUPC_SR_OSCSEL_CRYST (0x1u << 7) /**< \brief (SUPC_SR) the slow clock, SLCK is generated by the 32-kHz crystal oscillator. */ -#define SUPC_SR_WKUPIS0 (0x1u << 16) /**< \brief (SUPC_SR) WKUP Input Status 0 */ -#define SUPC_SR_WKUPIS0_DIS (0x0u << 16) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS0_EN (0x1u << 16) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1 (0x1u << 17) /**< \brief (SUPC_SR) WKUP Input Status 1 */ -#define SUPC_SR_WKUPIS1_DIS (0x0u << 17) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS1_EN (0x1u << 17) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2 (0x1u << 18) /**< \brief (SUPC_SR) WKUP Input Status 2 */ -#define SUPC_SR_WKUPIS2_DIS (0x0u << 18) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS2_EN (0x1u << 18) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3 (0x1u << 19) /**< \brief (SUPC_SR) WKUP Input Status 3 */ -#define SUPC_SR_WKUPIS3_DIS (0x0u << 19) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS3_EN (0x1u << 19) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4 (0x1u << 20) /**< \brief (SUPC_SR) WKUP Input Status 4 */ -#define SUPC_SR_WKUPIS4_DIS (0x0u << 20) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS4_EN (0x1u << 20) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5 (0x1u << 21) /**< \brief (SUPC_SR) WKUP Input Status 5 */ -#define SUPC_SR_WKUPIS5_DIS (0x0u << 21) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS5_EN (0x1u << 21) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6 (0x1u << 22) /**< \brief (SUPC_SR) WKUP Input Status 6 */ -#define SUPC_SR_WKUPIS6_DIS (0x0u << 22) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS6_EN (0x1u << 22) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7 (0x1u << 23) /**< \brief (SUPC_SR) WKUP Input Status 7 */ -#define SUPC_SR_WKUPIS7_DIS (0x0u << 23) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS7_EN (0x1u << 23) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8 (0x1u << 24) /**< \brief (SUPC_SR) WKUP Input Status 8 */ -#define SUPC_SR_WKUPIS8_DIS (0x0u << 24) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS8_EN (0x1u << 24) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9 (0x1u << 25) /**< \brief (SUPC_SR) WKUP Input Status 9 */ -#define SUPC_SR_WKUPIS9_DIS (0x0u << 25) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS9_EN (0x1u << 25) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10 (0x1u << 26) /**< \brief (SUPC_SR) WKUP Input Status 10 */ -#define SUPC_SR_WKUPIS10_DIS (0x0u << 26) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS10_EN (0x1u << 26) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11 (0x1u << 27) /**< \brief (SUPC_SR) WKUP Input Status 11 */ -#define SUPC_SR_WKUPIS11_DIS (0x0u << 27) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS11_EN (0x1u << 27) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12 (0x1u << 28) /**< \brief (SUPC_SR) WKUP Input Status 12 */ -#define SUPC_SR_WKUPIS12_DIS (0x0u << 28) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS12_EN (0x1u << 28) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13 (0x1u << 29) /**< \brief (SUPC_SR) WKUP Input Status 13 */ -#define SUPC_SR_WKUPIS13_DIS (0x0u << 29) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS13_EN (0x1u << 29) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14 (0x1u << 30) /**< \brief (SUPC_SR) WKUP Input Status 14 */ -#define SUPC_SR_WKUPIS14_DIS (0x0u << 30) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS14_EN (0x1u << 30) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15 (0x1u << 31) /**< \brief (SUPC_SR) WKUP Input Status 15 */ -#define SUPC_SR_WKUPIS15_DIS (0x0u << 31) /**< \brief (SUPC_SR) the corresponding wake-up input is disabled, or was inactive at the time the debouncer triggered a wake up event. */ -#define SUPC_SR_WKUPIS15_EN (0x1u << 31) /**< \brief (SUPC_SR) the corresponding wake-up input was active at the time the debouncer triggered a wake up event. */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Timer Counter */ -/* ============================================================================= */ -/** \addtogroup SAM3S_TC Timer Counter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief TcChannel hardware registers */ -typedef struct { - RwReg TC_CCR; /**< \brief (TcChannel Offset: 0x0) Channel Control Register */ - RwReg TC_CMR; /**< \brief (TcChannel Offset: 0x4) Channel Mode Register */ - RwReg TC_SMMR; /**< \brief (TcChannel Offset: 0x8) Stepper Motor Mode Register */ - RwReg Reserved1[1]; - RwReg TC_CV; /**< \brief (TcChannel Offset: 0x10) Counter Value */ - RwReg TC_RA; /**< \brief (TcChannel Offset: 0x14) Register A */ - RwReg TC_RB; /**< \brief (TcChannel Offset: 0x18) Register B */ - RwReg TC_RC; /**< \brief (TcChannel Offset: 0x1C) Register C */ - RwReg TC_SR; /**< \brief (TcChannel Offset: 0x20) Status Register */ - RwReg TC_IER; /**< \brief (TcChannel Offset: 0x24) Interrupt Enable Register */ - RwReg TC_IDR; /**< \brief (TcChannel Offset: 0x28) Interrupt Disable Register */ - RwReg TC_IMR; /**< \brief (TcChannel Offset: 0x2C) Interrupt Mask Register */ - RwReg Reserved2[4]; -} TcChannel; -/** \brief Tc hardware registers */ -typedef struct { - TcChannel TC_CHANNEL[3]; /**< \brief (Tc Offset: 0x0) channel = 0 .. 2 */ - WoReg TC_BCR; /**< \brief (Tc Offset: 0xC0) Block Control Register */ - RwReg TC_BMR; /**< \brief (Tc Offset: 0xC4) Block Mode Register */ - WoReg TC_QIER; /**< \brief (Tc Offset: 0xC8) QDEC Interrupt Enable Register */ - WoReg TC_QIDR; /**< \brief (Tc Offset: 0xCC) QDEC Interrupt Disable Register */ - RoReg TC_QIMR; /**< \brief (Tc Offset: 0xD0) QDEC Interrupt Mask Register */ - RoReg TC_QISR; /**< \brief (Tc Offset: 0xD4) QDEC Interrupt Status Register */ - RwReg TC_FMR; /**< \brief (Tc Offset: 0xD8) Fault Mode Register */ - RwReg Reserved1[2]; - RwReg TC_WPMR; /**< \brief (Tc Offset: 0xE4) Write Protect Mode Register */ -} Tc; -#endif /* __ASSEMBLY__ */ -/* -------- TC_CCR : (TC Offset: N/A) Channel Control Register -------- */ -#define TC_CCR_CLKEN (0x1u << 0) /**< \brief (TC_CCR) Counter Clock Enable Command */ -#define TC_CCR_CLKDIS (0x1u << 1) /**< \brief (TC_CCR) Counter Clock Disable Command */ -#define TC_CCR_SWTRG (0x1u << 2) /**< \brief (TC_CCR) Software Trigger Command */ -/* -------- TC_CMR : (TC Offset: N/A) Channel Mode Register -------- */ -#define TC_CMR_TCCLKS_Pos 0 -#define TC_CMR_TCCLKS_Msk (0x7u << TC_CMR_TCCLKS_Pos) /**< \brief (TC_CMR) Clock Selection */ -#define TC_CMR_TCCLKS_TIMER_CLOCK1 (0x0u << 0) /**< \brief (TC_CMR) Clock selected: TCLK1 */ -#define TC_CMR_TCCLKS_TIMER_CLOCK2 (0x1u << 0) /**< \brief (TC_CMR) Clock selected: TCLK2 */ -#define TC_CMR_TCCLKS_TIMER_CLOCK3 (0x2u << 0) /**< \brief (TC_CMR) Clock selected: TCLK3 */ -#define TC_CMR_TCCLKS_TIMER_CLOCK4 (0x3u << 0) /**< \brief (TC_CMR) Clock selected: TCLK4 */ -#define TC_CMR_TCCLKS_TIMER_CLOCK5 (0x4u << 0) /**< \brief (TC_CMR) Clock selected: TCLK5 */ -#define TC_CMR_TCCLKS_XC0 (0x5u << 0) /**< \brief (TC_CMR) Clock selected: XC0 */ -#define TC_CMR_TCCLKS_XC1 (0x6u << 0) /**< \brief (TC_CMR) Clock selected: XC1 */ -#define TC_CMR_TCCLKS_XC2 (0x7u << 0) /**< \brief (TC_CMR) Clock selected: XC2 */ -#define TC_CMR_CLKI (0x1u << 3) /**< \brief (TC_CMR) Clock Invert */ -#define TC_CMR_BURST_Pos 4 -#define TC_CMR_BURST_Msk (0x3u << TC_CMR_BURST_Pos) /**< \brief (TC_CMR) Burst Signal Selection */ -#define TC_CMR_BURST_NONE (0x0u << 4) /**< \brief (TC_CMR) The clock is not gated by an external signal. */ -#define TC_CMR_BURST_XC0 (0x1u << 4) /**< \brief (TC_CMR) XC0 is ANDed with the selected clock. */ -#define TC_CMR_BURST_XC1 (0x2u << 4) /**< \brief (TC_CMR) XC1 is ANDed with the selected clock. */ -#define TC_CMR_BURST_XC2 (0x3u << 4) /**< \brief (TC_CMR) XC2 is ANDed with the selected clock. */ -#define TC_CMR_LDBSTOP (0x1u << 6) /**< \brief (TC_CMR) Counter Clock Stopped with RB Loading */ -#define TC_CMR_LDBDIS (0x1u << 7) /**< \brief (TC_CMR) Counter Clock Disable with RB Loading */ -#define TC_CMR_ETRGEDG_Pos 8 -#define TC_CMR_ETRGEDG_Msk (0x3u << TC_CMR_ETRGEDG_Pos) /**< \brief (TC_CMR) External Trigger Edge Selection */ -#define TC_CMR_ETRGEDG_NONE (0x0u << 8) /**< \brief (TC_CMR) The clock is not gated by an external signal. */ -#define TC_CMR_ETRGEDG_RISING (0x1u << 8) /**< \brief (TC_CMR) Rising edge */ -#define TC_CMR_ETRGEDG_FALLING (0x2u << 8) /**< \brief (TC_CMR) Falling edge */ -#define TC_CMR_ETRGEDG_EDGE (0x3u << 8) /**< \brief (TC_CMR) Each edge */ -#define TC_CMR_ABETRG (0x1u << 10) /**< \brief (TC_CMR) TIOA or TIOB External Trigger Selection */ -#define TC_CMR_CPCTRG (0x1u << 14) /**< \brief (TC_CMR) RC Compare Trigger Enable */ -#define TC_CMR_WAVE (0x1u << 15) /**< \brief (TC_CMR) */ -#define TC_CMR_LDRA_Pos 16 -#define TC_CMR_LDRA_Msk (0x3u << TC_CMR_LDRA_Pos) /**< \brief (TC_CMR) RA Loading Selection */ -#define TC_CMR_LDRA_NONE (0x0u << 16) /**< \brief (TC_CMR) None */ -#define TC_CMR_LDRA_RISING (0x1u << 16) /**< \brief (TC_CMR) Rising edge of TIOA */ -#define TC_CMR_LDRA_FALLING (0x2u << 16) /**< \brief (TC_CMR) Falling edge of TIOA */ -#define TC_CMR_LDRA_EDGE (0x3u << 16) /**< \brief (TC_CMR) Each edge of TIOA */ -#define TC_CMR_LDRB_Pos 18 -#define TC_CMR_LDRB_Msk (0x3u << TC_CMR_LDRB_Pos) /**< \brief (TC_CMR) RB Loading Selection */ -#define TC_CMR_LDRB_NONE (0x0u << 18) /**< \brief (TC_CMR) None */ -#define TC_CMR_LDRB_RISING (0x1u << 18) /**< \brief (TC_CMR) Rising edge of TIOA */ -#define TC_CMR_LDRB_FALLING (0x2u << 18) /**< \brief (TC_CMR) Falling edge of TIOA */ -#define TC_CMR_LDRB_EDGE (0x3u << 18) /**< \brief (TC_CMR) Each edge of TIOA */ -#define TC_CMR_CPCSTOP (0x1u << 6) /**< \brief (TC_CMR) Counter Clock Stopped with RC Compare */ -#define TC_CMR_CPCDIS (0x1u << 7) /**< \brief (TC_CMR) Counter Clock Disable with RC Compare */ -#define TC_CMR_EEVTEDG_Pos 8 -#define TC_CMR_EEVTEDG_Msk (0x3u << TC_CMR_EEVTEDG_Pos) /**< \brief (TC_CMR) External Event Edge Selection */ -#define TC_CMR_EEVTEDG_NONE (0x0u << 8) /**< \brief (TC_CMR) None */ -#define TC_CMR_EEVTEDG_RISING (0x1u << 8) /**< \brief (TC_CMR) Rising edge */ -#define TC_CMR_EEVTEDG_FALLING (0x2u << 8) /**< \brief (TC_CMR) Falling edge */ -#define TC_CMR_EEVTEDG_EDGE (0x3u << 8) /**< \brief (TC_CMR) Each edge */ -#define TC_CMR_EEVT_Pos 10 -#define TC_CMR_EEVT_Msk (0x3u << TC_CMR_EEVT_Pos) /**< \brief (TC_CMR) External Event Selection */ -#define TC_CMR_EEVT_TIOB (0x0u << 10) /**< \brief (TC_CMR) TIOB */ -#define TC_CMR_EEVT_XC0 (0x1u << 10) /**< \brief (TC_CMR) XC0 */ -#define TC_CMR_EEVT_XC1 (0x2u << 10) /**< \brief (TC_CMR) XC1 */ -#define TC_CMR_EEVT_XC2 (0x3u << 10) /**< \brief (TC_CMR) XC2 */ -#define TC_CMR_ENETRG (0x1u << 12) /**< \brief (TC_CMR) External Event Trigger Enable */ -#define TC_CMR_WAVSEL_Pos 13 -#define TC_CMR_WAVSEL_Msk (0x3u << TC_CMR_WAVSEL_Pos) /**< \brief (TC_CMR) Waveform Selection */ -#define TC_CMR_WAVSEL_UP (0x0u << 13) /**< \brief (TC_CMR) UP mode without automatic trigger on RC Compare */ -#define TC_CMR_WAVSEL_UPDOWN (0x1u << 13) /**< \brief (TC_CMR) UPDOWN mode without automatic trigger on RC Compare */ -#define TC_CMR_WAVSEL_UP_RC (0x2u << 13) /**< \brief (TC_CMR) UP mode with automatic trigger on RC Compare */ -#define TC_CMR_WAVSEL_UPDOWN_RC (0x3u << 13) /**< \brief (TC_CMR) UPDOWN mode with automatic trigger on RC Compare */ -#define TC_CMR_ACPA_Pos 16 -#define TC_CMR_ACPA_Msk (0x3u << TC_CMR_ACPA_Pos) /**< \brief (TC_CMR) RA Compare Effect on TIOA */ -#define TC_CMR_ACPA_NONE (0x0u << 16) /**< \brief (TC_CMR) None */ -#define TC_CMR_ACPA_SET (0x1u << 16) /**< \brief (TC_CMR) Set */ -#define TC_CMR_ACPA_CLEAR (0x2u << 16) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_ACPA_TOGGLE (0x3u << 16) /**< \brief (TC_CMR) Toggle */ -#define TC_CMR_ACPC_Pos 18 -#define TC_CMR_ACPC_Msk (0x3u << TC_CMR_ACPC_Pos) /**< \brief (TC_CMR) RC Compare Effect on TIOA */ -#define TC_CMR_ACPC_NONE (0x0u << 18) /**< \brief (TC_CMR) None */ -#define TC_CMR_ACPC_SET (0x1u << 18) /**< \brief (TC_CMR) Set */ -#define TC_CMR_ACPC_CLEAR (0x2u << 18) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_ACPC_TOGGLE (0x3u << 18) /**< \brief (TC_CMR) Toggle */ -#define TC_CMR_AEEVT_Pos 20 -#define TC_CMR_AEEVT_Msk (0x3u << TC_CMR_AEEVT_Pos) /**< \brief (TC_CMR) External Event Effect on TIOA */ -#define TC_CMR_AEEVT_NONE (0x0u << 20) /**< \brief (TC_CMR) None */ -#define TC_CMR_AEEVT_SET (0x1u << 20) /**< \brief (TC_CMR) Set */ -#define TC_CMR_AEEVT_CLEAR (0x2u << 20) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_AEEVT_TOGGLE (0x3u << 20) /**< \brief (TC_CMR) Toggle */ -#define TC_CMR_ASWTRG_Pos 22 -#define TC_CMR_ASWTRG_Msk (0x3u << TC_CMR_ASWTRG_Pos) /**< \brief (TC_CMR) Software Trigger Effect on TIOA */ -#define TC_CMR_ASWTRG_NONE (0x0u << 22) /**< \brief (TC_CMR) None */ -#define TC_CMR_ASWTRG_SET (0x1u << 22) /**< \brief (TC_CMR) Set */ -#define TC_CMR_ASWTRG_CLEAR (0x2u << 22) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_ASWTRG_TOGGLE (0x3u << 22) /**< \brief (TC_CMR) Toggle */ -#define TC_CMR_BCPB_Pos 24 -#define TC_CMR_BCPB_Msk (0x3u << TC_CMR_BCPB_Pos) /**< \brief (TC_CMR) RB Compare Effect on TIOB */ -#define TC_CMR_BCPB_NONE (0x0u << 24) /**< \brief (TC_CMR) None */ -#define TC_CMR_BCPB_SET (0x1u << 24) /**< \brief (TC_CMR) Set */ -#define TC_CMR_BCPB_CLEAR (0x2u << 24) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_BCPB_TOGGLE (0x3u << 24) /**< \brief (TC_CMR) Toggle */ -#define TC_CMR_BCPC_Pos 26 -#define TC_CMR_BCPC_Msk (0x3u << TC_CMR_BCPC_Pos) /**< \brief (TC_CMR) RC Compare Effect on TIOB */ -#define TC_CMR_BCPC_NONE (0x0u << 26) /**< \brief (TC_CMR) None */ -#define TC_CMR_BCPC_SET (0x1u << 26) /**< \brief (TC_CMR) Set */ -#define TC_CMR_BCPC_CLEAR (0x2u << 26) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_BCPC_TOGGLE (0x3u << 26) /**< \brief (TC_CMR) Toggle */ -#define TC_CMR_BEEVT_Pos 28 -#define TC_CMR_BEEVT_Msk (0x3u << TC_CMR_BEEVT_Pos) /**< \brief (TC_CMR) External Event Effect on TIOB */ -#define TC_CMR_BEEVT_NONE (0x0u << 28) /**< \brief (TC_CMR) None */ -#define TC_CMR_BEEVT_SET (0x1u << 28) /**< \brief (TC_CMR) Set */ -#define TC_CMR_BEEVT_CLEAR (0x2u << 28) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_BEEVT_TOGGLE (0x3u << 28) /**< \brief (TC_CMR) Toggle */ -#define TC_CMR_BSWTRG_Pos 30 -#define TC_CMR_BSWTRG_Msk (0x3u << TC_CMR_BSWTRG_Pos) /**< \brief (TC_CMR) Software Trigger Effect on TIOB */ -#define TC_CMR_BSWTRG_NONE (0x0u << 30) /**< \brief (TC_CMR) None */ -#define TC_CMR_BSWTRG_SET (0x1u << 30) /**< \brief (TC_CMR) Set */ -#define TC_CMR_BSWTRG_CLEAR (0x2u << 30) /**< \brief (TC_CMR) Clear */ -#define TC_CMR_BSWTRG_TOGGLE (0x3u << 30) /**< \brief (TC_CMR) Toggle */ -/* -------- TC_SMMR : (TC Offset: N/A) Stepper Motor Mode Register -------- */ -#define TC_SMMR_GCEN (0x1u << 0) /**< \brief (TC_SMMR) Gray Count Enable */ -#define TC_SMMR_DOWN (0x1u << 1) /**< \brief (TC_SMMR) DOWN Count */ -/* -------- TC_CV : (TC Offset: N/A) Counter Value -------- */ -#define TC_CV_CV_Pos 0 -#define TC_CV_CV_Msk (0xffffu << TC_CV_CV_Pos) /**< \brief (TC_CV) Counter Value */ -/* -------- TC_RA : (TC Offset: N/A) Register A -------- */ -#define TC_RA_RA_Pos 0 -#define TC_RA_RA_Msk (0xffffu << TC_RA_RA_Pos) /**< \brief (TC_RA) Register A */ -#define TC_RA_RA(value) ((TC_RA_RA_Msk & ((value) << TC_RA_RA_Pos))) -/* -------- TC_RB : (TC Offset: N/A) Register B -------- */ -#define TC_RB_RB_Pos 0 -#define TC_RB_RB_Msk (0xffffu << TC_RB_RB_Pos) /**< \brief (TC_RB) Register B */ -#define TC_RB_RB(value) ((TC_RB_RB_Msk & ((value) << TC_RB_RB_Pos))) -/* -------- TC_RC : (TC Offset: N/A) Register C -------- */ -#define TC_RC_RC_Pos 0 -#define TC_RC_RC_Msk (0xffffu << TC_RC_RC_Pos) /**< \brief (TC_RC) Register C */ -#define TC_RC_RC(value) ((TC_RC_RC_Msk & ((value) << TC_RC_RC_Pos))) -/* -------- TC_SR : (TC Offset: N/A) Status Register -------- */ -#define TC_SR_COVFS (0x1u << 0) /**< \brief (TC_SR) Counter Overflow Status */ -#define TC_SR_LOVRS (0x1u << 1) /**< \brief (TC_SR) Load Overrun Status */ -#define TC_SR_CPAS (0x1u << 2) /**< \brief (TC_SR) RA Compare Status */ -#define TC_SR_CPBS (0x1u << 3) /**< \brief (TC_SR) RB Compare Status */ -#define TC_SR_CPCS (0x1u << 4) /**< \brief (TC_SR) RC Compare Status */ -#define TC_SR_LDRAS (0x1u << 5) /**< \brief (TC_SR) RA Loading Status */ -#define TC_SR_LDRBS (0x1u << 6) /**< \brief (TC_SR) RB Loading Status */ -#define TC_SR_ETRGS (0x1u << 7) /**< \brief (TC_SR) External Trigger Status */ -#define TC_SR_CLKSTA (0x1u << 16) /**< \brief (TC_SR) Clock Enabling Status */ -#define TC_SR_MTIOA (0x1u << 17) /**< \brief (TC_SR) TIOA Mirror */ -#define TC_SR_MTIOB (0x1u << 18) /**< \brief (TC_SR) TIOB Mirror */ -/* -------- TC_IER : (TC Offset: N/A) Interrupt Enable Register -------- */ -#define TC_IER_COVFS (0x1u << 0) /**< \brief (TC_IER) Counter Overflow */ -#define TC_IER_LOVRS (0x1u << 1) /**< \brief (TC_IER) Load Overrun */ -#define TC_IER_CPAS (0x1u << 2) /**< \brief (TC_IER) RA Compare */ -#define TC_IER_CPBS (0x1u << 3) /**< \brief (TC_IER) RB Compare */ -#define TC_IER_CPCS (0x1u << 4) /**< \brief (TC_IER) RC Compare */ -#define TC_IER_LDRAS (0x1u << 5) /**< \brief (TC_IER) RA Loading */ -#define TC_IER_LDRBS (0x1u << 6) /**< \brief (TC_IER) RB Loading */ -#define TC_IER_ETRGS (0x1u << 7) /**< \brief (TC_IER) External Trigger */ -/* -------- TC_IDR : (TC Offset: N/A) Interrupt Disable Register -------- */ -#define TC_IDR_COVFS (0x1u << 0) /**< \brief (TC_IDR) Counter Overflow */ -#define TC_IDR_LOVRS (0x1u << 1) /**< \brief (TC_IDR) Load Overrun */ -#define TC_IDR_CPAS (0x1u << 2) /**< \brief (TC_IDR) RA Compare */ -#define TC_IDR_CPBS (0x1u << 3) /**< \brief (TC_IDR) RB Compare */ -#define TC_IDR_CPCS (0x1u << 4) /**< \brief (TC_IDR) RC Compare */ -#define TC_IDR_LDRAS (0x1u << 5) /**< \brief (TC_IDR) RA Loading */ -#define TC_IDR_LDRBS (0x1u << 6) /**< \brief (TC_IDR) RB Loading */ -#define TC_IDR_ETRGS (0x1u << 7) /**< \brief (TC_IDR) External Trigger */ -/* -------- TC_IMR : (TC Offset: N/A) Interrupt Mask Register -------- */ -#define TC_IMR_COVFS (0x1u << 0) /**< \brief (TC_IMR) Counter Overflow */ -#define TC_IMR_LOVRS (0x1u << 1) /**< \brief (TC_IMR) Load Overrun */ -#define TC_IMR_CPAS (0x1u << 2) /**< \brief (TC_IMR) RA Compare */ -#define TC_IMR_CPBS (0x1u << 3) /**< \brief (TC_IMR) RB Compare */ -#define TC_IMR_CPCS (0x1u << 4) /**< \brief (TC_IMR) RC Compare */ -#define TC_IMR_LDRAS (0x1u << 5) /**< \brief (TC_IMR) RA Loading */ -#define TC_IMR_LDRBS (0x1u << 6) /**< \brief (TC_IMR) RB Loading */ -#define TC_IMR_ETRGS (0x1u << 7) /**< \brief (TC_IMR) External Trigger */ -/* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */ -#define TC_BCR_SYNC (0x1u << 0) /**< \brief (TC_BCR) Synchro Command */ -/* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */ -#define TC_BMR_TC0XC0S_Pos 0 -#define TC_BMR_TC0XC0S_Msk (0x3u << TC_BMR_TC0XC0S_Pos) /**< \brief (TC_BMR) External Clock Signal 0 Selection */ -#define TC_BMR_TC0XC0S_TCLK0 (0x0u << 0) /**< \brief (TC_BMR) Signal connected to XC0: TCLK0 */ -#define TC_BMR_TC0XC0S_TIOA1 (0x2u << 0) /**< \brief (TC_BMR) Signal connected to XC0: TIOA1 */ -#define TC_BMR_TC0XC0S_TIOA2 (0x3u << 0) /**< \brief (TC_BMR) Signal connected to XC0: TIOA2 */ -#define TC_BMR_TC1XC1S_Pos 2 -#define TC_BMR_TC1XC1S_Msk (0x3u << TC_BMR_TC1XC1S_Pos) /**< \brief (TC_BMR) External Clock Signal 1 Selection */ -#define TC_BMR_TC1XC1S_TCLK1 (0x0u << 2) /**< \brief (TC_BMR) Signal connected to XC1: TCLK1 */ -#define TC_BMR_TC1XC1S_TIOA0 (0x2u << 2) /**< \brief (TC_BMR) Signal connected to XC1: TIOA0 */ -#define TC_BMR_TC1XC1S_TIOA2 (0x3u << 2) /**< \brief (TC_BMR) Signal connected to XC1: TIOA2 */ -#define TC_BMR_TC2XC2S_Pos 4 -#define TC_BMR_TC2XC2S_Msk (0x3u << TC_BMR_TC2XC2S_Pos) /**< \brief (TC_BMR) External Clock Signal 2 Selection */ -#define TC_BMR_TC2XC2S_TCLK2 (0x0u << 4) /**< \brief (TC_BMR) Signal connected to XC2: TCLK2 */ -#define TC_BMR_TC2XC2S_TIOA1 (0x2u << 4) /**< \brief (TC_BMR) Signal connected to XC2: TIOA1 */ -#define TC_BMR_TC2XC2S_TIOA2 (0x3u << 4) /**< \brief (TC_BMR) Signal connected to XC2: TIOA2 */ -#define TC_BMR_QDEN (0x1u << 8) /**< \brief (TC_BMR) Quadrature Decoder ENabled */ -#define TC_BMR_POSEN (0x1u << 9) /**< \brief (TC_BMR) POSition ENabled */ -#define TC_BMR_SPEEDEN (0x1u << 10) /**< \brief (TC_BMR) SPEED ENabled */ -#define TC_BMR_QDTRANS (0x1u << 11) /**< \brief (TC_BMR) Quadrature Decoding TRANSparent */ -#define TC_BMR_EDGPHA (0x1u << 12) /**< \brief (TC_BMR) EDGe on PHA count mode */ -#define TC_BMR_INVA (0x1u << 13) /**< \brief (TC_BMR) INVerted phA */ -#define TC_BMR_INVB (0x1u << 14) /**< \brief (TC_BMR) INVerted phB */ -#define TC_BMR_INVIDX (0x1u << 15) /**< \brief (TC_BMR) INVerted InDeX */ -#define TC_BMR_SWAP (0x1u << 16) /**< \brief (TC_BMR) SWAP PHA and PHB */ -#define TC_BMR_IDXPHB (0x1u << 17) /**< \brief (TC_BMR) InDeX pin is PHB pin */ -#define TC_BMR_FILTER (0x1u << 19) /**< \brief (TC_BMR) */ -#define TC_BMR_MAXFILT_Pos 20 -#define TC_BMR_MAXFILT_Msk (0x3fu << TC_BMR_MAXFILT_Pos) /**< \brief (TC_BMR) MAXimum FILTer */ -#define TC_BMR_MAXFILT(value) ((TC_BMR_MAXFILT_Msk & ((value) << TC_BMR_MAXFILT_Pos))) -/* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */ -#define TC_QIER_IDX (0x1u << 0) /**< \brief (TC_QIER) InDeX */ -#define TC_QIER_DIRCHG (0x1u << 1) /**< \brief (TC_QIER) DIRection CHanGe */ -#define TC_QIER_QERR (0x1u << 2) /**< \brief (TC_QIER) Quadrature ERRor */ -/* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */ -#define TC_QIDR_IDX (0x1u << 0) /**< \brief (TC_QIDR) InDeX */ -#define TC_QIDR_DIRCHG (0x1u << 1) /**< \brief (TC_QIDR) DIRection CHanGe */ -#define TC_QIDR_QERR (0x1u << 2) /**< \brief (TC_QIDR) Quadrature ERRor */ -/* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */ -#define TC_QIMR_IDX (0x1u << 0) /**< \brief (TC_QIMR) InDeX */ -#define TC_QIMR_DIRCHG (0x1u << 1) /**< \brief (TC_QIMR) DIRection CHanGe */ -#define TC_QIMR_QERR (0x1u << 2) /**< \brief (TC_QIMR) Quadrature ERRor */ -/* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */ -#define TC_QISR_IDX (0x1u << 0) /**< \brief (TC_QISR) InDeX */ -#define TC_QISR_DIRCHG (0x1u << 1) /**< \brief (TC_QISR) DIRection CHanGe */ -#define TC_QISR_QERR (0x1u << 2) /**< \brief (TC_QISR) Quadrature ERRor */ -#define TC_QISR_DIR (0x1u << 8) /**< \brief (TC_QISR) Direction */ -/* -------- TC_FMR : (TC Offset: 0xD8) Fault Mode Register -------- */ -#define TC_FMR_ENCF0 (0x1u << 0) /**< \brief (TC_FMR) ENable Compare Fault Channel 0 */ -#define TC_FMR_ENCF1 (0x1u << 1) /**< \brief (TC_FMR) ENable Compare Fault Channel 1 */ -/* -------- TC_WPMR : (TC Offset: 0xE4) Write Protect Mode Register -------- */ -#define TC_WPMR_WPEN (0x1u << 0) /**< \brief (TC_WPMR) Write Protect Enable */ -#define TC_WPMR_WPKEY_Pos 8 -#define TC_WPMR_WPKEY_Msk (0xffffffu << TC_WPMR_WPKEY_Pos) /**< \brief (TC_WPMR) Write Protect KEY */ -#define TC_WPMR_WPKEY(value) ((TC_WPMR_WPKEY_Msk & ((value) << TC_WPMR_WPKEY_Pos))) - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Two-wire Interface */ -/* ============================================================================= */ -/** \addtogroup SAM3S_TWI Two-wire Interface */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Twi hardware registers */ -typedef struct { - WoReg TWI_CR; /**< \brief (Twi Offset: 0x00) Control Register */ - RwReg TWI_MMR; /**< \brief (Twi Offset: 0x04) Master Mode Register */ - RwReg TWI_SMR; /**< \brief (Twi Offset: 0x08) Slave Mode Register */ - RwReg TWI_IADR; /**< \brief (Twi Offset: 0x0C) Internal Address Register */ - RwReg TWI_CWGR; /**< \brief (Twi Offset: 0x10) Clock Waveform Generator Register */ - RwReg Reserved1[3]; - RoReg TWI_SR; /**< \brief (Twi Offset: 0x20) Status Register */ - WoReg TWI_IER; /**< \brief (Twi Offset: 0x24) Interrupt Enable Register */ - WoReg TWI_IDR; /**< \brief (Twi Offset: 0x28) Interrupt Disable Register */ - RoReg TWI_IMR; /**< \brief (Twi Offset: 0x2C) Interrupt Mask Register */ - RoReg TWI_RHR; /**< \brief (Twi Offset: 0x30) Receive Holding Register */ - WoReg TWI_THR; /**< \brief (Twi Offset: 0x34) Transmit Holding Register */ - RwReg Reserved2[50]; - RwReg TWI_RPR; /**< \brief (Twi Offset: 0x100) Receive Pointer Register */ - RwReg TWI_RCR; /**< \brief (Twi Offset: 0x104) Receive Counter Register */ - RwReg TWI_TPR; /**< \brief (Twi Offset: 0x108) Transmit Pointer Register */ - RwReg TWI_TCR; /**< \brief (Twi Offset: 0x10C) Transmit Counter Register */ - RwReg TWI_RNPR; /**< \brief (Twi Offset: 0x110) Receive Next Pointer Register */ - RwReg TWI_RNCR; /**< \brief (Twi Offset: 0x114) Receive Next Counter Register */ - RwReg TWI_TNPR; /**< \brief (Twi Offset: 0x118) Transmit Next Pointer Register */ - RwReg TWI_TNCR; /**< \brief (Twi Offset: 0x11C) Transmit Next Counter Register */ - WoReg TWI_PTCR; /**< \brief (Twi Offset: 0x120) Transfer Control Register */ - RoReg TWI_PTSR; /**< \brief (Twi Offset: 0x124) Transfer Status Register */ -} Twi; -#endif /* __ASSEMBLY__ */ -/* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */ -#define TWI_CR_START (0x1u << 0) /**< \brief (TWI_CR) Send a START Condition */ -#define TWI_CR_STOP (0x1u << 1) /**< \brief (TWI_CR) Send a STOP Condition */ -#define TWI_CR_MSEN (0x1u << 2) /**< \brief (TWI_CR) TWI Master Mode Enabled */ -#define TWI_CR_MSDIS (0x1u << 3) /**< \brief (TWI_CR) TWI Master Mode Disabled */ -#define TWI_CR_SVEN (0x1u << 4) /**< \brief (TWI_CR) TWI Slave Mode Enabled */ -#define TWI_CR_SVDIS (0x1u << 5) /**< \brief (TWI_CR) TWI Slave Mode Disabled */ -#define TWI_CR_QUICK (0x1u << 6) /**< \brief (TWI_CR) SMBUS Quick Command */ -#define TWI_CR_SWRST (0x1u << 7) /**< \brief (TWI_CR) Software Reset */ -/* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */ -#define TWI_MMR_IADRSZ_Pos 8 -#define TWI_MMR_IADRSZ_Msk (0x3u << TWI_MMR_IADRSZ_Pos) /**< \brief (TWI_MMR) Internal Device Address Size */ -#define TWI_MMR_IADRSZ_NONE (0x0u << 8) /**< \brief (TWI_MMR) No internal device address */ -#define TWI_MMR_IADRSZ_1_BYTE (0x1u << 8) /**< \brief (TWI_MMR) One-byte internal device address */ -#define TWI_MMR_IADRSZ_2_BYTE (0x2u << 8) /**< \brief (TWI_MMR) Two-byte internal device address */ -#define TWI_MMR_IADRSZ_3_BYTE (0x3u << 8) /**< \brief (TWI_MMR) Three-byte internal device address */ -#define TWI_MMR_MREAD (0x1u << 12) /**< \brief (TWI_MMR) Master Read Direction */ -#define TWI_MMR_DADR_Pos 16 -#define TWI_MMR_DADR_Msk (0x7fu << TWI_MMR_DADR_Pos) /**< \brief (TWI_MMR) Device Address */ -#define TWI_MMR_DADR(value) ((TWI_MMR_DADR_Msk & ((value) << TWI_MMR_DADR_Pos))) -/* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */ -#define TWI_SMR_SADR_Pos 16 -#define TWI_SMR_SADR_Msk (0x7fu << TWI_SMR_SADR_Pos) /**< \brief (TWI_SMR) Slave Address */ -#define TWI_SMR_SADR(value) ((TWI_SMR_SADR_Msk & ((value) << TWI_SMR_SADR_Pos))) -/* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */ -#define TWI_IADR_IADR_Pos 0 -#define TWI_IADR_IADR_Msk (0xffffffu << TWI_IADR_IADR_Pos) /**< \brief (TWI_IADR) Internal Address */ -#define TWI_IADR_IADR(value) ((TWI_IADR_IADR_Msk & ((value) << TWI_IADR_IADR_Pos))) -/* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */ -#define TWI_CWGR_CLDIV_Pos 0 -#define TWI_CWGR_CLDIV_Msk (0xffu << TWI_CWGR_CLDIV_Pos) /**< \brief (TWI_CWGR) Clock Low Divider */ -#define TWI_CWGR_CLDIV(value) ((TWI_CWGR_CLDIV_Msk & ((value) << TWI_CWGR_CLDIV_Pos))) -#define TWI_CWGR_CHDIV_Pos 8 -#define TWI_CWGR_CHDIV_Msk (0xffu << TWI_CWGR_CHDIV_Pos) /**< \brief (TWI_CWGR) Clock High Divider */ -#define TWI_CWGR_CHDIV(value) ((TWI_CWGR_CHDIV_Msk & ((value) << TWI_CWGR_CHDIV_Pos))) -#define TWI_CWGR_CKDIV_Pos 16 -#define TWI_CWGR_CKDIV_Msk (0x7u << TWI_CWGR_CKDIV_Pos) /**< \brief (TWI_CWGR) Clock Divider */ -#define TWI_CWGR_CKDIV(value) ((TWI_CWGR_CKDIV_Msk & ((value) << TWI_CWGR_CKDIV_Pos))) -/* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */ -#define TWI_SR_TXCOMP (0x1u << 0) /**< \brief (TWI_SR) Transmission Completed (automatically set / reset) */ -#define TWI_SR_RXRDY (0x1u << 1) /**< \brief (TWI_SR) Receive Holding Register Ready (automatically set / reset) */ -#define TWI_SR_TXRDY (0x1u << 2) /**< \brief (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */ -#define TWI_SR_SVREAD (0x1u << 3) /**< \brief (TWI_SR) Slave Read (automatically set / reset) */ -#define TWI_SR_SVACC (0x1u << 4) /**< \brief (TWI_SR) Slave Access (automatically set / reset) */ -#define TWI_SR_GACC (0x1u << 5) /**< \brief (TWI_SR) General Call Access (clear on read) */ -#define TWI_SR_OVRE (0x1u << 6) /**< \brief (TWI_SR) Overrun Error (clear on read) */ -#define TWI_SR_NACK (0x1u << 8) /**< \brief (TWI_SR) Not Acknowledged (clear on read) */ -#define TWI_SR_ARBLST (0x1u << 9) /**< \brief (TWI_SR) Arbitration Lost (clear on read) */ -#define TWI_SR_SCLWS (0x1u << 10) /**< \brief (TWI_SR) Clock Wait State (automatically set / reset) */ -#define TWI_SR_EOSACC (0x1u << 11) /**< \brief (TWI_SR) End Of Slave Access (clear on read) */ -#define TWI_SR_ENDRX (0x1u << 12) /**< \brief (TWI_SR) End of RX buffer */ -#define TWI_SR_ENDTX (0x1u << 13) /**< \brief (TWI_SR) End of TX buffer */ -#define TWI_SR_RXBUFF (0x1u << 14) /**< \brief (TWI_SR) RX Buffer Full */ -#define TWI_SR_TXBUFE (0x1u << 15) /**< \brief (TWI_SR) TX Buffer Empty */ -/* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */ -#define TWI_IER_TXCOMP (0x1u << 0) /**< \brief (TWI_IER) Transmission Completed Interrupt Enable */ -#define TWI_IER_RXRDY (0x1u << 1) /**< \brief (TWI_IER) Receive Holding Register Ready Interrupt Enable */ -#define TWI_IER_TXRDY (0x1u << 2) /**< \brief (TWI_IER) Transmit Holding Register Ready Interrupt Enable */ -#define TWI_IER_SVACC (0x1u << 4) /**< \brief (TWI_IER) Slave Access Interrupt Enable */ -#define TWI_IER_GACC (0x1u << 5) /**< \brief (TWI_IER) General Call Access Interrupt Enable */ -#define TWI_IER_OVRE (0x1u << 6) /**< \brief (TWI_IER) Overrun Error Interrupt Enable */ -#define TWI_IER_NACK (0x1u << 8) /**< \brief (TWI_IER) Not Acknowledge Interrupt Enable */ -#define TWI_IER_ARBLST (0x1u << 9) /**< \brief (TWI_IER) Arbitration Lost Interrupt Enable */ -#define TWI_IER_SCL_WS (0x1u << 10) /**< \brief (TWI_IER) Clock Wait State Interrupt Enable */ -#define TWI_IER_EOSACC (0x1u << 11) /**< \brief (TWI_IER) End Of Slave Access Interrupt Enable */ -#define TWI_IER_ENDRX (0x1u << 12) /**< \brief (TWI_IER) End of Receive Buffer Interrupt Enable */ -#define TWI_IER_ENDTX (0x1u << 13) /**< \brief (TWI_IER) End of Transmit Buffer Interrupt Enable */ -#define TWI_IER_RXBUFF (0x1u << 14) /**< \brief (TWI_IER) Receive Buffer Full Interrupt Enable */ -#define TWI_IER_TXBUFE (0x1u << 15) /**< \brief (TWI_IER) Transmit Buffer Empty Interrupt Enable */ -/* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */ -#define TWI_IDR_TXCOMP (0x1u << 0) /**< \brief (TWI_IDR) Transmission Completed Interrupt Disable */ -#define TWI_IDR_RXRDY (0x1u << 1) /**< \brief (TWI_IDR) Receive Holding Register Ready Interrupt Disable */ -#define TWI_IDR_TXRDY (0x1u << 2) /**< \brief (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */ -#define TWI_IDR_SVACC (0x1u << 4) /**< \brief (TWI_IDR) Slave Access Interrupt Disable */ -#define TWI_IDR_GACC (0x1u << 5) /**< \brief (TWI_IDR) General Call Access Interrupt Disable */ -#define TWI_IDR_OVRE (0x1u << 6) /**< \brief (TWI_IDR) Overrun Error Interrupt Disable */ -#define TWI_IDR_NACK (0x1u << 8) /**< \brief (TWI_IDR) Not Acknowledge Interrupt Disable */ -#define TWI_IDR_ARBLST (0x1u << 9) /**< \brief (TWI_IDR) Arbitration Lost Interrupt Disable */ -#define TWI_IDR_SCL_WS (0x1u << 10) /**< \brief (TWI_IDR) Clock Wait State Interrupt Disable */ -#define TWI_IDR_EOSACC (0x1u << 11) /**< \brief (TWI_IDR) End Of Slave Access Interrupt Disable */ -#define TWI_IDR_ENDRX (0x1u << 12) /**< \brief (TWI_IDR) End of Receive Buffer Interrupt Disable */ -#define TWI_IDR_ENDTX (0x1u << 13) /**< \brief (TWI_IDR) End of Transmit Buffer Interrupt Disable */ -#define TWI_IDR_RXBUFF (0x1u << 14) /**< \brief (TWI_IDR) Receive Buffer Full Interrupt Disable */ -#define TWI_IDR_TXBUFE (0x1u << 15) /**< \brief (TWI_IDR) Transmit Buffer Empty Interrupt Disable */ -/* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */ -#define TWI_IMR_TXCOMP (0x1u << 0) /**< \brief (TWI_IMR) Transmission Completed Interrupt Mask */ -#define TWI_IMR_RXRDY (0x1u << 1) /**< \brief (TWI_IMR) Receive Holding Register Ready Interrupt Mask */ -#define TWI_IMR_TXRDY (0x1u << 2) /**< \brief (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */ -#define TWI_IMR_SVACC (0x1u << 4) /**< \brief (TWI_IMR) Slave Access Interrupt Mask */ -#define TWI_IMR_GACC (0x1u << 5) /**< \brief (TWI_IMR) General Call Access Interrupt Mask */ -#define TWI_IMR_OVRE (0x1u << 6) /**< \brief (TWI_IMR) Overrun Error Interrupt Mask */ -#define TWI_IMR_NACK (0x1u << 8) /**< \brief (TWI_IMR) Not Acknowledge Interrupt Mask */ -#define TWI_IMR_ARBLST (0x1u << 9) /**< \brief (TWI_IMR) Arbitration Lost Interrupt Mask */ -#define TWI_IMR_SCL_WS (0x1u << 10) /**< \brief (TWI_IMR) Clock Wait State Interrupt Mask */ -#define TWI_IMR_EOSACC (0x1u << 11) /**< \brief (TWI_IMR) End Of Slave Access Interrupt Mask */ -#define TWI_IMR_ENDRX (0x1u << 12) /**< \brief (TWI_IMR) End of Receive Buffer Interrupt Mask */ -#define TWI_IMR_ENDTX (0x1u << 13) /**< \brief (TWI_IMR) End of Transmit Buffer Interrupt Mask */ -#define TWI_IMR_RXBUFF (0x1u << 14) /**< \brief (TWI_IMR) Receive Buffer Full Interrupt Mask */ -#define TWI_IMR_TXBUFE (0x1u << 15) /**< \brief (TWI_IMR) Transmit Buffer Empty Interrupt Mask */ -/* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */ -#define TWI_RHR_RXDATA_Pos 0 -#define TWI_RHR_RXDATA_Msk (0xffu << TWI_RHR_RXDATA_Pos) /**< \brief (TWI_RHR) Master or Slave Receive Holding Data */ -/* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */ -#define TWI_THR_TXDATA_Pos 0 -#define TWI_THR_TXDATA_Msk (0xffu << TWI_THR_TXDATA_Pos) /**< \brief (TWI_THR) Master or Slave Transmit Holding Data */ -#define TWI_THR_TXDATA(value) ((TWI_THR_TXDATA_Msk & ((value) << TWI_THR_TXDATA_Pos))) -/* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */ -#define TWI_RPR_RXPTR_Pos 0 -#define TWI_RPR_RXPTR_Msk (0xffffffffu << TWI_RPR_RXPTR_Pos) /**< \brief (TWI_RPR) Receive Pointer Register */ -#define TWI_RPR_RXPTR(value) ((TWI_RPR_RXPTR_Msk & ((value) << TWI_RPR_RXPTR_Pos))) -/* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */ -#define TWI_RCR_RXCTR_Pos 0 -#define TWI_RCR_RXCTR_Msk (0xffffu << TWI_RCR_RXCTR_Pos) /**< \brief (TWI_RCR) Receive Counter Register */ -#define TWI_RCR_RXCTR(value) ((TWI_RCR_RXCTR_Msk & ((value) << TWI_RCR_RXCTR_Pos))) -/* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */ -#define TWI_TPR_TXPTR_Pos 0 -#define TWI_TPR_TXPTR_Msk (0xffffffffu << TWI_TPR_TXPTR_Pos) /**< \brief (TWI_TPR) Transmit Counter Register */ -#define TWI_TPR_TXPTR(value) ((TWI_TPR_TXPTR_Msk & ((value) << TWI_TPR_TXPTR_Pos))) -/* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */ -#define TWI_TCR_TXCTR_Pos 0 -#define TWI_TCR_TXCTR_Msk (0xffffu << TWI_TCR_TXCTR_Pos) /**< \brief (TWI_TCR) Transmit Counter Register */ -#define TWI_TCR_TXCTR(value) ((TWI_TCR_TXCTR_Msk & ((value) << TWI_TCR_TXCTR_Pos))) -/* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */ -#define TWI_RNPR_RXNPTR_Pos 0 -#define TWI_RNPR_RXNPTR_Msk (0xffffffffu << TWI_RNPR_RXNPTR_Pos) /**< \brief (TWI_RNPR) Receive Next Pointer */ -#define TWI_RNPR_RXNPTR(value) ((TWI_RNPR_RXNPTR_Msk & ((value) << TWI_RNPR_RXNPTR_Pos))) -/* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */ -#define TWI_RNCR_RXNCTR_Pos 0 -#define TWI_RNCR_RXNCTR_Msk (0xffffu << TWI_RNCR_RXNCTR_Pos) /**< \brief (TWI_RNCR) Receive Next Counter */ -#define TWI_RNCR_RXNCTR(value) ((TWI_RNCR_RXNCTR_Msk & ((value) << TWI_RNCR_RXNCTR_Pos))) -/* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */ -#define TWI_TNPR_TXNPTR_Pos 0 -#define TWI_TNPR_TXNPTR_Msk (0xffffffffu << TWI_TNPR_TXNPTR_Pos) /**< \brief (TWI_TNPR) Transmit Next Pointer */ -#define TWI_TNPR_TXNPTR(value) ((TWI_TNPR_TXNPTR_Msk & ((value) << TWI_TNPR_TXNPTR_Pos))) -/* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */ -#define TWI_TNCR_TXNCTR_Pos 0 -#define TWI_TNCR_TXNCTR_Msk (0xffffu << TWI_TNCR_TXNCTR_Pos) /**< \brief (TWI_TNCR) Transmit Counter Next */ -#define TWI_TNCR_TXNCTR(value) ((TWI_TNCR_TXNCTR_Msk & ((value) << TWI_TNCR_TXNCTR_Pos))) -/* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */ -#define TWI_PTCR_RXTEN (0x1u << 0) /**< \brief (TWI_PTCR) Receiver Transfer Enable */ -#define TWI_PTCR_RXTDIS (0x1u << 1) /**< \brief (TWI_PTCR) Receiver Transfer Disable */ -#define TWI_PTCR_TXTEN (0x1u << 8) /**< \brief (TWI_PTCR) Transmitter Transfer Enable */ -#define TWI_PTCR_TXTDIS (0x1u << 9) /**< \brief (TWI_PTCR) Transmitter Transfer Disable */ -/* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */ -#define TWI_PTSR_RXTEN (0x1u << 0) /**< \brief (TWI_PTSR) Receiver Transfer Enable */ -#define TWI_PTSR_TXTEN (0x1u << 8) /**< \brief (TWI_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup SAM3S_UART Universal Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Uart hardware registers */ -typedef struct { - WoReg UART_CR; /**< \brief (Uart Offset: 0x0000) Control Register */ - RwReg UART_MR; /**< \brief (Uart Offset: 0x0004) Mode Register */ - WoReg UART_IER; /**< \brief (Uart Offset: 0x0008) Interrupt Enable Register */ - WoReg UART_IDR; /**< \brief (Uart Offset: 0x000C) Interrupt Disable Register */ - RoReg UART_IMR; /**< \brief (Uart Offset: 0x0010) Interrupt Mask Register */ - RoReg UART_SR; /**< \brief (Uart Offset: 0x0014) Status Register */ - RoReg UART_RHR; /**< \brief (Uart Offset: 0x0018) Receive Holding Register */ - WoReg UART_THR; /**< \brief (Uart Offset: 0x001C) Transmit Holding Register */ - RwReg UART_BRGR; /**< \brief (Uart Offset: 0x0020) Baud Rate Generator Register */ - RwReg Reserved1[55]; - RwReg UART_RPR; /**< \brief (Uart Offset: 0x100) Receive Pointer Register */ - RwReg UART_RCR; /**< \brief (Uart Offset: 0x104) Receive Counter Register */ - RwReg UART_TPR; /**< \brief (Uart Offset: 0x108) Transmit Pointer Register */ - RwReg UART_TCR; /**< \brief (Uart Offset: 0x10C) Transmit Counter Register */ - RwReg UART_RNPR; /**< \brief (Uart Offset: 0x110) Receive Next Pointer Register */ - RwReg UART_RNCR; /**< \brief (Uart Offset: 0x114) Receive Next Counter Register */ - RwReg UART_TNPR; /**< \brief (Uart Offset: 0x118) Transmit Next Pointer Register */ - RwReg UART_TNCR; /**< \brief (Uart Offset: 0x11C) Transmit Next Counter Register */ - WoReg UART_PTCR; /**< \brief (Uart Offset: 0x120) Transfer Control Register */ - RoReg UART_PTSR; /**< \brief (Uart Offset: 0x124) Transfer Status Register */ -} Uart; -#endif /* __ASSEMBLY__ */ -/* -------- UART_CR : (UART Offset: 0x0000) Control Register -------- */ -#define UART_CR_RSTRX (0x1u << 2) /**< \brief (UART_CR) Reset Receiver */ -#define UART_CR_RSTTX (0x1u << 3) /**< \brief (UART_CR) Reset Transmitter */ -#define UART_CR_RXEN (0x1u << 4) /**< \brief (UART_CR) Receiver Enable */ -#define UART_CR_RXDIS (0x1u << 5) /**< \brief (UART_CR) Receiver Disable */ -#define UART_CR_TXEN (0x1u << 6) /**< \brief (UART_CR) Transmitter Enable */ -#define UART_CR_TXDIS (0x1u << 7) /**< \brief (UART_CR) Transmitter Disable */ -#define UART_CR_RSTSTA (0x1u << 8) /**< \brief (UART_CR) Reset Status Bits */ -/* -------- UART_MR : (UART Offset: 0x0004) Mode Register -------- */ -#define UART_MR_PAR_Pos 9 -#define UART_MR_PAR_Msk (0x7u << UART_MR_PAR_Pos) /**< \brief (UART_MR) Parity Type */ -#define UART_MR_PAR_EVEN (0x0u << 9) /**< \brief (UART_MR) Even parity */ -#define UART_MR_PAR_ODD (0x1u << 9) /**< \brief (UART_MR) Odd parity */ -#define UART_MR_PAR_SPACE (0x2u << 9) /**< \brief (UART_MR) Space: parity forced to 0 */ -#define UART_MR_PAR_MARK (0x3u << 9) /**< \brief (UART_MR) Mark: parity forced to 1 */ -#define UART_MR_PAR_NO (0x4u << 9) /**< \brief (UART_MR) No parity */ -#define UART_MR_CHMODE_Pos 14 -#define UART_MR_CHMODE_Msk (0x3u << UART_MR_CHMODE_Pos) /**< \brief (UART_MR) Channel Mode */ -#define UART_MR_CHMODE_NORMAL (0x0u << 14) /**< \brief (UART_MR) Normal Mode */ -#define UART_MR_CHMODE_AUTOMATIC (0x1u << 14) /**< \brief (UART_MR) Automatic Echo */ -#define UART_MR_CHMODE_LOCAL_LOOPBACK (0x2u << 14) /**< \brief (UART_MR) Local Loopback */ -#define UART_MR_CHMODE_REMOTE_LOOPBACK (0x3u << 14) /**< \brief (UART_MR) Remote Loopback */ -/* -------- UART_IER : (UART Offset: 0x0008) Interrupt Enable Register -------- */ -#define UART_IER_RXRDY (0x1u << 0) /**< \brief (UART_IER) Enable RXRDY Interrupt */ -#define UART_IER_TXRDY (0x1u << 1) /**< \brief (UART_IER) Enable TXRDY Interrupt */ -#define UART_IER_ENDRX (0x1u << 3) /**< \brief (UART_IER) Enable End of Receive Transfer Interrupt */ -#define UART_IER_ENDTX (0x1u << 4) /**< \brief (UART_IER) Enable End of Transmit Interrupt */ -#define UART_IER_OVRE (0x1u << 5) /**< \brief (UART_IER) Enable Overrun Error Interrupt */ -#define UART_IER_FRAME (0x1u << 6) /**< \brief (UART_IER) Enable Framing Error Interrupt */ -#define UART_IER_PARE (0x1u << 7) /**< \brief (UART_IER) Enable Parity Error Interrupt */ -#define UART_IER_TXEMPTY (0x1u << 9) /**< \brief (UART_IER) Enable TXEMPTY Interrupt */ -#define UART_IER_TXBUFE (0x1u << 11) /**< \brief (UART_IER) Enable Buffer Empty Interrupt */ -#define UART_IER_RXBUFF (0x1u << 12) /**< \brief (UART_IER) Enable Buffer Full Interrupt */ -/* -------- UART_IDR : (UART Offset: 0x000C) Interrupt Disable Register -------- */ -#define UART_IDR_RXRDY (0x1u << 0) /**< \brief (UART_IDR) Disable RXRDY Interrupt */ -#define UART_IDR_TXRDY (0x1u << 1) /**< \brief (UART_IDR) Disable TXRDY Interrupt */ -#define UART_IDR_ENDRX (0x1u << 3) /**< \brief (UART_IDR) Disable End of Receive Transfer Interrupt */ -#define UART_IDR_ENDTX (0x1u << 4) /**< \brief (UART_IDR) Disable End of Transmit Interrupt */ -#define UART_IDR_OVRE (0x1u << 5) /**< \brief (UART_IDR) Disable Overrun Error Interrupt */ -#define UART_IDR_FRAME (0x1u << 6) /**< \brief (UART_IDR) Disable Framing Error Interrupt */ -#define UART_IDR_PARE (0x1u << 7) /**< \brief (UART_IDR) Disable Parity Error Interrupt */ -#define UART_IDR_TXEMPTY (0x1u << 9) /**< \brief (UART_IDR) Disable TXEMPTY Interrupt */ -#define UART_IDR_TXBUFE (0x1u << 11) /**< \brief (UART_IDR) Disable Buffer Empty Interrupt */ -#define UART_IDR_RXBUFF (0x1u << 12) /**< \brief (UART_IDR) Disable Buffer Full Interrupt */ -/* -------- UART_IMR : (UART Offset: 0x0010) Interrupt Mask Register -------- */ -#define UART_IMR_RXRDY (0x1u << 0) /**< \brief (UART_IMR) Mask RXRDY Interrupt */ -#define UART_IMR_TXRDY (0x1u << 1) /**< \brief (UART_IMR) Disable TXRDY Interrupt */ -#define UART_IMR_ENDRX (0x1u << 3) /**< \brief (UART_IMR) Mask End of Receive Transfer Interrupt */ -#define UART_IMR_ENDTX (0x1u << 4) /**< \brief (UART_IMR) Mask End of Transmit Interrupt */ -#define UART_IMR_OVRE (0x1u << 5) /**< \brief (UART_IMR) Mask Overrun Error Interrupt */ -#define UART_IMR_FRAME (0x1u << 6) /**< \brief (UART_IMR) Mask Framing Error Interrupt */ -#define UART_IMR_PARE (0x1u << 7) /**< \brief (UART_IMR) Mask Parity Error Interrupt */ -#define UART_IMR_TXEMPTY (0x1u << 9) /**< \brief (UART_IMR) Mask TXEMPTY Interrupt */ -#define UART_IMR_TXBUFE (0x1u << 11) /**< \brief (UART_IMR) Mask TXBUFE Interrupt */ -#define UART_IMR_RXBUFF (0x1u << 12) /**< \brief (UART_IMR) Mask RXBUFF Interrupt */ -/* -------- UART_SR : (UART Offset: 0x0014) Status Register -------- */ -#define UART_SR_RXRDY (0x1u << 0) /**< \brief (UART_SR) Receiver Ready */ -#define UART_SR_TXRDY (0x1u << 1) /**< \brief (UART_SR) Transmitter Ready */ -#define UART_SR_ENDRX (0x1u << 3) /**< \brief (UART_SR) End of Receiver Transfer */ -#define UART_SR_ENDTX (0x1u << 4) /**< \brief (UART_SR) End of Transmitter Transfer */ -#define UART_SR_OVRE (0x1u << 5) /**< \brief (UART_SR) Overrun Error */ -#define UART_SR_FRAME (0x1u << 6) /**< \brief (UART_SR) Framing Error */ -#define UART_SR_PARE (0x1u << 7) /**< \brief (UART_SR) Parity Error */ -#define UART_SR_TXEMPTY (0x1u << 9) /**< \brief (UART_SR) Transmitter Empty */ -#define UART_SR_TXBUFE (0x1u << 11) /**< \brief (UART_SR) Transmission Buffer Empty */ -#define UART_SR_RXBUFF (0x1u << 12) /**< \brief (UART_SR) Receive Buffer Full */ -/* -------- UART_RHR : (UART Offset: 0x0018) Receive Holding Register -------- */ -#define UART_RHR_RXCHR_Pos 0 -#define UART_RHR_RXCHR_Msk (0xffu << UART_RHR_RXCHR_Pos) /**< \brief (UART_RHR) Received Character */ -/* -------- UART_THR : (UART Offset: 0x001C) Transmit Holding Register -------- */ -#define UART_THR_TXCHR_Pos 0 -#define UART_THR_TXCHR_Msk (0xffu << UART_THR_TXCHR_Pos) /**< \brief (UART_THR) Character to be Transmitted */ -#define UART_THR_TXCHR(value) ((UART_THR_TXCHR_Msk & ((value) << UART_THR_TXCHR_Pos))) -/* -------- UART_BRGR : (UART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define UART_BRGR_CD_Pos 0 -#define UART_BRGR_CD_Msk (0xffffu << UART_BRGR_CD_Pos) /**< \brief (UART_BRGR) Clock Divisor */ -#define UART_BRGR_CD(value) ((UART_BRGR_CD_Msk & ((value) << UART_BRGR_CD_Pos))) -/* -------- UART_RPR : (UART Offset: 0x100) Receive Pointer Register -------- */ -#define UART_RPR_RXPTR_Pos 0 -#define UART_RPR_RXPTR_Msk (0xffffffffu << UART_RPR_RXPTR_Pos) /**< \brief (UART_RPR) Receive Pointer Register */ -#define UART_RPR_RXPTR(value) ((UART_RPR_RXPTR_Msk & ((value) << UART_RPR_RXPTR_Pos))) -/* -------- UART_RCR : (UART Offset: 0x104) Receive Counter Register -------- */ -#define UART_RCR_RXCTR_Pos 0 -#define UART_RCR_RXCTR_Msk (0xffffu << UART_RCR_RXCTR_Pos) /**< \brief (UART_RCR) Receive Counter Register */ -#define UART_RCR_RXCTR(value) ((UART_RCR_RXCTR_Msk & ((value) << UART_RCR_RXCTR_Pos))) -/* -------- UART_TPR : (UART Offset: 0x108) Transmit Pointer Register -------- */ -#define UART_TPR_TXPTR_Pos 0 -#define UART_TPR_TXPTR_Msk (0xffffffffu << UART_TPR_TXPTR_Pos) /**< \brief (UART_TPR) Transmit Counter Register */ -#define UART_TPR_TXPTR(value) ((UART_TPR_TXPTR_Msk & ((value) << UART_TPR_TXPTR_Pos))) -/* -------- UART_TCR : (UART Offset: 0x10C) Transmit Counter Register -------- */ -#define UART_TCR_TXCTR_Pos 0 -#define UART_TCR_TXCTR_Msk (0xffffu << UART_TCR_TXCTR_Pos) /**< \brief (UART_TCR) Transmit Counter Register */ -#define UART_TCR_TXCTR(value) ((UART_TCR_TXCTR_Msk & ((value) << UART_TCR_TXCTR_Pos))) -/* -------- UART_RNPR : (UART Offset: 0x110) Receive Next Pointer Register -------- */ -#define UART_RNPR_RXNPTR_Pos 0 -#define UART_RNPR_RXNPTR_Msk (0xffffffffu << UART_RNPR_RXNPTR_Pos) /**< \brief (UART_RNPR) Receive Next Pointer */ -#define UART_RNPR_RXNPTR(value) ((UART_RNPR_RXNPTR_Msk & ((value) << UART_RNPR_RXNPTR_Pos))) -/* -------- UART_RNCR : (UART Offset: 0x114) Receive Next Counter Register -------- */ -#define UART_RNCR_RXNCTR_Pos 0 -#define UART_RNCR_RXNCTR_Msk (0xffffu << UART_RNCR_RXNCTR_Pos) /**< \brief (UART_RNCR) Receive Next Counter */ -#define UART_RNCR_RXNCTR(value) ((UART_RNCR_RXNCTR_Msk & ((value) << UART_RNCR_RXNCTR_Pos))) -/* -------- UART_TNPR : (UART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define UART_TNPR_TXNPTR_Pos 0 -#define UART_TNPR_TXNPTR_Msk (0xffffffffu << UART_TNPR_TXNPTR_Pos) /**< \brief (UART_TNPR) Transmit Next Pointer */ -#define UART_TNPR_TXNPTR(value) ((UART_TNPR_TXNPTR_Msk & ((value) << UART_TNPR_TXNPTR_Pos))) -/* -------- UART_TNCR : (UART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define UART_TNCR_TXNCTR_Pos 0 -#define UART_TNCR_TXNCTR_Msk (0xffffu << UART_TNCR_TXNCTR_Pos) /**< \brief (UART_TNCR) Transmit Counter Next */ -#define UART_TNCR_TXNCTR(value) ((UART_TNCR_TXNCTR_Msk & ((value) << UART_TNCR_TXNCTR_Pos))) -/* -------- UART_PTCR : (UART Offset: 0x120) Transfer Control Register -------- */ -#define UART_PTCR_RXTEN (0x1u << 0) /**< \brief (UART_PTCR) Receiver Transfer Enable */ -#define UART_PTCR_RXTDIS (0x1u << 1) /**< \brief (UART_PTCR) Receiver Transfer Disable */ -#define UART_PTCR_TXTEN (0x1u << 8) /**< \brief (UART_PTCR) Transmitter Transfer Enable */ -#define UART_PTCR_TXTDIS (0x1u << 9) /**< \brief (UART_PTCR) Transmitter Transfer Disable */ -/* -------- UART_PTSR : (UART Offset: 0x124) Transfer Status Register -------- */ -#define UART_PTSR_RXTEN (0x1u << 0) /**< \brief (UART_PTSR) Receiver Transfer Enable */ -#define UART_PTSR_TXTEN (0x1u << 8) /**< \brief (UART_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR USB Device Port */ -/* ============================================================================= */ -/** \addtogroup SAM3S_UDP USB Device Port */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Udp hardware registers */ -typedef struct { - RoReg UDP_FRM_NUM; /**< \brief (Udp Offset: 0x000) Frame Number Register */ - RwReg UDP_GLB_STAT; /**< \brief (Udp Offset: 0x004) Global State Register */ - RwReg UDP_FADDR; /**< \brief (Udp Offset: 0x008) Function Address Register */ - RwReg Reserved1[1]; - WoReg UDP_IER; /**< \brief (Udp Offset: 0x010) Interrupt Enable Register */ - WoReg UDP_IDR; /**< \brief (Udp Offset: 0x014) Interrupt Disable Register */ - RoReg UDP_IMR; /**< \brief (Udp Offset: 0x018) Interrupt Mask Register */ - RoReg UDP_ISR; /**< \brief (Udp Offset: 0x01C) Interrupt Status Register */ - WoReg UDP_ICR; /**< \brief (Udp Offset: 0x020) Interrupt Clear Register */ - RwReg Reserved2[1]; - RwReg UDP_RST_EP; /**< \brief (Udp Offset: 0x028) Reset Endpoint Register */ - RwReg Reserved3[1]; - RwReg UDP_CSR[8]; /**< \brief (Udp Offset: 0x030) Endpoint Control and Status Register */ - RwReg UDP_FDR[8]; /**< \brief (Udp Offset: 0x050) Endpoint FIFO Data Register */ - RwReg Reserved4[1]; - RwReg UDP_TXVC; /**< \brief (Udp Offset: 0x074) Transceiver Control Register */ -} Udp; -#endif /* __ASSEMBLY__ */ -/* -------- UDP_FRM_NUM : (UDP Offset: 0x000) Frame Number Register -------- */ -#define UDP_FRM_NUM_FRM_NUM_Pos 0 -#define UDP_FRM_NUM_FRM_NUM_Msk (0x7ffu << UDP_FRM_NUM_FRM_NUM_Pos) /**< \brief (UDP_FRM_NUM) Frame Number as Defined in the Packet Field Formats */ -#define UDP_FRM_NUM_FRM_ERR (0x1u << 16) /**< \brief (UDP_FRM_NUM) Frame Error */ -#define UDP_FRM_NUM_FRM_OK (0x1u << 17) /**< \brief (UDP_FRM_NUM) Frame OK */ -/* -------- UDP_GLB_STAT : (UDP Offset: 0x004) Global State Register -------- */ -#define UDP_GLB_STAT_FADDEN (0x1u << 0) /**< \brief (UDP_GLB_STAT) Function Address Enable */ -#define UDP_GLB_STAT_CONFG (0x1u << 1) /**< \brief (UDP_GLB_STAT) Configured */ -#define UDP_GLB_STAT_ESR (0x1u << 2) /**< \brief (UDP_GLB_STAT) Enable Send Resume */ -#define UDP_GLB_STAT_RSMINPR (0x1u << 3) /**< \brief (UDP_GLB_STAT) */ -#define UDP_GLB_STAT_RMWUPE (0x1u << 4) /**< \brief (UDP_GLB_STAT) Remote Wake Up Enable */ -/* -------- UDP_FADDR : (UDP Offset: 0x008) Function Address Register -------- */ -#define UDP_FADDR_FADD_Pos 0 -#define UDP_FADDR_FADD_Msk (0x7fu << UDP_FADDR_FADD_Pos) /**< \brief (UDP_FADDR) Function Address Value */ -#define UDP_FADDR_FADD(value) ((UDP_FADDR_FADD_Msk & ((value) << UDP_FADDR_FADD_Pos))) -#define UDP_FADDR_FEN (0x1u << 8) /**< \brief (UDP_FADDR) Function Enable */ -/* -------- UDP_IER : (UDP Offset: 0x010) Interrupt Enable Register -------- */ -#define UDP_IER_EP0INT (0x1u << 0) /**< \brief (UDP_IER) Enable Endpoint 0 Interrupt */ -#define UDP_IER_EP1INT (0x1u << 1) /**< \brief (UDP_IER) Enable Endpoint 1 Interrupt */ -#define UDP_IER_EP2INT (0x1u << 2) /**< \brief (UDP_IER) Enable Endpoint 2Interrupt */ -#define UDP_IER_EP3INT (0x1u << 3) /**< \brief (UDP_IER) Enable Endpoint 3 Interrupt */ -#define UDP_IER_EP4INT (0x1u << 4) /**< \brief (UDP_IER) Enable Endpoint 4 Interrupt */ -#define UDP_IER_EP5INT (0x1u << 5) /**< \brief (UDP_IER) Enable Endpoint 5 Interrupt */ -#define UDP_IER_EP6INT (0x1u << 6) /**< \brief (UDP_IER) Enable Endpoint 6 Interrupt */ -#define UDP_IER_EP7INT (0x1u << 7) /**< \brief (UDP_IER) Enable Endpoint 7 Interrupt */ -#define UDP_IER_RXSUSP (0x1u << 8) /**< \brief (UDP_IER) Enable UDP Suspend Interrupt */ -#define UDP_IER_RXRSM (0x1u << 9) /**< \brief (UDP_IER) Enable UDP Resume Interrupt */ -#define UDP_IER_EXTRSM (0x1u << 10) /**< \brief (UDP_IER) */ -#define UDP_IER_SOFINT (0x1u << 11) /**< \brief (UDP_IER) Enable Start Of Frame Interrupt */ -#define UDP_IER_WAKEUP (0x1u << 13) /**< \brief (UDP_IER) Enable UDP bus Wakeup Interrupt */ -/* -------- UDP_IDR : (UDP Offset: 0x014) Interrupt Disable Register -------- */ -#define UDP_IDR_EP0INT (0x1u << 0) /**< \brief (UDP_IDR) Disable Endpoint 0 Interrupt */ -#define UDP_IDR_EP1INT (0x1u << 1) /**< \brief (UDP_IDR) Disable Endpoint 1 Interrupt */ -#define UDP_IDR_EP2INT (0x1u << 2) /**< \brief (UDP_IDR) Disable Endpoint 2 Interrupt */ -#define UDP_IDR_EP3INT (0x1u << 3) /**< \brief (UDP_IDR) Disable Endpoint 3 Interrupt */ -#define UDP_IDR_EP4INT (0x1u << 4) /**< \brief (UDP_IDR) Disable Endpoint 4 Interrupt */ -#define UDP_IDR_EP5INT (0x1u << 5) /**< \brief (UDP_IDR) Disable Endpoint 5 Interrupt */ -#define UDP_IDR_EP6INT (0x1u << 6) /**< \brief (UDP_IDR) Disable Endpoint 6 Interrupt */ -#define UDP_IDR_EP7INT (0x1u << 7) /**< \brief (UDP_IDR) Disable Endpoint 7 Interrupt */ -#define UDP_IDR_RXSUSP (0x1u << 8) /**< \brief (UDP_IDR) Disable UDP Suspend Interrupt */ -#define UDP_IDR_RXRSM (0x1u << 9) /**< \brief (UDP_IDR) Disable UDP Resume Interrupt */ -#define UDP_IDR_EXTRSM (0x1u << 10) /**< \brief (UDP_IDR) */ -#define UDP_IDR_SOFINT (0x1u << 11) /**< \brief (UDP_IDR) Disable Start Of Frame Interrupt */ -#define UDP_IDR_WAKEUP (0x1u << 13) /**< \brief (UDP_IDR) Disable USB Bus Interrupt */ -/* -------- UDP_IMR : (UDP Offset: 0x018) Interrupt Mask Register -------- */ -#define UDP_IMR_EP0INT (0x1u << 0) /**< \brief (UDP_IMR) Mask Endpoint 0 Interrupt */ -#define UDP_IMR_EP1INT (0x1u << 1) /**< \brief (UDP_IMR) Mask Endpoint 1 Interrupt */ -#define UDP_IMR_EP2INT (0x1u << 2) /**< \brief (UDP_IMR) Mask Endpoint 2 Interrupt */ -#define UDP_IMR_EP3INT (0x1u << 3) /**< \brief (UDP_IMR) Mask Endpoint 3 Interrupt */ -#define UDP_IMR_EP4INT (0x1u << 4) /**< \brief (UDP_IMR) Mask Endpoint 4 Interrupt */ -#define UDP_IMR_EP5INT (0x1u << 5) /**< \brief (UDP_IMR) Mask Endpoint 5 Interrupt */ -#define UDP_IMR_EP6INT (0x1u << 6) /**< \brief (UDP_IMR) Mask Endpoint 6 Interrupt */ -#define UDP_IMR_EP7INT (0x1u << 7) /**< \brief (UDP_IMR) Mask Endpoint 7 Interrupt */ -#define UDP_IMR_RXSUSP (0x1u << 8) /**< \brief (UDP_IMR) Mask UDP Suspend Interrupt */ -#define UDP_IMR_RXRSM (0x1u << 9) /**< \brief (UDP_IMR) Mask UDP Resume Interrupt. */ -#define UDP_IMR_EXTRSM (0x1u << 10) /**< \brief (UDP_IMR) */ -#define UDP_IMR_SOFINT (0x1u << 11) /**< \brief (UDP_IMR) Mask Start Of Frame Interrupt */ -#define UDP_IMR_BIT12 (0x1u << 12) /**< \brief (UDP_IMR) UDP_IMR Bit 12 */ -#define UDP_IMR_WAKEUP (0x1u << 13) /**< \brief (UDP_IMR) USB Bus WAKEUP Interrupt */ -/* -------- UDP_ISR : (UDP Offset: 0x01C) Interrupt Status Register -------- */ -#define UDP_ISR_EP0INT (0x1u << 0) /**< \brief (UDP_ISR) Endpoint 0 Interrupt Status */ -#define UDP_ISR_EP1INT (0x1u << 1) /**< \brief (UDP_ISR) Endpoint 1 Interrupt Status */ -#define UDP_ISR_EP2INT (0x1u << 2) /**< \brief (UDP_ISR) Endpoint 2 Interrupt Status */ -#define UDP_ISR_EP3INT (0x1u << 3) /**< \brief (UDP_ISR) Endpoint 3 Interrupt Status */ -#define UDP_ISR_EP4INT (0x1u << 4) /**< \brief (UDP_ISR) Endpoint 4 Interrupt Status */ -#define UDP_ISR_EP5INT (0x1u << 5) /**< \brief (UDP_ISR) Endpoint 5 Interrupt Status */ -#define UDP_ISR_EP6INT (0x1u << 6) /**< \brief (UDP_ISR) Endpoint 6 Interrupt Status */ -#define UDP_ISR_EP7INT (0x1u << 7) /**< \brief (UDP_ISR) Endpoint 7Interrupt Status */ -#define UDP_ISR_RXSUSP (0x1u << 8) /**< \brief (UDP_ISR) UDP Suspend Interrupt Status */ -#define UDP_ISR_RXRSM (0x1u << 9) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ -#define UDP_ISR_EXTRSM (0x1u << 10) /**< \brief (UDP_ISR) */ -#define UDP_ISR_SOFINT (0x1u << 11) /**< \brief (UDP_ISR) Start of Frame Interrupt Status */ -#define UDP_ISR_ENDBUSRES (0x1u << 12) /**< \brief (UDP_ISR) End of BUS Reset Interrupt Status */ -#define UDP_ISR_WAKEUP (0x1u << 13) /**< \brief (UDP_ISR) UDP Resume Interrupt Status */ -/* -------- UDP_ICR : (UDP Offset: 0x020) Interrupt Clear Register -------- */ -#define UDP_ICR_RXSUSP (0x1u << 8) /**< \brief (UDP_ICR) Clear UDP Suspend Interrupt */ -#define UDP_ICR_RXRSM (0x1u << 9) /**< \brief (UDP_ICR) Clear UDP Resume Interrupt */ -#define UDP_ICR_EXTRSM (0x1u << 10) /**< \brief (UDP_ICR) */ -#define UDP_ICR_SOFINT (0x1u << 11) /**< \brief (UDP_ICR) Clear Start Of Frame Interrupt */ -#define UDP_ICR_ENDBUSRES (0x1u << 12) /**< \brief (UDP_ICR) Clear End of Bus Reset Interrupt */ -#define UDP_ICR_WAKEUP (0x1u << 13) /**< \brief (UDP_ICR) Clear Wakeup Interrupt */ -/* -------- UDP_RST_EP : (UDP Offset: 0x028) Reset Endpoint Register -------- */ -#define UDP_RST_EP_EP0 (0x1u << 0) /**< \brief (UDP_RST_EP) Reset Endpoint 0 */ -#define UDP_RST_EP_EP1 (0x1u << 1) /**< \brief (UDP_RST_EP) Reset Endpoint 1 */ -#define UDP_RST_EP_EP2 (0x1u << 2) /**< \brief (UDP_RST_EP) Reset Endpoint 2 */ -#define UDP_RST_EP_EP3 (0x1u << 3) /**< \brief (UDP_RST_EP) Reset Endpoint 3 */ -#define UDP_RST_EP_EP4 (0x1u << 4) /**< \brief (UDP_RST_EP) Reset Endpoint 4 */ -#define UDP_RST_EP_EP5 (0x1u << 5) /**< \brief (UDP_RST_EP) Reset Endpoint 5 */ -#define UDP_RST_EP_EP6 (0x1u << 6) /**< \brief (UDP_RST_EP) Reset Endpoint 6 */ -#define UDP_RST_EP_EP7 (0x1u << 7) /**< \brief (UDP_RST_EP) Reset Endpoint 7 */ -/* -------- UDP_CSR[8] : (UDP Offset: 0x030) Endpoint Control and Status Register -------- */ -#define UDP_CSR_TXCOMP (0x1u << 0) /**< \brief (UDP_CSR[8]) Generates an IN Packet with Data Previously Written in the DPR */ -#define UDP_CSR_RX_DATA_BK0 (0x1u << 1) /**< \brief (UDP_CSR[8]) Receive Data Bank 0 */ -#define UDP_CSR_RXSETUP (0x1u << 2) /**< \brief (UDP_CSR[8]) Received Setup */ -#define UDP_CSR_STALLSENTISOERROR (0x1u << 3) /**< \brief (UDP_CSR[8]) */ -#define UDP_CSR_TXPKTRDY (0x1u << 4) /**< \brief (UDP_CSR[8]) Transmit Packet Ready */ -#define UDP_CSR_FORCESTALL (0x1u << 5) /**< \brief (UDP_CSR[8]) Force Stall (used by Control, Bulk and Isochronous Endpoints) */ -#define UDP_CSR_RX_DATA_BK1 (0x1u << 6) /**< \brief (UDP_CSR[8]) Receive Data Bank 1 (only used by endpoints with ping-pong attributes) */ -#define UDP_CSR_DIR (0x1u << 7) /**< \brief (UDP_CSR[8]) Transfer Direction (only available for control endpoints) */ -#define UDP_CSR_EPTYPE_Pos 8 -#define UDP_CSR_EPTYPE_Msk (0x7u << UDP_CSR_EPTYPE_Pos) /**< \brief (UDP_CSR[8]) Endpoint Type */ -#define UDP_CSR_EPTYPE_CTRL (0x0u << 8) /**< \brief (UDP_CSR[8]) Control */ -#define UDP_CSR_EPTYPE_ISO_OUT (0x1u << 8) /**< \brief (UDP_CSR[8]) Isochronous OUT */ -#define UDP_CSR_EPTYPE_BULK_OUT (0x2u << 8) /**< \brief (UDP_CSR[8]) Bulk OUT */ -#define UDP_CSR_EPTYPE_INT_OUT (0x3u << 8) /**< \brief (UDP_CSR[8]) Interrupt OUT */ -#define UDP_CSR_EPTYPE_ISO_IN (0x5u << 8) /**< \brief (UDP_CSR[8]) Isochronous IN */ -#define UDP_CSR_EPTYPE_BULK_IN (0x6u << 8) /**< \brief (UDP_CSR[8]) Bulk IN */ -#define UDP_CSR_EPTYPE_INT_IN (0x7u << 8) /**< \brief (UDP_CSR[8]) Interrupt IN */ -#define UDP_CSR_DTGLE (0x1u << 11) /**< \brief (UDP_CSR[8]) Data Toggle */ -#define UDP_CSR_EPEDS (0x1u << 15) /**< \brief (UDP_CSR[8]) Endpoint Enable Disable */ -#define UDP_CSR_RXBYTECNT_Pos 16 -#define UDP_CSR_RXBYTECNT_Msk (0x7ffu << UDP_CSR_RXBYTECNT_Pos) /**< \brief (UDP_CSR[8]) Number of Bytes Available in the FIFO */ -#define UDP_CSR_RXBYTECNT(value) ((UDP_CSR_RXBYTECNT_Msk & ((value) << UDP_CSR_RXBYTECNT_Pos))) -/* -------- UDP_FDR[8] : (UDP Offset: 0x050) Endpoint FIFO Data Register -------- */ -#define UDP_FDR_FIFO_DATA_Pos 0 -#define UDP_FDR_FIFO_DATA_Msk (0xffu << UDP_FDR_FIFO_DATA_Pos) /**< \brief (UDP_FDR[8]) FIFO Data Value */ -#define UDP_FDR_FIFO_DATA(value) ((UDP_FDR_FIFO_DATA_Msk & ((value) << UDP_FDR_FIFO_DATA_Pos))) -/* -------- UDP_TXVC : (UDP Offset: 0x074) Transceiver Control Register -------- */ -#define UDP_TXVC_TXVDIS (0x1u << 8) /**< \brief (UDP_TXVC) Transceiver Disable */ -#define UDP_TXVC_PUON (0x1u << 9) /**< \brief (UDP_TXVC) Pullup On */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Universal Synchronous Asynchronous Receiver Transmitter */ -/* ============================================================================= */ -/** \addtogroup SAM3S_USART Universal Synchronous Asynchronous Receiver Transmitter */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Usart hardware registers */ -typedef struct { - WoReg US_CR; /**< \brief (Usart Offset: 0x0000) Control Register */ - RwReg US_MR; /**< \brief (Usart Offset: 0x0004) Mode Register */ - WoReg US_IER; /**< \brief (Usart Offset: 0x0008) Interrupt Enable Register */ - WoReg US_IDR; /**< \brief (Usart Offset: 0x000C) Interrupt Disable Register */ - RoReg US_IMR; /**< \brief (Usart Offset: 0x0010) Interrupt Mask Register */ - RoReg US_CSR; /**< \brief (Usart Offset: 0x0014) Channel Status Register */ - RoReg US_RHR; /**< \brief (Usart Offset: 0x0018) Receiver Holding Register */ - WoReg US_THR; /**< \brief (Usart Offset: 0x001C) Transmitter Holding Register */ - RwReg US_BRGR; /**< \brief (Usart Offset: 0x0020) Baud Rate Generator Register */ - RwReg US_RTOR; /**< \brief (Usart Offset: 0x0024) Receiver Time-out Register */ - RwReg US_TTGR; /**< \brief (Usart Offset: 0x0028) Transmitter Timeguard Register */ - RwReg Reserved1[5]; - RwReg US_FIDI; /**< \brief (Usart Offset: 0x0040) FI DI Ratio Register */ - RoReg US_NER; /**< \brief (Usart Offset: 0x0044) Number of Errors Register */ - RwReg Reserved2[1]; - RwReg US_IF; /**< \brief (Usart Offset: 0x004C) IrDA Filter Register */ - RwReg US_MAN; /**< \brief (Usart Offset: 0x0050) Manchester Encoder Decoder Register */ - RwReg Reserved3[36]; - RwReg US_WPMR; /**< \brief (Usart Offset: 0xE4) Write Protect Mode Register */ - RoReg US_WPSR; /**< \brief (Usart Offset: 0xE8) Write Protect Status Register */ - RwReg Reserved4[5]; - RwReg US_RPR; /**< \brief (Usart Offset: 0x100) Receive Pointer Register */ - RwReg US_RCR; /**< \brief (Usart Offset: 0x104) Receive Counter Register */ - RwReg US_TPR; /**< \brief (Usart Offset: 0x108) Transmit Pointer Register */ - RwReg US_TCR; /**< \brief (Usart Offset: 0x10C) Transmit Counter Register */ - RwReg US_RNPR; /**< \brief (Usart Offset: 0x110) Receive Next Pointer Register */ - RwReg US_RNCR; /**< \brief (Usart Offset: 0x114) Receive Next Counter Register */ - RwReg US_TNPR; /**< \brief (Usart Offset: 0x118) Transmit Next Pointer Register */ - RwReg US_TNCR; /**< \brief (Usart Offset: 0x11C) Transmit Next Counter Register */ - WoReg US_PTCR; /**< \brief (Usart Offset: 0x120) Transfer Control Register */ - RoReg US_PTSR; /**< \brief (Usart Offset: 0x124) Transfer Status Register */ -} Usart; -#endif /* __ASSEMBLY__ */ -/* -------- US_CR : (USART Offset: 0x0000) Control Register -------- */ -#define US_CR_RSTRX (0x1u << 2) /**< \brief (US_CR) Reset Receiver */ -#define US_CR_RSTTX (0x1u << 3) /**< \brief (US_CR) Reset Transmitter */ -#define US_CR_RXEN (0x1u << 4) /**< \brief (US_CR) Receiver Enable */ -#define US_CR_RXDIS (0x1u << 5) /**< \brief (US_CR) Receiver Disable */ -#define US_CR_TXEN (0x1u << 6) /**< \brief (US_CR) Transmitter Enable */ -#define US_CR_TXDIS (0x1u << 7) /**< \brief (US_CR) Transmitter Disable */ -#define US_CR_RSTSTA (0x1u << 8) /**< \brief (US_CR) Reset Status Bits */ -#define US_CR_STTBRK (0x1u << 9) /**< \brief (US_CR) Start Break */ -#define US_CR_STPBRK (0x1u << 10) /**< \brief (US_CR) Stop Break */ -#define US_CR_STTTO (0x1u << 11) /**< \brief (US_CR) Start Time-out */ -#define US_CR_SENDA (0x1u << 12) /**< \brief (US_CR) Send Address */ -#define US_CR_RSTIT (0x1u << 13) /**< \brief (US_CR) Reset Iterations */ -#define US_CR_RSTNACK (0x1u << 14) /**< \brief (US_CR) Reset Non Acknowledge */ -#define US_CR_RETTO (0x1u << 15) /**< \brief (US_CR) Rearm Time-out */ -#define US_CR_DTREN (0x1u << 16) /**< \brief (US_CR) Data Terminal Ready Enable */ -#define US_CR_DTRDIS (0x1u << 17) /**< \brief (US_CR) Data Terminal Ready Disable */ -#define US_CR_RTSEN (0x1u << 18) /**< \brief (US_CR) Request to Send Enable */ -#define US_CR_FCS (0x1u << 18) /**< \brief (US_CR) Force SPI Chip Select */ -#define US_CR_RTSDIS (0x1u << 19) /**< \brief (US_CR) Request to Send Disable */ -#define US_CR_RCS (0x1u << 19) /**< \brief (US_CR) Release SPI Chip Select */ -/* -------- US_MR : (USART Offset: 0x0004) Mode Register -------- */ -#define US_MR_USART_MODE_Pos 0 -#define US_MR_USART_MODE_Msk (0xfu << US_MR_USART_MODE_Pos) /**< \brief (US_MR) */ -#define US_MR_USART_MODE_NORMAL (0x0u << 0) /**< \brief (US_MR) Normal mode */ -#define US_MR_USART_MODE_RS485 (0x1u << 0) /**< \brief (US_MR) RS485 */ -#define US_MR_USART_MODE_HW_HANDSHAKING (0x2u << 0) /**< \brief (US_MR) Hardware Handshaking */ -#define US_MR_USART_MODE_MODEM (0x3u << 0) /**< \brief (US_MR) Modem */ -#define US_MR_USART_MODE_IS07816_T_0 (0x4u << 0) /**< \brief (US_MR) IS07816 Protocol: T = 0 */ -#define US_MR_USART_MODE_IS07816_T_1 (0x6u << 0) /**< \brief (US_MR) IS07816 Protocol: T = 1 */ -#define US_MR_USART_MODE_IRDA (0x8u << 0) /**< \brief (US_MR) IrDA */ -#define US_MR_USART_MODE_SPI_MASTER (0xEu << 0) /**< \brief (US_MR) SPI Master */ -#define US_MR_USART_MODE_SPI_SLAVE (0xFu << 0) /**< \brief (US_MR) SPI Slave */ -#define US_MR_USCLKS_Pos 4 -#define US_MR_USCLKS_Msk (0x3u << US_MR_USCLKS_Pos) /**< \brief (US_MR) Clock Selection */ -#define US_MR_USCLKS_MCK (0x0u << 4) /**< \brief (US_MR) Master Clock MCK is selected */ -#define US_MR_USCLKS_DIV (0x1u << 4) /**< \brief (US_MR) Internal Clock Divided MCK/DIV (DIV=8) is selected */ -#define US_MR_USCLKS_SCK (0x3u << 4) /**< \brief (US_MR) Serial Clock SLK is selected */ -#define US_MR_CHRL_Pos 6 -#define US_MR_CHRL_Msk (0x3u << US_MR_CHRL_Pos) /**< \brief (US_MR) Character Length. */ -#define US_MR_CHRL_5_BIT (0x0u << 6) /**< \brief (US_MR) Character length is 5 bits */ -#define US_MR_CHRL_6_BIT (0x1u << 6) /**< \brief (US_MR) Character length is 6 bits */ -#define US_MR_CHRL_7_BIT (0x2u << 6) /**< \brief (US_MR) Character length is 7 bits */ -#define US_MR_CHRL_8_BIT (0x3u << 6) /**< \brief (US_MR) Character length is 8 bits */ -#define US_MR_SYNC (0x1u << 8) /**< \brief (US_MR) Synchronous Mode Select */ -#define US_MR_CPHA (0x1u << 8) /**< \brief (US_MR) SPI Clock Phase */ -#define US_MR_PAR_Pos 9 -#define US_MR_PAR_Msk (0x7u << US_MR_PAR_Pos) /**< \brief (US_MR) Parity Type */ -#define US_MR_PAR_EVEN (0x0u << 9) /**< \brief (US_MR) Even parity */ -#define US_MR_PAR_ODD (0x1u << 9) /**< \brief (US_MR) Odd parity */ -#define US_MR_PAR_SPACE (0x2u << 9) /**< \brief (US_MR) Parity forced to 0 (Space) */ -#define US_MR_PAR_MARK (0x3u << 9) /**< \brief (US_MR) Parity forced to 1 (Mark) */ -#define US_MR_PAR_NO (0x4u << 9) /**< \brief (US_MR) No parity */ -#define US_MR_PAR_MULTIDROP (0x6u << 9) /**< \brief (US_MR) Multidrop mode */ -#define US_MR_NBSTOP_Pos 12 -#define US_MR_NBSTOP_Msk (0x3u << US_MR_NBSTOP_Pos) /**< \brief (US_MR) Number of Stop Bits */ -#define US_MR_NBSTOP_1_BIT (0x0u << 12) /**< \brief (US_MR) 1 stop bit */ -#define US_MR_NBSTOP_1_5_BIT (0x1u << 12) /**< \brief (US_MR) 1.5 stop bit (SYNC = 0) or reserved (SYNC = 1) */ -#define US_MR_NBSTOP_2_BIT (0x2u << 12) /**< \brief (US_MR) 2 stop bits */ -#define US_MR_CHMODE_Pos 14 -#define US_MR_CHMODE_Msk (0x3u << US_MR_CHMODE_Pos) /**< \brief (US_MR) Channel Mode */ -#define US_MR_CHMODE_NORMAL (0x0u << 14) /**< \brief (US_MR) Normal Mode */ -#define US_MR_CHMODE_AUTOMATIC (0x1u << 14) /**< \brief (US_MR) Automatic Echo. Receiver input is connected to the TXD pin. */ -#define US_MR_CHMODE_LOCAL_LOOPBACK (0x2u << 14) /**< \brief (US_MR) Local Loopback. Transmitter output is connected to the Receiver Input. */ -#define US_MR_CHMODE_REMOTE_LOOPBACK (0x3u << 14) /**< \brief (US_MR) Remote Loopback. RXD pin is internally connected to the TXD pin. */ -#define US_MR_MSBF (0x1u << 16) /**< \brief (US_MR) Bit Order */ -#define US_MR_CPOL (0x1u << 16) /**< \brief (US_MR) SPI Clock Polarity */ -#define US_MR_MODE9 (0x1u << 17) /**< \brief (US_MR) 9-bit Character Length */ -#define US_MR_CLKO (0x1u << 18) /**< \brief (US_MR) Clock Output Select */ -#define US_MR_OVER (0x1u << 19) /**< \brief (US_MR) Oversampling Mode */ -#define US_MR_INACK (0x1u << 20) /**< \brief (US_MR) Inhibit Non Acknowledge */ -#define US_MR_DSNACK (0x1u << 21) /**< \brief (US_MR) Disable Successive NACK */ -#define US_MR_VAR_SYNC (0x1u << 22) /**< \brief (US_MR) Variable Synchronization of Command/Data Sync Start Frame Delimiter */ -#define US_MR_INVDATA (0x1u << 23) /**< \brief (US_MR) INverted Data */ -#define US_MR_MAX_ITERATION_Pos 24 -#define US_MR_MAX_ITERATION_Msk (0x7u << US_MR_MAX_ITERATION_Pos) /**< \brief (US_MR) */ -#define US_MR_MAX_ITERATION(value) ((US_MR_MAX_ITERATION_Msk & ((value) << US_MR_MAX_ITERATION_Pos))) -#define US_MR_FILTER (0x1u << 28) /**< \brief (US_MR) Infrared Receive Line Filter */ -#define US_MR_MAN (0x1u << 29) /**< \brief (US_MR) Manchester Encoder/Decoder Enable */ -#define US_MR_MODSYNC (0x1u << 30) /**< \brief (US_MR) Manchester Synchronization Mode */ -#define US_MR_ONEBIT (0x1u << 31) /**< \brief (US_MR) Start Frame Delimiter Selector */ -/* -------- US_IER : (USART Offset: 0x0008) Interrupt Enable Register -------- */ -#define US_IER_RXRDY (0x1u << 0) /**< \brief (US_IER) RXRDY Interrupt Enable */ -#define US_IER_TXRDY (0x1u << 1) /**< \brief (US_IER) TXRDY Interrupt Enable */ -#define US_IER_RXBRK (0x1u << 2) /**< \brief (US_IER) Receiver Break Interrupt Enable */ -#define US_IER_ENDRX (0x1u << 3) /**< \brief (US_IER) End of Receive Transfer Interrupt Enable */ -#define US_IER_ENDTX (0x1u << 4) /**< \brief (US_IER) End of Transmit Interrupt Enable */ -#define US_IER_OVRE (0x1u << 5) /**< \brief (US_IER) Overrun Error Interrupt Enable */ -#define US_IER_FRAME (0x1u << 6) /**< \brief (US_IER) Framing Error Interrupt Enable */ -#define US_IER_PARE (0x1u << 7) /**< \brief (US_IER) Parity Error Interrupt Enable */ -#define US_IER_TIMEOUT (0x1u << 8) /**< \brief (US_IER) Time-out Interrupt Enable */ -#define US_IER_TXEMPTY (0x1u << 9) /**< \brief (US_IER) TXEMPTY Interrupt Enable */ -#define US_IER_ITER (0x1u << 10) /**< \brief (US_IER) Max number of Repetitions Reached */ -#define US_IER_UNRE (0x1u << 10) /**< \brief (US_IER) SPI Underrun Error */ -#define US_IER_TXBUFE (0x1u << 11) /**< \brief (US_IER) Buffer Empty Interrupt Enable */ -#define US_IER_RXBUFF (0x1u << 12) /**< \brief (US_IER) Buffer Full Interrupt Enable */ -#define US_IER_NACK (0x1u << 13) /**< \brief (US_IER) Non AcknowledgeInterrupt Enable */ -#define US_IER_RIIC (0x1u << 16) /**< \brief (US_IER) Ring Indicator Input Change Enable */ -#define US_IER_DSRIC (0x1u << 17) /**< \brief (US_IER) Data Set Ready Input Change Enable */ -#define US_IER_DCDIC (0x1u << 18) /**< \brief (US_IER) Data Carrier Detect Input Change Interrupt Enable */ -#define US_IER_CTSIC (0x1u << 19) /**< \brief (US_IER) Clear to Send Input Change Interrupt Enable */ -#define US_IER_MANE (0x1u << 24) /**< \brief (US_IER) Manchester Error Interrupt Enable */ -/* -------- US_IDR : (USART Offset: 0x000C) Interrupt Disable Register -------- */ -#define US_IDR_RXRDY (0x1u << 0) /**< \brief (US_IDR) RXRDY Interrupt Disable */ -#define US_IDR_TXRDY (0x1u << 1) /**< \brief (US_IDR) TXRDY Interrupt Disable */ -#define US_IDR_RXBRK (0x1u << 2) /**< \brief (US_IDR) Receiver Break Interrupt Disable */ -#define US_IDR_ENDRX (0x1u << 3) /**< \brief (US_IDR) End of Receive Transfer Interrupt Disable */ -#define US_IDR_ENDTX (0x1u << 4) /**< \brief (US_IDR) End of Transmit Interrupt Disable */ -#define US_IDR_OVRE (0x1u << 5) /**< \brief (US_IDR) Overrun Error Interrupt Disable */ -#define US_IDR_FRAME (0x1u << 6) /**< \brief (US_IDR) Framing Error Interrupt Disable */ -#define US_IDR_PARE (0x1u << 7) /**< \brief (US_IDR) Parity Error Interrupt Disable */ -#define US_IDR_TIMEOUT (0x1u << 8) /**< \brief (US_IDR) Time-out Interrupt Disable */ -#define US_IDR_TXEMPTY (0x1u << 9) /**< \brief (US_IDR) TXEMPTY Interrupt Disable */ -#define US_IDR_ITER (0x1u << 10) /**< \brief (US_IDR) Max number of Repetitions Reached Disable */ -#define US_IDR_UNRE (0x1u << 10) /**< \brief (US_IDR) SPI Underrun Error Disable */ -#define US_IDR_TXBUFE (0x1u << 11) /**< \brief (US_IDR) Buffer Empty Interrupt Disable */ -#define US_IDR_RXBUFF (0x1u << 12) /**< \brief (US_IDR) Buffer Full Interrupt Disable */ -#define US_IDR_NACK (0x1u << 13) /**< \brief (US_IDR) Non AcknowledgeInterrupt Disable */ -#define US_IDR_RIIC (0x1u << 16) /**< \brief (US_IDR) Ring Indicator Input Change Disable */ -#define US_IDR_DSRIC (0x1u << 17) /**< \brief (US_IDR) Data Set Ready Input Change Disable */ -#define US_IDR_DCDIC (0x1u << 18) /**< \brief (US_IDR) Data Carrier Detect Input Change Interrupt Disable */ -#define US_IDR_CTSIC (0x1u << 19) /**< \brief (US_IDR) Clear to Send Input Change Interrupt Disable */ -#define US_IDR_MANE (0x1u << 24) /**< \brief (US_IDR) Manchester Error Interrupt Disable */ -/* -------- US_IMR : (USART Offset: 0x0010) Interrupt Mask Register -------- */ -#define US_IMR_RXRDY (0x1u << 0) /**< \brief (US_IMR) RXRDY Interrupt Mask */ -#define US_IMR_TXRDY (0x1u << 1) /**< \brief (US_IMR) TXRDY Interrupt Mask */ -#define US_IMR_RXBRK (0x1u << 2) /**< \brief (US_IMR) Receiver Break Interrupt Mask */ -#define US_IMR_ENDRX (0x1u << 3) /**< \brief (US_IMR) End of Receive Transfer Interrupt Mask */ -#define US_IMR_ENDTX (0x1u << 4) /**< \brief (US_IMR) End of Transmit Interrupt Mask */ -#define US_IMR_OVRE (0x1u << 5) /**< \brief (US_IMR) Overrun Error Interrupt Mask */ -#define US_IMR_FRAME (0x1u << 6) /**< \brief (US_IMR) Framing Error Interrupt Mask */ -#define US_IMR_PARE (0x1u << 7) /**< \brief (US_IMR) Parity Error Interrupt Mask */ -#define US_IMR_TIMEOUT (0x1u << 8) /**< \brief (US_IMR) Time-out Interrupt Mask */ -#define US_IMR_TXEMPTY (0x1u << 9) /**< \brief (US_IMR) TXEMPTY Interrupt Mask */ -#define US_IMR_ITER (0x1u << 10) /**< \brief (US_IMR) Max number of Repetitions Reached Mask */ -#define US_IMR_UNRE (0x1u << 10) /**< \brief (US_IMR) SPI Underrun Error Mask */ -#define US_IMR_TXBUFE (0x1u << 11) /**< \brief (US_IMR) Buffer Empty Interrupt Mask */ -#define US_IMR_RXBUFF (0x1u << 12) /**< \brief (US_IMR) Buffer Full Interrupt Mask */ -#define US_IMR_NACK (0x1u << 13) /**< \brief (US_IMR) Non AcknowledgeInterrupt Mask */ -#define US_IMR_RIIC (0x1u << 16) /**< \brief (US_IMR) Ring Indicator Input Change Mask */ -#define US_IMR_DSRIC (0x1u << 17) /**< \brief (US_IMR) Data Set Ready Input Change Mask */ -#define US_IMR_DCDIC (0x1u << 18) /**< \brief (US_IMR) Data Carrier Detect Input Change Interrupt Mask */ -#define US_IMR_CTSIC (0x1u << 19) /**< \brief (US_IMR) Clear to Send Input Change Interrupt Mask */ -#define US_IMR_MANE (0x1u << 24) /**< \brief (US_IMR) Manchester Error Interrupt Mask */ -/* -------- US_CSR : (USART Offset: 0x0014) Channel Status Register -------- */ -#define US_CSR_RXRDY (0x1u << 0) /**< \brief (US_CSR) Receiver Ready */ -#define US_CSR_TXRDY (0x1u << 1) /**< \brief (US_CSR) Transmitter Ready */ -#define US_CSR_RXBRK (0x1u << 2) /**< \brief (US_CSR) Break Received/End of Break */ -#define US_CSR_ENDRX (0x1u << 3) /**< \brief (US_CSR) End of Receiver Transfer */ -#define US_CSR_ENDTX (0x1u << 4) /**< \brief (US_CSR) End of Transmitter Transfer */ -#define US_CSR_OVRE (0x1u << 5) /**< \brief (US_CSR) Overrun Error */ -#define US_CSR_FRAME (0x1u << 6) /**< \brief (US_CSR) Framing Error */ -#define US_CSR_PARE (0x1u << 7) /**< \brief (US_CSR) Parity Error */ -#define US_CSR_TIMEOUT (0x1u << 8) /**< \brief (US_CSR) Receiver Time-out */ -#define US_CSR_TXEMPTY (0x1u << 9) /**< \brief (US_CSR) Transmitter Empty */ -#define US_CSR_ITER (0x1u << 10) /**< \brief (US_CSR) Max number of Repetitions Reached */ -#define US_CSR_UNRE (0x1u << 10) /**< \brief (US_CSR) SPI Underrun Error */ -#define US_CSR_TXBUFE (0x1u << 11) /**< \brief (US_CSR) Transmission Buffer Empty */ -#define US_CSR_RXBUFF (0x1u << 12) /**< \brief (US_CSR) Reception Buffer Full */ -#define US_CSR_NACK (0x1u << 13) /**< \brief (US_CSR) Non AcknowledgeInterrupt */ -#define US_CSR_RIIC (0x1u << 16) /**< \brief (US_CSR) Ring Indicator Input Change Flag */ -#define US_CSR_DSRIC (0x1u << 17) /**< \brief (US_CSR) Data Set Ready Input Change Flag */ -#define US_CSR_DCDIC (0x1u << 18) /**< \brief (US_CSR) Data Carrier Detect Input Change Flag */ -#define US_CSR_CTSIC (0x1u << 19) /**< \brief (US_CSR) Clear to Send Input Change Flag */ -#define US_CSR_RI (0x1u << 20) /**< \brief (US_CSR) Image of RI Input */ -#define US_CSR_DSR (0x1u << 21) /**< \brief (US_CSR) Image of DSR Input */ -#define US_CSR_DCD (0x1u << 22) /**< \brief (US_CSR) Image of DCD Input */ -#define US_CSR_CTS (0x1u << 23) /**< \brief (US_CSR) Image of CTS Input */ -#define US_CSR_MANERR (0x1u << 24) /**< \brief (US_CSR) Manchester Error */ -/* -------- US_RHR : (USART Offset: 0x0018) Receiver Holding Register -------- */ -#define US_RHR_RXCHR_Pos 0 -#define US_RHR_RXCHR_Msk (0x1ffu << US_RHR_RXCHR_Pos) /**< \brief (US_RHR) Received Character */ -#define US_RHR_RXSYNH (0x1u << 15) /**< \brief (US_RHR) Received Sync */ -/* -------- US_THR : (USART Offset: 0x001C) Transmitter Holding Register -------- */ -#define US_THR_TXCHR_Pos 0 -#define US_THR_TXCHR_Msk (0x1ffu << US_THR_TXCHR_Pos) /**< \brief (US_THR) Character to be Transmitted */ -#define US_THR_TXCHR(value) ((US_THR_TXCHR_Msk & ((value) << US_THR_TXCHR_Pos))) -#define US_THR_TXSYNH (0x1u << 15) /**< \brief (US_THR) Sync Field to be transmitted */ -/* -------- US_BRGR : (USART Offset: 0x0020) Baud Rate Generator Register -------- */ -#define US_BRGR_CD_Pos 0 -#define US_BRGR_CD_Msk (0xffffu << US_BRGR_CD_Pos) /**< \brief (US_BRGR) Clock Divider */ -#define US_BRGR_CD(value) ((US_BRGR_CD_Msk & ((value) << US_BRGR_CD_Pos))) -#define US_BRGR_FP_Pos 16 -#define US_BRGR_FP_Msk (0x7u << US_BRGR_FP_Pos) /**< \brief (US_BRGR) Fractional Part */ -#define US_BRGR_FP(value) ((US_BRGR_FP_Msk & ((value) << US_BRGR_FP_Pos))) -/* -------- US_RTOR : (USART Offset: 0x0024) Receiver Time-out Register -------- */ -#define US_RTOR_TO_Pos 0 -#define US_RTOR_TO_Msk (0xffffu << US_RTOR_TO_Pos) /**< \brief (US_RTOR) Time-out Value */ -#define US_RTOR_TO(value) ((US_RTOR_TO_Msk & ((value) << US_RTOR_TO_Pos))) -/* -------- US_TTGR : (USART Offset: 0x0028) Transmitter Timeguard Register -------- */ -#define US_TTGR_TG_Pos 0 -#define US_TTGR_TG_Msk (0xffu << US_TTGR_TG_Pos) /**< \brief (US_TTGR) Timeguard Value */ -#define US_TTGR_TG(value) ((US_TTGR_TG_Msk & ((value) << US_TTGR_TG_Pos))) -/* -------- US_FIDI : (USART Offset: 0x0040) FI DI Ratio Register -------- */ -#define US_FIDI_FI_DI_RATIO_Pos 0 -#define US_FIDI_FI_DI_RATIO_Msk (0x7ffu << US_FIDI_FI_DI_RATIO_Pos) /**< \brief (US_FIDI) FI Over DI Ratio Value */ -#define US_FIDI_FI_DI_RATIO(value) ((US_FIDI_FI_DI_RATIO_Msk & ((value) << US_FIDI_FI_DI_RATIO_Pos))) -/* -------- US_NER : (USART Offset: 0x0044) Number of Errors Register -------- */ -#define US_NER_NB_ERRORS_Pos 0 -#define US_NER_NB_ERRORS_Msk (0xffu << US_NER_NB_ERRORS_Pos) /**< \brief (US_NER) Number of Errors */ -/* -------- US_IF : (USART Offset: 0x004C) IrDA Filter Register -------- */ -#define US_IF_IRDA_FILTER_Pos 0 -#define US_IF_IRDA_FILTER_Msk (0xffu << US_IF_IRDA_FILTER_Pos) /**< \brief (US_IF) IrDA Filter */ -#define US_IF_IRDA_FILTER(value) ((US_IF_IRDA_FILTER_Msk & ((value) << US_IF_IRDA_FILTER_Pos))) -/* -------- US_MAN : (USART Offset: 0x0050) Manchester Encoder Decoder Register -------- */ -#define US_MAN_TX_PL_Pos 0 -#define US_MAN_TX_PL_Msk (0xfu << US_MAN_TX_PL_Pos) /**< \brief (US_MAN) Transmitter Preamble Length */ -#define US_MAN_TX_PL(value) ((US_MAN_TX_PL_Msk & ((value) << US_MAN_TX_PL_Pos))) -#define US_MAN_TX_PP_Pos 8 -#define US_MAN_TX_PP_Msk (0x3u << US_MAN_TX_PP_Pos) /**< \brief (US_MAN) Transmitter Preamble Pattern */ -#define US_MAN_TX_PP_ALL_ONE (0x0u << 8) /**< \brief (US_MAN) The preamble is composed of '1's */ -#define US_MAN_TX_PP_ALL_ZERO (0x1u << 8) /**< \brief (US_MAN) The preamble is composed of '0's */ -#define US_MAN_TX_PP_ZERO_ONE (0x2u << 8) /**< \brief (US_MAN) The preamble is composed of '01's */ -#define US_MAN_TX_PP_ONE_ZERO (0x3u << 8) /**< \brief (US_MAN) The preamble is composed of '10's */ -#define US_MAN_TX_MPOL (0x1u << 12) /**< \brief (US_MAN) Transmitter Manchester Polarity */ -#define US_MAN_RX_PL_Pos 16 -#define US_MAN_RX_PL_Msk (0xfu << US_MAN_RX_PL_Pos) /**< \brief (US_MAN) Receiver Preamble Length */ -#define US_MAN_RX_PL(value) ((US_MAN_RX_PL_Msk & ((value) << US_MAN_RX_PL_Pos))) -#define US_MAN_RX_PP_Pos 24 -#define US_MAN_RX_PP_Msk (0x3u << US_MAN_RX_PP_Pos) /**< \brief (US_MAN) Receiver Preamble Pattern detected */ -#define US_MAN_RX_PP_ALL_ONE (0x0u << 24) /**< \brief (US_MAN) The preamble is composed of '1's */ -#define US_MAN_RX_PP_ALL_ZERO (0x1u << 24) /**< \brief (US_MAN) The preamble is composed of '0's */ -#define US_MAN_RX_PP_ZERO_ONE (0x2u << 24) /**< \brief (US_MAN) The preamble is composed of '01's */ -#define US_MAN_RX_PP_ONE_ZERO (0x3u << 24) /**< \brief (US_MAN) The preamble is composed of '10's */ -#define US_MAN_RX_MPOL (0x1u << 28) /**< \brief (US_MAN) Receiver Manchester Polarity */ -#define US_MAN_STUCKTO1 (0x1u << 29) /**< \brief (US_MAN) */ -#define US_MAN_DRIFT (0x1u << 30) /**< \brief (US_MAN) Drift compensation */ -/* -------- US_WPMR : (USART Offset: 0xE4) Write Protect Mode Register -------- */ -#define US_WPMR_WPEN (0x1u << 0) /**< \brief (US_WPMR) Write Protect Enable */ -#define US_WPMR_WPKEY_Pos 8 -#define US_WPMR_WPKEY_Msk (0xffffffu << US_WPMR_WPKEY_Pos) /**< \brief (US_WPMR) Write Protect KEY */ -#define US_WPMR_WPKEY(value) ((US_WPMR_WPKEY_Msk & ((value) << US_WPMR_WPKEY_Pos))) -/* -------- US_WPSR : (USART Offset: 0xE8) Write Protect Status Register -------- */ -#define US_WPSR_WPVS (0x1u << 0) /**< \brief (US_WPSR) Write Protect Violation Status */ -#define US_WPSR_WPVSRC_Pos 8 -#define US_WPSR_WPVSRC_Msk (0xffffu << US_WPSR_WPVSRC_Pos) /**< \brief (US_WPSR) Write Protect Violation Source */ -/* -------- US_RPR : (USART Offset: 0x100) Receive Pointer Register -------- */ -#define US_RPR_RXPTR_Pos 0 -#define US_RPR_RXPTR_Msk (0xffffffffu << US_RPR_RXPTR_Pos) /**< \brief (US_RPR) Receive Pointer Register */ -#define US_RPR_RXPTR(value) ((US_RPR_RXPTR_Msk & ((value) << US_RPR_RXPTR_Pos))) -/* -------- US_RCR : (USART Offset: 0x104) Receive Counter Register -------- */ -#define US_RCR_RXCTR_Pos 0 -#define US_RCR_RXCTR_Msk (0xffffu << US_RCR_RXCTR_Pos) /**< \brief (US_RCR) Receive Counter Register */ -#define US_RCR_RXCTR(value) ((US_RCR_RXCTR_Msk & ((value) << US_RCR_RXCTR_Pos))) -/* -------- US_TPR : (USART Offset: 0x108) Transmit Pointer Register -------- */ -#define US_TPR_TXPTR_Pos 0 -#define US_TPR_TXPTR_Msk (0xffffffffu << US_TPR_TXPTR_Pos) /**< \brief (US_TPR) Transmit Counter Register */ -#define US_TPR_TXPTR(value) ((US_TPR_TXPTR_Msk & ((value) << US_TPR_TXPTR_Pos))) -/* -------- US_TCR : (USART Offset: 0x10C) Transmit Counter Register -------- */ -#define US_TCR_TXCTR_Pos 0 -#define US_TCR_TXCTR_Msk (0xffffu << US_TCR_TXCTR_Pos) /**< \brief (US_TCR) Transmit Counter Register */ -#define US_TCR_TXCTR(value) ((US_TCR_TXCTR_Msk & ((value) << US_TCR_TXCTR_Pos))) -/* -------- US_RNPR : (USART Offset: 0x110) Receive Next Pointer Register -------- */ -#define US_RNPR_RXNPTR_Pos 0 -#define US_RNPR_RXNPTR_Msk (0xffffffffu << US_RNPR_RXNPTR_Pos) /**< \brief (US_RNPR) Receive Next Pointer */ -#define US_RNPR_RXNPTR(value) ((US_RNPR_RXNPTR_Msk & ((value) << US_RNPR_RXNPTR_Pos))) -/* -------- US_RNCR : (USART Offset: 0x114) Receive Next Counter Register -------- */ -#define US_RNCR_RXNCTR_Pos 0 -#define US_RNCR_RXNCTR_Msk (0xffffu << US_RNCR_RXNCTR_Pos) /**< \brief (US_RNCR) Receive Next Counter */ -#define US_RNCR_RXNCTR(value) ((US_RNCR_RXNCTR_Msk & ((value) << US_RNCR_RXNCTR_Pos))) -/* -------- US_TNPR : (USART Offset: 0x118) Transmit Next Pointer Register -------- */ -#define US_TNPR_TXNPTR_Pos 0 -#define US_TNPR_TXNPTR_Msk (0xffffffffu << US_TNPR_TXNPTR_Pos) /**< \brief (US_TNPR) Transmit Next Pointer */ -#define US_TNPR_TXNPTR(value) ((US_TNPR_TXNPTR_Msk & ((value) << US_TNPR_TXNPTR_Pos))) -/* -------- US_TNCR : (USART Offset: 0x11C) Transmit Next Counter Register -------- */ -#define US_TNCR_TXNCTR_Pos 0 -#define US_TNCR_TXNCTR_Msk (0xffffu << US_TNCR_TXNCTR_Pos) /**< \brief (US_TNCR) Transmit Counter Next */ -#define US_TNCR_TXNCTR(value) ((US_TNCR_TXNCTR_Msk & ((value) << US_TNCR_TXNCTR_Pos))) -/* -------- US_PTCR : (USART Offset: 0x120) Transfer Control Register -------- */ -#define US_PTCR_RXTEN (0x1u << 0) /**< \brief (US_PTCR) Receiver Transfer Enable */ -#define US_PTCR_RXTDIS (0x1u << 1) /**< \brief (US_PTCR) Receiver Transfer Disable */ -#define US_PTCR_TXTEN (0x1u << 8) /**< \brief (US_PTCR) Transmitter Transfer Enable */ -#define US_PTCR_TXTDIS (0x1u << 9) /**< \brief (US_PTCR) Transmitter Transfer Disable */ -/* -------- US_PTSR : (USART Offset: 0x124) Transfer Status Register -------- */ -#define US_PTSR_RXTEN (0x1u << 0) /**< \brief (US_PTSR) Receiver Transfer Enable */ -#define US_PTSR_TXTEN (0x1u << 8) /**< \brief (US_PTSR) Transmitter Transfer Enable */ - -/*@}*/ - -/* ============================================================================= */ -/** SOFTWARE API DEFINITION FOR Watchdog Timer */ -/* ============================================================================= */ -/** \addtogroup SAM3S_WDT Watchdog Timer */ -/*@{*/ - -#ifndef __ASSEMBLY__ -/** \brief Wdt hardware registers */ -typedef struct { - WoReg WDT_CR; /**< \brief (Wdt Offset: 0x00) Control Register */ - RwReg WDT_MR; /**< \brief (Wdt Offset: 0x04) Mode Register */ - RoReg WDT_SR; /**< \brief (Wdt Offset: 0x08) Status Register */ -} Wdt; -#endif /* __ASSEMBLY__ */ -/* -------- WDT_CR : (WDT Offset: 0x00) Control Register -------- */ -#define WDT_CR_WDRSTT (0x1u << 0) /**< \brief (WDT_CR) Watchdog Restart */ -#define WDT_CR_KEY_Pos 24 -#define WDT_CR_KEY_Msk (0xffu << WDT_CR_KEY_Pos) /**< \brief (WDT_CR) Password */ -#define WDT_CR_KEY(value) ((WDT_CR_KEY_Msk & ((value) << WDT_CR_KEY_Pos))) -/* -------- WDT_MR : (WDT Offset: 0x04) Mode Register -------- */ -#define WDT_MR_WDV_Pos 0 -#define WDT_MR_WDV_Msk (0xfffu << WDT_MR_WDV_Pos) /**< \brief (WDT_MR) Watchdog Counter Value */ -#define WDT_MR_WDV(value) ((WDT_MR_WDV_Msk & ((value) << WDT_MR_WDV_Pos))) -#define WDT_MR_WDFIEN (0x1u << 12) /**< \brief (WDT_MR) Watchdog Fault Interrupt Enable */ -#define WDT_MR_WDRSTEN (0x1u << 13) /**< \brief (WDT_MR) Watchdog Reset Enable */ -#define WDT_MR_WDRPROC (0x1u << 14) /**< \brief (WDT_MR) Watchdog Reset Processor */ -#define WDT_MR_WDDIS (0x1u << 15) /**< \brief (WDT_MR) Watchdog Disable */ -#define WDT_MR_WDD_Pos 16 -#define WDT_MR_WDD_Msk (0xfffu << WDT_MR_WDD_Pos) /**< \brief (WDT_MR) Watchdog Delta Value */ -#define WDT_MR_WDD(value) ((WDT_MR_WDD_Msk & ((value) << WDT_MR_WDD_Pos))) -#define WDT_MR_WDDBGHLT (0x1u << 28) /**< \brief (WDT_MR) Watchdog Debug Halt */ -#define WDT_MR_WDIDLEHLT (0x1u << 29) /**< \brief (WDT_MR) Watchdog Idle Halt */ -/* -------- WDT_SR : (WDT Offset: 0x08) Status Register -------- */ -#define WDT_SR_WDUNF (0x1u << 0) /**< \brief (WDT_SR) Watchdog Underflow */ -#define WDT_SR_WDERR (0x1u << 1) /**< \brief (WDT_SR) Watchdog Error */ - -/*@}*/ - -/*@}*/ - -/* ************************************************************************** */ -/* REGISTER ACCESS DEFINITIONS FOR SAM3S */ -/* ************************************************************************** */ -/** \addtogroup SAM3S_reg Registers Access Definitions */ -/*@{*/ - -/* ========== Register definition for HSMCI peripheral ========== */ -#define REG_HSMCI_CR REG_ACCESS(WoReg, 0x40000000U) /**< \brief (HSMCI) Control Register */ -#define REG_HSMCI_MR REG_ACCESS(RwReg, 0x40000004U) /**< \brief (HSMCI) Mode Register */ -#define REG_HSMCI_DTOR REG_ACCESS(RwReg, 0x40000008U) /**< \brief (HSMCI) Data Timeout Register */ -#define REG_HSMCI_SDCR REG_ACCESS(RwReg, 0x4000000CU) /**< \brief (HSMCI) SD/SDIO Card Register */ -#define REG_HSMCI_ARGR REG_ACCESS(RwReg, 0x40000010U) /**< \brief (HSMCI) Argument Register */ -#define REG_HSMCI_CMDR REG_ACCESS(WoReg, 0x40000014U) /**< \brief (HSMCI) Command Register */ -#define REG_HSMCI_BLKR REG_ACCESS(RwReg, 0x40000018U) /**< \brief (HSMCI) Block Register */ -#define REG_HSMCI_CSTOR REG_ACCESS(RwReg, 0x4000001CU) /**< \brief (HSMCI) Completion Signal Timeout Register */ -#define REG_HSMCI_RSPR REG_ACCESS(RoReg, 0x40000020U) /**< \brief (HSMCI) Response Register */ -#define REG_HSMCI_RDR REG_ACCESS(RoReg, 0x40000030U) /**< \brief (HSMCI) Receive Data Register */ -#define REG_HSMCI_TDR REG_ACCESS(WoReg, 0x40000034U) /**< \brief (HSMCI) Transmit Data Register */ -#define REG_HSMCI_SR REG_ACCESS(RoReg, 0x40000040U) /**< \brief (HSMCI) Status Register */ -#define REG_HSMCI_IER REG_ACCESS(WoReg, 0x40000044U) /**< \brief (HSMCI) Interrupt Enable Register */ -#define REG_HSMCI_IDR REG_ACCESS(WoReg, 0x40000048U) /**< \brief (HSMCI) Interrupt Disable Register */ -#define REG_HSMCI_IMR REG_ACCESS(RoReg, 0x4000004CU) /**< \brief (HSMCI) Interrupt Mask Register */ -#define REG_HSMCI_CFG REG_ACCESS(RwReg, 0x40000054U) /**< \brief (HSMCI) Configuration Register */ -#define REG_HSMCI_WPMR REG_ACCESS(RwReg, 0x400000E4U) /**< \brief (HSMCI) Write Protection Mode Register */ -#define REG_HSMCI_WPSR REG_ACCESS(RoReg, 0x400000E8U) /**< \brief (HSMCI) Write Protection Status Register */ -#define REG_HSMCI_RPR REG_ACCESS(RwReg, 0x40000100U) /**< \brief (HSMCI) Receive Pointer Register */ -#define REG_HSMCI_RCR REG_ACCESS(RwReg, 0x40000104U) /**< \brief (HSMCI) Receive Counter Register */ -#define REG_HSMCI_TPR REG_ACCESS(RwReg, 0x40000108U) /**< \brief (HSMCI) Transmit Pointer Register */ -#define REG_HSMCI_TCR REG_ACCESS(RwReg, 0x4000010CU) /**< \brief (HSMCI) Transmit Counter Register */ -#define REG_HSMCI_RNPR REG_ACCESS(RwReg, 0x40000110U) /**< \brief (HSMCI) Receive Next Pointer Register */ -#define REG_HSMCI_RNCR REG_ACCESS(RwReg, 0x40000114U) /**< \brief (HSMCI) Receive Next Counter Register */ -#define REG_HSMCI_TNPR REG_ACCESS(RwReg, 0x40000118U) /**< \brief (HSMCI) Transmit Next Pointer Register */ -#define REG_HSMCI_TNCR REG_ACCESS(RwReg, 0x4000011CU) /**< \brief (HSMCI) Transmit Next Counter Register */ -#define REG_HSMCI_PTCR REG_ACCESS(WoReg, 0x40000120U) /**< \brief (HSMCI) Transfer Control Register */ -#define REG_HSMCI_PTSR REG_ACCESS(RoReg, 0x40000124U) /**< \brief (HSMCI) Transfer Status Register */ -#define REG_HSMCI_FIFO REG_ACCESS(RwReg, 0x40000200U) /**< \brief (HSMCI) FIFO Memory Aperture0 */ -/* ========== Register definition for SSC peripheral ========== */ -#define REG_SSC_CR REG_ACCESS(WoReg, 0x40004000U) /**< \brief (SSC) Control Register */ -#define REG_SSC_CMR REG_ACCESS(RwReg, 0x40004004U) /**< \brief (SSC) Clock Mode Register */ -#define REG_SSC_RCMR REG_ACCESS(RwReg, 0x40004010U) /**< \brief (SSC) Receive Clock Mode Register */ -#define REG_SSC_RFMR REG_ACCESS(RwReg, 0x40004014U) /**< \brief (SSC) Receive Frame Mode Register */ -#define REG_SSC_TCMR REG_ACCESS(RwReg, 0x40004018U) /**< \brief (SSC) Transmit Clock Mode Register */ -#define REG_SSC_TFMR REG_ACCESS(RwReg, 0x4000401CU) /**< \brief (SSC) Transmit Frame Mode Register */ -#define REG_SSC_RHR REG_ACCESS(RoReg, 0x40004020U) /**< \brief (SSC) Receive Holding Register */ -#define REG_SSC_THR REG_ACCESS(WoReg, 0x40004024U) /**< \brief (SSC) Transmit Holding Register */ -#define REG_SSC_RSHR REG_ACCESS(RoReg, 0x40004030U) /**< \brief (SSC) Receive Sync. Holding Register */ -#define REG_SSC_TSHR REG_ACCESS(RwReg, 0x40004034U) /**< \brief (SSC) Transmit Sync. Holding Register */ -#define REG_SSC_RC0R REG_ACCESS(RwReg, 0x40004038U) /**< \brief (SSC) Receive Compare 0 Register */ -#define REG_SSC_RC1R REG_ACCESS(RwReg, 0x4000403CU) /**< \brief (SSC) Receive Compare 1 Register */ -#define REG_SSC_SR REG_ACCESS(RoReg, 0x40004040U) /**< \brief (SSC) Status Register */ -#define REG_SSC_IER REG_ACCESS(WoReg, 0x40004044U) /**< \brief (SSC) Interrupt Enable Register */ -#define REG_SSC_IDR REG_ACCESS(WoReg, 0x40004048U) /**< \brief (SSC) Interrupt Disable Register */ -#define REG_SSC_IMR REG_ACCESS(RoReg, 0x4000404CU) /**< \brief (SSC) Interrupt Mask Register */ -#define REG_SSC_WPMR REG_ACCESS(RwReg, 0x400040E4U) /**< \brief (SSC) Write Protect Mode Register */ -#define REG_SSC_WPSR REG_ACCESS(RoReg, 0x400040E8U) /**< \brief (SSC) Write Protect Status Register */ -#define REG_SSC_RPR REG_ACCESS(RwReg, 0x40004100U) /**< \brief (SSC) Receive Pointer Register */ -#define REG_SSC_RCR REG_ACCESS(RwReg, 0x40004104U) /**< \brief (SSC) Receive Counter Register */ -#define REG_SSC_TPR REG_ACCESS(RwReg, 0x40004108U) /**< \brief (SSC) Transmit Pointer Register */ -#define REG_SSC_TCR REG_ACCESS(RwReg, 0x4000410CU) /**< \brief (SSC) Transmit Counter Register */ -#define REG_SSC_RNPR REG_ACCESS(RwReg, 0x40004110U) /**< \brief (SSC) Receive Next Pointer Register */ -#define REG_SSC_RNCR REG_ACCESS(RwReg, 0x40004114U) /**< \brief (SSC) Receive Next Counter Register */ -#define REG_SSC_TNPR REG_ACCESS(RwReg, 0x40004118U) /**< \brief (SSC) Transmit Next Pointer Register */ -#define REG_SSC_TNCR REG_ACCESS(RwReg, 0x4000411CU) /**< \brief (SSC) Transmit Next Counter Register */ -#define REG_SSC_PTCR REG_ACCESS(WoReg, 0x40004120U) /**< \brief (SSC) Transfer Control Register */ -#define REG_SSC_PTSR REG_ACCESS(RoReg, 0x40004124U) /**< \brief (SSC) Transfer Status Register */ -/* ========== Register definition for SPI peripheral ========== */ -#define REG_SPI_CR REG_ACCESS(WoReg, 0x40008000U) /**< \brief (SPI) Control Register */ -#define REG_SPI_MR REG_ACCESS(RwReg, 0x40008004U) /**< \brief (SPI) Mode Register */ -#define REG_SPI_RDR REG_ACCESS(RoReg, 0x40008008U) /**< \brief (SPI) Receive Data Register */ -#define REG_SPI_TDR REG_ACCESS(WoReg, 0x4000800CU) /**< \brief (SPI) Transmit Data Register */ -#define REG_SPI_SR REG_ACCESS(RoReg, 0x40008010U) /**< \brief (SPI) Status Register */ -#define REG_SPI_IER REG_ACCESS(WoReg, 0x40008014U) /**< \brief (SPI) Interrupt Enable Register */ -#define REG_SPI_IDR REG_ACCESS(WoReg, 0x40008018U) /**< \brief (SPI) Interrupt Disable Register */ -#define REG_SPI_IMR REG_ACCESS(RoReg, 0x4000801CU) /**< \brief (SPI) Interrupt Mask Register */ -#define REG_SPI_CSR REG_ACCESS(RwReg, 0x40008030U) /**< \brief (SPI) Chip Select Register */ -#define REG_SPI_WPMR REG_ACCESS(RwReg, 0x400080E4U) /**< \brief (SPI) Write Protection Control Register */ -#define REG_SPI_WPSR REG_ACCESS(RoReg, 0x400080E8U) /**< \brief (SPI) Write Protection Status Register */ -#define REG_SPI_RPR REG_ACCESS(RwReg, 0x40008100U) /**< \brief (SPI) Receive Pointer Register */ -#define REG_SPI_RCR REG_ACCESS(RwReg, 0x40008104U) /**< \brief (SPI) Receive Counter Register */ -#define REG_SPI_TPR REG_ACCESS(RwReg, 0x40008108U) /**< \brief (SPI) Transmit Pointer Register */ -#define REG_SPI_TCR REG_ACCESS(RwReg, 0x4000810CU) /**< \brief (SPI) Transmit Counter Register */ -#define REG_SPI_RNPR REG_ACCESS(RwReg, 0x40008110U) /**< \brief (SPI) Receive Next Pointer Register */ -#define REG_SPI_RNCR REG_ACCESS(RwReg, 0x40008114U) /**< \brief (SPI) Receive Next Counter Register */ -#define REG_SPI_TNPR REG_ACCESS(RwReg, 0x40008118U) /**< \brief (SPI) Transmit Next Pointer Register */ -#define REG_SPI_TNCR REG_ACCESS(RwReg, 0x4000811CU) /**< \brief (SPI) Transmit Next Counter Register */ -#define REG_SPI_PTCR REG_ACCESS(WoReg, 0x40008120U) /**< \brief (SPI) Transfer Control Register */ -#define REG_SPI_PTSR REG_ACCESS(RoReg, 0x40008124U) /**< \brief (SPI) Transfer Status Register */ -/* ========== Register definition for TC0 peripheral ========== */ -#define REG_TC0_CCR0 REG_ACCESS(WoReg, 0x40010000U) /**< \brief (TC0) Channel Control Register (channel = 0) */ -#define REG_TC0_CMR0 REG_ACCESS(RwReg, 0x40010004U) /**< \brief (TC0) Channel Mode Register (channel = 0) */ -#define REG_TC0_SMMR0 REG_ACCESS(RwReg, 0x40010008U) /**< \brief (TC0) Stepper Motor Mode Register (channel = 0) */ -#define REG_TC0_CV0 REG_ACCESS(RoReg, 0x40010010U) /**< \brief (TC0) Counter Value (channel = 0) */ -#define REG_TC0_RA0 REG_ACCESS(RwReg, 0x40010014U) /**< \brief (TC0) Register A (channel = 0) */ -#define REG_TC0_RB0 REG_ACCESS(RwReg, 0x40010018U) /**< \brief (TC0) Register B (channel = 0) */ -#define REG_TC0_RC0 REG_ACCESS(RwReg, 0x4001001CU) /**< \brief (TC0) Register C (channel = 0) */ -#define REG_TC0_SR0 REG_ACCESS(RoReg, 0x40010020U) /**< \brief (TC0) Status Register (channel = 0) */ -#define REG_TC0_IER0 REG_ACCESS(WoReg, 0x40010024U) /**< \brief (TC0) Interrupt Enable Register (channel = 0) */ -#define REG_TC0_IDR0 REG_ACCESS(WoReg, 0x40010028U) /**< \brief (TC0) Interrupt Disable Register (channel = 0) */ -#define REG_TC0_IMR0 REG_ACCESS(RoReg, 0x4001002CU) /**< \brief (TC0) Interrupt Mask Register (channel = 0) */ -#define REG_TC0_CCR1 REG_ACCESS(WoReg, 0x40010040U) /**< \brief (TC0) Channel Control Register (channel = 1) */ -#define REG_TC0_CMR1 REG_ACCESS(RwReg, 0x40010044U) /**< \brief (TC0) Channel Mode Register (channel = 1) */ -#define REG_TC0_SMMR1 REG_ACCESS(RwReg, 0x40010048U) /**< \brief (TC0) Stepper Motor Mode Register (channel = 1) */ -#define REG_TC0_CV1 REG_ACCESS(RoReg, 0x40010050U) /**< \brief (TC0) Counter Value (channel = 1) */ -#define REG_TC0_RA1 REG_ACCESS(RwReg, 0x40010054U) /**< \brief (TC0) Register A (channel = 1) */ -#define REG_TC0_RB1 REG_ACCESS(RwReg, 0x40010058U) /**< \brief (TC0) Register B (channel = 1) */ -#define REG_TC0_RC1 REG_ACCESS(RwReg, 0x4001005CU) /**< \brief (TC0) Register C (channel = 1) */ -#define REG_TC0_SR1 REG_ACCESS(RoReg, 0x40010060U) /**< \brief (TC0) Status Register (channel = 1) */ -#define REG_TC0_IER1 REG_ACCESS(WoReg, 0x40010064U) /**< \brief (TC0) Interrupt Enable Register (channel = 1) */ -#define REG_TC0_IDR1 REG_ACCESS(WoReg, 0x40010068U) /**< \brief (TC0) Interrupt Disable Register (channel = 1) */ -#define REG_TC0_IMR1 REG_ACCESS(RoReg, 0x4001006CU) /**< \brief (TC0) Interrupt Mask Register (channel = 1) */ -#define REG_TC0_CCR2 REG_ACCESS(WoReg, 0x40010080U) /**< \brief (TC0) Channel Control Register (channel = 2) */ -#define REG_TC0_CMR2 REG_ACCESS(RwReg, 0x40010084U) /**< \brief (TC0) Channel Mode Register (channel = 2) */ -#define REG_TC0_SMMR2 REG_ACCESS(RwReg, 0x40010088U) /**< \brief (TC0) Stepper Motor Mode Register (channel = 2) */ -#define REG_TC0_CV2 REG_ACCESS(RoReg, 0x40010090U) /**< \brief (TC0) Counter Value (channel = 2) */ -#define REG_TC0_RA2 REG_ACCESS(RwReg, 0x40010094U) /**< \brief (TC0) Register A (channel = 2) */ -#define REG_TC0_RB2 REG_ACCESS(RwReg, 0x40010098U) /**< \brief (TC0) Register B (channel = 2) */ -#define REG_TC0_RC2 REG_ACCESS(RwReg, 0x4001009CU) /**< \brief (TC0) Register C (channel = 2) */ -#define REG_TC0_SR2 REG_ACCESS(RoReg, 0x400100A0U) /**< \brief (TC0) Status Register (channel = 2) */ -#define REG_TC0_IER2 REG_ACCESS(WoReg, 0x400100A4U) /**< \brief (TC0) Interrupt Enable Register (channel = 2) */ -#define REG_TC0_IDR2 REG_ACCESS(WoReg, 0x400100A8U) /**< \brief (TC0) Interrupt Disable Register (channel = 2) */ -#define REG_TC0_IMR2 REG_ACCESS(RoReg, 0x400100ACU) /**< \brief (TC0) Interrupt Mask Register (channel = 2) */ -#define REG_TC0_BCR REG_ACCESS(WoReg, 0x400100C0U) /**< \brief (TC0) Block Control Register */ -#define REG_TC0_BMR REG_ACCESS(RwReg, 0x400100C4U) /**< \brief (TC0) Block Mode Register */ -#define REG_TC0_QIER REG_ACCESS(WoReg, 0x400100C8U) /**< \brief (TC0) QDEC Interrupt Enable Register */ -#define REG_TC0_QIDR REG_ACCESS(WoReg, 0x400100CCU) /**< \brief (TC0) QDEC Interrupt Disable Register */ -#define REG_TC0_QIMR REG_ACCESS(RoReg, 0x400100D0U) /**< \brief (TC0) QDEC Interrupt Mask Register */ -#define REG_TC0_QISR REG_ACCESS(RoReg, 0x400100D4U) /**< \brief (TC0) QDEC Interrupt Status Register */ -#define REG_TC0_FMR REG_ACCESS(RwReg, 0x400100D8U) /**< \brief (TC0) Fault Mode Register */ -#define REG_TC0_WPMR REG_ACCESS(RwReg, 0x400100E4U) /**< \brief (TC0) Write Protect Mode Register */ -/* ========== Register definition for TC1 peripheral ========== */ -#define REG_TC1_CCR0 REG_ACCESS(WoReg, 0x40014000U) /**< \brief (TC1) Channel Control Register (channel = 0) */ -#define REG_TC1_CMR0 REG_ACCESS(RwReg, 0x40014004U) /**< \brief (TC1) Channel Mode Register (channel = 0) */ -#define REG_TC1_SMMR0 REG_ACCESS(RwReg, 0x40014008U) /**< \brief (TC1) Stepper Motor Mode Register (channel = 0) */ -#define REG_TC1_CV0 REG_ACCESS(RoReg, 0x40014010U) /**< \brief (TC1) Counter Value (channel = 0) */ -#define REG_TC1_RA0 REG_ACCESS(RwReg, 0x40014014U) /**< \brief (TC1) Register A (channel = 0) */ -#define REG_TC1_RB0 REG_ACCESS(RwReg, 0x40014018U) /**< \brief (TC1) Register B (channel = 0) */ -#define REG_TC1_RC0 REG_ACCESS(RwReg, 0x4001401CU) /**< \brief (TC1) Register C (channel = 0) */ -#define REG_TC1_SR0 REG_ACCESS(RoReg, 0x40014020U) /**< \brief (TC1) Status Register (channel = 0) */ -#define REG_TC1_IER0 REG_ACCESS(WoReg, 0x40014024U) /**< \brief (TC1) Interrupt Enable Register (channel = 0) */ -#define REG_TC1_IDR0 REG_ACCESS(WoReg, 0x40014028U) /**< \brief (TC1) Interrupt Disable Register (channel = 0) */ -#define REG_TC1_IMR0 REG_ACCESS(RoReg, 0x4001402CU) /**< \brief (TC1) Interrupt Mask Register (channel = 0) */ -#define REG_TC1_CCR1 REG_ACCESS(WoReg, 0x40014040U) /**< \brief (TC1) Channel Control Register (channel = 1) */ -#define REG_TC1_CMR1 REG_ACCESS(RwReg, 0x40014044U) /**< \brief (TC1) Channel Mode Register (channel = 1) */ -#define REG_TC1_SMMR1 REG_ACCESS(RwReg, 0x40014048U) /**< \brief (TC1) Stepper Motor Mode Register (channel = 1) */ -#define REG_TC1_CV1 REG_ACCESS(RoReg, 0x40014050U) /**< \brief (TC1) Counter Value (channel = 1) */ -#define REG_TC1_RA1 REG_ACCESS(RwReg, 0x40014054U) /**< \brief (TC1) Register A (channel = 1) */ -#define REG_TC1_RB1 REG_ACCESS(RwReg, 0x40014058U) /**< \brief (TC1) Register B (channel = 1) */ -#define REG_TC1_RC1 REG_ACCESS(RwReg, 0x4001405CU) /**< \brief (TC1) Register C (channel = 1) */ -#define REG_TC1_SR1 REG_ACCESS(RoReg, 0x40014060U) /**< \brief (TC1) Status Register (channel = 1) */ -#define REG_TC1_IER1 REG_ACCESS(WoReg, 0x40014064U) /**< \brief (TC1) Interrupt Enable Register (channel = 1) */ -#define REG_TC1_IDR1 REG_ACCESS(WoReg, 0x40014068U) /**< \brief (TC1) Interrupt Disable Register (channel = 1) */ -#define REG_TC1_IMR1 REG_ACCESS(RoReg, 0x4001406CU) /**< \brief (TC1) Interrupt Mask Register (channel = 1) */ -#define REG_TC1_CCR2 REG_ACCESS(WoReg, 0x40014080U) /**< \brief (TC1) Channel Control Register (channel = 2) */ -#define REG_TC1_CMR2 REG_ACCESS(RwReg, 0x40014084U) /**< \brief (TC1) Channel Mode Register (channel = 2) */ -#define REG_TC1_SMMR2 REG_ACCESS(RwReg, 0x40014088U) /**< \brief (TC1) Stepper Motor Mode Register (channel = 2) */ -#define REG_TC1_CV2 REG_ACCESS(RoReg, 0x40014090U) /**< \brief (TC1) Counter Value (channel = 2) */ -#define REG_TC1_RA2 REG_ACCESS(RwReg, 0x40014094U) /**< \brief (TC1) Register A (channel = 2) */ -#define REG_TC1_RB2 REG_ACCESS(RwReg, 0x40014098U) /**< \brief (TC1) Register B (channel = 2) */ -#define REG_TC1_RC2 REG_ACCESS(RwReg, 0x4001409CU) /**< \brief (TC1) Register C (channel = 2) */ -#define REG_TC1_SR2 REG_ACCESS(RoReg, 0x400140A0U) /**< \brief (TC1) Status Register (channel = 2) */ -#define REG_TC1_IER2 REG_ACCESS(WoReg, 0x400140A4U) /**< \brief (TC1) Interrupt Enable Register (channel = 2) */ -#define REG_TC1_IDR2 REG_ACCESS(WoReg, 0x400140A8U) /**< \brief (TC1) Interrupt Disable Register (channel = 2) */ -#define REG_TC1_IMR2 REG_ACCESS(RoReg, 0x400140ACU) /**< \brief (TC1) Interrupt Mask Register (channel = 2) */ -#define REG_TC1_BCR REG_ACCESS(WoReg, 0x400140C0U) /**< \brief (TC1) Block Control Register */ -#define REG_TC1_BMR REG_ACCESS(RwReg, 0x400140C4U) /**< \brief (TC1) Block Mode Register */ -#define REG_TC1_QIER REG_ACCESS(WoReg, 0x400140C8U) /**< \brief (TC1) QDEC Interrupt Enable Register */ -#define REG_TC1_QIDR REG_ACCESS(WoReg, 0x400140CCU) /**< \brief (TC1) QDEC Interrupt Disable Register */ -#define REG_TC1_QIMR REG_ACCESS(RoReg, 0x400140D0U) /**< \brief (TC1) QDEC Interrupt Mask Register */ -#define REG_TC1_QISR REG_ACCESS(RoReg, 0x400140D4U) /**< \brief (TC1) QDEC Interrupt Status Register */ -#define REG_TC1_FMR REG_ACCESS(RwReg, 0x400140D8U) /**< \brief (TC1) Fault Mode Register */ -#define REG_TC1_WPMR REG_ACCESS(RwReg, 0x400140E4U) /**< \brief (TC1) Write Protect Mode Register */ -/* ========== Register definition for TWI0 peripheral ========== */ -#define REG_TWI0_CR REG_ACCESS(WoReg, 0x40018000U) /**< \brief (TWI0) Control Register */ -#define REG_TWI0_MMR REG_ACCESS(RwReg, 0x40018004U) /**< \brief (TWI0) Master Mode Register */ -#define REG_TWI0_SMR REG_ACCESS(RwReg, 0x40018008U) /**< \brief (TWI0) Slave Mode Register */ -#define REG_TWI0_IADR REG_ACCESS(RwReg, 0x4001800CU) /**< \brief (TWI0) Internal Address Register */ -#define REG_TWI0_CWGR REG_ACCESS(RwReg, 0x40018010U) /**< \brief (TWI0) Clock Waveform Generator Register */ -#define REG_TWI0_SR REG_ACCESS(RoReg, 0x40018020U) /**< \brief (TWI0) Status Register */ -#define REG_TWI0_IER REG_ACCESS(WoReg, 0x40018024U) /**< \brief (TWI0) Interrupt Enable Register */ -#define REG_TWI0_IDR REG_ACCESS(WoReg, 0x40018028U) /**< \brief (TWI0) Interrupt Disable Register */ -#define REG_TWI0_IMR REG_ACCESS(RoReg, 0x4001802CU) /**< \brief (TWI0) Interrupt Mask Register */ -#define REG_TWI0_RHR REG_ACCESS(RoReg, 0x40018030U) /**< \brief (TWI0) Receive Holding Register */ -#define REG_TWI0_THR REG_ACCESS(WoReg, 0x40018034U) /**< \brief (TWI0) Transmit Holding Register */ -#define REG_TWI0_RPR REG_ACCESS(RwReg, 0x40018100U) /**< \brief (TWI0) Receive Pointer Register */ -#define REG_TWI0_RCR REG_ACCESS(RwReg, 0x40018104U) /**< \brief (TWI0) Receive Counter Register */ -#define REG_TWI0_TPR REG_ACCESS(RwReg, 0x40018108U) /**< \brief (TWI0) Transmit Pointer Register */ -#define REG_TWI0_TCR REG_ACCESS(RwReg, 0x4001810CU) /**< \brief (TWI0) Transmit Counter Register */ -#define REG_TWI0_RNPR REG_ACCESS(RwReg, 0x40018110U) /**< \brief (TWI0) Receive Next Pointer Register */ -#define REG_TWI0_RNCR REG_ACCESS(RwReg, 0x40018114U) /**< \brief (TWI0) Receive Next Counter Register */ -#define REG_TWI0_TNPR REG_ACCESS(RwReg, 0x40018118U) /**< \brief (TWI0) Transmit Next Pointer Register */ -#define REG_TWI0_TNCR REG_ACCESS(RwReg, 0x4001811CU) /**< \brief (TWI0) Transmit Next Counter Register */ -#define REG_TWI0_PTCR REG_ACCESS(WoReg, 0x40018120U) /**< \brief (TWI0) Transfer Control Register */ -#define REG_TWI0_PTSR REG_ACCESS(RoReg, 0x40018124U) /**< \brief (TWI0) Transfer Status Register */ -/* ========== Register definition for TWI1 peripheral ========== */ -#define REG_TWI1_CR REG_ACCESS(WoReg, 0x4001C000U) /**< \brief (TWI1) Control Register */ -#define REG_TWI1_MMR REG_ACCESS(RwReg, 0x4001C004U) /**< \brief (TWI1) Master Mode Register */ -#define REG_TWI1_SMR REG_ACCESS(RwReg, 0x4001C008U) /**< \brief (TWI1) Slave Mode Register */ -#define REG_TWI1_IADR REG_ACCESS(RwReg, 0x4001C00CU) /**< \brief (TWI1) Internal Address Register */ -#define REG_TWI1_CWGR REG_ACCESS(RwReg, 0x4001C010U) /**< \brief (TWI1) Clock Waveform Generator Register */ -#define REG_TWI1_SR REG_ACCESS(RoReg, 0x4001C020U) /**< \brief (TWI1) Status Register */ -#define REG_TWI1_IER REG_ACCESS(WoReg, 0x4001C024U) /**< \brief (TWI1) Interrupt Enable Register */ -#define REG_TWI1_IDR REG_ACCESS(WoReg, 0x4001C028U) /**< \brief (TWI1) Interrupt Disable Register */ -#define REG_TWI1_IMR REG_ACCESS(RoReg, 0x4001C02CU) /**< \brief (TWI1) Interrupt Mask Register */ -#define REG_TWI1_RHR REG_ACCESS(RoReg, 0x4001C030U) /**< \brief (TWI1) Receive Holding Register */ -#define REG_TWI1_THR REG_ACCESS(WoReg, 0x4001C034U) /**< \brief (TWI1) Transmit Holding Register */ -#define REG_TWI1_RPR REG_ACCESS(RwReg, 0x4001C100U) /**< \brief (TWI1) Receive Pointer Register */ -#define REG_TWI1_RCR REG_ACCESS(RwReg, 0x4001C104U) /**< \brief (TWI1) Receive Counter Register */ -#define REG_TWI1_TPR REG_ACCESS(RwReg, 0x4001C108U) /**< \brief (TWI1) Transmit Pointer Register */ -#define REG_TWI1_TCR REG_ACCESS(RwReg, 0x4001C10CU) /**< \brief (TWI1) Transmit Counter Register */ -#define REG_TWI1_RNPR REG_ACCESS(RwReg, 0x4001C110U) /**< \brief (TWI1) Receive Next Pointer Register */ -#define REG_TWI1_RNCR REG_ACCESS(RwReg, 0x4001C114U) /**< \brief (TWI1) Receive Next Counter Register */ -#define REG_TWI1_TNPR REG_ACCESS(RwReg, 0x4001C118U) /**< \brief (TWI1) Transmit Next Pointer Register */ -#define REG_TWI1_TNCR REG_ACCESS(RwReg, 0x4001C11CU) /**< \brief (TWI1) Transmit Next Counter Register */ -#define REG_TWI1_PTCR REG_ACCESS(WoReg, 0x4001C120U) /**< \brief (TWI1) Transfer Control Register */ -#define REG_TWI1_PTSR REG_ACCESS(RoReg, 0x4001C124U) /**< \brief (TWI1) Transfer Status Register */ -/* ========== Register definition for PWM peripheral ========== */ -#define REG_PWM_CLK REG_ACCESS(RwReg, 0x40020000U) /**< \brief (PWM) PWM Clock Register */ -#define REG_PWM_ENA REG_ACCESS(WoReg, 0x40020004U) /**< \brief (PWM) PWM Enable Register */ -#define REG_PWM_DIS REG_ACCESS(WoReg, 0x40020008U) /**< \brief (PWM) PWM Disable Register */ -#define REG_PWM_SR REG_ACCESS(RoReg, 0x4002000CU) /**< \brief (PWM) PWM Status Register */ -#define REG_PWM_IER1 REG_ACCESS(WoReg, 0x40020010U) /**< \brief (PWM) PWM Interrupt Enable Register 1 */ -#define REG_PWM_IDR1 REG_ACCESS(WoReg, 0x40020014U) /**< \brief (PWM) PWM Interrupt Disable Register 1 */ -#define REG_PWM_IMR1 REG_ACCESS(RoReg, 0x40020018U) /**< \brief (PWM) PWM Interrupt Mask Register 1 */ -#define REG_PWM_ISR1 REG_ACCESS(RoReg, 0x4002001CU) /**< \brief (PWM) PWM Interrupt Status Register 1 */ -#define REG_PWM_SCM REG_ACCESS(RwReg, 0x40020020U) /**< \brief (PWM) PWM Sync Channels Mode Register */ -#define REG_PWM_SCUC REG_ACCESS(RwReg, 0x40020028U) /**< \brief (PWM) PWM Sync Channels Update Control Register */ -#define REG_PWM_SCUP REG_ACCESS(RwReg, 0x4002002CU) /**< \brief (PWM) PWM Sync Channels Update Period Register */ -#define REG_PWM_SCUPUPD REG_ACCESS(WoReg, 0x40020030U) /**< \brief (PWM) PWM Sync Channels Update Period Update Register */ -#define REG_PWM_IER2 REG_ACCESS(WoReg, 0x40020034U) /**< \brief (PWM) PWM Interrupt Enable Register 2 */ -#define REG_PWM_IDR2 REG_ACCESS(WoReg, 0x40020038U) /**< \brief (PWM) PWM Interrupt Disable Register 2 */ -#define REG_PWM_IMR2 REG_ACCESS(RoReg, 0x4002003CU) /**< \brief (PWM) PWM Interrupt Mask Register 2 */ -#define REG_PWM_ISR2 REG_ACCESS(RoReg, 0x40020040U) /**< \brief (PWM) PWM Interrupt Status Register 2 */ -#define REG_PWM_OOV REG_ACCESS(RwReg, 0x40020044U) /**< \brief (PWM) PWM Output Override Value Register */ -#define REG_PWM_OS REG_ACCESS(RwReg, 0x40020048U) /**< \brief (PWM) PWM Output Selection Register */ -#define REG_PWM_OSS REG_ACCESS(WoReg, 0x4002004CU) /**< \brief (PWM) PWM Output Selection Set Register */ -#define REG_PWM_OSC REG_ACCESS(WoReg, 0x40020050U) /**< \brief (PWM) PWM Output Selection Clear Register */ -#define REG_PWM_OSSUPD REG_ACCESS(WoReg, 0x40020054U) /**< \brief (PWM) PWM Output Selection Set Update Register */ -#define REG_PWM_OSCUPD REG_ACCESS(WoReg, 0x40020058U) /**< \brief (PWM) PWM Output Selection Clear Update Register */ -#define REG_PWM_FMR REG_ACCESS(RwReg, 0x4002005CU) /**< \brief (PWM) PWM Fault Mode Register */ -#define REG_PWM_FSR REG_ACCESS(RoReg, 0x40020060U) /**< \brief (PWM) PWM Fault Status Register */ -#define REG_PWM_FCR REG_ACCESS(WoReg, 0x40020064U) /**< \brief (PWM) PWM Fault Clear Register */ -#define REG_PWM_FPV REG_ACCESS(RwReg, 0x40020068U) /**< \brief (PWM) PWM Fault Protection Value Register */ -#define REG_PWM_FPE REG_ACCESS(RwReg, 0x4002006CU) /**< \brief (PWM) PWM Fault Protection Enable Register */ -#define REG_PWM_EL0MR REG_ACCESS(RwReg, 0x4002007CU) /**< \brief (PWM) PWM Event Line 0 Mode Register */ -#define REG_PWM_EL1MR REG_ACCESS(RwReg, 0x40020080U) /**< \brief (PWM) PWM Event Line 1 Mode Register */ -#define REG_PWM_SMMR REG_ACCESS(RwReg, 0x400200B0U) /**< \brief (PWM) PWM Stepper Motor Mode Register */ -#define REG_PWM_WPCR REG_ACCESS(WoReg, 0x400200E4U) /**< \brief (PWM) PWM Write Protect Control Register */ -#define REG_PWM_WPSR REG_ACCESS(RoReg, 0x400200E8U) /**< \brief (PWM) PWM Write Protect Status Register */ -#define REG_PWM_RPR REG_ACCESS(RwReg, 0x40020100U) /**< \brief (PWM) Receive Pointer Register */ -#define REG_PWM_RCR REG_ACCESS(RwReg, 0x40020104U) /**< \brief (PWM) Receive Counter Register */ -#define REG_PWM_TPR REG_ACCESS(RwReg, 0x40020108U) /**< \brief (PWM) Transmit Pointer Register */ -#define REG_PWM_TCR REG_ACCESS(RwReg, 0x4002010CU) /**< \brief (PWM) Transmit Counter Register */ -#define REG_PWM_RNPR REG_ACCESS(RwReg, 0x40020110U) /**< \brief (PWM) Receive Next Pointer Register */ -#define REG_PWM_RNCR REG_ACCESS(RwReg, 0x40020114U) /**< \brief (PWM) Receive Next Counter Register */ -#define REG_PWM_TNPR REG_ACCESS(RwReg, 0x40020118U) /**< \brief (PWM) Transmit Next Pointer Register */ -#define REG_PWM_TNCR REG_ACCESS(RwReg, 0x4002011CU) /**< \brief (PWM) Transmit Next Counter Register */ -#define REG_PWM_PTCR REG_ACCESS(WoReg, 0x40020120U) /**< \brief (PWM) Transfer Control Register */ -#define REG_PWM_PTSR REG_ACCESS(RoReg, 0x40020124U) /**< \brief (PWM) Transfer Status Register */ -#define REG_PWM_CMP0V REG_ACCESS(RwReg, 0x40020130U) /**< \brief (PWM) PWM Comparison 0 Value Register */ -#define REG_PWM_CMP0VUPD REG_ACCESS(WoReg, 0x40020134U) /**< \brief (PWM) PWM Comparison 0 Value Update Register */ -#define REG_PWM_CMP0M REG_ACCESS(RwReg, 0x40020138U) /**< \brief (PWM) PWM Comparison 0 Mode Register */ -#define REG_PWM_CMP0MUPD REG_ACCESS(WoReg, 0x4002013CU) /**< \brief (PWM) PWM Comparison 0 Mode Update Register */ -#define REG_PWM_CMP1V REG_ACCESS(RwReg, 0x40020140U) /**< \brief (PWM) PWM Comparison 1 Value Register */ -#define REG_PWM_CMP1VUPD REG_ACCESS(WoReg, 0x40020144U) /**< \brief (PWM) PWM Comparison 1 Value Update Register */ -#define REG_PWM_CMP1M REG_ACCESS(RwReg, 0x40020148U) /**< \brief (PWM) PWM Comparison 1 Mode Register */ -#define REG_PWM_CMP1MUPD REG_ACCESS(WoReg, 0x4002014CU) /**< \brief (PWM) PWM Comparison 1 Mode Update Register */ -#define REG_PWM_CMP2V REG_ACCESS(RwReg, 0x40020150U) /**< \brief (PWM) PWM Comparison 2 Value Register */ -#define REG_PWM_CMP2VUPD REG_ACCESS(WoReg, 0x40020154U) /**< \brief (PWM) PWM Comparison 2 Value Update Register */ -#define REG_PWM_CMP2M REG_ACCESS(RwReg, 0x40020158U) /**< \brief (PWM) PWM Comparison 2 Mode Register */ -#define REG_PWM_CMP2MUPD REG_ACCESS(WoReg, 0x4002015CU) /**< \brief (PWM) PWM Comparison 2 Mode Update Register */ -#define REG_PWM_CMP3V REG_ACCESS(RwReg, 0x40020160U) /**< \brief (PWM) PWM Comparison 3 Value Register */ -#define REG_PWM_CMP3VUPD REG_ACCESS(WoReg, 0x40020164U) /**< \brief (PWM) PWM Comparison 3 Value Update Register */ -#define REG_PWM_CMP3M REG_ACCESS(RwReg, 0x40020168U) /**< \brief (PWM) PWM Comparison 3 Mode Register */ -#define REG_PWM_CMP3MUPD REG_ACCESS(WoReg, 0x4002016CU) /**< \brief (PWM) PWM Comparison 3 Mode Update Register */ -#define REG_PWM_CMP4V REG_ACCESS(RwReg, 0x40020170U) /**< \brief (PWM) PWM Comparison 4 Value Register */ -#define REG_PWM_CMP4VUPD REG_ACCESS(WoReg, 0x40020174U) /**< \brief (PWM) PWM Comparison 4 Value Update Register */ -#define REG_PWM_CMP4M REG_ACCESS(RwReg, 0x40020178U) /**< \brief (PWM) PWM Comparison 4 Mode Register */ -#define REG_PWM_CMP4MUPD REG_ACCESS(WoReg, 0x4002017CU) /**< \brief (PWM) PWM Comparison 4 Mode Update Register */ -#define REG_PWM_CMP5V REG_ACCESS(RwReg, 0x40020180U) /**< \brief (PWM) PWM Comparison 5 Value Register */ -#define REG_PWM_CMP5VUPD REG_ACCESS(WoReg, 0x40020184U) /**< \brief (PWM) PWM Comparison 5 Value Update Register */ -#define REG_PWM_CMP5M REG_ACCESS(RwReg, 0x40020188U) /**< \brief (PWM) PWM Comparison 5 Mode Register */ -#define REG_PWM_CMP5MUPD REG_ACCESS(WoReg, 0x4002018CU) /**< \brief (PWM) PWM Comparison 5 Mode Update Register */ -#define REG_PWM_CMP6V REG_ACCESS(RwReg, 0x40020190U) /**< \brief (PWM) PWM Comparison 6 Value Register */ -#define REG_PWM_CMP6VUPD REG_ACCESS(WoReg, 0x40020194U) /**< \brief (PWM) PWM Comparison 6 Value Update Register */ -#define REG_PWM_CMP6M REG_ACCESS(RwReg, 0x40020198U) /**< \brief (PWM) PWM Comparison 6 Mode Register */ -#define REG_PWM_CMP6MUPD REG_ACCESS(WoReg, 0x4002019CU) /**< \brief (PWM) PWM Comparison 6 Mode Update Register */ -#define REG_PWM_CMP7V REG_ACCESS(RwReg, 0x400201A0U) /**< \brief (PWM) PWM Comparison 7 Value Register */ -#define REG_PWM_CMP7VUPD REG_ACCESS(WoReg, 0x400201A4U) /**< \brief (PWM) PWM Comparison 7 Value Update Register */ -#define REG_PWM_CMP7M REG_ACCESS(RwReg, 0x400201A8U) /**< \brief (PWM) PWM Comparison 7 Mode Register */ -#define REG_PWM_CMP7MUPD REG_ACCESS(WoReg, 0x400201ACU) /**< \brief (PWM) PWM Comparison 7 Mode Update Register */ -#define REG_PWM_CMR0 REG_ACCESS(RwReg, 0x40020200U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 0) */ -#define REG_PWM_CDTY0 REG_ACCESS(RwReg, 0x40020204U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */ -#define REG_PWM_CDTYUPD0 REG_ACCESS(WoReg, 0x40020208U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 0) */ -#define REG_PWM_CPRD0 REG_ACCESS(RwReg, 0x4002020CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 0) */ -#define REG_PWM_CPRDUPD0 REG_ACCESS(WoReg, 0x40020210U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 0) */ -#define REG_PWM_CCNT0 REG_ACCESS(RoReg, 0x40020214U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 0) */ -#define REG_PWM_DT0 REG_ACCESS(RwReg, 0x40020218U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 0) */ -#define REG_PWM_DTUPD0 REG_ACCESS(WoReg, 0x4002021CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 0) */ -#define REG_PWM_CMR1 REG_ACCESS(RwReg, 0x40020220U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 1) */ -#define REG_PWM_CDTY1 REG_ACCESS(RwReg, 0x40020224U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */ -#define REG_PWM_CDTYUPD1 REG_ACCESS(WoReg, 0x40020228U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 1) */ -#define REG_PWM_CPRD1 REG_ACCESS(RwReg, 0x4002022CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 1) */ -#define REG_PWM_CPRDUPD1 REG_ACCESS(WoReg, 0x40020230U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 1) */ -#define REG_PWM_CCNT1 REG_ACCESS(RoReg, 0x40020234U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 1) */ -#define REG_PWM_DT1 REG_ACCESS(RwReg, 0x40020238U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 1) */ -#define REG_PWM_DTUPD1 REG_ACCESS(WoReg, 0x4002023CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 1) */ -#define REG_PWM_CMR2 REG_ACCESS(RwReg, 0x40020240U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 2) */ -#define REG_PWM_CDTY2 REG_ACCESS(RwReg, 0x40020244U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */ -#define REG_PWM_CDTYUPD2 REG_ACCESS(WoReg, 0x40020248U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 2) */ -#define REG_PWM_CPRD2 REG_ACCESS(RwReg, 0x4002024CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 2) */ -#define REG_PWM_CPRDUPD2 REG_ACCESS(WoReg, 0x40020250U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 2) */ -#define REG_PWM_CCNT2 REG_ACCESS(RoReg, 0x40020254U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 2) */ -#define REG_PWM_DT2 REG_ACCESS(RwReg, 0x40020258U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 2) */ -#define REG_PWM_DTUPD2 REG_ACCESS(WoReg, 0x4002025CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 2) */ -#define REG_PWM_CMR3 REG_ACCESS(RwReg, 0x40020260U) /**< \brief (PWM) PWM Channel Mode Register (ch_num = 3) */ -#define REG_PWM_CDTY3 REG_ACCESS(RwReg, 0x40020264U) /**< \brief (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */ -#define REG_PWM_CDTYUPD3 REG_ACCESS(WoReg, 0x40020268U) /**< \brief (PWM) PWM Channel Duty Cycle Update Register (ch_num = 3) */ -#define REG_PWM_CPRD3 REG_ACCESS(RwReg, 0x4002026CU) /**< \brief (PWM) PWM Channel Period Register (ch_num = 3) */ -#define REG_PWM_CPRDUPD3 REG_ACCESS(WoReg, 0x40020270U) /**< \brief (PWM) PWM Channel Period Update Register (ch_num = 3) */ -#define REG_PWM_CCNT3 REG_ACCESS(RoReg, 0x40020274U) /**< \brief (PWM) PWM Channel Counter Register (ch_num = 3) */ -#define REG_PWM_DT3 REG_ACCESS(RwReg, 0x40020278U) /**< \brief (PWM) PWM Channel Dead Time Register (ch_num = 3) */ -#define REG_PWM_DTUPD3 REG_ACCESS(WoReg, 0x4002027CU) /**< \brief (PWM) PWM Channel Dead Time Update Register (ch_num = 3) */ -/* ========== Register definition for USART0 peripheral ========== */ -#define REG_USART0_CR REG_ACCESS(WoReg, 0x40024000U) /**< \brief (USART0) Control Register */ -#define REG_USART0_MR REG_ACCESS(RwReg, 0x40024004U) /**< \brief (USART0) Mode Register */ -#define REG_USART0_IER REG_ACCESS(WoReg, 0x40024008U) /**< \brief (USART0) Interrupt Enable Register */ -#define REG_USART0_IDR REG_ACCESS(WoReg, 0x4002400CU) /**< \brief (USART0) Interrupt Disable Register */ -#define REG_USART0_IMR REG_ACCESS(RoReg, 0x40024010U) /**< \brief (USART0) Interrupt Mask Register */ -#define REG_USART0_CSR REG_ACCESS(RoReg, 0x40024014U) /**< \brief (USART0) Channel Status Register */ -#define REG_USART0_RHR REG_ACCESS(RoReg, 0x40024018U) /**< \brief (USART0) Receiver Holding Register */ -#define REG_USART0_THR REG_ACCESS(WoReg, 0x4002401CU) /**< \brief (USART0) Transmitter Holding Register */ -#define REG_USART0_BRGR REG_ACCESS(RwReg, 0x40024020U) /**< \brief (USART0) Baud Rate Generator Register */ -#define REG_USART0_RTOR REG_ACCESS(RwReg, 0x40024024U) /**< \brief (USART0) Receiver Time-out Register */ -#define REG_USART0_TTGR REG_ACCESS(RwReg, 0x40024028U) /**< \brief (USART0) Transmitter Timeguard Register */ -#define REG_USART0_FIDI REG_ACCESS(RwReg, 0x40024040U) /**< \brief (USART0) FI DI Ratio Register */ -#define REG_USART0_NER REG_ACCESS(RoReg, 0x40024044U) /**< \brief (USART0) Number of Errors Register */ -#define REG_USART0_IF REG_ACCESS(RwReg, 0x4002404CU) /**< \brief (USART0) IrDA Filter Register */ -#define REG_USART0_MAN REG_ACCESS(RwReg, 0x40024050U) /**< \brief (USART0) Manchester Encoder Decoder Register */ -#define REG_USART0_WPMR REG_ACCESS(RwReg, 0x400240E4U) /**< \brief (USART0) Write Protect Mode Register */ -#define REG_USART0_WPSR REG_ACCESS(RoReg, 0x400240E8U) /**< \brief (USART0) Write Protect Status Register */ -#define REG_USART0_RPR REG_ACCESS(RwReg, 0x40024100U) /**< \brief (USART0) Receive Pointer Register */ -#define REG_USART0_RCR REG_ACCESS(RwReg, 0x40024104U) /**< \brief (USART0) Receive Counter Register */ -#define REG_USART0_TPR REG_ACCESS(RwReg, 0x40024108U) /**< \brief (USART0) Transmit Pointer Register */ -#define REG_USART0_TCR REG_ACCESS(RwReg, 0x4002410CU) /**< \brief (USART0) Transmit Counter Register */ -#define REG_USART0_RNPR REG_ACCESS(RwReg, 0x40024110U) /**< \brief (USART0) Receive Next Pointer Register */ -#define REG_USART0_RNCR REG_ACCESS(RwReg, 0x40024114U) /**< \brief (USART0) Receive Next Counter Register */ -#define REG_USART0_TNPR REG_ACCESS(RwReg, 0x40024118U) /**< \brief (USART0) Transmit Next Pointer Register */ -#define REG_USART0_TNCR REG_ACCESS(RwReg, 0x4002411CU) /**< \brief (USART0) Transmit Next Counter Register */ -#define REG_USART0_PTCR REG_ACCESS(WoReg, 0x40024120U) /**< \brief (USART0) Transfer Control Register */ -#define REG_USART0_PTSR REG_ACCESS(RoReg, 0x40024124U) /**< \brief (USART0) Transfer Status Register */ -/* ========== Register definition for USART1 peripheral ========== */ -#define REG_USART1_CR REG_ACCESS(WoReg, 0x40028000U) /**< \brief (USART1) Control Register */ -#define REG_USART1_MR REG_ACCESS(RwReg, 0x40028004U) /**< \brief (USART1) Mode Register */ -#define REG_USART1_IER REG_ACCESS(WoReg, 0x40028008U) /**< \brief (USART1) Interrupt Enable Register */ -#define REG_USART1_IDR REG_ACCESS(WoReg, 0x4002800CU) /**< \brief (USART1) Interrupt Disable Register */ -#define REG_USART1_IMR REG_ACCESS(RoReg, 0x40028010U) /**< \brief (USART1) Interrupt Mask Register */ -#define REG_USART1_CSR REG_ACCESS(RoReg, 0x40028014U) /**< \brief (USART1) Channel Status Register */ -#define REG_USART1_RHR REG_ACCESS(RoReg, 0x40028018U) /**< \brief (USART1) Receiver Holding Register */ -#define REG_USART1_THR REG_ACCESS(WoReg, 0x4002801CU) /**< \brief (USART1) Transmitter Holding Register */ -#define REG_USART1_BRGR REG_ACCESS(RwReg, 0x40028020U) /**< \brief (USART1) Baud Rate Generator Register */ -#define REG_USART1_RTOR REG_ACCESS(RwReg, 0x40028024U) /**< \brief (USART1) Receiver Time-out Register */ -#define REG_USART1_TTGR REG_ACCESS(RwReg, 0x40028028U) /**< \brief (USART1) Transmitter Timeguard Register */ -#define REG_USART1_FIDI REG_ACCESS(RwReg, 0x40028040U) /**< \brief (USART1) FI DI Ratio Register */ -#define REG_USART1_NER REG_ACCESS(RoReg, 0x40028044U) /**< \brief (USART1) Number of Errors Register */ -#define REG_USART1_IF REG_ACCESS(RwReg, 0x4002804CU) /**< \brief (USART1) IrDA Filter Register */ -#define REG_USART1_MAN REG_ACCESS(RwReg, 0x40028050U) /**< \brief (USART1) Manchester Encoder Decoder Register */ -#define REG_USART1_WPMR REG_ACCESS(RwReg, 0x400280E4U) /**< \brief (USART1) Write Protect Mode Register */ -#define REG_USART1_WPSR REG_ACCESS(RoReg, 0x400280E8U) /**< \brief (USART1) Write Protect Status Register */ -#define REG_USART1_RPR REG_ACCESS(RwReg, 0x40028100U) /**< \brief (USART1) Receive Pointer Register */ -#define REG_USART1_RCR REG_ACCESS(RwReg, 0x40028104U) /**< \brief (USART1) Receive Counter Register */ -#define REG_USART1_TPR REG_ACCESS(RwReg, 0x40028108U) /**< \brief (USART1) Transmit Pointer Register */ -#define REG_USART1_TCR REG_ACCESS(RwReg, 0x4002810CU) /**< \brief (USART1) Transmit Counter Register */ -#define REG_USART1_RNPR REG_ACCESS(RwReg, 0x40028110U) /**< \brief (USART1) Receive Next Pointer Register */ -#define REG_USART1_RNCR REG_ACCESS(RwReg, 0x40028114U) /**< \brief (USART1) Receive Next Counter Register */ -#define REG_USART1_TNPR REG_ACCESS(RwReg, 0x40028118U) /**< \brief (USART1) Transmit Next Pointer Register */ -#define REG_USART1_TNCR REG_ACCESS(RwReg, 0x4002811CU) /**< \brief (USART1) Transmit Next Counter Register */ -#define REG_USART1_PTCR REG_ACCESS(WoReg, 0x40028120U) /**< \brief (USART1) Transfer Control Register */ -#define REG_USART1_PTSR REG_ACCESS(RoReg, 0x40028124U) /**< \brief (USART1) Transfer Status Register */ -/* ========== Register definition for UDP peripheral ========== */ -#define REG_UDP_FRM_NUM REG_ACCESS(RoReg, 0x40034000U) /**< \brief (UDP) Frame Number Register */ -#define REG_UDP_GLB_STAT REG_ACCESS(RwReg, 0x40034004U) /**< \brief (UDP) Global State Register */ -#define REG_UDP_FADDR REG_ACCESS(RwReg, 0x40034008U) /**< \brief (UDP) Function Address Register */ -#define REG_UDP_IER REG_ACCESS(WoReg, 0x40034010U) /**< \brief (UDP) Interrupt Enable Register */ -#define REG_UDP_IDR REG_ACCESS(WoReg, 0x40034014U) /**< \brief (UDP) Interrupt Disable Register */ -#define REG_UDP_IMR REG_ACCESS(RoReg, 0x40034018U) /**< \brief (UDP) Interrupt Mask Register */ -#define REG_UDP_ISR REG_ACCESS(RoReg, 0x4003401CU) /**< \brief (UDP) Interrupt Status Register */ -#define REG_UDP_ICR REG_ACCESS(WoReg, 0x40034020U) /**< \brief (UDP) Interrupt Clear Register */ -#define REG_UDP_RST_EP REG_ACCESS(RwReg, 0x40034028U) /**< \brief (UDP) Reset Endpoint Register */ -#define REG_UDP_CSR REG_ACCESS(RwReg, 0x40034030U) /**< \brief (UDP) Endpoint Control and Status Register */ -#define REG_UDP_FDR REG_ACCESS(RwReg, 0x40034050U) /**< \brief (UDP) Endpoint FIFO Data Register */ -#define REG_UDP_TXVC REG_ACCESS(RwReg, 0x40034074U) /**< \brief (UDP) Transceiver Control Register */ -/* ========== Register definition for ADC peripheral ========== */ -#define REG_ADC_CR REG_ACCESS(WoReg, 0x40038000U) /**< \brief (ADC) Control Register */ -#define REG_ADC_MR REG_ACCESS(RwReg, 0x40038004U) /**< \brief (ADC) Mode Register */ -#define REG_ADC_SEQR1 REG_ACCESS(RwReg, 0x40038008U) /**< \brief (ADC) Channel Sequence Register 1 */ -#define REG_ADC_SEQR2 REG_ACCESS(RwReg, 0x4003800CU) /**< \brief (ADC) Channel Sequence Register 2 */ -#define REG_ADC_CHER REG_ACCESS(WoReg, 0x40038010U) /**< \brief (ADC) Channel Enable Register */ -#define REG_ADC_CHDR REG_ACCESS(WoReg, 0x40038014U) /**< \brief (ADC) Channel Disable Register */ -#define REG_ADC_CHSR REG_ACCESS(RoReg, 0x40038018U) /**< \brief (ADC) Channel Status Register */ -#define REG_ADC_LCDR REG_ACCESS(RoReg, 0x40038020U) /**< \brief (ADC) Last Converted Data Register */ -#define REG_ADC_IER REG_ACCESS(WoReg, 0x40038024U) /**< \brief (ADC) Interrupt Enable Register */ -#define REG_ADC_IDR REG_ACCESS(WoReg, 0x40038028U) /**< \brief (ADC) Interrupt Disable Register */ -#define REG_ADC_IMR REG_ACCESS(RoReg, 0x4003802CU) /**< \brief (ADC) Interrupt Mask Register */ -#define REG_ADC_ISR REG_ACCESS(RoReg, 0x40038030U) /**< \brief (ADC) Interrupt Status Register */ -#define REG_ADC_OVER REG_ACCESS(RoReg, 0x4003803CU) /**< \brief (ADC) Overrun Status Register */ -#define REG_ADC_EMR REG_ACCESS(RwReg, 0x40038040U) /**< \brief (ADC) Extended Mode Register */ -#define REG_ADC_CWR REG_ACCESS(RwReg, 0x40038044U) /**< \brief (ADC) Compare Window Register */ -#define REG_ADC_CGR REG_ACCESS(RwReg, 0x40038048U) /**< \brief (ADC) Channel Gain Register */ -#define REG_ADC_COR REG_ACCESS(RwReg, 0x4003804CU) /**< \brief (ADC) Channel Offset Register */ -#define REG_ADC_CDR REG_ACCESS(RoReg, 0x40038050U) /**< \brief (ADC) Channel Data Register */ -#define REG_ADC_ACR REG_ACCESS(RwReg, 0x40038094U) /**< \brief (ADC) Analog Control Register */ -#define REG_ADC_WPMR REG_ACCESS(RwReg, 0x400380E4U) /**< \brief (ADC) Write Protect Mode Register */ -#define REG_ADC_WPSR REG_ACCESS(RoReg, 0x400380E8U) /**< \brief (ADC) Write Protect Status Register */ -#define REG_ADC_RPR REG_ACCESS(RwReg, 0x40038100U) /**< \brief (ADC) Receive Pointer Register */ -#define REG_ADC_RCR REG_ACCESS(RwReg, 0x40038104U) /**< \brief (ADC) Receive Counter Register */ -#define REG_ADC_TPR REG_ACCESS(RwReg, 0x40038108U) /**< \brief (ADC) Transmit Pointer Register */ -#define REG_ADC_TCR REG_ACCESS(RwReg, 0x4003810CU) /**< \brief (ADC) Transmit Counter Register */ -#define REG_ADC_RNPR REG_ACCESS(RwReg, 0x40038110U) /**< \brief (ADC) Receive Next Pointer Register */ -#define REG_ADC_RNCR REG_ACCESS(RwReg, 0x40038114U) /**< \brief (ADC) Receive Next Counter Register */ -#define REG_ADC_TNPR REG_ACCESS(RwReg, 0x40038118U) /**< \brief (ADC) Transmit Next Pointer Register */ -#define REG_ADC_TNCR REG_ACCESS(RwReg, 0x4003811CU) /**< \brief (ADC) Transmit Next Counter Register */ -#define REG_ADC_PTCR REG_ACCESS(WoReg, 0x40038120U) /**< \brief (ADC) Transfer Control Register */ -#define REG_ADC_PTSR REG_ACCESS(RoReg, 0x40038124U) /**< \brief (ADC) Transfer Status Register */ -/* ========== Register definition for DACC peripheral ========== */ -#define REG_DACC_CR REG_ACCESS(WoReg, 0x4003C000U) /**< \brief (DACC) Control Register */ -#define REG_DACC_MR REG_ACCESS(RwReg, 0x4003C004U) /**< \brief (DACC) Mode Register */ -#define REG_DACC_CHER REG_ACCESS(WoReg, 0x4003C010U) /**< \brief (DACC) Channel Enable Register */ -#define REG_DACC_CHDR REG_ACCESS(WoReg, 0x4003C014U) /**< \brief (DACC) Channel Disable Register */ -#define REG_DACC_CHSR REG_ACCESS(RoReg, 0x4003C018U) /**< \brief (DACC) Channel Status Register */ -#define REG_DACC_CDR REG_ACCESS(WoReg, 0x4003C020U) /**< \brief (DACC) Conversion Data Register */ -#define REG_DACC_IER REG_ACCESS(WoReg, 0x4003C024U) /**< \brief (DACC) Interrupt Enable Register */ -#define REG_DACC_IDR REG_ACCESS(WoReg, 0x4003C028U) /**< \brief (DACC) Interrupt Disable Register */ -#define REG_DACC_IMR REG_ACCESS(RoReg, 0x4003C02CU) /**< \brief (DACC) Interrupt Mask Register */ -#define REG_DACC_ISR REG_ACCESS(RoReg, 0x4003C030U) /**< \brief (DACC) Interrupt Status Register */ -#define REG_DACC_ACR REG_ACCESS(RwReg, 0x4003C094U) /**< \brief (DACC) Analog Current Register */ -#define REG_DACC_WPMR REG_ACCESS(RwReg, 0x4003C0E4U) /**< \brief (DACC) Write Protect Mode register */ -#define REG_DACC_WPSR REG_ACCESS(RoReg, 0x4003C0E8U) /**< \brief (DACC) Write Protect Status register */ -#define REG_DACC_RPR REG_ACCESS(RwReg, 0x4003C100U) /**< \brief (DACC) Receive Pointer Register */ -#define REG_DACC_RCR REG_ACCESS(RwReg, 0x4003C104U) /**< \brief (DACC) Receive Counter Register */ -#define REG_DACC_TPR REG_ACCESS(RwReg, 0x4003C108U) /**< \brief (DACC) Transmit Pointer Register */ -#define REG_DACC_TCR REG_ACCESS(RwReg, 0x4003C10CU) /**< \brief (DACC) Transmit Counter Register */ -#define REG_DACC_RNPR REG_ACCESS(RwReg, 0x4003C110U) /**< \brief (DACC) Receive Next Pointer Register */ -#define REG_DACC_RNCR REG_ACCESS(RwReg, 0x4003C114U) /**< \brief (DACC) Receive Next Counter Register */ -#define REG_DACC_TNPR REG_ACCESS(RwReg, 0x4003C118U) /**< \brief (DACC) Transmit Next Pointer Register */ -#define REG_DACC_TNCR REG_ACCESS(RwReg, 0x4003C11CU) /**< \brief (DACC) Transmit Next Counter Register */ -#define REG_DACC_PTCR REG_ACCESS(WoReg, 0x4003C120U) /**< \brief (DACC) Transfer Control Register */ -#define REG_DACC_PTSR REG_ACCESS(RoReg, 0x4003C124U) /**< \brief (DACC) Transfer Status Register */ -/* ========== Register definition for ACC peripheral ========== */ -#define REG_ACC_CR REG_ACCESS(WoReg, 0x40040000U) /**< \brief (ACC) Control Register */ -#define REG_ACC_MR REG_ACCESS(RwReg, 0x40040004U) /**< \brief (ACC) Mode Register */ -#define REG_ACC_IER REG_ACCESS(WoReg, 0x40040024U) /**< \brief (ACC) Interrupt Enable Register */ -#define REG_ACC_IDR REG_ACCESS(WoReg, 0x40040028U) /**< \brief (ACC) Interrupt Disable Register */ -#define REG_ACC_IMR REG_ACCESS(RoReg, 0x4004002CU) /**< \brief (ACC) Interrupt Mask Register */ -#define REG_ACC_ISR REG_ACCESS(RoReg, 0x40040030U) /**< \brief (ACC) Interrupt Status Register */ -#define REG_ACC_ACR REG_ACCESS(RwReg, 0x40040094U) /**< \brief (ACC) Analog Control Register */ -#define REG_ACC_WPMR REG_ACCESS(RwReg, 0x400400E4U) /**< \brief (ACC) Write Protect Mode Register */ -#define REG_ACC_WPSR REG_ACCESS(RoReg, 0x400400E8U) /**< \brief (ACC) Write Protect Status Register */ -/* ========== Register definition for CRCCU peripheral ========== */ -#define REG_CRCCU_DSCR REG_ACCESS(RwReg, 0x40044000U) /**< \brief (CRCCU) CRCCU Descriptor Base Register */ -#define REG_CRCCU_DMA_EN REG_ACCESS(WoReg, 0x40044008U) /**< \brief (CRCCU) CRCCU DMA Enable Register */ -#define REG_CRCCU_DMA_DIS REG_ACCESS(WoReg, 0x4004400CU) /**< \brief (CRCCU) CRCCU DMA Disable Register */ -#define REG_CRCCU_DMA_SR REG_ACCESS(RoReg, 0x40044010U) /**< \brief (CRCCU) CRCCU DMA Status Register */ -#define REG_CRCCU_DMA_IER REG_ACCESS(WoReg, 0x40044014U) /**< \brief (CRCCU) CRCCU DMA Interrupt Enable Register */ -#define REG_CRCCU_DMA_IDR REG_ACCESS(WoReg, 0x40044018U) /**< \brief (CRCCU) CRCCU DMA Interrupt Disable Register */ -#define REG_CRCCU_DMA_IMR REG_ACCESS(RoReg, 0x4004401CU) /**< \brief (CRCCU) CRCCU DMA Interrupt Mask Register */ -#define REG_CRCCU_DMA_ISR REG_ACCESS(RoReg, 0x40044020U) /**< \brief (CRCCU) CRCCU DMA Interrupt Status Register */ -#define REG_CRCCU_CR REG_ACCESS(WoReg, 0x40044034U) /**< \brief (CRCCU) CRCCU Control Register */ -#define REG_CRCCU_MR REG_ACCESS(RwReg, 0x40044038U) /**< \brief (CRCCU) CRCCU Mode Register */ -#define REG_CRCCU_SR REG_ACCESS(RoReg, 0x4004403CU) /**< \brief (CRCCU) CRCCU Status Register */ -#define REG_CRCCU_IER REG_ACCESS(WoReg, 0x40044040U) /**< \brief (CRCCU) CRCCU Interrupt Enable Register */ -#define REG_CRCCU_IDR REG_ACCESS(WoReg, 0x40044044U) /**< \brief (CRCCU) CRCCU Interrupt Disable Register */ -#define REG_CRCCU_IMR REG_ACCESS(RoReg, 0x40044048U) /**< \brief (CRCCU) CRCCU Interrupt Mask Register */ -#define REG_CRCCU_ISR REG_ACCESS(RoReg, 0x4004404CU) /**< \brief (CRCCU) CRCCU Interrupt Status Register */ -/* ========== Register definition for SMC peripheral ========== */ -#define REG_SMC_SETUP0 REG_ACCESS(RwReg, 0x400E0000U) /**< \brief (SMC) SMC Setup Register (CS_number = 0) */ -#define REG_SMC_PULSE0 REG_ACCESS(RwReg, 0x400E0004U) /**< \brief (SMC) SMC Pulse Register (CS_number = 0) */ -#define REG_SMC_CYCLE0 REG_ACCESS(RwReg, 0x400E0008U) /**< \brief (SMC) SMC Cycle Register (CS_number = 0) */ -#define REG_SMC_MODE0 REG_ACCESS(RwReg, 0x400E000CU) /**< \brief (SMC) SMC Mode Register (CS_number = 0) */ -#define REG_SMC_SETUP1 REG_ACCESS(RwReg, 0x400E0010U) /**< \brief (SMC) SMC Setup Register (CS_number = 1) */ -#define REG_SMC_PULSE1 REG_ACCESS(RwReg, 0x400E0014U) /**< \brief (SMC) SMC Pulse Register (CS_number = 1) */ -#define REG_SMC_CYCLE1 REG_ACCESS(RwReg, 0x400E0018U) /**< \brief (SMC) SMC Cycle Register (CS_number = 1) */ -#define REG_SMC_MODE1 REG_ACCESS(RwReg, 0x400E001CU) /**< \brief (SMC) SMC Mode Register (CS_number = 1) */ -#define REG_SMC_SETUP2 REG_ACCESS(RwReg, 0x400E0020U) /**< \brief (SMC) SMC Setup Register (CS_number = 2) */ -#define REG_SMC_PULSE2 REG_ACCESS(RwReg, 0x400E0024U) /**< \brief (SMC) SMC Pulse Register (CS_number = 2) */ -#define REG_SMC_CYCLE2 REG_ACCESS(RwReg, 0x400E0028U) /**< \brief (SMC) SMC Cycle Register (CS_number = 2) */ -#define REG_SMC_MODE2 REG_ACCESS(RwReg, 0x400E002CU) /**< \brief (SMC) SMC Mode Register (CS_number = 2) */ -#define REG_SMC_SETUP3 REG_ACCESS(RwReg, 0x400E0030U) /**< \brief (SMC) SMC Setup Register (CS_number = 3) */ -#define REG_SMC_PULSE3 REG_ACCESS(RwReg, 0x400E0034U) /**< \brief (SMC) SMC Pulse Register (CS_number = 3) */ -#define REG_SMC_CYCLE3 REG_ACCESS(RwReg, 0x400E0038U) /**< \brief (SMC) SMC Cycle Register (CS_number = 3) */ -#define REG_SMC_MODE3 REG_ACCESS(RwReg, 0x400E003CU) /**< \brief (SMC) SMC Mode Register (CS_number = 3) */ -#define REG_SMC_SETUP4 REG_ACCESS(RwReg, 0x400E0040U) /**< \brief (SMC) SMC Setup Register (CS_number = 4) */ -#define REG_SMC_PULSE4 REG_ACCESS(RwReg, 0x400E0044U) /**< \brief (SMC) SMC Pulse Register (CS_number = 4) */ -#define REG_SMC_CYCLE4 REG_ACCESS(RwReg, 0x400E0048U) /**< \brief (SMC) SMC Cycle Register (CS_number = 4) */ -#define REG_SMC_MODE4 REG_ACCESS(RwReg, 0x400E004CU) /**< \brief (SMC) SMC Mode Register (CS_number = 4) */ -#define REG_SMC_OCMS REG_ACCESS(RwReg, 0x400E0080U) /**< \brief (SMC) SMC OCMS MODE Register */ -#define REG_SMC_KEY1 REG_ACCESS(WoReg, 0x400E0084U) /**< \brief (SMC) SMC OCMS KEY1 Register */ -#define REG_SMC_KEY2 REG_ACCESS(WoReg, 0x400E0088U) /**< \brief (SMC) SMC OCMS KEY2 Register */ -#define REG_SMC_WPMR REG_ACCESS(RwReg, 0x400E00E4U) /**< \brief (SMC) SMC Write Protect Mode Register */ -#define REG_SMC_WPSR REG_ACCESS(RoReg, 0x400E00E8U) /**< \brief (SMC) SMC Write Protect Status Register */ -/* ========== Register definition for MATRIX peripheral ========== */ -#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /**< \brief (MATRIX) Master Configuration Register */ -#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /**< \brief (MATRIX) Slave Configuration Register */ -#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /**< \brief (MATRIX) Priority Register A for Slave 0 */ -#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /**< \brief (MATRIX) Priority Register A for Slave 1 */ -#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /**< \brief (MATRIX) Priority Register A for Slave 2 */ -#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /**< \brief (MATRIX) Priority Register A for Slave 3 */ -#define REG_MATRIX_PRAS4 REG_ACCESS(RwReg, 0x400E02A0U) /**< \brief (MATRIX) Priority Register A for Slave 4 */ -#define REG_MATRIX_SYSIO REG_ACCESS(RwReg, 0x400E0314U) /**< \brief (MATRIX) System I/O Configuration register */ -#define REG_MATRIX_SMCNFCS REG_ACCESS(RwReg, 0x400E031CU) /**< \brief (MATRIX) SMC Chip Select NAND Flash Assignment Register */ -#define REG_MATRIX_WPMR REG_ACCESS(RwReg, 0x400E03E4U) /**< \brief (MATRIX) Write Protect Mode Register */ -#define REG_MATRIX_WPSR REG_ACCESS(RoReg, 0x400E03E8U) /**< \brief (MATRIX) Write Protect Status Register */ -/* ========== Register definition for PMC peripheral ========== */ -#define REG_PMC_SCER REG_ACCESS(WoReg, 0x400E0400U) /**< \brief (PMC) System Clock Enable Register */ -#define REG_PMC_SCDR REG_ACCESS(WoReg, 0x400E0404U) /**< \brief (PMC) System Clock Disable Register */ -#define REG_PMC_SCSR REG_ACCESS(RoReg, 0x400E0408U) /**< \brief (PMC) System Clock Status Register */ -#define REG_PMC_PCER0 REG_ACCESS(WoReg, 0x400E0410U) /**< \brief (PMC) Peripheral Clock Enable Register 0 */ -#define REG_PMC_PCDR0 REG_ACCESS(WoReg, 0x400E0414U) /**< \brief (PMC) Peripheral Clock Disable Register 0 */ -#define REG_PMC_PCSR0 REG_ACCESS(RoReg, 0x400E0418U) /**< \brief (PMC) Peripheral Clock Status Register 0 */ -#define REG_PMC_MOR REG_ACCESS(RwReg, 0x400E0420U) /**< \brief (PMC) Main Oscillator Register */ -#define REG_PMC_MCFR REG_ACCESS(RoReg, 0x400E0424U) /**< \brief (PMC) Main Clock Frequency Register */ -#define REG_PMC_PLLAR REG_ACCESS(RwReg, 0x400E0428U) /**< \brief (PMC) PLLA Register */ -#define REG_PMC_PLLBR REG_ACCESS(RwReg, 0x400E042CU) /**< \brief (PMC) PLLB Register */ -#define REG_PMC_MCKR REG_ACCESS(RwReg, 0x400E0430U) /**< \brief (PMC) Master Clock Register */ -#define REG_PMC_USB REG_ACCESS(RwReg, 0x400E0438U) /**< \brief (PMC) USB Clock Register */ -#define REG_PMC_PCK REG_ACCESS(RwReg, 0x400E0440U) /**< \brief (PMC) Programmable Clock 0 Register */ -#define REG_PMC_IER REG_ACCESS(WoReg, 0x400E0460U) /**< \brief (PMC) Interrupt Enable Register */ -#define REG_PMC_IDR REG_ACCESS(WoReg, 0x400E0464U) /**< \brief (PMC) Interrupt Disable Register */ -#define REG_PMC_SR REG_ACCESS(RoReg, 0x400E0468U) /**< \brief (PMC) Status Register */ -#define REG_PMC_IMR REG_ACCESS(RoReg, 0x400E046CU) /**< \brief (PMC) Interrupt Mask Register */ -#define REG_PMC_FSMR REG_ACCESS(RwReg, 0x400E0470U) /**< \brief (PMC) Fast Startup Mode Register */ -#define REG_PMC_FSPR REG_ACCESS(RwReg, 0x400E0474U) /**< \brief (PMC) Fast Startup Polarity Register */ -#define REG_PMC_FOCR REG_ACCESS(WoReg, 0x400E0478U) /**< \brief (PMC) Fault Output Clear Register */ -#define REG_PMC_WPMR REG_ACCESS(RwReg, 0x400E04E4U) /**< \brief (PMC) Write Protect Mode Register */ -#define REG_PMC_WPSR REG_ACCESS(RoReg, 0x400E04E8U) /**< \brief (PMC) Write Protect Status Register */ -#define REG_PMC_PCER1 REG_ACCESS(WoReg, 0x400E0500U) /**< \brief (PMC) Peripheral Clock Enable Register 1 */ -#define REG_PMC_PCDR1 REG_ACCESS(WoReg, 0x400E0504U) /**< \brief (PMC) Peripheral Clock Disable Register 1 */ -#define REG_PMC_PCSR1 REG_ACCESS(RoReg, 0x400E0508U) /**< \brief (PMC) Peripheral Clock Status Register 1 */ -#define REG_PMC_OCR REG_ACCESS(RwReg, 0x400E0510U) /**< \brief (PMC) Oscillator Calibration Register */ -/* ========== Register definition for UART0 peripheral ========== */ -#define REG_UART0_CR REG_ACCESS(WoReg, 0x400E0600U) /**< \brief (UART0) Control Register */ -#define REG_UART0_MR REG_ACCESS(RwReg, 0x400E0604U) /**< \brief (UART0) Mode Register */ -#define REG_UART0_IER REG_ACCESS(WoReg, 0x400E0608U) /**< \brief (UART0) Interrupt Enable Register */ -#define REG_UART0_IDR REG_ACCESS(WoReg, 0x400E060CU) /**< \brief (UART0) Interrupt Disable Register */ -#define REG_UART0_IMR REG_ACCESS(RoReg, 0x400E0610U) /**< \brief (UART0) Interrupt Mask Register */ -#define REG_UART0_SR REG_ACCESS(RoReg, 0x400E0614U) /**< \brief (UART0) Status Register */ -#define REG_UART0_RHR REG_ACCESS(RoReg, 0x400E0618U) /**< \brief (UART0) Receive Holding Register */ -#define REG_UART0_THR REG_ACCESS(WoReg, 0x400E061CU) /**< \brief (UART0) Transmit Holding Register */ -#define REG_UART0_BRGR REG_ACCESS(RwReg, 0x400E0620U) /**< \brief (UART0) Baud Rate Generator Register */ -#define REG_UART0_RPR REG_ACCESS(RwReg, 0x400E0700U) /**< \brief (UART0) Receive Pointer Register */ -#define REG_UART0_RCR REG_ACCESS(RwReg, 0x400E0704U) /**< \brief (UART0) Receive Counter Register */ -#define REG_UART0_TPR REG_ACCESS(RwReg, 0x400E0708U) /**< \brief (UART0) Transmit Pointer Register */ -#define REG_UART0_TCR REG_ACCESS(RwReg, 0x400E070CU) /**< \brief (UART0) Transmit Counter Register */ -#define REG_UART0_RNPR REG_ACCESS(RwReg, 0x400E0710U) /**< \brief (UART0) Receive Next Pointer Register */ -#define REG_UART0_RNCR REG_ACCESS(RwReg, 0x400E0714U) /**< \brief (UART0) Receive Next Counter Register */ -#define REG_UART0_TNPR REG_ACCESS(RwReg, 0x400E0718U) /**< \brief (UART0) Transmit Next Pointer Register */ -#define REG_UART0_TNCR REG_ACCESS(RwReg, 0x400E071CU) /**< \brief (UART0) Transmit Next Counter Register */ -#define REG_UART0_PTCR REG_ACCESS(WoReg, 0x400E0720U) /**< \brief (UART0) Transfer Control Register */ -#define REG_UART0_PTSR REG_ACCESS(RoReg, 0x400E0724U) /**< \brief (UART0) Transfer Status Register */ -/* ========== Register definition for CHIPID peripheral ========== */ -#define REG_CHIPID_CIDR REG_ACCESS(RoReg, 0x400E0740U) /**< \brief (CHIPID) Chip ID Register */ -#define REG_CHIPID_EXID REG_ACCESS(RoReg, 0x400E0744U) /**< \brief (CHIPID) Chip ID Extension Register */ -/* ========== Register definition for UART1 peripheral ========== */ -#define REG_UART1_CR REG_ACCESS(WoReg, 0x400E0800U) /**< \brief (UART1) Control Register */ -#define REG_UART1_MR REG_ACCESS(RwReg, 0x400E0804U) /**< \brief (UART1) Mode Register */ -#define REG_UART1_IER REG_ACCESS(WoReg, 0x400E0808U) /**< \brief (UART1) Interrupt Enable Register */ -#define REG_UART1_IDR REG_ACCESS(WoReg, 0x400E080CU) /**< \brief (UART1) Interrupt Disable Register */ -#define REG_UART1_IMR REG_ACCESS(RoReg, 0x400E0810U) /**< \brief (UART1) Interrupt Mask Register */ -#define REG_UART1_SR REG_ACCESS(RoReg, 0x400E0814U) /**< \brief (UART1) Status Register */ -#define REG_UART1_RHR REG_ACCESS(RoReg, 0x400E0818U) /**< \brief (UART1) Receive Holding Register */ -#define REG_UART1_THR REG_ACCESS(WoReg, 0x400E081CU) /**< \brief (UART1) Transmit Holding Register */ -#define REG_UART1_BRGR REG_ACCESS(RwReg, 0x400E0820U) /**< \brief (UART1) Baud Rate Generator Register */ -#define REG_UART1_RPR REG_ACCESS(RwReg, 0x400E0900U) /**< \brief (UART1) Receive Pointer Register */ -#define REG_UART1_RCR REG_ACCESS(RwReg, 0x400E0904U) /**< \brief (UART1) Receive Counter Register */ -#define REG_UART1_TPR REG_ACCESS(RwReg, 0x400E0908U) /**< \brief (UART1) Transmit Pointer Register */ -#define REG_UART1_TCR REG_ACCESS(RwReg, 0x400E090CU) /**< \brief (UART1) Transmit Counter Register */ -#define REG_UART1_RNPR REG_ACCESS(RwReg, 0x400E0910U) /**< \brief (UART1) Receive Next Pointer Register */ -#define REG_UART1_RNCR REG_ACCESS(RwReg, 0x400E0914U) /**< \brief (UART1) Receive Next Counter Register */ -#define REG_UART1_TNPR REG_ACCESS(RwReg, 0x400E0918U) /**< \brief (UART1) Transmit Next Pointer Register */ -#define REG_UART1_TNCR REG_ACCESS(RwReg, 0x400E091CU) /**< \brief (UART1) Transmit Next Counter Register */ -#define REG_UART1_PTCR REG_ACCESS(WoReg, 0x400E0920U) /**< \brief (UART1) Transfer Control Register */ -#define REG_UART1_PTSR REG_ACCESS(RoReg, 0x400E0924U) /**< \brief (UART1) Transfer Status Register */ -/* ========== Register definition for EFC peripheral ========== */ -#define REG_EFC_FMR REG_ACCESS(RwReg, 0x400E0A00U) /**< \brief (EFC) EEFC Flash Mode Register */ -#define REG_EFC_FCR REG_ACCESS(WoReg, 0x400E0A04U) /**< \brief (EFC) EEFC Flash Command Register */ -#define REG_EFC_FSR REG_ACCESS(RoReg, 0x400E0A08U) /**< \brief (EFC) EEFC Flash Status Register */ -#define REG_EFC_FRR REG_ACCESS(RoReg, 0x400E0A0CU) /**< \brief (EFC) EEFC Flash Result Register */ -/* ========== Register definition for PIOA peripheral ========== */ -#define REG_PIOA_PER REG_ACCESS(WoReg, 0x400E0E00U) /**< \brief (PIOA) PIO Enable Register */ -#define REG_PIOA_PDR REG_ACCESS(WoReg, 0x400E0E04U) /**< \brief (PIOA) PIO Disable Register */ -#define REG_PIOA_PSR REG_ACCESS(RoReg, 0x400E0E08U) /**< \brief (PIOA) PIO Status Register */ -#define REG_PIOA_OER REG_ACCESS(WoReg, 0x400E0E10U) /**< \brief (PIOA) Output Enable Register */ -#define REG_PIOA_ODR REG_ACCESS(WoReg, 0x400E0E14U) /**< \brief (PIOA) Output Disable Register */ -#define REG_PIOA_OSR REG_ACCESS(RoReg, 0x400E0E18U) /**< \brief (PIOA) Output Status Register */ -#define REG_PIOA_IFER REG_ACCESS(WoReg, 0x400E0E20U) /**< \brief (PIOA) Glitch Input Filter Enable Register */ -#define REG_PIOA_IFDR REG_ACCESS(WoReg, 0x400E0E24U) /**< \brief (PIOA) Glitch Input Filter Disable Register */ -#define REG_PIOA_IFSR REG_ACCESS(RoReg, 0x400E0E28U) /**< \brief (PIOA) Glitch Input Filter Status Register */ -#define REG_PIOA_SODR REG_ACCESS(WoReg, 0x400E0E30U) /**< \brief (PIOA) Set Output Data Register */ -#define REG_PIOA_CODR REG_ACCESS(WoReg, 0x400E0E34U) /**< \brief (PIOA) Clear Output Data Register */ -#define REG_PIOA_ODSR REG_ACCESS(RwReg, 0x400E0E38U) /**< \brief (PIOA) Output Data Status Register */ -#define REG_PIOA_PDSR REG_ACCESS(RoReg, 0x400E0E3CU) /**< \brief (PIOA) Pin Data Status Register */ -#define REG_PIOA_IER REG_ACCESS(WoReg, 0x400E0E40U) /**< \brief (PIOA) Interrupt Enable Register */ -#define REG_PIOA_IDR REG_ACCESS(WoReg, 0x400E0E44U) /**< \brief (PIOA) Interrupt Disable Register */ -#define REG_PIOA_IMR REG_ACCESS(RoReg, 0x400E0E48U) /**< \brief (PIOA) Interrupt Mask Register */ -#define REG_PIOA_ISR REG_ACCESS(RoReg, 0x400E0E4CU) /**< \brief (PIOA) Interrupt Status Register */ -#define REG_PIOA_MDER REG_ACCESS(WoReg, 0x400E0E50U) /**< \brief (PIOA) Multi-driver Enable Register */ -#define REG_PIOA_MDDR REG_ACCESS(WoReg, 0x400E0E54U) /**< \brief (PIOA) Multi-driver Disable Register */ -#define REG_PIOA_MDSR REG_ACCESS(RoReg, 0x400E0E58U) /**< \brief (PIOA) Multi-driver Status Register */ -#define REG_PIOA_PUDR REG_ACCESS(WoReg, 0x400E0E60U) /**< \brief (PIOA) Pull-up Disable Register */ -#define REG_PIOA_PUER REG_ACCESS(WoReg, 0x400E0E64U) /**< \brief (PIOA) Pull-up Enable Register */ -#define REG_PIOA_PUSR REG_ACCESS(RoReg, 0x400E0E68U) /**< \brief (PIOA) Pad Pull-up Status Register */ -#define REG_PIOA_ABCDSR REG_ACCESS(RwReg, 0x400E0E70U) /**< \brief (PIOA) Peripheral Select Register */ -#define REG_PIOA_IFSCDR REG_ACCESS(WoReg, 0x400E0E80U) /**< \brief (PIOA) Input Filter Slow Clock Disable Register */ -#define REG_PIOA_IFSCER REG_ACCESS(WoReg, 0x400E0E84U) /**< \brief (PIOA) Input Filter Slow Clock Enable Register */ -#define REG_PIOA_IFSCSR REG_ACCESS(RoReg, 0x400E0E88U) /**< \brief (PIOA) Input Filter Slow Clock Status Register */ -#define REG_PIOA_SCDR REG_ACCESS(RwReg, 0x400E0E8CU) /**< \brief (PIOA) Slow Clock Divider Debouncing Register */ -#define REG_PIOA_PPDDR REG_ACCESS(WoReg, 0x400E0E90U) /**< \brief (PIOA) Pad Pull-down Disable Register */ -#define REG_PIOA_PPDER REG_ACCESS(WoReg, 0x400E0E94U) /**< \brief (PIOA) Pad Pull-down Enable Register */ -#define REG_PIOA_PPDSR REG_ACCESS(RoReg, 0x400E0E98U) /**< \brief (PIOA) Pad Pull-down Status Register */ -#define REG_PIOA_OWER REG_ACCESS(WoReg, 0x400E0EA0U) /**< \brief (PIOA) Output Write Enable */ -#define REG_PIOA_OWDR REG_ACCESS(WoReg, 0x400E0EA4U) /**< \brief (PIOA) Output Write Disable */ -#define REG_PIOA_OWSR REG_ACCESS(RoReg, 0x400E0EA8U) /**< \brief (PIOA) Output Write Status Register */ -#define REG_PIOA_AIMER REG_ACCESS(WoReg, 0x400E0EB0U) /**< \brief (PIOA) Additional Interrupt Modes Enable Register */ -#define REG_PIOA_AIMDR REG_ACCESS(WoReg, 0x400E0EB4U) /**< \brief (PIOA) Additional Interrupt Modes Disables Register */ -#define REG_PIOA_AIMMR REG_ACCESS(RoReg, 0x400E0EB8U) /**< \brief (PIOA) Additional Interrupt Modes Mask Register */ -#define REG_PIOA_ESR REG_ACCESS(WoReg, 0x400E0EC0U) /**< \brief (PIOA) Edge Select Register */ -#define REG_PIOA_LSR REG_ACCESS(WoReg, 0x400E0EC4U) /**< \brief (PIOA) Level Select Register */ -#define REG_PIOA_ELSR REG_ACCESS(RoReg, 0x400E0EC8U) /**< \brief (PIOA) Edge/Level Status Register */ -#define REG_PIOA_FELLSR REG_ACCESS(WoReg, 0x400E0ED0U) /**< \brief (PIOA) Falling Edge/Low Level Select Register */ -#define REG_PIOA_REHLSR REG_ACCESS(WoReg, 0x400E0ED4U) /**< \brief (PIOA) Rising Edge/ High Level Select Register */ -#define REG_PIOA_FRLHSR REG_ACCESS(RoReg, 0x400E0ED8U) /**< \brief (PIOA) Fall/Rise - Low/High Status Register */ -#define REG_PIOA_LOCKSR REG_ACCESS(RoReg, 0x400E0EE0U) /**< \brief (PIOA) Lock Status */ -#define REG_PIOA_WPMR REG_ACCESS(RwReg, 0x400E0EE4U) /**< \brief (PIOA) Write Protect Mode Register */ -#define REG_PIOA_WPSR REG_ACCESS(RoReg, 0x400E0EE8U) /**< \brief (PIOA) Write Protect Status Register */ -#define REG_PIOA_SCHMITT REG_ACCESS(RwReg, 0x400E0F00U) /**< \brief (PIOA) Schmitt Trigger Register */ -#define REG_PIOA_PCMR REG_ACCESS(RwReg, 0x400E0F50U) /**< \brief (PIOA) Parallel Capture Mode Register */ -#define REG_PIOA_PCIER REG_ACCESS(WoReg, 0x400E0F54U) /**< \brief (PIOA) Parallel Capture Interrupt Enable Register */ -#define REG_PIOA_PCIDR REG_ACCESS(WoReg, 0x400E0F58U) /**< \brief (PIOA) Parallel Capture Interrupt Disable Register */ -#define REG_PIOA_PCIMR REG_ACCESS(RoReg, 0x400E0F5CU) /**< \brief (PIOA) Parallel Capture Interrupt Mask Register */ -#define REG_PIOA_PCISR REG_ACCESS(RoReg, 0x400E0F60U) /**< \brief (PIOA) Parallel Capture Interrupt Status Register */ -#define REG_PIOA_PCRHR REG_ACCESS(RoReg, 0x400E0F64U) /**< \brief (PIOA) Parallel Capture Reception Holding Register */ -#define REG_PIOA_RPR REG_ACCESS(RwReg, 0x400E0F68U) /**< \brief (PIOA) Receive Pointer Register */ -#define REG_PIOA_RCR REG_ACCESS(RwReg, 0x400E0F6CU) /**< \brief (PIOA) Receive Counter Register */ -#define REG_PIOA_TPR REG_ACCESS(RwReg, 0x400E0F70U) /**< \brief (PIOA) Transmit Pointer Register */ -#define REG_PIOA_TCR REG_ACCESS(RwReg, 0x400E0F74U) /**< \brief (PIOA) Transmit Counter Register */ -#define REG_PIOA_RNPR REG_ACCESS(RwReg, 0x400E0F78U) /**< \brief (PIOA) Receive Next Pointer Register */ -#define REG_PIOA_RNCR REG_ACCESS(RwReg, 0x400E0F7CU) /**< \brief (PIOA) Receive Next Counter Register */ -#define REG_PIOA_TNPR REG_ACCESS(RwReg, 0x400E0F80U) /**< \brief (PIOA) Transmit Next Pointer Register */ -#define REG_PIOA_TNCR REG_ACCESS(RwReg, 0x400E0F84U) /**< \brief (PIOA) Transmit Next Counter Register */ -#define REG_PIOA_PTCR REG_ACCESS(WoReg, 0x400E0F88U) /**< \brief (PIOA) Transfer Control Register */ -#define REG_PIOA_PTSR REG_ACCESS(RoReg, 0x400E0F8CU) /**< \brief (PIOA) Transfer Status Register */ -/* ========== Register definition for PIOB peripheral ========== */ -#define REG_PIOB_PER REG_ACCESS(WoReg, 0x400E1000U) /**< \brief (PIOB) PIO Enable Register */ -#define REG_PIOB_PDR REG_ACCESS(WoReg, 0x400E1004U) /**< \brief (PIOB) PIO Disable Register */ -#define REG_PIOB_PSR REG_ACCESS(RoReg, 0x400E1008U) /**< \brief (PIOB) PIO Status Register */ -#define REG_PIOB_OER REG_ACCESS(WoReg, 0x400E1010U) /**< \brief (PIOB) Output Enable Register */ -#define REG_PIOB_ODR REG_ACCESS(WoReg, 0x400E1014U) /**< \brief (PIOB) Output Disable Register */ -#define REG_PIOB_OSR REG_ACCESS(RoReg, 0x400E1018U) /**< \brief (PIOB) Output Status Register */ -#define REG_PIOB_IFER REG_ACCESS(WoReg, 0x400E1020U) /**< \brief (PIOB) Glitch Input Filter Enable Register */ -#define REG_PIOB_IFDR REG_ACCESS(WoReg, 0x400E1024U) /**< \brief (PIOB) Glitch Input Filter Disable Register */ -#define REG_PIOB_IFSR REG_ACCESS(RoReg, 0x400E1028U) /**< \brief (PIOB) Glitch Input Filter Status Register */ -#define REG_PIOB_SODR REG_ACCESS(WoReg, 0x400E1030U) /**< \brief (PIOB) Set Output Data Register */ -#define REG_PIOB_CODR REG_ACCESS(WoReg, 0x400E1034U) /**< \brief (PIOB) Clear Output Data Register */ -#define REG_PIOB_ODSR REG_ACCESS(RwReg, 0x400E1038U) /**< \brief (PIOB) Output Data Status Register */ -#define REG_PIOB_PDSR REG_ACCESS(RoReg, 0x400E103CU) /**< \brief (PIOB) Pin Data Status Register */ -#define REG_PIOB_IER REG_ACCESS(WoReg, 0x400E1040U) /**< \brief (PIOB) Interrupt Enable Register */ -#define REG_PIOB_IDR REG_ACCESS(WoReg, 0x400E1044U) /**< \brief (PIOB) Interrupt Disable Register */ -#define REG_PIOB_IMR REG_ACCESS(RoReg, 0x400E1048U) /**< \brief (PIOB) Interrupt Mask Register */ -#define REG_PIOB_ISR REG_ACCESS(RoReg, 0x400E104CU) /**< \brief (PIOB) Interrupt Status Register */ -#define REG_PIOB_MDER REG_ACCESS(WoReg, 0x400E1050U) /**< \brief (PIOB) Multi-driver Enable Register */ -#define REG_PIOB_MDDR REG_ACCESS(WoReg, 0x400E1054U) /**< \brief (PIOB) Multi-driver Disable Register */ -#define REG_PIOB_MDSR REG_ACCESS(RoReg, 0x400E1058U) /**< \brief (PIOB) Multi-driver Status Register */ -#define REG_PIOB_PUDR REG_ACCESS(WoReg, 0x400E1060U) /**< \brief (PIOB) Pull-up Disable Register */ -#define REG_PIOB_PUER REG_ACCESS(WoReg, 0x400E1064U) /**< \brief (PIOB) Pull-up Enable Register */ -#define REG_PIOB_PUSR REG_ACCESS(RoReg, 0x400E1068U) /**< \brief (PIOB) Pad Pull-up Status Register */ -#define REG_PIOB_ABCDSR REG_ACCESS(RwReg, 0x400E1070U) /**< \brief (PIOB) Peripheral Select Register */ -#define REG_PIOB_IFSCDR REG_ACCESS(WoReg, 0x400E1080U) /**< \brief (PIOB) Input Filter Slow Clock Disable Register */ -#define REG_PIOB_IFSCER REG_ACCESS(WoReg, 0x400E1084U) /**< \brief (PIOB) Input Filter Slow Clock Enable Register */ -#define REG_PIOB_IFSCSR REG_ACCESS(RoReg, 0x400E1088U) /**< \brief (PIOB) Input Filter Slow Clock Status Register */ -#define REG_PIOB_SCDR REG_ACCESS(RwReg, 0x400E108CU) /**< \brief (PIOB) Slow Clock Divider Debouncing Register */ -#define REG_PIOB_PPDDR REG_ACCESS(WoReg, 0x400E1090U) /**< \brief (PIOB) Pad Pull-down Disable Register */ -#define REG_PIOB_PPDER REG_ACCESS(WoReg, 0x400E1094U) /**< \brief (PIOB) Pad Pull-down Enable Register */ -#define REG_PIOB_PPDSR REG_ACCESS(RoReg, 0x400E1098U) /**< \brief (PIOB) Pad Pull-down Status Register */ -#define REG_PIOB_OWER REG_ACCESS(WoReg, 0x400E10A0U) /**< \brief (PIOB) Output Write Enable */ -#define REG_PIOB_OWDR REG_ACCESS(WoReg, 0x400E10A4U) /**< \brief (PIOB) Output Write Disable */ -#define REG_PIOB_OWSR REG_ACCESS(RoReg, 0x400E10A8U) /**< \brief (PIOB) Output Write Status Register */ -#define REG_PIOB_AIMER REG_ACCESS(WoReg, 0x400E10B0U) /**< \brief (PIOB) Additional Interrupt Modes Enable Register */ -#define REG_PIOB_AIMDR REG_ACCESS(WoReg, 0x400E10B4U) /**< \brief (PIOB) Additional Interrupt Modes Disables Register */ -#define REG_PIOB_AIMMR REG_ACCESS(RoReg, 0x400E10B8U) /**< \brief (PIOB) Additional Interrupt Modes Mask Register */ -#define REG_PIOB_ESR REG_ACCESS(WoReg, 0x400E10C0U) /**< \brief (PIOB) Edge Select Register */ -#define REG_PIOB_LSR REG_ACCESS(WoReg, 0x400E10C4U) /**< \brief (PIOB) Level Select Register */ -#define REG_PIOB_ELSR REG_ACCESS(RoReg, 0x400E10C8U) /**< \brief (PIOB) Edge/Level Status Register */ -#define REG_PIOB_FELLSR REG_ACCESS(WoReg, 0x400E10D0U) /**< \brief (PIOB) Falling Edge/Low Level Select Register */ -#define REG_PIOB_REHLSR REG_ACCESS(WoReg, 0x400E10D4U) /**< \brief (PIOB) Rising Edge/ High Level Select Register */ -#define REG_PIOB_FRLHSR REG_ACCESS(RoReg, 0x400E10D8U) /**< \brief (PIOB) Fall/Rise - Low/High Status Register */ -#define REG_PIOB_LOCKSR REG_ACCESS(RoReg, 0x400E10E0U) /**< \brief (PIOB) Lock Status */ -#define REG_PIOB_WPMR REG_ACCESS(RwReg, 0x400E10E4U) /**< \brief (PIOB) Write Protect Mode Register */ -#define REG_PIOB_WPSR REG_ACCESS(RoReg, 0x400E10E8U) /**< \brief (PIOB) Write Protect Status Register */ -#define REG_PIOB_SCHMITT REG_ACCESS(RwReg, 0x400E1100U) /**< \brief (PIOB) Schmitt Trigger Register */ -#define REG_PIOB_PCMR REG_ACCESS(RwReg, 0x400E1150U) /**< \brief (PIOB) Parallel Capture Mode Register */ -#define REG_PIOB_PCIER REG_ACCESS(WoReg, 0x400E1154U) /**< \brief (PIOB) Parallel Capture Interrupt Enable Register */ -#define REG_PIOB_PCIDR REG_ACCESS(WoReg, 0x400E1158U) /**< \brief (PIOB) Parallel Capture Interrupt Disable Register */ -#define REG_PIOB_PCIMR REG_ACCESS(RoReg, 0x400E115CU) /**< \brief (PIOB) Parallel Capture Interrupt Mask Register */ -#define REG_PIOB_PCISR REG_ACCESS(RoReg, 0x400E1160U) /**< \brief (PIOB) Parallel Capture Interrupt Status Register */ -#define REG_PIOB_PCRHR REG_ACCESS(RoReg, 0x400E1164U) /**< \brief (PIOB) Parallel Capture Reception Holding Register */ -/* ========== Register definition for PIOC peripheral ========== */ -#define REG_PIOC_PER REG_ACCESS(WoReg, 0x400E1200U) /**< \brief (PIOC) PIO Enable Register */ -#define REG_PIOC_PDR REG_ACCESS(WoReg, 0x400E1204U) /**< \brief (PIOC) PIO Disable Register */ -#define REG_PIOC_PSR REG_ACCESS(RoReg, 0x400E1208U) /**< \brief (PIOC) PIO Status Register */ -#define REG_PIOC_OER REG_ACCESS(WoReg, 0x400E1210U) /**< \brief (PIOC) Output Enable Register */ -#define REG_PIOC_ODR REG_ACCESS(WoReg, 0x400E1214U) /**< \brief (PIOC) Output Disable Register */ -#define REG_PIOC_OSR REG_ACCESS(RoReg, 0x400E1218U) /**< \brief (PIOC) Output Status Register */ -#define REG_PIOC_IFER REG_ACCESS(WoReg, 0x400E1220U) /**< \brief (PIOC) Glitch Input Filter Enable Register */ -#define REG_PIOC_IFDR REG_ACCESS(WoReg, 0x400E1224U) /**< \brief (PIOC) Glitch Input Filter Disable Register */ -#define REG_PIOC_IFSR REG_ACCESS(RoReg, 0x400E1228U) /**< \brief (PIOC) Glitch Input Filter Status Register */ -#define REG_PIOC_SODR REG_ACCESS(WoReg, 0x400E1230U) /**< \brief (PIOC) Set Output Data Register */ -#define REG_PIOC_CODR REG_ACCESS(WoReg, 0x400E1234U) /**< \brief (PIOC) Clear Output Data Register */ -#define REG_PIOC_ODSR REG_ACCESS(RwReg, 0x400E1238U) /**< \brief (PIOC) Output Data Status Register */ -#define REG_PIOC_PDSR REG_ACCESS(RoReg, 0x400E123CU) /**< \brief (PIOC) Pin Data Status Register */ -#define REG_PIOC_IER REG_ACCESS(WoReg, 0x400E1240U) /**< \brief (PIOC) Interrupt Enable Register */ -#define REG_PIOC_IDR REG_ACCESS(WoReg, 0x400E1244U) /**< \brief (PIOC) Interrupt Disable Register */ -#define REG_PIOC_IMR REG_ACCESS(RoReg, 0x400E1248U) /**< \brief (PIOC) Interrupt Mask Register */ -#define REG_PIOC_ISR REG_ACCESS(RoReg, 0x400E124CU) /**< \brief (PIOC) Interrupt Status Register */ -#define REG_PIOC_MDER REG_ACCESS(WoReg, 0x400E1250U) /**< \brief (PIOC) Multi-driver Enable Register */ -#define REG_PIOC_MDDR REG_ACCESS(WoReg, 0x400E1254U) /**< \brief (PIOC) Multi-driver Disable Register */ -#define REG_PIOC_MDSR REG_ACCESS(RoReg, 0x400E1258U) /**< \brief (PIOC) Multi-driver Status Register */ -#define REG_PIOC_PUDR REG_ACCESS(WoReg, 0x400E1260U) /**< \brief (PIOC) Pull-up Disable Register */ -#define REG_PIOC_PUER REG_ACCESS(WoReg, 0x400E1264U) /**< \brief (PIOC) Pull-up Enable Register */ -#define REG_PIOC_PUSR REG_ACCESS(RoReg, 0x400E1268U) /**< \brief (PIOC) Pad Pull-up Status Register */ -#define REG_PIOC_ABCDSR REG_ACCESS(RwReg, 0x400E1270U) /**< \brief (PIOC) Peripheral Select Register */ -#define REG_PIOC_IFSCDR REG_ACCESS(WoReg, 0x400E1280U) /**< \brief (PIOC) Input Filter Slow Clock Disable Register */ -#define REG_PIOC_IFSCER REG_ACCESS(WoReg, 0x400E1284U) /**< \brief (PIOC) Input Filter Slow Clock Enable Register */ -#define REG_PIOC_IFSCSR REG_ACCESS(RoReg, 0x400E1288U) /**< \brief (PIOC) Input Filter Slow Clock Status Register */ -#define REG_PIOC_SCDR REG_ACCESS(RwReg, 0x400E128CU) /**< \brief (PIOC) Slow Clock Divider Debouncing Register */ -#define REG_PIOC_PPDDR REG_ACCESS(WoReg, 0x400E1290U) /**< \brief (PIOC) Pad Pull-down Disable Register */ -#define REG_PIOC_PPDER REG_ACCESS(WoReg, 0x400E1294U) /**< \brief (PIOC) Pad Pull-down Enable Register */ -#define REG_PIOC_PPDSR REG_ACCESS(RoReg, 0x400E1298U) /**< \brief (PIOC) Pad Pull-down Status Register */ -#define REG_PIOC_OWER REG_ACCESS(WoReg, 0x400E12A0U) /**< \brief (PIOC) Output Write Enable */ -#define REG_PIOC_OWDR REG_ACCESS(WoReg, 0x400E12A4U) /**< \brief (PIOC) Output Write Disable */ -#define REG_PIOC_OWSR REG_ACCESS(RoReg, 0x400E12A8U) /**< \brief (PIOC) Output Write Status Register */ -#define REG_PIOC_AIMER REG_ACCESS(WoReg, 0x400E12B0U) /**< \brief (PIOC) Additional Interrupt Modes Enable Register */ -#define REG_PIOC_AIMDR REG_ACCESS(WoReg, 0x400E12B4U) /**< \brief (PIOC) Additional Interrupt Modes Disables Register */ -#define REG_PIOC_AIMMR REG_ACCESS(RoReg, 0x400E12B8U) /**< \brief (PIOC) Additional Interrupt Modes Mask Register */ -#define REG_PIOC_ESR REG_ACCESS(WoReg, 0x400E12C0U) /**< \brief (PIOC) Edge Select Register */ -#define REG_PIOC_LSR REG_ACCESS(WoReg, 0x400E12C4U) /**< \brief (PIOC) Level Select Register */ -#define REG_PIOC_ELSR REG_ACCESS(RoReg, 0x400E12C8U) /**< \brief (PIOC) Edge/Level Status Register */ -#define REG_PIOC_FELLSR REG_ACCESS(WoReg, 0x400E12D0U) /**< \brief (PIOC) Falling Edge/Low Level Select Register */ -#define REG_PIOC_REHLSR REG_ACCESS(WoReg, 0x400E12D4U) /**< \brief (PIOC) Rising Edge/ High Level Select Register */ -#define REG_PIOC_FRLHSR REG_ACCESS(RoReg, 0x400E12D8U) /**< \brief (PIOC) Fall/Rise - Low/High Status Register */ -#define REG_PIOC_LOCKSR REG_ACCESS(RoReg, 0x400E12E0U) /**< \brief (PIOC) Lock Status */ -#define REG_PIOC_WPMR REG_ACCESS(RwReg, 0x400E12E4U) /**< \brief (PIOC) Write Protect Mode Register */ -#define REG_PIOC_WPSR REG_ACCESS(RoReg, 0x400E12E8U) /**< \brief (PIOC) Write Protect Status Register */ -#define REG_PIOC_SCHMITT REG_ACCESS(RwReg, 0x400E1300U) /**< \brief (PIOC) Schmitt Trigger Register */ -#define REG_PIOC_PCMR REG_ACCESS(RwReg, 0x400E1350U) /**< \brief (PIOC) Parallel Capture Mode Register */ -#define REG_PIOC_PCIER REG_ACCESS(WoReg, 0x400E1354U) /**< \brief (PIOC) Parallel Capture Interrupt Enable Register */ -#define REG_PIOC_PCIDR REG_ACCESS(WoReg, 0x400E1358U) /**< \brief (PIOC) Parallel Capture Interrupt Disable Register */ -#define REG_PIOC_PCIMR REG_ACCESS(RoReg, 0x400E135CU) /**< \brief (PIOC) Parallel Capture Interrupt Mask Register */ -#define REG_PIOC_PCISR REG_ACCESS(RoReg, 0x400E1360U) /**< \brief (PIOC) Parallel Capture Interrupt Status Register */ -#define REG_PIOC_PCRHR REG_ACCESS(RoReg, 0x400E1364U) /**< \brief (PIOC) Parallel Capture Reception Holding Register */ -/* ========== Register definition for RSTC peripheral ========== */ -#define REG_RSTC_CR REG_ACCESS(WoReg, 0x400E1400U) /**< \brief (RSTC) Control Register */ -#define REG_RSTC_SR REG_ACCESS(RoReg, 0x400E1404U) /**< \brief (RSTC) Status Register */ -#define REG_RSTC_MR REG_ACCESS(RwReg, 0x400E1408U) /**< \brief (RSTC) Mode Register */ -/* ========== Register definition for SUPC peripheral ========== */ -#define REG_SUPC_CR REG_ACCESS(WoReg, 0x400E1410U) /**< \brief (SUPC) Supply Controller Control Register */ -#define REG_SUPC_SMMR REG_ACCESS(RwReg, 0x400E1414U) /**< \brief (SUPC) Supply Controller Supply Monitor Mode Register */ -#define REG_SUPC_MR REG_ACCESS(RwReg, 0x400E1418U) /**< \brief (SUPC) Supply Controller Mode Register */ -#define REG_SUPC_WUMR REG_ACCESS(RwReg, 0x400E141CU) /**< \brief (SUPC) Supply Controller Wake Up Mode Register */ -#define REG_SUPC_WUIR REG_ACCESS(RwReg, 0x400E1420U) /**< \brief (SUPC) Supply Controller Wake Up Inputs Register */ -#define REG_SUPC_SR REG_ACCESS(RoReg, 0x400E1424U) /**< \brief (SUPC) Supply Controller Status Register */ -/* ========== Register definition for RTT peripheral ========== */ -#define REG_RTT_MR REG_ACCESS(RwReg, 0x400E1430U) /**< \brief (RTT) Mode Register */ -#define REG_RTT_AR REG_ACCESS(RwReg, 0x400E1434U) /**< \brief (RTT) Alarm Register */ -#define REG_RTT_VR REG_ACCESS(RoReg, 0x400E1438U) /**< \brief (RTT) Value Register */ -#define REG_RTT_SR REG_ACCESS(RoReg, 0x400E143CU) /**< \brief (RTT) Status Register */ -/* ========== Register definition for WDT peripheral ========== */ -#define REG_WDT_CR REG_ACCESS(WoReg, 0x400E1450U) /**< \brief (WDT) Control Register */ -#define REG_WDT_MR REG_ACCESS(RwReg, 0x400E1454U) /**< \brief (WDT) Mode Register */ -#define REG_WDT_SR REG_ACCESS(RoReg, 0x400E1458U) /**< \brief (WDT) Status Register */ -/* ========== Register definition for RTC peripheral ========== */ -#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1460U) /**< \brief (RTC) Control Register */ -#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1464U) /**< \brief (RTC) Mode Register */ -#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1468U) /**< \brief (RTC) Time Register */ -#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E146CU) /**< \brief (RTC) Calendar Register */ -#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1470U) /**< \brief (RTC) Time Alarm Register */ -#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1474U) /**< \brief (RTC) Calendar Alarm Register */ -#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1478U) /**< \brief (RTC) Status Register */ -#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E147CU) /**< \brief (RTC) Status Clear Command Register */ -#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1480U) /**< \brief (RTC) Interrupt Enable Register */ -#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1484U) /**< \brief (RTC) Interrupt Disable Register */ -#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */ -#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E148CU) /**< \brief (RTC) Valid Entry Register */ -/* ========== Register definition for GPBR peripheral ========== */ -#define REG_GPBR_GPBR0 REG_ACCESS(RwReg, 0x400E1490U) /**< \brief (GPBR) General Purpose Backup Register 0 */ -#define REG_GPBR_GPBR1 REG_ACCESS(RwReg, 0x400E1494U) /**< \brief (GPBR) General Purpose Backup Register 1 */ -#define REG_GPBR_GPBR2 REG_ACCESS(RwReg, 0x400E1498U) /**< \brief (GPBR) General Purpose Backup Register 2 */ -#define REG_GPBR_GPBR3 REG_ACCESS(RwReg, 0x400E149CU) /**< \brief (GPBR) General Purpose Backup Register 3 */ -#define REG_GPBR_GPBR4 REG_ACCESS(RwReg, 0x400E14A0U) /**< \brief (GPBR) General Purpose Backup Register 4 */ -#define REG_GPBR_GPBR5 REG_ACCESS(RwReg, 0x400E14A4U) /**< \brief (GPBR) General Purpose Backup Register 5 */ -#define REG_GPBR_GPBR6 REG_ACCESS(RwReg, 0x400E14A8U) /**< \brief (GPBR) General Purpose Backup Register 6 */ -#define REG_GPBR_GPBR7 REG_ACCESS(RwReg, 0x400E14ACU) /**< \brief (GPBR) General Purpose Backup Register 7 */ -/*@}*/ - -/* ************************************************************************** */ -/* PERIPHERAL ID DEFINITIONS FOR SAM3S */ -/* ************************************************************************** */ -/** \addtogroup SAM3S_id Peripheral Ids Definitions */ -/*@{*/ - -#define ID_SUPC ( 0) /**< \brief Supply Controller (SUPC) */ -#define ID_RSTC ( 1) /**< \brief Reset Controller (RSTC) */ -#define ID_RTC ( 2) /**< \brief Real Time Clock (RTC) */ -#define ID_RTT ( 3) /**< \brief Real Time Timer (RTT) */ -#define ID_WDT ( 4) /**< \brief Watchdog Timer (WDT) */ -#define ID_PMC ( 5) /**< \brief Power Management Controller (PMC) */ -#define ID_EFC ( 6) /**< \brief Enhanced Embedded Flash Controller (EFC) */ -#define ID_UART0 ( 8) /**< \brief UART 0 (UART0) */ -#define ID_UART1 ( 9) /**< \brief UART 1 (UART1) */ -#define ID_SMC (10) /**< \brief Static Memory Controller (SMC) */ -#define ID_PIOA (11) /**< \brief Parallel I/O Controller A (PIOA) */ -#define ID_PIOB (12) /**< \brief Parallel I/O Controller B (PIOB) */ -#define ID_PIOC (13) /**< \brief Parallel I/O Controller C (PIOC) */ -#define ID_USART0 (14) /**< \brief USART 0 (USART0) */ -#define ID_USART1 (15) /**< \brief USART 1 (USART1) */ -#define ID_HSMCI (18) /**< \brief Multimedia Card Interface (HSMCI) */ -#define ID_TWI0 (19) /**< \brief Two Wire Interface 0 (TWI0) */ -#define ID_TWI1 (20) /**< \brief Two Wire Interface 1 (TWI1) */ -#define ID_SPI (21) /**< \brief Serial Peripheral Interface (SPI) */ -#define ID_SSC (22) /**< \brief Synchronous Serial Controler (SSC) */ -#define ID_TC0 (23) /**< \brief Timer/Counter 0 (TC0) */ -#define ID_TC1 (24) /**< \brief Timer/Counter 1 (TC1) */ -#define ID_TC2 (25) /**< \brief Timer/Counter 2 (TC2) */ -#define ID_TC3 (26) /**< \brief Timer/Counter 3 (TC3) */ -#define ID_TC4 (27) /**< \brief Timer/Counter 4 (TC4) */ -#define ID_TC5 (28) /**< \brief Timer/Counter 5 (TC5) */ -#define ID_ADC (29) /**< \brief Analog To Digital Converter (ADC) */ -#define ID_DACC (30) /**< \brief Digital To Analog Converter (DACC) */ -#define ID_PWM (31) /**< \brief Pulse Width Modulation (PWM) */ -#define ID_CRCCU (32) /**< \brief CRC Calculation Unit (CRCCU) */ -#define ID_ACC (33) /**< \brief Analog Comparator (ACC) */ -#define ID_UDP (34) /**< \brief USB Device Port (UDP) */ -/*@}*/ - -/* ************************************************************************** */ -/* BASE ADDRESS DEFINITIONS FOR SAM3S */ -/* ************************************************************************** */ -/** \addtogroup SAM3S_base Peripheral Base Address Definitions */ -/*@{*/ - -#define HSMCI CAST(Hsmci , 0x40000000U) /**< \brief (HSMCI ) Base Address */ -#define PDC_HSMCI CAST(Pdc , 0x40000100U) /**< \brief (PDC_HSMCI ) Base Address */ -#define SSC CAST(Ssc , 0x40004000U) /**< \brief (SSC ) Base Address */ -#define PDC_SSC CAST(Pdc , 0x40004100U) /**< \brief (PDC_SSC ) Base Address */ -#define SPI CAST(Spi , 0x40008000U) /**< \brief (SPI ) Base Address */ -#define PDC_SPI CAST(Pdc , 0x40008100U) /**< \brief (PDC_SPI ) Base Address */ -#define TC0 CAST(Tc , 0x40010000U) /**< \brief (TC0 ) Base Address */ -#define TC1 CAST(Tc , 0x40014000U) /**< \brief (TC1 ) Base Address */ -#define TWI0 CAST(Twi , 0x40018000U) /**< \brief (TWI0 ) Base Address */ -#define PDC_TWI0 CAST(Pdc , 0x40018100U) /**< \brief (PDC_TWI0 ) Base Address */ -#define TWI1 CAST(Twi , 0x4001C000U) /**< \brief (TWI1 ) Base Address */ -#define PDC_TWI1 CAST(Pdc , 0x4001C100U) /**< \brief (PDC_TWI1 ) Base Address */ -#define PWM CAST(Pwm , 0x40020000U) /**< \brief (PWM ) Base Address */ -#define PDC_PWM CAST(Pdc , 0x40020100U) /**< \brief (PDC_PWM ) Base Address */ -#define USART0 CAST(Usart , 0x40024000U) /**< \brief (USART0 ) Base Address */ -#define PDC_USART0 CAST(Pdc , 0x40024100U) /**< \brief (PDC_USART0) Base Address */ -#define USART1 CAST(Usart , 0x40028000U) /**< \brief (USART1 ) Base Address */ -#define PDC_USART1 CAST(Pdc , 0x40028100U) /**< \brief (PDC_USART1) Base Address */ -#define UDP CAST(Udp , 0x40034000U) /**< \brief (UDP ) Base Address */ -#define ADC CAST(Adc , 0x40038000U) /**< \brief (ADC ) Base Address */ -#define PDC_ADC CAST(Pdc , 0x40038100U) /**< \brief (PDC_ADC ) Base Address */ -#define DACC CAST(Dacc , 0x4003C000U) /**< \brief (DACC ) Base Address */ -#define PDC_DACC CAST(Pdc , 0x4003C100U) /**< \brief (PDC_DACC ) Base Address */ -#define ACC CAST(Acc , 0x40040000U) /**< \brief (ACC ) Base Address */ -#define CRCCU CAST(Crccu , 0x40044000U) /**< \brief (CRCCU ) Base Address */ -#define SMC CAST(Smc , 0x400E0000U) /**< \brief (SMC ) Base Address */ -#define MATRIX CAST(Matrix , 0x400E0200U) /**< \brief (MATRIX ) Base Address */ -#define PMC CAST(Pmc , 0x400E0400U) /**< \brief (PMC ) Base Address */ -#define UART0 CAST(Uart , 0x400E0600U) /**< \brief (UART0 ) Base Address */ -#define PDC_UART0 CAST(Pdc , 0x400E0700U) /**< \brief (PDC_UART0 ) Base Address */ -#define CHIPID CAST(Chipid , 0x400E0740U) /**< \brief (CHIPID ) Base Address */ -#define UART1 CAST(Uart , 0x400E0800U) /**< \brief (UART1 ) Base Address */ -#define PDC_UART1 CAST(Pdc , 0x400E0900U) /**< \brief (PDC_UART1 ) Base Address */ -#define EFC CAST(Efc , 0x400E0A00U) /**< \brief (EFC ) Base Address */ -#define PIOA CAST(Pio , 0x400E0E00U) /**< \brief (PIOA ) Base Address */ -#define PDC_PIOA CAST(Pdc , 0x400E0F00U) /**< \brief (PDC_PIOA ) Base Address */ -#define PIOB CAST(Pio , 0x400E1000U) /**< \brief (PIOB ) Base Address */ -#define PIOC CAST(Pio , 0x400E1200U) /**< \brief (PIOC ) Base Address */ -#define RSTC CAST(Rstc , 0x400E1400U) /**< \brief (RSTC ) Base Address */ -#define SUPC CAST(Supc , 0x400E1410U) /**< \brief (SUPC ) Base Address */ -#define RTT CAST(Rtt , 0x400E1430U) /**< \brief (RTT ) Base Address */ -#define WDT CAST(Wdt , 0x400E1450U) /**< \brief (WDT ) Base Address */ -#define RTC CAST(Rtc , 0x400E1460U) /**< \brief (RTC ) Base Address */ -#define GPBR CAST(Gpbr , 0x400E1490U) /**< \brief (GPBR ) Base Address */ -/*@}*/ - -/* ************************************************************************** */ -/* PIO DEFINITIONS FOR SAM3S */ -/* ************************************************************************** */ -/** \addtogroup SAM3S_pio Peripheral Pio Definitions */ -/*@{*/ - -#define PIO_PA0 (1u << 0) /**< \brief Pin Controlled by PA0 */ -#define PIO_PA1 (1u << 1) /**< \brief Pin Controlled by PA1 */ -#define PIO_PA2 (1u << 2) /**< \brief Pin Controlled by PA2 */ -#define PIO_PA3 (1u << 3) /**< \brief Pin Controlled by PA3 */ -#define PIO_PA4 (1u << 4) /**< \brief Pin Controlled by PA4 */ -#define PIO_PA5 (1u << 5) /**< \brief Pin Controlled by PA5 */ -#define PIO_PA6 (1u << 6) /**< \brief Pin Controlled by PA6 */ -#define PIO_PA7 (1u << 7) /**< \brief Pin Controlled by PA7 */ -#define PIO_PA8 (1u << 8) /**< \brief Pin Controlled by PA8 */ -#define PIO_PA9 (1u << 9) /**< \brief Pin Controlled by PA9 */ -#define PIO_PA10 (1u << 10) /**< \brief Pin Controlled by PA10 */ -#define PIO_PA11 (1u << 11) /**< \brief Pin Controlled by PA11 */ -#define PIO_PA12 (1u << 12) /**< \brief Pin Controlled by PA12 */ -#define PIO_PA13 (1u << 13) /**< \brief Pin Controlled by PA13 */ -#define PIO_PA14 (1u << 14) /**< \brief Pin Controlled by PA14 */ -#define PIO_PA15 (1u << 15) /**< \brief Pin Controlled by PA15 */ -#define PIO_PA16 (1u << 16) /**< \brief Pin Controlled by PA16 */ -#define PIO_PA17 (1u << 17) /**< \brief Pin Controlled by PA17 */ -#define PIO_PA18 (1u << 18) /**< \brief Pin Controlled by PA18 */ -#define PIO_PA19 (1u << 19) /**< \brief Pin Controlled by PA19 */ -#define PIO_PA20 (1u << 20) /**< \brief Pin Controlled by PA20 */ -#define PIO_PA21 (1u << 21) /**< \brief Pin Controlled by PA21 */ -#define PIO_PA22 (1u << 22) /**< \brief Pin Controlled by PA22 */ -#define PIO_PA23 (1u << 23) /**< \brief Pin Controlled by PA23 */ -#define PIO_PA24 (1u << 24) /**< \brief Pin Controlled by PA24 */ -#define PIO_PA25 (1u << 25) /**< \brief Pin Controlled by PA25 */ -#define PIO_PA26 (1u << 26) /**< \brief Pin Controlled by PA26 */ -#define PIO_PA27 (1u << 27) /**< \brief Pin Controlled by PA27 */ -#define PIO_PA28 (1u << 28) /**< \brief Pin Controlled by PA28 */ -#define PIO_PA29 (1u << 29) /**< \brief Pin Controlled by PA29 */ -#define PIO_PA30 (1u << 30) /**< \brief Pin Controlled by PA30 */ -#define PIO_PA31 (1u << 31) /**< \brief Pin Controlled by PA31 */ -#define PIO_PB0 (1u << 0) /**< \brief Pin Controlled by PB0 */ -#define PIO_PB1 (1u << 1) /**< \brief Pin Controlled by PB1 */ -#define PIO_PB2 (1u << 2) /**< \brief Pin Controlled by PB2 */ -#define PIO_PB3 (1u << 3) /**< \brief Pin Controlled by PB3 */ -#define PIO_PB4 (1u << 4) /**< \brief Pin Controlled by PB4 */ -#define PIO_PB5 (1u << 5) /**< \brief Pin Controlled by PB5 */ -#define PIO_PB6 (1u << 6) /**< \brief Pin Controlled by PB6 */ -#define PIO_PB7 (1u << 7) /**< \brief Pin Controlled by PB7 */ -#define PIO_PB8 (1u << 8) /**< \brief Pin Controlled by PB8 */ -#define PIO_PB9 (1u << 9) /**< \brief Pin Controlled by PB9 */ -#define PIO_PB10 (1u << 10) /**< \brief Pin Controlled by PB10 */ -#define PIO_PB11 (1u << 11) /**< \brief Pin Controlled by PB11 */ -#define PIO_PB12 (1u << 12) /**< \brief Pin Controlled by PB12 */ -#define PIO_PB13 (1u << 13) /**< \brief Pin Controlled by PB13 */ -#define PIO_PB14 (1u << 14) /**< \brief Pin Controlled by PB14 */ -#define PIO_PC0 (1u << 0) /**< \brief Pin Controlled by PC0 */ -#define PIO_PC1 (1u << 1) /**< \brief Pin Controlled by PC1 */ -#define PIO_PC2 (1u << 2) /**< \brief Pin Controlled by PC2 */ -#define PIO_PC3 (1u << 3) /**< \brief Pin Controlled by PC3 */ -#define PIO_PC4 (1u << 4) /**< \brief Pin Controlled by PC4 */ -#define PIO_PC5 (1u << 5) /**< \brief Pin Controlled by PC5 */ -#define PIO_PC6 (1u << 6) /**< \brief Pin Controlled by PC6 */ -#define PIO_PC7 (1u << 7) /**< \brief Pin Controlled by PC7 */ -#define PIO_PC8 (1u << 8) /**< \brief Pin Controlled by PC8 */ -#define PIO_PC9 (1u << 9) /**< \brief Pin Controlled by PC9 */ -#define PIO_PC10 (1u << 10) /**< \brief Pin Controlled by PC10 */ -#define PIO_PC11 (1u << 11) /**< \brief Pin Controlled by PC11 */ -#define PIO_PC12 (1u << 12) /**< \brief Pin Controlled by PC12 */ -#define PIO_PC13 (1u << 13) /**< \brief Pin Controlled by PC13 */ -#define PIO_PC14 (1u << 14) /**< \brief Pin Controlled by PC14 */ -#define PIO_PC15 (1u << 15) /**< \brief Pin Controlled by PC15 */ -#define PIO_PC16 (1u << 16) /**< \brief Pin Controlled by PC16 */ -#define PIO_PC17 (1u << 17) /**< \brief Pin Controlled by PC17 */ -#define PIO_PC18 (1u << 18) /**< \brief Pin Controlled by PC18 */ -#define PIO_PC19 (1u << 19) /**< \brief Pin Controlled by PC19 */ -#define PIO_PC20 (1u << 20) /**< \brief Pin Controlled by PC20 */ -#define PIO_PC21 (1u << 21) /**< \brief Pin Controlled by PC21 */ -#define PIO_PC22 (1u << 22) /**< \brief Pin Controlled by PC22 */ -#define PIO_PC23 (1u << 23) /**< \brief Pin Controlled by PC23 */ -#define PIO_PC24 (1u << 24) /**< \brief Pin Controlled by PC24 */ -#define PIO_PC25 (1u << 25) /**< \brief Pin Controlled by PC25 */ -#define PIO_PC26 (1u << 26) /**< \brief Pin Controlled by PC26 */ -#define PIO_PC27 (1u << 27) /**< \brief Pin Controlled by PC27 */ -#define PIO_PC28 (1u << 28) /**< \brief Pin Controlled by PC28 */ -#define PIO_PC29 (1u << 29) /**< \brief Pin Controlled by PC29 */ -#define PIO_PC30 (1u << 30) /**< \brief Pin Controlled by PC30 */ -#define PIO_PC31 (1u << 31) /**< \brief Pin Controlled by PC31 */ -/* ========== Pio definition for HSMCI peripheral ========== */ -#define PIO_PA28C_MCCDA (1u << 28) /**< \brief Hsmci signal: MCCDA */ -#define PIO_PA29C_MCCK (1u << 29) /**< \brief Hsmci signal: MCCK */ -#define PIO_PA30C_MCDA0 (1u << 30) /**< \brief Hsmci signal: MCDA0 */ -#define PIO_PA31C_MCDA1 (1u << 31) /**< \brief Hsmci signal: MCDA1 */ -#define PIO_PA26C_MCDA2 (1u << 26) /**< \brief Hsmci signal: MCDA2 */ -#define PIO_PA27C_MCDA3 (1u << 27) /**< \brief Hsmci signal: MCDA3 */ -/* ========== Pio definition for SSC peripheral ========== */ -#define PIO_PA18A_RD (1u << 18) /**< \brief Ssc signal: RD */ -#define PIO_PA20A_RF (1u << 20) /**< \brief Ssc signal: RF */ -#define PIO_PA19A_RK (1u << 19) /**< \brief Ssc signal: RK */ -#define PIO_PA17A_TD (1u << 17) /**< \brief Ssc signal: TD */ -#define PIO_PA15A_TF (1u << 15) /**< \brief Ssc signal: TF */ -#define PIO_PA16A_TK (1u << 16) /**< \brief Ssc signal: TK */ -/* ========== Pio definition for SPI peripheral ========== */ -#define PIO_PA12A_MISO (1u << 12) /**< \brief Spi signal: MISO */ -#define PIO_PA13A_MOSI (1u << 13) /**< \brief Spi signal: MOSI */ -#define PIO_PA11A_NPCS0 (1u << 11) /**< \brief Spi signal: NPCS0 */ -#define PIO_PA9B_NPCS1 (1u << 9) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA31A_NPCS1 (1u << 31) /**< \brief Spi signal: NPCS1 */ -#define PIO_PB14A_NPCS1 (1u << 14) /**< \brief Spi signal: NPCS1 */ -#define PIO_PC4B_NPCS1 (1u << 4) /**< \brief Spi signal: NPCS1 */ -#define PIO_PA10B_NPCS2 (1u << 10) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA30B_NPCS2 (1u << 30) /**< \brief Spi signal: NPCS2 */ -#define PIO_PB2B_NPCS2 (1u << 2) /**< \brief Spi signal: NPCS2 */ -#define PIO_PA3B_NPCS3 (1u << 3) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA5B_NPCS3 (1u << 5) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA22B_NPCS3 (1u << 22) /**< \brief Spi signal: NPCS3 */ -#define PIO_PA14A_SPCK (1u << 14) /**< \brief Spi signal: SPCK */ -/* ========== Pio definition for TC0 peripheral ========== */ -#define PIO_PA4B_TCLK0 (1u << 4) /**< \brief Tc0 signal: TCLK0 */ -#define PIO_PA28B_TCLK1 (1u << 28) /**< \brief Tc0 signal: TCLK1 */ -#define PIO_PA29B_TCLK2 (1u << 29) /**< \brief Tc0 signal: TCLK2 */ -#define PIO_PA0B_TIOA0 (1u << 0) /**< \brief Tc0 signal: TIOA0 */ -#define PIO_PA15B_TIOA1 (1u << 15) /**< \brief Tc0 signal: TIOA1 */ -#define PIO_PA26B_TIOA2 (1u << 26) /**< \brief Tc0 signal: TIOA2 */ -#define PIO_PA1B_TIOB0 (1u << 1) /**< \brief Tc0 signal: TIOB0 */ -#define PIO_PA16B_TIOB1 (1u << 16) /**< \brief Tc0 signal: TIOB1 */ -#define PIO_PA27B_TIOB2 (1u << 27) /**< \brief Tc0 signal: TIOB2 */ -/* ========== Pio definition for TC1 peripheral ========== */ -#define PIO_PC25B_TCLK3 (1u << 25) /**< \brief Tc1 signal: TCLK3 */ -#define PIO_PC28B_TCLK4 (1u << 28) /**< \brief Tc1 signal: TCLK4 */ -#define PIO_PC31B_TCLK5 (1u << 31) /**< \brief Tc1 signal: TCLK5 */ -#define PIO_PC23B_TIOA3 (1u << 23) /**< \brief Tc1 signal: TIOA3 */ -#define PIO_PC26B_TIOA4 (1u << 26) /**< \brief Tc1 signal: TIOA4 */ -#define PIO_PC29B_TIOA5 (1u << 29) /**< \brief Tc1 signal: TIOA5 */ -#define PIO_PC24B_TIOB3 (1u << 24) /**< \brief Tc1 signal: TIOB3 */ -#define PIO_PC27B_TIOB4 (1u << 27) /**< \brief Tc1 signal: TIOB4 */ -#define PIO_PC30B_TIOB5 (1u << 30) /**< \brief Tc1 signal: TIOB5 */ -/* ========== Pio definition for TWI0 peripheral ========== */ -#define PIO_PA4A_TWCK0 (1u << 4) /**< \brief Twi0 signal: TWCK0 */ -#define PIO_PA3A_TWD0 (1u << 3) /**< \brief Twi0 signal: TWD0 */ -/* ========== Pio definition for TWI1 peripheral ========== */ -#define PIO_PB5A_TWCK1 (1u << 5) /**< \brief Twi1 signal: TWCK1 */ -#define PIO_PB4A_TWD1 (1u << 4) /**< \brief Twi1 signal: TWD1 */ -/* ========== Pio definition for PWM peripheral ========== */ -#define PIO_PA9C_PWMFI0 (1u << 9) /**< \brief Pwm signal: PWMFI0 */ -#define PIO_PA0A_PWMH0 (1u << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA11B_PWMH0 (1u << 11) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA23B_PWMH0 (1u << 23) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PB0A_PWMH0 (1u << 0) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PC18B_PWMH0 (1u << 18) /**< \brief Pwm signal: PWMH0 */ -#define PIO_PA1A_PWMH1 (1u << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA12B_PWMH1 (1u << 12) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA24B_PWMH1 (1u << 24) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PB1A_PWMH1 (1u << 1) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PC19B_PWMH1 (1u << 19) /**< \brief Pwm signal: PWMH1 */ -#define PIO_PA2A_PWMH2 (1u << 2) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA13B_PWMH2 (1u << 13) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA25B_PWMH2 (1u << 25) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PB4B_PWMH2 (1u << 4) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PC20B_PWMH2 (1u << 20) /**< \brief Pwm signal: PWMH2 */ -#define PIO_PA7B_PWMH3 (1u << 7) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA14B_PWMH3 (1u << 14) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA17C_PWMH3 (1u << 17) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PB14B_PWMH3 (1u << 14) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PC21B_PWMH3 (1u << 21) /**< \brief Pwm signal: PWMH3 */ -#define PIO_PA19B_PWML0 (1u << 19) /**< \brief Pwm signal: PWML0 */ -#define PIO_PB5B_PWML0 (1u << 5) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC0B_PWML0 (1u << 0) /**< \brief Pwm signal: PWML0 */ -#define PIO_PC13B_PWML0 (1u << 13) /**< \brief Pwm signal: PWML0 */ -#define PIO_PA20B_PWML1 (1u << 20) /**< \brief Pwm signal: PWML1 */ -#define PIO_PB12A_PWML1 (1u << 12) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC1B_PWML1 (1u << 1) /**< \brief Pwm signal: PWML1 */ -#define PIO_PC15B_PWML1 (1u << 15) /**< \brief Pwm signal: PWML1 */ -#define PIO_PA16C_PWML2 (1u << 16) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA30A_PWML2 (1u << 30) /**< \brief Pwm signal: PWML2 */ -#define PIO_PB13A_PWML2 (1u << 13) /**< \brief Pwm signal: PWML2 */ -#define PIO_PC2B_PWML2 (1u << 2) /**< \brief Pwm signal: PWML2 */ -#define PIO_PA15C_PWML3 (1u << 15) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC3B_PWML3 (1u << 3) /**< \brief Pwm signal: PWML3 */ -#define PIO_PC22B_PWML3 (1u << 22) /**< \brief Pwm signal: PWML3 */ -/* ========== Pio definition for USART0 peripheral ========== */ -#define PIO_PA8A_CTS0 (1u << 8) /**< \brief Usart0 signal: CTS0 */ -#define PIO_PA7A_RTS0 (1u << 7) /**< \brief Usart0 signal: RTS0 */ -#define PIO_PA5A_RXD0 (1u << 5) /**< \brief Usart0 signal: RXD0 */ -#define PIO_PA2B_SCK0 (1u << 2) /**< \brief Usart0 signal: SCK0 */ -#define PIO_PA6A_TXD0 (1u << 6) /**< \brief Usart0 signal: TXD0 */ -/* ========== Pio definition for USART1 peripheral ========== */ -#define PIO_PA25A_CTS1 (1u << 25) /**< \brief Usart1 signal: CTS1 */ -#define PIO_PA26A_DCD1 (1u << 26) /**< \brief Usart1 signal: DCD1 */ -#define PIO_PA28A_DSR1 (1u << 28) /**< \brief Usart1 signal: DSR1 */ -#define PIO_PA27A_DTR1 (1u << 27) /**< \brief Usart1 signal: DTR1 */ -#define PIO_PA29A_RI1 (1u << 29) /**< \brief Usart1 signal: RI1 */ -#define PIO_PA24A_RTS1 (1u << 24) /**< \brief Usart1 signal: RTS1 */ -#define PIO_PA21A_RXD1 (1u << 21) /**< \brief Usart1 signal: RXD1 */ -#define PIO_PA23A_SCK1 (1u << 23) /**< \brief Usart1 signal: SCK1 */ -#define PIO_PA22A_TXD1 (1u << 22) /**< \brief Usart1 signal: TXD1 */ -/* ========== Pio definition for ADC peripheral ========== */ -#define PIO_PA17X1_AD0 (1u << 17) /**< \brief Adc signal: AD0 */ -#define PIO_PA18X1_AD1 (1u << 18) /**< \brief Adc signal: AD1 */ -#define PIO_PC13X1_AD10 (1u << 13) /**< \brief Adc signal: AD10 */ -#define PIO_PC15X1_AD11 (1u << 15) /**< \brief Adc signal: AD11 */ -#define PIO_PC12X1_AD12 (1u << 12) /**< \brief Adc signal: AD12 */ -#define PIO_PC29X1_AD13 (1u << 29) /**< \brief Adc signal: AD13 */ -#define PIO_PC30X1_AD14 (1u << 30) /**< \brief Adc signal: AD14 */ -#define PIO_PA19X1_AD2_WKUP9 (1u << 19) /**< \brief Adc signal: AD2/WKUP9 */ -#define PIO_PA20X1_AD3_WKUP10 (1u << 20) /**< \brief Adc signal: AD3/WKUP10 */ -#define PIO_PB0X1_AD4 (1u << 0) /**< \brief Adc signal: AD4 */ -#define PIO_PB1X1_AD5 (1u << 1) /**< \brief Adc signal: AD5 */ -#define PIO_PB2X1_AD6_WKUP12 (1u << 2) /**< \brief Adc signal: AD6/WKUP12 */ -#define PIO_PB3X1_AD7 (1u << 3) /**< \brief Adc signal: AD7 */ -#define PIO_PA21X1_AD8 (1u << 21) /**< \brief Adc signal: AD8 */ -#define PIO_PA22X1_AD9 (1u << 22) /**< \brief Adc signal: AD9 */ -#define PIO_PA8B_ADTRG (1u << 8) /**< \brief Adc signal: ADTRG */ -/* ========== Pio definition for DACC peripheral ========== */ -#define PIO_PB13X1_DAC0 (1u << 13) /**< \brief Dacc signal: DAC0 */ -#define PIO_PB14X1_DAC1 (1u << 14) /**< \brief Dacc signal: DAC1 */ -#define PIO_PA2C_DATRG (1u << 2) /**< \brief Dacc signal: DATRG */ -/* ========== Pio definition for PMC peripheral ========== */ -#define PIO_PA6B_PCK0 (1u << 6) /**< \brief Pmc signal: PCK0 */ -#define PIO_PB13B_PCK0 (1u << 13) /**< \brief Pmc signal: PCK0 */ -#define PIO_PA17B_PCK1 (1u << 17) /**< \brief Pmc signal: PCK1 */ -#define PIO_PA21B_PCK1 (1u << 21) /**< \brief Pmc signal: PCK1 */ -#define PIO_PA18B_PCK2 (1u << 18) /**< \brief Pmc signal: PCK2 */ -#define PIO_PA31B_PCK2 (1u << 31) /**< \brief Pmc signal: PCK2 */ -#define PIO_PB3B_PCK2 (1u << 3) /**< \brief Pmc signal: PCK2 */ -/* ========== Pio definition for UART0 peripheral ========== */ -#define PIO_PA9A_URXD0 (1u << 9) /**< \brief Uart0 signal: URXD0 */ -#define PIO_PA10A_UTXD0 (1u << 10) /**< \brief Uart0 signal: UTXD0 */ -/* ========== Pio definition for UART1 peripheral ========== */ -#define PIO_PB2A_URXD1 (1u << 2) /**< \brief Uart1 signal: URXD1 */ -#define PIO_PB3A_UTXD1 (1u << 3) /**< \brief Uart1 signal: UTXD1 */ -/* ========== Pio definition for PIOA peripheral ========== */ -#define PIO_PA24D_PIODC0 (1u << 24) /**< \brief Pioa signal: PIODC0 */ -#define PIO_PA25D_PIODC1 (1u << 25) /**< \brief Pioa signal: PIODC1 */ -#define PIO_PA26D_PIODC2 (1u << 26) /**< \brief Pioa signal: PIODC2 */ -#define PIO_PA27D_PIODC3 (1u << 27) /**< \brief Pioa signal: PIODC3 */ -#define PIO_PA28D_PIODC4 (1u << 28) /**< \brief Pioa signal: PIODC4 */ -#define PIO_PA29D_PIODC5 (1u << 29) /**< \brief Pioa signal: PIODC5 */ -#define PIO_PA30D_PIODC6 (1u << 30) /**< \brief Pioa signal: PIODC6 */ -#define PIO_PA31D_PIODC7 (1u << 31) /**< \brief Pioa signal: PIODC7 */ -#define PIO_PA23D_PIODCCLK (1u << 23) /**< \brief Pioa signal: PIODCCLK */ -#define PIO_PA15D_PIODCEN1 (1u << 15) /**< \brief Pioa signal: PIODCEN1 */ -#define PIO_PA16D_PIODCEN2 (1u << 16) /**< \brief Pioa signal: PIODCEN2 */ -/*@}*/ - -/* ************************************************************************** */ -/* MEMORY MAPPING DEFINITIONS FOR SAM3S */ -/* ************************************************************************** */ - -#define IFLASH_ADDR (0x00400000u) /**< Internal Flash base address */ -#define IROM_ADDR (0x00800000u) /**< Internal ROM base address */ -#define IRAM_ADDR (0x20000000u) /**< Internal RAM base address */ -#define EBI_CS0_ADDR (0x60000000u) /**< EBI Chip Select 0 base address */ -#define EBI_CS1_ADDR (0x61000000u) /**< EBI Chip Select 1 base address */ -#define EBI_CS2_ADDR (0x62000000u) /**< EBI Chip Select 2 base address */ -#define EBI_CS3_ADDR (0x63000000u) /**< EBI Chip Select 3 base address */ - -#if defined sam3s1 -#define IFLASH_SIZE 0x10000 -#define IFLASH_PAGE_SIZE (256) /* Internal FLASH 0 Page Size: 256 bytes */ -#define IFLASH_LOCK_REGION_SIZE (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */ -#define IFLASH_NB_OF_PAGES (256) /* Internal FLASH 0 Number of Pages: 256 */ -#define IFLASH_NB_OF_LOCK_BITS (4) /* Internal FLASH 0 Number of Lock Bits: 4 */ -#define IRAM_SIZE 0x4000 -#elif defined sam3s2 -#define IFLASH_SIZE 0x20000 -#define IFLASH_PAGE_SIZE (256) /* Internal FLASH 0 Page Size: 256 bytes */ -#define IFLASH_LOCK_REGION_SIZE (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */ -#define IFLASH_NB_OF_PAGES (512) /* Internal FLASH 0 Number of Pages: 512 */ -#define IFLASH_NB_OF_LOCK_BITS (8) /* Internal FLASH 0 Number of Lock Bits: 8 */ -#define IRAM_SIZE 0x8000 -#elif defined sam3s4 -#define IFLASH_SIZE 0x40000 -#define IFLASH_PAGE_SIZE (256) /* Internal FLASH 0 Page Size: 256 bytes */ -#define IFLASH_LOCK_REGION_SIZE (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */ -#define IFLASH_NB_OF_PAGES (1024) /* Internal FLASH 0 Number of Pages: 1024 */ -#define IFLASH_NB_OF_LOCK_BITS (16) /* Internal FLASH 0 Number of Lock Bits: 16 */ -#define IRAM_SIZE 0xC000 -#else - #error Library does not support the specified device. -#endif - -#ifdef __cplusplus -} -#endif - -/*@}*/ - -#endif /* SAM3S_H */ diff --git a/firmware/sam3s_examples_include/USBD_LEDs.h b/firmware/sam3s_examples_include/USBD_LEDs.h deleted file mode 100644 index f15ad185..00000000 --- a/firmware/sam3s_examples_include/USBD_LEDs.h +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Collection of LEDs for using the USB device controller on AT91 - * microcontrollers. - */ - -#ifndef USBDLEDS_H -#define USBDLEDS_H - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "board.h" - -/** \addtogroup usbd_hal - *@{ - */ -/*---------------------------------------------------------------------------- - * Constants - *----------------------------------------------------------------------------*/ - -/** \addtogroup usbd_leds USB Device LEDs - * @{ - * This page lists the LEDs used in the USB %device driver. - * - * - USBD_LEDPOWER - * - USBD_LEDUSB - * - USBD_LEDOTHER - */ - -/** LED for indicating that the device is powered. */ -#define USBD_LEDPOWER 0 -/** LED for indicating USB activity. */ -#define USBD_LEDUSB 1 -/** LED for custom usage. */ -#define USBD_LEDOTHER 2 -/** @}*/ - -/**@}*/ - -#endif //#ifndef USBDLEDS_H - diff --git a/firmware/sam3s_examples_include/acc.h b/firmware/sam3s_examples_include/acc.h deleted file mode 100644 index dcf38725..00000000 --- a/firmware/sam3s_examples_include/acc.h +++ /dev/null @@ -1,151 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ACC) peripheral. - * - * \section Usage - * - * -# Configurate the pins for ACC - * -# Initialize the ACC with ACC_Initialize(). - * -# Select the active channel using ACC_EnableChannel() - * -# Start the conversion with ACC_StartConversion() - * -# Wait the end of the conversion by polling status with ACC_GetStatus() - * -# Finally, get the converted data using ACC_GetConvertedData() - * - */ -#ifndef _ACC_ -#define _ACC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define ACC_SELPLUS_AD12B0 0 -#define ACC_SELPLUS_AD12B1 1 -#define ACC_SELPLUS_AD12B2 2 -#define ACC_SELPLUS_AD12B3 3 -#define ACC_SELPLUS_AD12B4 4 -#define ACC_SELPLUS_AD12B5 5 -#define ACC_SELPLUS_AD12B6 6 -#define ACC_SELPLUS_AD12B7 7 -#define ACC_SELMINUS_TS 0 -#define ACC_SELMINUS_ADVREF 1 -#define ACC_SELMINUS_DAC0 2 -#define ACC_SELMINUS_DAC1 3 -#define ACC_SELMINUS_AD12B0 4 -#define ACC_SELMINUS_AD12B1 5 -#define ACC_SELMINUS_AD12B2 6 -#define ACC_SELMINUS_AD12B3 7 - -#ifdef __cplusplus - extern "C" { -#endif - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define ACC_CfgModeReg(pAcc, mode) { \ - (pAcc)->ACC_MR = (mode);\ - } - -#define ACC_GetModeReg( pAcc ) ((pAcc)->ACC_MR) - -#define ACC_StartConversion( pAcc ) ((pAcc)->ACC_CR = ACC_CR_START) - -#define ACC_SoftReset( pAcc ) ((pAcc)->ACC_CR = ACC_CR_SWRST) - -#define ACC_EnableChannel( pAcc, dwChannel ) {\ - assert( dwChannel < 16 ) ;\ - (pAcc)->ACC_CHER = (1 << (dwChannel));\ - } - -#define ACC_DisableChannel( pAcc, dwChannel ) {\ - assert( dwChannel < 16 ) ;\ - (pAcc)->ACC_CHDR = (1 << (dwChannel));\ - } - -#define ACC_EnableIt( pAcc, dwMode ) {\ - assert( ((dwMode)&0xFFF00000)== 0 ) ;\ - (pAcc)->ACC_IER = (dwMode);\ - } - -#define ACC_DisableIt( pAcc, dwMode ) {\ - assert( ((dwMode)&0xFFF00000)== 0 ) ;\ - (pAcc)->ACC_IDR = (dwMode);\ - } - -#define ACC_EnableDataReadyIt( pAcc ) ((pAcc)->ACC_IER = AT91C_ACC_DRDY) - -#define ACC_GetStatus( pAcc ) ((pAcc)->ACC_ISR) - -#define ACC_GetChannelStatus( pAcc ) ((pAcc)->ACC_CHSR) - -#define ACC_GetInterruptMaskStatus( pAcc ) ((pAcc)->ACC_IMR) - -#define ACC_GetLastConvertedData( pAcc ) ((pAcc)->ACC_LCDR) - -#define ACC_CfgAnalogCtrlReg( pAcc, dwMode ) {\ - assert( ((dwMode) & 0xFFFCFF3C) == 0 ) ;\ - (pAcc)->ACC_ACR = (dwMode);\ - } - -#define ACC_CfgExtModeReg( pAcc, extmode ) {\ - assert( ((extmode) & 0xFF00FFFE) == 0 ) ;\ - (pAcc)->ACC_EMR = (extmode);\ - } - -#define ACC_GetAnalogCtrlReg( pAcc ) ((pAcc)->ACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void ACC_Configure( Acc *pAcc, uint8_t idAcc, uint8_t ucSelplus, uint8_t ucSelminus, - uint16_t wAc_en, uint16_t wEdge, uint16_t wInvert ) ; - -extern void ACC_SetComparisionPair( Acc *pAcc, uint8_t ucSelplus, uint8_t ucSelminus ) ; - -extern uint32_t ACC_GetComparisionResult( Acc* pAcc, uint32_t dwStatus ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _ACC_ */ diff --git a/firmware/sam3s_examples_include/adc.h b/firmware/sam3s_examples_include/adc.h deleted file mode 100644 index 1208185f..00000000 --- a/firmware/sam3s_examples_include/adc.h +++ /dev/null @@ -1,157 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Analog-to-Digital Converter (ADC) peripheral. - * - * \section Usage - * - * -# Configurate the pins for ADC - * -# Initialize the ADC with ADC_Initialize(). - * -# Select the active channel using ADC_EnableChannel() - * -# Start the conversion with ADC_StartConversion() - * -# Wait the end of the conversion by polling status with ADC_GetStatus() - * -# Finally, get the converted data using ADC_GetConvertedData() - * -*/ -#ifndef _ADC_ -#define _ADC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -/* SAM3S */ -#define ADC_FREQ_MAX 20000000 -#define ADC_FREQ_MIN 1000000 - -#define ADC_STARTUP_NORM 40 -#define ADC_STARTUP_FAST 12 - -#define ADC_CHANNEL_0 0 -#define ADC_CHANNEL_1 1 -#define ADC_CHANNEL_2 2 -#define ADC_CHANNEL_3 3 -#define ADC_CHANNEL_4 4 -#define ADC_CHANNEL_5 5 -#define ADC_CHANNEL_6 6 -#define ADC_CHANNEL_7 7 -#define ADC_CHANNEL_8 8 -#define ADC_CHANNEL_9 9 -#define ADC_CHANNEL_10 10 -#define ADC_CHANNEL_11 11 -#define ADC_CHANNEL_12 12 -#define ADC_CHANNEL_13 13 -#define ADC_CHANNEL_14 14 -#define ADC_CHANNEL_15 15 - -#ifdef __cplusplus - extern "C" { -#endif - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ - -#define ADC_GetModeReg( pAdc ) ((pAdc)->ADC_MR) - -#define ADC_StartConversion( pAdc ) ((pAdc)->ADC_CR = ADC_CR_START) - - -#define ADC_EnableChannel( pAdc, channel ) {\ - assert( channel < 16 ) ;\ - (pAdc)->ADC_CHER = (1 << (channel));\ - } - -#define ADC_DisableChannel(pAdc, channel) {\ - assert( (channel) < 16 ) ;\ - (pAdc)->ADC_CHDR = (1 << (channel));\ - } - -#define ADC_EnableIt(pAdc, dwMode) {\ - (pAdc)->ADC_IER = (dwMode);\ - } - -#define ADC_DisableIt(pAdc, dwMode) {\ - (pAdc)->ADC_IDR = (dwMode);\ - } - -#define ADC_EnableTS(pAdc,dwMode) {\ - (pAdc)->ADC_ACR |= dwMode;\ - } - -#define ADC_EnableDataReadyIt(pAdc) ((pAdc)->ADC_IER = AT91C_ADC_DRDY) - -#define ADC_GetStatus(pAdc) ((pAdc)->ADC_ISR) - -#define ADC_GetCompareMode(pAdc) (((pAdc)->ADC_EMR)& (ADC_EMR_CMPMODE_Msk)) - -#define ADC_GetChannelStatus(pAdc) ((pAdc)->ADC_CHSR) - -#define ADC_GetInterruptMaskStatus(pAdc) ((pAdc)->ADC_IMR) - -#define ADC_GetLastConvertedData(pAdc) ((pAdc)->ADC_LCDR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void ADC_Initialize( Adc* pAdc, uint32_t idAdc ); -extern void ADC_CfgTiming( Adc* pAdc, uint32_t tracking, uint32_t settling, uint32_t transfer ); -extern void ADC_cfgFrequency( Adc* pAdc, uint32_t startup, uint32_t prescal ); -extern void ADC_CfgTrigering( Adc* pAdc, uint32_t trgEn, uint32_t trgSel, uint32_t freeRun ); -extern void ADC_CfgLowRes( Adc* pAdc, uint32_t resolution ); -extern void ADC_CfgPowerSave( Adc* pAdc, uint32_t sleep, uint32_t fwup ); -extern void ADC_CfgChannelMode( Adc* pAdc, uint32_t useq, uint32_t anach ); -extern void ADC_check( Adc* pAdc, uint32_t mck_freq ); - -extern uint32_t ADC_GetConvertedData( Adc* pAdc, uint32_t dwChannel ) ; -extern void ADC_SetCompareChannel( Adc* pAdc, uint32_t dwChannel ) ; -extern void ADC_SetCompareMode( Adc* pAdc, uint32_t dwMode ) ; -extern void ADC_SetComparisonWindow( Adc* pAdc, uint32_t dwHi_Lo ) ; -extern uint32_t ADC_IsInterruptMasked( Adc* pAdc, uint32_t dwFlag ) ; -extern uint32_t ADC_IsStatusSet( Adc* pAdc, uint32_t dwFlag ) ; -extern uint32_t ADC_IsChannelInterruptStatusSet( uint32_t adc_sr, uint32_t dwChannel ) ; -extern uint32_t ADC_ReadBuffer( Adc* pADC, int16_t *pwBuffer, uint32_t dwSize ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _ADC_ */ diff --git a/firmware/sam3s_examples_include/async.h b/firmware/sam3s_examples_include/async.h deleted file mode 100644 index f332cb9f..00000000 --- a/firmware/sam3s_examples_include/async.h +++ /dev/null @@ -1,80 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Provide a routine for asynchronous transfer. - * - */ - -#ifndef _ASYNC_ -#define _ASYNC_ - - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ -/** Transfer is still pending.*/ -#define ASYNC_STATUS_PENDING 0xFF - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Type - *----------------------------------------------------------------------------*/ -/** \brief Asynchronous transfer descriptor. */ -typedef struct _Async -{ - /** Asynchronous transfer status.*/ - volatile uint8_t status ; - /** Callback function to invoke when transfer completes or fails.*/ - void *callback ; - /** Driver storage area; do not use.*/ - uint32_t pStorage[4] ; -} Async ; - -/*---------------------------------------------------------------------------- - * Global functions - *----------------------------------------------------------------------------*/ -extern uint32_t ASYNC_IsFinished( Async* pAsync ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _ASYNC_ */ - diff --git a/firmware/sam3s_examples_include/crccu.h b/firmware/sam3s_examples_include/crccu.h deleted file mode 100644 index b2d3d587..00000000 --- a/firmware/sam3s_examples_include/crccu.h +++ /dev/null @@ -1,65 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Cyclic Redundancy Check Calculation Unit (CRCCU). - */ - -#ifndef _CRCCU_ -#define _CRCCU_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -typedef struct -{ - uint32_t TR_ADDR ; - uint32_t TR_CTRL ; -} CrcDscr ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void CRCCU_ResetCrcValue( Crccu* pCrccu ) ; -extern void CRCCU_Configure( Crccu* pCrccu, uint32_t dwDscrAddr, uint32_t dwMode ) ; -extern uint32_t CRCCU_ComputeCrc( Crccu* pCrccu ) ; - -#endif /* #ifndef _CRCCU_ */ - diff --git a/firmware/sam3s_examples_include/dacc.h b/firmware/sam3s_examples_include/dacc.h deleted file mode 100644 index 80944bc8..00000000 --- a/firmware/sam3s_examples_include/dacc.h +++ /dev/null @@ -1,146 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Analog-to-Digital Converter (DACC) peripheral. - * - * \section Usage - * - * -# Configurate the pins for DACC - * -# Initialize the DACC with DACC_Initialize(). - * -# Select the active channel using DACC_EnableChannel() - * -# Start the conversion with DACC_StartConversion() - * -# Wait the end of the conversion by polling status with DACC_GetStatus() - * -# Finally, get the converted data using DACC_GetConvertedData() - * -*/ -#ifndef _DACC_ -#define _DACC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ -#define DACC_CHANNEL_0 0 -#define DACC_CHANNEL_1 1 - -#ifdef __cplusplus - extern "C" { -#endif - -/*------------------------------------------------------------------------------ - * Macros function of register access - *------------------------------------------------------------------------------*/ -#define DACC_CfgModeReg(pDACC, mode) { \ - (pDACC)->DACC_MR = (mode);\ - } - -#define DACC_GetModeReg(pDACC) ((pDACC)->DACC_MR) - -#define DACC_StartConversion(pDACC) ((pDACC)->DACC_CR = DACC_CR_START) - -#define DACC_SoftReset(pDACC) ((pDACC)->DACC_CR = DACC_CR_SWRST) - -#define DACC_EnableChannel(pDACC, channel) {\ - (pDACC)->DACC_CHER = (1 << (channel));\ - } - -#define DACC_DisableChannel(pDACC, channel) {\ - (pDACC)->DACC_CHDR = (1 << (channel));\ - } - -#define DACC_EnableIt(pDACC, mode) {\ - assert( ((mode)&0xFFF00000)== 0 ) ;\ - (pDACC)->DACC_IER = (mode);\ - } - -#define DACC_DisableIt(pDACC, mode) {\ - assert( ((mode)&0xFFF00000)== 0 ) ;\ - (pDACC)->DACC_IDR = (mode);\ - } - -#define DACC_EnableDataReadyIt(pDACC) ((pDACC)->DACC_IER = AT91C_DACC_DRDY) - -#define DACC_GetStatus(pDACC) ((pDACC)->DACC_ISR) - -#define DACC_GetChannelStatus(pDACC) ((pDACC)->DACC_CHSR) - -#define DACC_GetInterruptMaskStatus(pDACC) ((pDACC)->DACC_IMR) - -#define DACC_GetLastConvertedData(pDACC) ((pDACC)->DACC_LCDR) - -#define DACC_CfgAnalogCtrlReg(pDACC,mode) {\ - assert( ((mode) & 0xFFFCFF3C)==0 ) ;\ - (pDACC)->DACC_ACR = (mode);\ - } - -#define DACC_CfgExtModeReg(pDACC, extmode) {\ - assert( ((extmode) & 0xFF00FFFE)==0 ) ;\ - (pDACC)->DACC_EMR = (extmode);\ - } - -#define DACC_GetAnalogCtrlReg(pDACC) ((pDACC)->DACC_ACR) - -/*------------------------------------------------------------------------------ - * Exported functions - *------------------------------------------------------------------------------*/ -extern void DACC_Initialize( Dacc* pDACC, - uint8_t idDACC, - uint8_t trgEn, - uint8_t trgSel, - uint8_t word, - uint8_t sleepMode, - uint32_t mck, - uint8_t refresh,/*refresh period*/ - uint8_t user_sel,/*user channel selection*/ - uint32_t tag_mode,/*using tag for channel number*/ - uint32_t startup - ); - - -extern void DACC_SetConversionData( Dacc* pDACC, uint32_t dwData ) ; - -extern uint32_t DACC_WriteBuffer( Dacc* pDACC, uint16_t* pwBuffer, uint32_t dwSize ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _DACC_ */ diff --git a/firmware/sam3s_examples_include/efc.h b/firmware/sam3s_examples_include/efc.h deleted file mode 100644 index 0a99633d..00000000 --- a/firmware/sam3s_examples_include/efc.h +++ /dev/null @@ -1,113 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \section Purpose - * - * Interface for configuration the Enhanced Embedded Flash Controller (EEFC) peripheral. - * - * \section Usage - * - * -# Enable/disable %flash ready interrupt sources using EFC_EnableFrdyIt() - * and EFC_DisableFrdyIt(). - * -# Translates the given address into which EEFC, page and offset values - * for difference density %flash memory using EFC_TranslateAddress(). - * -# Computes the address of a %flash access given the EFC, page and offset - * for difference density %flash memory using EFC_ComputeAddress(). - * -# Start the executing command with EFC_StartCommand() - * -# Retrieve the current status of the EFC using EFC_GetStatus(). - * -# Retrieve the result of the last executed command with EFC_GetResult(). - */ - -#ifndef _EEFC_ -#define _EEFC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ -/* EFC command */ -#define EFC_FCMD_GETD 0x00 -#define EFC_FCMD_WP 0x01 -#define EFC_FCMD_WPL 0x02 -#define EFC_FCMD_EWP 0x03 -#define EFC_FCMD_EWPL 0x04 -#define EFC_FCMD_EA 0x05 -#define EFC_FCMD_SLB 0x08 -#define EFC_FCMD_CLB 0x09 -#define EFC_FCMD_GLB 0x0A -#define EFC_FCMD_SFB 0x0B -#define EFC_FCMD_CFB 0x0C -#define EFC_FCMD_GFB 0x0D -#define EFC_FCMD_STUI 0x0E /* Start unique ID */ -#define EFC_FCMD_SPUI 0x0F /* Stop unique ID */ - -/* The IAP function entry addreass */ -#define CHIP_FLASH_IAP_ADDRESS (0x00800008) - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void EFC_EnableFrdyIt( Efc* efc ) ; - -extern void EFC_DisableFrdyIt( Efc* efc ) ; - -extern void EFC_SetWaitState( Efc* efc, uint8_t cycles ) ; - -extern void EFC_TranslateAddress( Efc** pEfc, uint32_t dwAddress, uint16_t *pwPage, uint16_t *pwOffset ) ; - -extern void EFC_ComputeAddress( Efc* efc, uint16_t wPage, uint16_t wOffset, uint32_t *pdwAddress ) ; - -extern void EFC_StartCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument ) ; - -extern uint32_t EFC_PerformCommand( Efc* efc, uint32_t dwCommand, uint32_t dwArgument, uint32_t dwUseIAP ) ; - -extern uint32_t EFC_GetStatus( Efc* efc ) ; - -extern uint32_t EFC_GetResult( Efc* efc ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _EEFC_ */ - diff --git a/firmware/sam3s_examples_include/flashd.h b/firmware/sam3s_examples_include/flashd.h deleted file mode 100644 index e58ba029..00000000 --- a/firmware/sam3s_examples_include/flashd.h +++ /dev/null @@ -1,79 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- -*/ - -/** - * \file - * - * The flash driver provides the unified interface for flash program operations. - * - */ - -#ifndef _FLASHD_ -#define _FLASHD_ - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void FLASHD_Initialize( uint32_t dwMCk, uint32_t dwUseIAP ) ; - -extern uint32_t FLASHD_Erase( uint32_t dwAddress ) ; - -extern uint32_t FLASHD_Write( uint32_t dwAddress, const void *pvBuffer, uint32_t dwSize ) ; - -extern uint32_t FLASHD_Lock( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd ) ; - -extern uint32_t FLASHD_Unlock( uint32_t dwStart, uint32_t dwEnd, uint32_t *pdwActualStart, uint32_t *pdwActualEnd ) ; - -extern uint32_t FLASHD_IsLocked( uint32_t dwStart, uint32_t dwEnd ) ; - -extern uint32_t FLASHD_SetGPNVM( uint8_t gpnvm ) ; - -extern uint32_t FLASHD_ClearGPNVM( uint8_t gpnvm ) ; - -extern uint32_t FLASHD_IsGPNVMSet( uint8_t gpnvm ) ; - -#define FLASHD_IsSecurityBitSet() FLASHD_IsGPNVMSet( 0 ) - -#define FLASHD_SetSecurityBit() FLASHD_SetGPNVM( 0 ) - -extern uint32_t FLASHD_ReadUniqueID( uint32_t* pdwUniqueID ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _FLASHD_ */ - diff --git a/firmware/sam3s_examples_include/hsmci.h b/firmware/sam3s_examples_include/hsmci.h deleted file mode 100644 index 42353413..00000000 --- a/firmware/sam3s_examples_include/hsmci.h +++ /dev/null @@ -1,206 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** \addtogroup hsmci_module Working with HSMCI - * The HSMCI driver provides the interface to configure and use the HSMCI - * peripheral. - * - * The user needs to set the number of wait states depending on the frequency used.\n - * Configure number of cycles for flash read/write operations in the FWS field of HSMCI_FMR. - * - * It offers a function to send flash command to HSMCI and waits for the - * flash to be ready. - * - * To send flash command, the user could do in either of following way: - *
    - *
  • Write a correct key, command and argument in HSMCI_FCR.
    • - *
  • Or, Use IAP (In Application Programming) function which is executed from - * ROM directly, this allows flash programming to be done by code running in flash.
    • - *
  • Once the command is achieved, it can be detected even by polling EEFC_FSR or interrupt. - *
- * - * The command argument could be a page number,GPNVM number or nothing, it depends on - * the command itself. Some useful functions in this driver could help user tranlate physical - * flash address into a page number and vice verse. - * - * For more accurate information, please look at the EEFC section of the - * Datasheet. - * - * Related files :\n - * \ref hsmci_pdc.c\n - * \ref hsmci.h.\n -*/ -/*@{*/ -/*@}*/ - -/** - * \file - */ - -/** - * - * \section Purpose - * - * Implement MultiMediaCard(MCI) Interface Driver - * - * \section Usage - * - * -# MCI_Init(): Initializes a MCI driver instance and the underlying - * peripheral. - * -# MCI_Handler() : Interrupt handler which is called by ISR handler. - * -# MCI_SetSpeed() : Configure the MCI CLKDIV in the _MR register - * (\ref Hsmci::HSMCI_MR). - * -# MCI_SetBusWidth() : Configure the MCI SDCBUS in the _SDCR register - * (\ref Hsmci::HSMCI_SDCR). - * -# MCI_EnableHsMode() : Configure the MCI HSMODE in the _CFG register - * (\ref Hsmci::HSMCI_CFG). - */ - -#ifndef HSMCID_H -#define HSMCID_H -/** \addtogroup sdmmc_hal - *@{ - */ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include -#include - -//#include - -/*---------------------------------------------------------------------------- - * Constants - *----------------------------------------------------------------------------*/ - -/* Transfer type */ - -/** MultiMedia Transfer type: no data */ -#define MCI_NO_TRANSFER 0 -/** MultiMedia Transfer type: Device to Host (read) */ -#define MCI_START_READ 1 -/** MultiMedia Transfer type: Host to Device (write) & check BUSY */ -#define MCI_START_WRITE 2 -/** Device to Host (read) without command */ -#define MCI_READ 3 -/** Host to Device (write) without command & check BUSY */ -#define MCI_WRITE 4 -/** MultiMedia Transfer type: STOP transfer */ -#define MCI_STOP_TRANSFER 5 - -/** MCI Initialize clock 400K Hz */ -#define MCI_INITIAL_SPEED 400000 - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -#ifdef __cplusplus - extern "C" { -#endif - -/** - * \brief MCI Transfer Request prepared by the application upper layer. - * - * This structure is sent to the Sdmmc_SendCommand function to start the transfer. - * At the end of the transfer, the callback is invoked. - */ -typedef struct _MciCmd { - - /** Command code. */ - uint32_t cmd; - /** Command argument. */ - uint32_t arg; - /** Data buffer, with MCI_DMA_ENABLE defined 1, the buffer can be - * 1, 2 or 4 bytes aligned. It has to be 4 byte aligned if no DMA. - */ - uint8_t *pData; - /** Size of data block in bytes. */ - uint16_t blockSize; - /** Number of blocks to be transfered */ - uint16_t nbBlock; - /** Response buffer. */ - uint32_t *pResp; - /** Optional user-provided callback function. */ - void (*callback)( uint8_t status, void *pArg ) ; - /** Optional argument to the callback function. */ - void *pArg; - /** SD card command option. */ - uint8_t resType:7, /** Response */ - busyCheck:1; /** Check busy as end of command */ - /** Indicate transfer type */ - uint8_t tranType; - - /** Indicate end of transfer status */ - uint8_t status; - - /** Command state. */ - volatile uint8_t state; -} MciCmd; - -/** - * \brief MCI Driver - */ -typedef struct -{ - /** Pointer to a MCI peripheral. */ - Hsmci *pMciHw; - /** Pointer to currently executing command. */ - MciCmd *pCommand; - /** MCI peripheral identifier. */ - uint8_t mciId; - /** Mutex. */ - volatile uint8_t semaphore; -} Mcid; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void MCI_Disable(Hsmci *pMciHw); -extern void MCI_Enable(Hsmci *pMciHw); -extern uint8_t MCI_EnableHsMode(Mcid * pMci, uint8_t hsEnable); -extern void MCI_Init( Mcid *pMci, Hsmci *pMciHw, uint8_t mciId, uint32_t dwMCk ) ; -extern uint32_t MCI_SetBusWidth(Mcid *pMci, uint32_t busWidth); -extern uint32_t MCI_SetSpeed(Mcid *pMci, uint32_t mciSpeed, uint32_t mck); - -/* pdc if used */ -extern void MCI_Reset(Mcid *pMci, uint8_t keepSettings); - -#ifdef __cplusplus -} -#endif - -/**@}*/ -#endif //#ifndef HSMCID_H - diff --git a/firmware/sam3s_examples_include/pwmc.h b/firmware/sam3s_examples_include/pwmc.h deleted file mode 100644 index 4ab01665..00000000 --- a/firmware/sam3s_examples_include/pwmc.h +++ /dev/null @@ -1,127 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for configuration the Pulse Width Modulation Controller (PWM) peripheral. - * - * \par Usage - * - * -# Configures PWM clocks A & B to run at the given frequencies using - * \ref PWMC_ConfigureClocks(). - * -# Configure PWMC channel using \ref PWMC_ConfigureChannel(), \ref PWMC_ConfigureChannelExt() - * \ref PWMC_SetPeriod(), \ref PWMC_SetDutyCycle() and \ref PWMC_SetDeadTime(). - * -# Enable & disable channel using \ref PWMC_EnableChannel() and - * \ref PWMC_DisableChannel(). - * -# Enable & disable the period interrupt for the given PWM channel using - * \ref PWMC_EnableChannelIt() and \ref PWMC_DisableChannelIt(). - * -# Enable & disable the selected interrupts sources on a PWMC peripheral - * using \ref PWMC_EnableIt() and \ref PWMC_DisableIt(). - * -# Control syncronous channel using \ref PWMC_ConfigureSyncChannel(), - * \ref PWMC_SetSyncChannelUpdatePeriod() and \ref PWMC_SetSyncChannelUpdateUnlock(). - * -# Control PWM override output using \ref PWMC_SetOverrideValue(), - * \ref PWMC_EnableOverrideOutput() and \ref PWMC_DisableOverrideOutput(). - * -# Send data through the transmitter using \ref PWMC_WriteBuffer(). - * - */ - -#ifndef _PWMC_ -#define _PWMC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern void PWMC_ConfigureChannel( - Pwm* pPwm, - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity); -extern void PWMC_ConfigureChannelExt( - Pwm* pPwm, - uint8_t channel, - uint32_t prescaler, - uint32_t alignment, - uint32_t polarity, - uint32_t countEventSelect, - uint32_t DTEnable, - uint32_t DTHInverte, - uint32_t DTLInverte); -extern void PWMC_ConfigureClocks(uint32_t clka, uint32_t clkb, uint32_t mck); -extern void PWMC_SetPeriod( Pwm* pPwm, uint8_t channel, uint16_t period); -extern void PWMC_SetDutyCycle( Pwm* pPwm, uint8_t channel, uint16_t duty); -extern void PWMC_SetDeadTime( Pwm* pPwm, uint8_t channel, uint16_t timeH, uint16_t timeL); -extern void PWMC_ConfigureSyncChannel( Pwm* pPwm, - uint32_t channels, - uint32_t updateMode, - uint32_t requestMode, - uint32_t requestComparisonSelect); -extern void PWMC_SetSyncChannelUpdatePeriod( Pwm* pPwm, uint8_t period); -extern void PWMC_SetSyncChannelUpdateUnlock( Pwm* pPwm ); -extern void PWMC_EnableChannel( Pwm* pPwm, uint8_t channel); -extern void PWMC_DisableChannel( Pwm* pPwm, uint8_t channel); -extern void PWMC_EnableChannelIt( Pwm* pPwm, uint8_t channel); -extern void PWMC_DisableChannelIt( Pwm* pPwm, uint8_t channel); -extern void PWMC_EnableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2); -extern void PWMC_DisableIt( Pwm* pPwm, uint32_t sources1, uint32_t sources2); -extern uint8_t PWMC_WriteBuffer(Pwm *pwmc, - void *buffer, - uint32_t length); -extern void PWMC_SetOverrideValue( Pwm* pPwm, uint32_t value); -extern void PWMC_EnableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync); -extern void PWMC_DisableOverrideOutput( Pwm* pPwm, uint32_t value, uint32_t sync); -extern void PWMC_SetFaultMode( Pwm* pPwm, uint32_t mode); -extern void PWMC_FaultClear( Pwm* pPwm, uint32_t fault); -extern void PWMC_SetFaultProtectionValue( Pwm* pPwm, uint32_t value); -extern void PWMC_EnableFaultProtection( Pwm* pPwm, uint32_t value); -extern void PWMC_ConfigureComparisonUnit( Pwm* pPwm, uint32_t x, uint32_t value, uint32_t mode); -extern void PWMC_ConfigureEventLineMode( Pwm* pPwm, uint32_t x, uint32_t mode); - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _PWMC_ */ - diff --git a/firmware/sam3s_examples_include/rtc.h b/firmware/sam3s_examples_include/rtc.h deleted file mode 100644 index ed821700..00000000 --- a/firmware/sam3s_examples_include/rtc.h +++ /dev/null @@ -1,97 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Real Time Clock (RTC) controller. - * - */ - -#ifndef _RTC_ -#define _RTC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -#define RTC_HOUR_BIT_LEN_MASK 0x3F -#define RTC_MIN_BIT_LEN_MASK 0x7F -#define RTC_SEC_BIT_LEN_MASK 0x7F -#define RTC_CENT_BIT_LEN_MASK 0x7F -#define RTC_YEAR_BIT_LEN_MASK 0xFF -#define RTC_MONTH_BIT_LEN_MASK 0x1F -#define RTC_DATE_BIT_LEN_MASK 0x3F -#define RTC_WEEK_BIT_LEN_MASK 0x07 - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -#ifdef __cplusplus - extern "C" { -#endif - -extern void RTC_SetHourMode( Rtc* pRtc, uint32_t dwMode ) ; - -extern uint32_t RTC_GetHourMode( Rtc* pRtc ) ; - -extern void RTC_EnableIt( Rtc* pRtc, uint32_t dwSources ) ; - -extern void RTC_DisableIt( Rtc* pRtc, uint32_t dwSources ) ; - -extern int RTC_SetTime( Rtc* pRtc, uint8_t ucHour, uint8_t ucMinute, uint8_t ucSecond ) ; - -extern void RTC_GetTime( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ; - -extern int RTC_SetTimeAlarm( Rtc* pRtc, uint8_t *pucHour, uint8_t *pucMinute, uint8_t *pucSecond ) ; - -extern void RTC_GetDate( Rtc* pRtc, uint16_t *pwYear, uint8_t *pucMonth, uint8_t *pucDay, uint8_t *pucWeek ) ; - -extern int RTC_SetDate( Rtc* pRtc, uint16_t wYear, uint8_t ucMonth, uint8_t ucDay, uint8_t ucWeek ) ; - -extern int RTC_SetDateAlarm( Rtc* pRtc, uint8_t *pucMonth, uint8_t *pucDay ) ; - -extern void RTC_ClearSCCR( Rtc* pRtc, uint32_t dwMask ) ; - -extern uint32_t RTC_GetSR( Rtc* pRtc, uint32_t dwMask ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _RTC_ */ - diff --git a/firmware/sam3s_examples_include/rtt.h b/firmware/sam3s_examples_include/rtt.h deleted file mode 100644 index 4db10693..00000000 --- a/firmware/sam3s_examples_include/rtt.h +++ /dev/null @@ -1,82 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * Interface for Real Time Timer (RTT) controller. - * - * \par Usage - * - * -# Changes the prescaler value of the given RTT and restarts it - * using \ref RTT_SetPrescaler(). - * -# Get current value of the RTT using \ref RTT_GetTime(). - * -# Enables the specified RTT interrupt using \ref RTT_EnableIT(). - * -# Get the status register value of the given RTT using \ref RTT_GetStatus(). - * -# Configures the RTT to generate an alarm at the given time - * using \ref RTT_SetAlarm(). - */ - -#ifndef _RTT_ -#define _RTT_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -#ifdef __cplusplus - extern "C" { -#endif - -extern void RTT_SetPrescaler( Rtt* pRtt, uint16_t wPrescaler ) ; - -extern uint32_t RTT_GetTime( Rtt* pRtt ) ; - -extern void RTT_EnableIT( Rtt* pRtt, uint32_t dwSources ) ; - -extern uint32_t RTT_GetStatus( Rtt *pRtt ) ; - -extern void RTT_SetAlarm( Rtt *pRtt, uint32_t dwTime ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef RTT_H */ - diff --git a/firmware/sam3s_examples_include/spi_pdc.h b/firmware/sam3s_examples_include/spi_pdc.h deleted file mode 100644 index 004aefa9..00000000 --- a/firmware/sam3s_examples_include/spi_pdc.h +++ /dev/null @@ -1,135 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Implementation of SPI PDC driver. - * - */ - -#ifndef _SPI_PDC_ -#define _SPI_PDC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -/*---------------------------------------------------------------------------- - * Definitions - *----------------------------------------------------------------------------*/ - -/** An unspecified error has occured.*/ -#define SPID_ERROR 1 - -/** SPI driver is currently in use.*/ -#define SPID_ERROR_LOCK 2 - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ - -/** Calculates the value of the SCBR field of the Chip Select Register given MCK and SPCK.*/ -#define SPID_CSR_SCBR(mck, spck) (SPI_CSR_SCBR(((mck) / (spck))) ) - -/** Calculates the value of the DLYBS field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBS(mck, delay) ( SPI_CSR_DLYBS(((((delay) * ((mck) / 1000000)) / 1000) + 1)) ) - -/** Calculates the value of the DLYBCT field of the Chip Select Register given delay in ns and MCK.*/ -#define SPID_CSR_DLYBCT(mck, delay) ( SPI_CSR_DLYBCT((((delay) / 32 * ((mck) / 1000000)) / 1000) + 1) ) - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** SPI transfer complete callback. */ -typedef void (*SpidCallback)( uint8_t, void* ) ; - -/** \brief Spi Transfer Request prepared by the application upper layer. - * - * This structure is sent to the SPI_SendCommand function to start the transfer. - * At the end of the transfer, the callback is invoked by the interrupt handler. - */ -typedef struct _SpidCmd -{ - /** Pointer to the command data. */ - uint8_t *pCmd; - /** Command size in bytes. */ - uint8_t cmdSize; - /** Pointer to the data to be sent. */ - uint8_t *pData; - /** Data size in bytes. */ - unsigned short dataSize; - /** SPI chip select. */ - uint8_t spiCs; - /** Callback function invoked at the end of transfer. */ - SpidCallback callback; - /** Callback arguments. */ - void *pArgument; -} SpidCmd ; - -/** Constant structure associated with SPI port. This structure prevents - client applications to have access in the same time. */ -typedef struct _Spid -{ - /** Pointer to SPI Hardware registers */ - Spi* pSpiHw ; - /** SPI Id as defined in the product datasheet */ - char spiId ; - /** Current SpiCommand being processed */ - SpidCmd *pCurrentCommand ; - /** Mutual exclusion semaphore. */ - volatile char semaphore ; -} Spid ; - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ - -extern uint32_t SPID_Configure( Spid* pSpid, Spi* pSpiHw, uint8_t spiId ) ; - -extern void SPID_ConfigureCS( Spid* pSpid, uint32_t dwCS, uint32_t dwCsr ) ; - -extern uint32_t SPID_SendCommand( Spid* pSpid, SpidCmd* pCommand ) ; - -extern void SPID_Handler( Spid* pSpid ) ; - -extern uint32_t SPID_IsBusy( const Spid* pSpid ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _SPI_PDC_ */ - diff --git a/firmware/sam3s_examples_include/ssc.h b/firmware/sam3s_examples_include/ssc.h deleted file mode 100644 index 4d13e2ad..00000000 --- a/firmware/sam3s_examples_include/ssc.h +++ /dev/null @@ -1,73 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for Synchronous Serial (SSC) controller. - * - */ - -#ifndef _SSC_ -#define _SSC_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ -#include "chip.h" - -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Exported functions - *----------------------------------------------------------------------------*/ -extern void SSC_Configure(uint32_t bitRate, uint32_t masterClock); -extern void SSC_ConfigureTransmitter(uint32_t tcmr, uint32_t tfmr); -extern void SSC_ConfigureReceiver(uint32_t rcmr, uint32_t rfmr); -extern void SSC_EnableTransmitter(void); -extern void SSC_DisableTransmitter(void); -extern void SSC_EnableReceiver(void); -extern void SSC_DisableReceiver(void); -extern void SSC_EnableInterrupts(uint32_t sources); -extern void SSC_DisableInterrupts(uint32_t sources); -extern void SSC_Write(uint32_t frame); -extern uint32_t SSC_Read(void); -extern uint8_t SSC_WriteBuffer(void *buffer, uint32_t length); -extern uint8_t SSC_ReadBuffer(void *buffer, uint32_t length); - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _SSC_ */ - diff --git a/firmware/sam3s_examples_include/supc.h b/firmware/sam3s_examples_include/supc.h deleted file mode 100644 index aaa72891..00000000 --- a/firmware/sam3s_examples_include/supc.h +++ /dev/null @@ -1,78 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2008, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _SUPC_ -#define _SUPC_ - -#include "chip.h" - -#include - -//------------------------------------------------------------------------------ -// Global functions -//------------------------------------------------------------------------------ - -extern -#ifdef __ICCARM__ -__ramfunc /* IAR */ -#endif -void SUPC_EnableFlash( Supc* pSupc, uint32_t dwTime ) ; - -extern -#ifdef __ICCARM__ -__ramfunc /* IAR */ -#endif -void SUPC_DisableFlash( Supc* pSupc ) ; - -extern void SUPC_SetVoltageOutput( Supc* pSupc, uint32_t dwVoltage ) ; - -extern void SUPC_EnableDeepMode( Supc* pSupc ) ; - -extern void SUPC_EnableSram( Supc* pSupc ) ; - -extern void SUPC_DisableSram( Supc* pSupc ) ; - -extern void SUPC_EnableRtc( Supc* pSupc ) ; - -extern void SUPC_DisableRtc( Supc* pSupc ) ; - -extern void SUPC_SetBodSampling( Supc* pSupc, uint32_t dwMode ) ; - -extern void SUPC_DisableDeepMode( Supc* pSupc ) ; - -extern void SUPC_DisableVoltageRegulator( Supc* pSupc ) ; - -extern void SUPC_Shutdown( Supc* pSupc ) ; - -extern void SUPC_SetWakeUpSources( Supc* pSupc, uint32_t dwSources ) ; - -extern void SUPC_SetWakeUpInputs( Supc* pSupc, uint32_t dwInputs ) ; - -#endif /* #ifndef _SUPC_ */ - diff --git a/firmware/sam3s_examples_include/trace.h b/firmware/sam3s_examples_include/trace.h deleted file mode 120000 index aadffb85..00000000 --- a/firmware/sam3s_examples_include/trace.h +++ /dev/null @@ -1 +0,0 @@ -atmel_softpack_libraries/libchip_sam3s/include/trace.h \ No newline at end of file diff --git a/firmware/sam3s_examples_include/twi.h b/firmware/sam3s_examples_include/twi.h deleted file mode 100644 index 92fa4e66..00000000 --- a/firmware/sam3s_examples_include/twi.h +++ /dev/null @@ -1,111 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * Interface for configuration the Two Wire Interface (TWI) peripheral. - * - */ - -#ifndef _TWI_ -#define _TWI_ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Macros - *----------------------------------------------------------------------------*/ -/* Returns 1 if the TXRDY bit (ready to transmit data) is set in the given status register value.*/ -#define TWI_STATUS_TXRDY(status) ((status & TWI_SR_TXRDY) == TWI_SR_TXRDY) - -/* Returns 1 if the RXRDY bit (ready to receive data) is set in the given status register value.*/ -#define TWI_STATUS_RXRDY(status) ((status & TWI_SR_RXRDY) == TWI_SR_RXRDY) - -/* Returns 1 if the TXCOMP bit (transfer complete) is set in the given status register value.*/ -#define TWI_STATUS_TXCOMP(status) ((status & TWI_SR_TXCOMP) == TWI_SR_TXCOMP) - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * External function - *----------------------------------------------------------------------------*/ - -extern void TWI_ConfigureMaster(Twi *pTwi, uint32_t twck, uint32_t mck); - -extern void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress); - -extern void TWI_Stop(Twi *pTwi); - -extern void TWI_StartRead( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize); - -extern uint8_t TWI_ReadByte(Twi *pTwi); - -extern void TWI_WriteByte(Twi *pTwi, uint8_t byte); - -extern void TWI_StartWrite( - Twi *pTwi, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t byte); - -extern uint8_t TWI_ByteReceived(Twi *pTwi); - -extern uint8_t TWI_ByteSent(Twi *pTwi); - -extern uint8_t TWI_TransferComplete(Twi *pTwi); - -extern void TWI_EnableIt(Twi *pTwi, uint32_t sources); - -extern void TWI_DisableIt(Twi *pTwi, uint32_t sources); - -extern uint32_t TWI_GetStatus(Twi *pTwi); - -extern uint32_t TWI_GetMaskedStatus(Twi *pTwi); - -extern void TWI_SendSTOPCondition(Twi *pTwi); - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _TWI_ */ diff --git a/firmware/sam3s_examples_include/twid.h b/firmware/sam3s_examples_include/twid.h deleted file mode 100644 index 6f5ab53c..00000000 --- a/firmware/sam3s_examples_include/twid.h +++ /dev/null @@ -1,95 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -#ifndef _TWID_ -#define _TWID_ - -/*---------------------------------------------------------------------------- - * Headers - *----------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*---------------------------------------------------------------------------- - * Definition - *----------------------------------------------------------------------------*/ - -/** TWI driver is currently busy. */ -#define TWID_ERROR_BUSY 1 - -#ifdef __cplusplus - extern "C" { -#endif - -/*---------------------------------------------------------------------------- - * Types - *----------------------------------------------------------------------------*/ - -/** \brief TWI driver structure. Holds the internal state of the driver.*/ -typedef struct _Twid -{ - /** Pointer to the underlying TWI peripheral.*/ - Twi *pTwi ; - /** Current asynchronous transfer being processed.*/ - Async *pTransfer ; -} Twid; - -/*---------------------------------------------------------------------------- - * Export functions - *----------------------------------------------------------------------------*/ -extern void TWID_Initialize( Twid *pTwid, Twi *pTwi ) ; - -extern void TWID_Handler( Twid *pTwid ) ; - -extern uint8_t TWID_Read( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -extern uint8_t TWID_Write( - Twid *pTwid, - uint8_t address, - uint32_t iaddress, - uint8_t isize, - uint8_t *pData, - uint32_t num, - Async *pAsync); - -#ifdef __cplusplus -} -#endif - -#endif //#ifndef TWID_H - diff --git a/firmware/sam3s_examples_include/usart.h b/firmware/sam3s_examples_include/usart.h deleted file mode 100644 index 15ead9ee..00000000 --- a/firmware/sam3s_examples_include/usart.h +++ /dev/null @@ -1,133 +0,0 @@ -/* ---------------------------------------------------------------------------- - * ATMEL Microcontroller Software Support - * ---------------------------------------------------------------------------- - * Copyright (c) 2009, Atmel Corporation - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * - Redistributions of source code must retain the above copyright notice, - * this list of conditions and the disclaimer below. - * - * Atmel's name may not be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE - * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, - * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * ---------------------------------------------------------------------------- - */ - -/** - * \file - * - * \par Purpose - * - * This module provides several definitions and methods for using an USART - * peripheral. - * - * \par Usage - * - * -# Enable the USART peripheral clock in the PMC. - * -# Enable the required USART PIOs (see pio.h). - * -# Configure the UART by calling USART_Configure. - * -# Enable the transmitter and/or the receiver of the USART using - * USART_SetTransmitterEnabled and USART_SetReceiverEnabled. - * -# Send data through the USART using the USART_Write and - * USART_WriteBuffer methods. - * -# Receive data from the USART using the USART_Read and - * USART_ReadBuffer functions; the availability of data can be polled - * with USART_IsDataAvailable. - * -# Disable the transmitter and/or the receiver of the USART with - * USART_SetTransmitterEnabled and USART_SetReceiverEnabled. - */ - -#ifndef _USART_ -#define _USART_ - -/*------------------------------------------------------------------------------ - * Headers - *------------------------------------------------------------------------------*/ - -#include "chip.h" - -#include - -/*------------------------------------------------------------------------------ - * Definitions - *------------------------------------------------------------------------------*/ - -/** \section USART_mode USART modes - * This section lists several common operating modes for an USART peripheral. - * - * \b Modes - * - USART_MODE_ASYNCHRONOUS - * - USART_MODE_IRDA - */ - -/** Basic asynchronous mode, i.e. 8 bits no parity.*/ -#define USART_MODE_ASYNCHRONOUS (US_MR_CHRL_8_BIT | US_MR_PAR_NO) - -/** IRDA mode*/ -#define USART_MODE_IRDA (AT91C_US_USMODE_IRDA | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_FILTER) - -/** SPI mode*/ -#define AT91C_US_USMODE_SPIM 0xE -#define US_SPI_CPOL_0 (0x0<<16) -#define US_SPI_CPHA_0 (0x0<<8) -#define US_SPI_CPOL_1 (0x1<<16) -#define US_SPI_CPHA_1 (0x1<<8) -#define US_SPI_BPMODE_0 (US_SPI_CPOL_0|US_SPI_CPHA_1) -#define US_SPI_BPMODE_1 (US_SPI_CPOL_0|US_SPI_CPHA_0) -#define US_SPI_BPMODE_2 (US_SPI_CPOL_1|US_SPI_CPHA_1) -#define US_SPI_BPMODE_3 (US_SPI_CPOL_1|US_SPI_CPHA_0) - -#ifdef __cplusplus - extern "C" { -#endif - -/*------------------------------------------------------------------------------*/ -/* Exported functions */ -/*------------------------------------------------------------------------------*/ - -extern void USART_Configure( Usart *usart, uint32_t mode, uint32_t baudrate, uint32_t masterClock ) ; -extern uint32_t USART_GetStatus( Usart *usart ) ; -extern void USART_EnableIt( Usart *usart,uint32_t mode ) ; -extern void USART_DisableIt( Usart *usart,uint32_t mode ) ; -extern void USART_SetTransmitterEnabled( Usart *usart, uint8_t enabled ) ; - -extern void USART_SetReceiverEnabled( Usart *usart, uint8_t enabled ) ; - -extern void USART_Write( Usart *usart, uint16_t data, volatile uint32_t timeOut ) ; - -extern uint8_t USART_WriteBuffer( Usart *usart, void *buffer, uint32_t size ) ; - -extern uint16_t USART_Read( Usart *usart, volatile uint32_t timeOut ) ; - -extern uint8_t USART_ReadBuffer( Usart *usart, void *buffer, uint32_t size ) ; - -extern uint8_t USART_IsDataAvailable( Usart *usart ) ; - -extern void USART_SetIrdaFilter(Usart *pUsart, uint8_t filter); - -extern void USART_PutChar( Usart *usart, uint8_t c ) ; - -extern uint32_t USART_IsRxReady( Usart *usart ) ; - -extern uint8_t USART_GetChar( Usart *usart ) ; - -#ifdef __cplusplus -} -#endif - -#endif /* #ifndef _USART_ */ -