diff --git a/firmware/apps/freq_ctr/Makefile b/firmware/apps/freq_ctr/Makefile
new file mode 100644
index 00000000..1097e9cc
--- /dev/null
+++ b/firmware/apps/freq_ctr/Makefile
@@ -0,0 +1,3 @@
+C_FILES += $(C_LIBUSB_RT)
+
+C_FILES += freq_ctr.c
diff --git a/firmware/apps/freq_ctr/freq_ctr.c b/firmware/apps/freq_ctr/freq_ctr.c
new file mode 100644
index 00000000..ad6497c0
--- /dev/null
+++ b/firmware/apps/freq_ctr/freq_ctr.c
@@ -0,0 +1,55 @@
+#include <stdint.h>
+#include "utils.h"
+#include "tc_etu.h"
+#include "chip.h"
+
+
+/* pins for Channel 0 of TC-block 0 */
+#define PIN_TIOA0	{PIO_PA0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+
+/* pins for Channel 1 of TC-block 0 */
+#define PIN_TIOA1	{PIO_PA15, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+#define PIN_TCLK1	{PIO_PA28, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
+
+static const Pin pins_tc[] = { PIN_TIOA0, PIN_TIOA1, PIN_TCLK1 };
+
+static TcChannel *tc1 = &TC0->TC_CHANNEL[1];
+
+void TC1_IrqHandler(void)
+{
+	uint32_t sr = tc1->TC_SR;
+	printf("TC1=%lu; SR=0x%08lx\r\n", tc1->TC_RA, sr);
+}
+
+void freq_ctr_init(void)
+{
+	TcChannel *tc0 = &TC0->TC_CHANNEL[0];
+
+	PIO_Configure(pins_tc, ARRAY_SIZE(pins_tc));
+
+	PMC_EnablePeripheral(ID_TC0);
+	PMC_EnablePeripheral(ID_TC1);
+
+	/* route TCLK1 to XC1 */
+	TC0->TC_BMR &= ~TC_BMR_TC1XC1S_Msk;
+	TC0->TC_BMR |= TC_BMR_TC1XC1S_TCLK1;
+
+	/* TC0 in wveform mode: Run from SCLK. Raise TIOA on RA; lower TIOA on RC + trigger */
+	tc0->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK5 | TC_CMR_BURST_NONE |
+		      TC_CMR_EEVTEDG_NONE | TC_CMR_WAVSEL_UP_RC | TC_CMR_WAVE |
+		      TC_CMR_ACPA_SET | TC_CMR_ACPC_CLEAR;
+	tc0->TC_RA = 16384; /* set high at 16384 */
+	tc0->TC_RC = 32786; /* set low at 32786 */
+
+	/* TC1 in capture mode: Run from XC1. Trigger on TIOA rising. Load RA on rising */
+	tc1->TC_CMR = TC_CMR_TCCLKS_XC1 | TC_CMR_BURST_NONE |
+		      TC_CMR_ETRGEDG_RISING | TC_CMR_ABETRG | TC_CMR_LDRA_RISING;
+	/* Interrupt us if the external trigger happens */
+	tc1->TC_IER = TC_IER_ETRGS;
+	NVIC_EnableIRQ(TC1_IRQn);
+
+	TC0->TC_BCR = TC_BCR_SYNC;
+
+	tc0->TC_CCR = TC_CCR_CLKEN|TC_CCR_SWTRG;
+	tc1->TC_CCR = TC_CCR_CLKEN|TC_CCR_SWTRG;
+}
diff --git a/firmware/apps/freq_ctr/main.c b/firmware/apps/freq_ctr/main.c
new file mode 100644
index 00000000..761bc17e
--- /dev/null
+++ b/firmware/apps/freq_ctr/main.c
@@ -0,0 +1,54 @@
+
+#include "board.h"
+#include "utils.h"
+#include "osmocom/core/timer.h"
+
+extern void freq_ctr_init(void);
+
+/* returns '1' in case we should break any endless loop */
+static void check_exec_dbg_cmd(void)
+{
+	int ch;
+
+	if (!UART_IsRxReady())
+		return;
+
+	ch = UART_GetChar();
+
+	board_exec_dbg_cmd(ch);
+}
+
+
+extern int main(void)
+{
+	led_init();
+	led_blink(LED_RED, BLINK_ALWAYS_ON);
+	led_blink(LED_GREEN, BLINK_ALWAYS_ON);
+
+	/* Enable watchdog for 2000 ms, with no window */
+	WDT_Enable(WDT, WDT_MR_WDRSTEN | WDT_MR_WDDBGHLT | WDT_MR_WDIDLEHLT |
+		   (WDT_GetPeriod(2000) << 16) | WDT_GetPeriod(2000));
+
+	PIO_InitializeInterrupts(0);
+
+
+	printf("\n\r\n\r"
+		"=============================================================================\n\r"
+		"Freq Ctr firmware " GIT_VERSION " (C) 2019 by Harald Welte\n\r"
+		"=============================================================================\n\r");
+
+	board_main_top();
+
+	TRACE_INFO("starting frequency counter...\n\r");
+	freq_ctr_init();
+
+	TRACE_INFO("entering main loop...\n\r");
+	while (1) {
+		WDT_Restart(WDT);
+
+		check_exec_dbg_cmd();
+		osmo_timers_prepare();
+		osmo_timers_update();
+	}
+
+}
diff --git a/firmware/apps/freq_ctr/usb_strings.txt b/firmware/apps/freq_ctr/usb_strings.txt
new file mode 100644
index 00000000..0e797ac2
--- /dev/null
+++ b/firmware/apps/freq_ctr/usb_strings.txt
@@ -0,0 +1,10 @@
+sysmocom - s.f.m.c. GmbH
+SIMtrace 2 compatible device
+SIMtrace Sniffer
+SIMtrace CCID
+SIMtrace Phone
+SIMtrace MITM
+CardEmulator Modem 1
+CardEmulator Modem 2
+CardEmulator Modem 3
+CardEmulator Modem 4