2015-11-30 10:59:03 +00:00
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#pragma once
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#include "board_common.h"
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2014-12-02 12:21:17 +00:00
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2018-06-06 15:02:33 +00:00
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/* Name of the board */
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2014-12-02 12:21:17 +00:00
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#define BOARD_NAME "SAM3S-SIMTRACE"
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2018-06-06 15:02:33 +00:00
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/* Board definition */
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2014-12-02 12:21:17 +00:00
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#define simtrace
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2014-12-16 09:54:59 +00:00
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2018-06-06 15:02:33 +00:00
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/* Board main oscillator frequency (in Hz) */
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2016-08-21 16:32:12 +00:00
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#define BOARD_MAINOSC 18432000
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2018-06-06 15:02:33 +00:00
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/** Pin configuration **/
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/* Button to force bootloader start (shorted to ground when pressed */
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#define PIN_BOOTLOADER_SW {PIO_PA31, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP}
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/* Enable powering the card using the second 3.3 V output of the LDO (active high) */
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#define SIM_PWEN_PIN {SIM_PWEN, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
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/* Card presence pin */
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#define SW_SIM PIO_PA8
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/* Pull card presence pin high (shorted to ground in card slot when card is present) */
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#define SMARTCARD_CONNECT_PIN {SW_SIM, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_DEGLITCH | PIO_IT_EDGE }
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/** Smart card connection **/
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/* Card RST reset signal input (active low; RST_SIM in schematic) */
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2018-06-07 16:56:41 +00:00
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#define PIN_SIM_RST {PIO_PA7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
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2018-06-06 15:02:33 +00:00
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/* Card I/O data signal input/output (I/O_SIM in schematic) */
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#define PIN_SIM_IO {PIO_PA6A_TXD0, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/* Card CLK clock input (CLK_SIM in schematic) */
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#define PIN_SIM_CLK {PIO_PA2B_SCK0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
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/* Pin to measure card I/O timing (to start measuring the ETU on I/O activity; connected I/O_SIM in schematic) */
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#define PIN_SIM_IO_INPUT {PIO_PA1B_TIOB0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
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/* Pin used as clock input (to measure the ETU duration; connected to CLK_SIM in schematic) */
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#define PIN_SIM_CLK_INPUT {PIO_PA4B_TCLK0, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
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/* Pins used to measure ETU timing (using timer counter) */
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#define PINS_TC PIN_SIM_IO_INPUT, PIN_SIM_CLK_INPUT
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/** Phone connection **/
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/* Phone USIM slot 1 VCC pin (VCC_PHONE in schematic) */
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#define PIN_USIM1_VCC {PIO_PA25, PIOA, ID_PIOA, PIO_INPUT, PIO_DEFAULT}
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/* Phone USIM slot 1 RST pin (active low; RST_PHONE in schematic) */
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#define PIN_USIM1_nRST {PIO_PA24, PIOA, ID_PIOA, PIO_INPUT, PIO_IT_RISE_EDGE | PIO_DEGLITCH }
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/* Phone I/O data signal input/output (I/O_PHONE in schematic) */
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#define PIN_PHONE_IO {PIO_PA22A_TXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/* Phone CLK clock input (CLK_PHONE in schematic) */
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#define PIN_PHONE_CLK {PIO_PA23A_SCK1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/* Pin used for phone USIM slot 1 communication */
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#define PINS_USIM1 PIN_PHONE_IO, PIN_PHONE_CLK, PIN_PHONE_CLK_INPUT, PIN_USIM1_VCC, PIN_PHONE_IO_INPUT, PIN_USIM1_nRST
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/* Phone I/O data signal input/output (unused USART RX input; connected to I/O_PHONE in schematic) */
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#define PIN_PHONE_IO_INPUT {PIO_PA21A_RXD1, PIOA, ID_PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/* Pin used as clock input (to measure the ETU duration; connected to CLK_PHONE in schematic) */
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#define PIN_PHONE_CLK_INPUT {PIO_PA29B_TCLK2, PIOA, ID_PIOA, PIO_PERIPH_B, PIO_DEFAULT}
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/** Default configuration **/
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/* Disconnect VPP, CLK, and RST lines between card and phone using bus switch (high sets bus switch to high-impedance) */
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#define PIN_SC_SW_DEFAULT {PIO_PA20, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
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/* Disconnect I/O line between card and phone using bus switch (high sets bus switch to high-impedance) */
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#define PIN_IO_SW_DEFAULT {PIO_PA19, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
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/* Disconnect all lines (VPP, CLK, RST, and I/O) between card and phone */
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#define PINS_BUS_DEFAULT PIN_SC_SW_DEFAULT, PIN_IO_SW_DEFAULT
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2015-02-24 18:09:08 +00:00
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/** Sniffer configuration **/
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2018-06-06 15:02:33 +00:00
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/* Connect VPP, CLK, and RST lines between card and phone using bus switch (low connects signals on bus switch) */
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2015-02-24 18:09:08 +00:00
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#define PIN_SC_SW_SNIFF {PIO_PA20, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
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2018-06-06 15:02:33 +00:00
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/* Connect I/O line between card and phone using bus switch (low connects signals on bus switch) */
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2015-02-24 18:09:08 +00:00
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#define PIN_IO_SW_SNIFF {PIO_PA19, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
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2018-06-06 15:02:33 +00:00
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/* Connect all lines (VPP, CLK, RST, and I/O) between card and phone */
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2015-02-24 18:09:08 +00:00
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#define PINS_BUS_SNIFF PIN_SC_SW_SNIFF, PIN_IO_SW_SNIFF
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2018-06-07 16:56:41 +00:00
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/* Use RST_SIM line to detect phone issued card reset */
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#define PIN_SIM_RST_SNIFF {PIO_PA7, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_DEGLITCH | PIO_IT_EDGE }
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2018-06-06 15:02:33 +00:00
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/* Pins used to sniff phone-card communication */
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2018-06-07 16:56:41 +00:00
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#define PINS_SIM_SNIFF_SIM PIN_SIM_IO, PIN_SIM_CLK, PIN_SIM_RST_SNIFF
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/* Disable power converter 4.5-6V to 3.3V (active high) */
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2018-06-06 15:02:33 +00:00
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#define PIN_SIM_PWEN_SNIFF {SIM_PWEN, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
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2018-06-07 16:56:41 +00:00
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/* Enable power switch to forward VCC_PHONE to VCC_SIM (active high) */
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2018-06-06 15:02:33 +00:00
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#define PIN_VCC_FWD_SNIFF {VCC_FWD, PIOA, ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
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/* Use phone VCC to power card */
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#define PWR_PINS PIN_SIM_PWEN_SNIFF, PIN_VCC_FWD_SNIFF
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2018-06-07 16:56:41 +00:00
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/** CCID configuration */
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/* Card RST reset signal input (active low; RST_SIM in schematic) */
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#define PIN_ISO7816_RSTMC {PIO_PA7, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
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/* ISO7816-communication related pins */
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#define PINS_ISO7816 PIN_SIM_IO, PIN_SIM_CLK, PIN_ISO7816_RSTMC // SIM_PWEN_PIN, PIN_SIM_IO2, PIN_SIM_CLK2
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2018-06-06 15:02:33 +00:00
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/** External SPI flash interface **/
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/* SPI MISO pin definition */
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#define PIN_SPI_MISO {PIO_PA12A_MISO, PIOA, PIOA, PIO_PERIPH_A, PIO_PULLUP}
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/* SPI MOSI pin definition */
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#define PIN_SPI_MOSI {PIO_PA13A_MOSI, PIOA, PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/* SPI SCK pin definition */
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#define PIN_SPI_SCK {PIO_PA14A_SPCK, PIOA, PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/* SPI pins definition. Contains MISO, MOSI & SCK */
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#define PINS_SPI PIN_SPI_MISO, PIN_SPI_MOSI, PIN_SPI_SCK
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/* SPI chip select 0 pin definition */
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#define PIN_SPI_NPCS0 {PIO_PA11A_NPCS0, PIOA, PIOA, PIO_PERIPH_A, PIO_DEFAULT}
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/* SPI flash write protect pin (active low, pulled low) */
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#define PIN_SPI_WP {PA15, PIOA, ID_PIOA, PIO_OUTPUT_0, PIO_DEFAULT}
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/** USB definitions */
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/* OpenMoko SIMtrace 2 USB vendor ID */
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2017-03-05 15:24:29 +00:00
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#define BOARD_USB_VENDOR_ID USB_VENDOR_OPENMOKO
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2018-06-06 15:02:33 +00:00
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/* OpenMoko SIMtrace 2 USB product ID (main application/runtime mode) */
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2017-03-05 15:24:29 +00:00
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#define BOARD_USB_PRODUCT_ID USB_PRODUCT_SIMTRACE2
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2018-06-06 15:02:33 +00:00
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/* OpenMoko SIMtrace 2 DFU USB product ID (DFU bootloader/DFU mode) */
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2017-03-05 15:24:29 +00:00
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#define BOARD_DFU_USB_PRODUCT_ID USB_PRODUCT_SIMTRACE2_DFU
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2018-06-06 15:02:33 +00:00
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/* USB release number (bcdDevice, shown as 0.00) */
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2017-03-05 15:24:29 +00:00
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#define BOARD_USB_RELEASE 0x000
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2018-06-06 15:02:33 +00:00
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/* Indicate SIMtrace is bus power in USB attributes */
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#define BOARD_USB_BMATTRIBUTES USBConfigurationDescriptor_BUSPOWERED_NORWAKEUP
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2016-02-28 11:34:26 +00:00
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2018-06-06 15:02:33 +00:00
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/** Supported modes */
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/* SIMtrace board supports sniffer mode */
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2018-06-04 14:30:01 +00:00
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#define HAVE_SNIFFER
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2018-06-06 15:02:33 +00:00
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/* SIMtrace board supports CCID mode */
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2017-11-28 19:58:06 +00:00
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#define HAVE_CCID
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2018-06-06 15:02:33 +00:00
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/* SIMtrace board supports card emulation mode */
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2016-02-28 11:34:26 +00:00
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#define HAVE_CARDEM
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2018-06-06 15:02:33 +00:00
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/* SIMtrace board supports man-in-the-middle mode */
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2017-11-28 18:49:41 +00:00
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//#define HAVE_MITM
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