simcable footprints added and linked to schema in the netlist
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@ -1,7 +1,10 @@
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PCBNEW-LibModule-V1 Mo 20 Jun 2011 16:27:09 CEST
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PCBNEW-LibModule-V1 Di 21 Jun 2011 22:35:07 CEST
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# encoding utf-8
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$INDEX
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smartcard-CARDSOCKET
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SIM_AMPHENOL
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SIM
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FFC
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$EndINDEX
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$MODULE smartcard-CARDSOCKET
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Po 0 0 0 15 00200000 00000000 ~~
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@ -115,7 +118,7 @@ $MODULE SIM_AMPHENOL
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Po 0 0 0 15 4DFF4BD6 00000000 ~~
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Li SIM_AMPHENOL
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Sc 00000000
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AR
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AR
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Op 0 0 0
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T0 0 4882 600 600 0 120 N V 21 N"SIM_AMPHENOL"
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T1 2496 -4169 600 600 0 120 N V 21 N"VAL**"
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@ -278,4 +281,131 @@ Ne 0 ""
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Po 8996 -3878
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$EndPAD
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$EndMODULE SIM_AMPHENOL
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$MODULE FFC
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Po 0 0 0 15 4E00FFB1 00000000 ~~
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Li FFC
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Sc 00000000
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AR /4E0084DD
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Op 0 0 0
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T0 0 1850 600 600 0 120 N I 21 N "P2"
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T1 0 -1752 600 600 0 120 N I 21 N "FFC"
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$PAD
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Sh "1" R 1181 315 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 5 "/VCC"
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Po 0 -984
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.LocalClearance 79
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$EndPAD
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$PAD
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Sh "2" R 1181 315 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 4 "/RST"
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Po 0 -591
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.LocalClearance 79
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$EndPAD
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$PAD
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Sh "3" R 1181 315 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 1 "/CLK"
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Po 0 -197
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.LocalClearance 79
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$EndPAD
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$PAD
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Sh "4" R 1181 315 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 3 "/I/O"
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Po 0 197
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.LocalClearance 79
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$EndPAD
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$PAD
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Sh "5" R 1181 315 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 6 "/VPP"
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Po 0 591
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.LocalClearance 79
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$EndPAD
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$PAD
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Sh "6" R 1181 315 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 2 "/GND"
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Po 0 984
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.LocalClearance 79
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$EndPAD
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$EndMODULE FFC
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$MODULE SIM
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Po 0 0 0 15 4E010072 00000000 ~~
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Li SIM
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Sc 00000000
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AR /4E0085A5
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Op 0 0 0
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T0 8583 2953 600 600 0 120 N I 21 N "SIM1"
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T1 6890 2913 600 600 900 120 N I 21 N "SIM_CARD"
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DS 9843 0 9843 4724 150 21
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DS 9843 4724 8661 5906 150 21
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DS 0 5906 0 0 150 21
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DS 8661 5906 0 5906 150 21
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DS 0 0 9843 0 150 21
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$PAD
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Sh "C1" R 1969 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 2165 1417
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$EndPAD
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$PAD
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Sh "C2" R 1575 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 1969 2417
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$EndPAD
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$PAD
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Sh "C3" R 1575 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 1969 3417
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$EndPAD
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$PAD
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Sh "C4" R 1575 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 1969 4417
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$EndPAD
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$PAD
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Sh "C5" R 1969 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 4764 1417
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$EndPAD
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$PAD
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Sh "C6" R 1575 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 4969 2417
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$EndPAD
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$PAD
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Sh "C7" R 1575 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 4969 3417
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$EndPAD
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$PAD
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Sh "C8" R 1575 787 0 0 0
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Dr 0 0 0
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At SMD N 00888000
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Ne 0 ""
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Po 4969 4417
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$EndPAD
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$EndMODULE SIM
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$EndLIBRARY
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@ -0,0 +1,38 @@
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Cmp-Mod V01 Created by CvPCB (2011-06-08)-testing date = Di 21 Jun 2011 22:38:14 CEST
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BeginCmp
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TimeStamp = /4E0084D9;
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Reference = P1;
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ValeurCmp = FFC;
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IdModule = FFC;
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EndCmp
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BeginCmp
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TimeStamp = /4E0084DD;
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Reference = P2;
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ValeurCmp = FFC;
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IdModule = FFC;
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EndCmp
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BeginCmp
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TimeStamp = /4E0084E2;
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Reference = P3;
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ValeurCmp = FFC;
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IdModule = FFC;
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EndCmp
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BeginCmp
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TimeStamp = /4E0084D4;
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Reference = P4;
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ValeurCmp = FFC;
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IdModule = FFC;
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EndCmp
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BeginCmp
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TimeStamp = /4E0085A5;
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Reference = SIM1;
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ValeurCmp = ISO7816_CARD;
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IdModule = SIM;
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EndCmp
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EndListe
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@ -1,85 +1,46 @@
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# EESchema Netlist Version 1.1 created Di 21 Jun 2011 14:36:57 CEST
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# EESchema Netlist Version 1.1 created Di 21 Jun 2011 22:38:14 CEST
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(
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( /4E0085A5 $noname SIM1 ISO7816_CARD {Lib=ISO7816_CARD}
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( C1 /VCC )
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( C2 /RST )
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( C3 /CLK )
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( C4 ? )
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( C5 /GND )
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( C6 /VPP )
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( C7 /I/O )
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( C8 ? )
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( /4E0084D9 FFC P1 FFC
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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)
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( /4E0084E2 $noname P3 FFC {Lib=FFC}
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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( /4E0084DD FFC P2 FFC
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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)
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( /4E0084DD $noname P2 FFC {Lib=FFC}
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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( /4E0084E2 FFC P3 FFC
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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)
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( /4E0084D9 $noname P1 FFC {Lib=FFC}
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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( /4E0084D4 FFC P4 FFC
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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)
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( /4E0084D4 $noname P4 FFC {Lib=FFC}
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( 1 /VCC )
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( 2 /RST )
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( 3 /CLK )
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( 4 /I/O )
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( 5 /VPP )
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( 6 /GND )
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( /4E0085A5 SIM SIM1 ISO7816_CARD
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( C1 /VCC )
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( C2 /RST )
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( C3 /CLK )
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( C4 ? )
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( C5 /GND )
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( C6 /VPP )
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( C7 /I/O )
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( C8 ? )
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)
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)
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*
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{ Pin List by Nets
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Net 1 "/VCC" "VCC"
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P1 1
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P3 1
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SIM1 C1
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P2 1
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P4 1
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Net 2 "/RST" "RST"
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SIM1 C2
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P4 2
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P2 2
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P3 2
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P1 2
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Net 3 "/CLK" "CLK"
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P1 3
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P3 3
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P2 3
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SIM1 C3
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P4 3
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Net 4 "/GND" "GND"
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SIM1 C5
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P1 6
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P3 6
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P2 6
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P4 6
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Net 5 "/VPP" "VPP"
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SIM1 C6
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P3 5
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P4 5
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P1 5
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P2 5
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Net 6 "/I/O" "I/O"
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P4 4
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SIM1 C7
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P1 4
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P2 4
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P3 4
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}
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#End
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@ -1,5 +1,5 @@
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update=Di 21 Jun 2011 13:31:26 CEST
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last_client=eeschema
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update=Di 21 Jun 2011 21:05:47 CEST
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last_client=pcbnew
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[eeschema]
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version=1
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LibDir=lib
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@ -63,3 +63,38 @@ LibName28=atmel
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LibName29=contrib
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LibName30=valves
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LibName31=smartcard
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[cvpcb]
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version=1
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NetIExt=net
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[cvpcb/libraries]
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EquName1=devcms
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[pcbnew]
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version=1
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PadDrlX=320
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PadDimH=600
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PadDimV=600
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BoardThickness=630
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TxtPcbV=800
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TxtPcbH=600
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TxtModV=600
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TxtModH=600
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TxtModW=120
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VEgarde=100
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DrawLar=150
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EdgeLar=150
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TxtLar=120
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MSegLar=150
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LastNetListRead=simcable.net
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[pcbnew/libraries]
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LibDir=
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LibName1=sockets
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LibName2=connect
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LibName3=discret
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LibName4=pin_array
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LibName5=divers
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LibName6=libcms
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LibName7=display
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LibName8=valves
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LibName9=led
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LibName10=dip_sockets
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LibName11=lib/smartcard
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