SIMtrace: Improve PCB routing of GND, 3V3 and VCC traces
We have to make sure the impedance of the supply lanes is not too high. Particularly bad was passing GND in 0.2mm under several resistors before even reaching the LDO from the USB socket. This attempts to address the major issues. Also, the input capacitor is moved closer to the LDO once again
This commit is contained in:
parent
2b9d0c26a1
commit
2ebce55aa4