![Avi Kivity](/assets/img/avatar_default.png)
stat() fields can be more or less anything depending on configuration, cast explicitly to uint64_t to avoid printf() format mismatches. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
830 lines
23 KiB
C
830 lines
23 KiB
C
/*
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* Inter-VM Shared Memory PCI device.
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*
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* Author:
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* Cam Macdonell <cam@cs.ualberta.ca>
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*
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* Based On: cirrus_vga.c
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* Copyright (c) 2004 Fabrice Bellard
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* Copyright (c) 2004 Makoto Suzuki (suzu)
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*
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* and rtl8139.c
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* Copyright (c) 2006 Igor Kovalenko
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*
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* This code is licensed under the GNU GPL v2.
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*/
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#include "hw.h"
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#include "pc.h"
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#include "pci.h"
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#include "msix.h"
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#include "kvm.h"
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#include <sys/mman.h>
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#include <sys/types.h>
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#define IVSHMEM_IOEVENTFD 0
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#define IVSHMEM_MSI 1
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#define IVSHMEM_PEER 0
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#define IVSHMEM_MASTER 1
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#define IVSHMEM_REG_BAR_SIZE 0x100
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//#define DEBUG_IVSHMEM
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#ifdef DEBUG_IVSHMEM
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#define IVSHMEM_DPRINTF(fmt, ...) \
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do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
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#else
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#define IVSHMEM_DPRINTF(fmt, ...)
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#endif
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typedef struct Peer {
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int nb_eventfds;
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int *eventfds;
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} Peer;
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typedef struct EventfdEntry {
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PCIDevice *pdev;
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int vector;
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} EventfdEntry;
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typedef struct IVShmemState {
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PCIDevice dev;
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uint32_t intrmask;
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uint32_t intrstatus;
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uint32_t doorbell;
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CharDriverState **eventfd_chr;
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CharDriverState *server_chr;
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int ivshmem_mmio_io_addr;
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pcibus_t mmio_addr;
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pcibus_t shm_pci_addr;
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uint64_t ivshmem_offset;
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uint64_t ivshmem_size; /* size of shared memory region */
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int shm_fd; /* shared memory file descriptor */
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Peer *peers;
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int nb_peers; /* how many guests we have space for */
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int max_peer; /* maximum numbered peer */
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int vm_id;
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uint32_t vectors;
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uint32_t features;
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EventfdEntry *eventfd_table;
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char * shmobj;
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char * sizearg;
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char * role;
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int role_val; /* scalar to avoid multiple string comparisons */
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} IVShmemState;
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/* registers for the Inter-VM shared memory device */
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enum ivshmem_registers {
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INTRMASK = 0,
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INTRSTATUS = 4,
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IVPOSITION = 8,
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DOORBELL = 12,
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};
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static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
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unsigned int feature) {
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return (ivs->features & (1 << feature));
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}
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static inline bool is_power_of_two(uint64_t x) {
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return (x & (x - 1)) == 0;
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}
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static void ivshmem_map(PCIDevice *pci_dev, int region_num,
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pcibus_t addr, pcibus_t size, int type)
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{
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IVShmemState *s = DO_UPCAST(IVShmemState, dev, pci_dev);
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s->shm_pci_addr = addr;
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if (s->ivshmem_offset > 0) {
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cpu_register_physical_memory(s->shm_pci_addr, s->ivshmem_size,
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s->ivshmem_offset);
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}
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IVSHMEM_DPRINTF("guest pci addr = %" FMT_PCIBUS ", guest h/w addr = %"
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PRIu64 ", size = %" FMT_PCIBUS "\n", addr, s->ivshmem_offset, size);
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}
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/* accessing registers - based on rtl8139 */
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static void ivshmem_update_irq(IVShmemState *s, int val)
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{
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int isr;
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isr = (s->intrstatus & s->intrmask) & 0xffffffff;
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/* don't print ISR resets */
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if (isr) {
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IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
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isr ? 1 : 0, s->intrstatus, s->intrmask);
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}
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qemu_set_irq(s->dev.irq[0], (isr != 0));
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}
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static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
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{
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IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
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s->intrmask = val;
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ivshmem_update_irq(s, val);
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}
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static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
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{
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uint32_t ret = s->intrmask;
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IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
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return ret;
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}
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static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
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{
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IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
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s->intrstatus = val;
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ivshmem_update_irq(s, val);
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return;
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}
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static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
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{
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uint32_t ret = s->intrstatus;
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/* reading ISR clears all interrupts */
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s->intrstatus = 0;
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ivshmem_update_irq(s, 0);
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return ret;
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}
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static void ivshmem_io_writew(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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IVSHMEM_DPRINTF("We shouldn't be writing words\n");
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}
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static void ivshmem_io_writel(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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IVShmemState *s = opaque;
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uint64_t write_one = 1;
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uint16_t dest = val >> 16;
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uint16_t vector = val & 0xff;
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addr &= 0xfc;
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IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
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switch (addr)
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{
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case INTRMASK:
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ivshmem_IntrMask_write(s, val);
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break;
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case INTRSTATUS:
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ivshmem_IntrStatus_write(s, val);
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break;
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case DOORBELL:
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/* check that dest VM ID is reasonable */
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if (dest > s->max_peer) {
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IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
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break;
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}
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/* check doorbell range */
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if (vector < s->peers[dest].nb_eventfds) {
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IVSHMEM_DPRINTF("Writing %" PRId64 " to VM %d on vector %d\n",
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write_one, dest, vector);
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if (write(s->peers[dest].eventfds[vector],
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&(write_one), 8) != 8) {
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IVSHMEM_DPRINTF("error writing to eventfd\n");
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}
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}
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break;
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default:
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IVSHMEM_DPRINTF("Invalid VM Doorbell VM %d\n", dest);
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}
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}
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static void ivshmem_io_writeb(void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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IVSHMEM_DPRINTF("We shouldn't be writing bytes\n");
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}
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static uint32_t ivshmem_io_readw(void *opaque, target_phys_addr_t addr)
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{
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IVSHMEM_DPRINTF("We shouldn't be reading words\n");
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return 0;
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}
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static uint32_t ivshmem_io_readl(void *opaque, target_phys_addr_t addr)
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{
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IVShmemState *s = opaque;
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uint32_t ret;
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switch (addr)
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{
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case INTRMASK:
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ret = ivshmem_IntrMask_read(s);
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break;
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case INTRSTATUS:
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ret = ivshmem_IntrStatus_read(s);
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break;
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case IVPOSITION:
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/* return my VM ID if the memory is mapped */
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if (s->shm_fd > 0) {
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ret = s->vm_id;
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} else {
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ret = -1;
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}
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break;
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default:
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IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
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ret = 0;
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}
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return ret;
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}
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static uint32_t ivshmem_io_readb(void *opaque, target_phys_addr_t addr)
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{
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IVSHMEM_DPRINTF("We shouldn't be reading bytes\n");
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return 0;
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}
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static CPUReadMemoryFunc * const ivshmem_mmio_read[3] = {
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ivshmem_io_readb,
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ivshmem_io_readw,
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ivshmem_io_readl,
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};
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static CPUWriteMemoryFunc * const ivshmem_mmio_write[3] = {
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ivshmem_io_writeb,
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ivshmem_io_writew,
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ivshmem_io_writel,
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};
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static void ivshmem_receive(void *opaque, const uint8_t *buf, int size)
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{
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IVShmemState *s = opaque;
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ivshmem_IntrStatus_write(s, *buf);
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IVSHMEM_DPRINTF("ivshmem_receive 0x%02x\n", *buf);
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}
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static int ivshmem_can_receive(void * opaque)
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{
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return 8;
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}
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static void ivshmem_event(void *opaque, int event)
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{
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IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
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}
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static void fake_irqfd(void *opaque, const uint8_t *buf, int size) {
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EventfdEntry *entry = opaque;
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PCIDevice *pdev = entry->pdev;
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IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, entry->vector);
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msix_notify(pdev, entry->vector);
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}
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static CharDriverState* create_eventfd_chr_device(void * opaque, int eventfd,
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int vector)
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{
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/* create a event character device based on the passed eventfd */
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IVShmemState *s = opaque;
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CharDriverState * chr;
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chr = qemu_chr_open_eventfd(eventfd);
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if (chr == NULL) {
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fprintf(stderr, "creating eventfd for eventfd %d failed\n", eventfd);
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exit(-1);
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}
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/* if MSI is supported we need multiple interrupts */
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if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
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s->eventfd_table[vector].pdev = &s->dev;
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s->eventfd_table[vector].vector = vector;
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qemu_chr_add_handlers(chr, ivshmem_can_receive, fake_irqfd,
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ivshmem_event, &s->eventfd_table[vector]);
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} else {
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qemu_chr_add_handlers(chr, ivshmem_can_receive, ivshmem_receive,
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ivshmem_event, s);
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}
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return chr;
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}
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static int check_shm_size(IVShmemState *s, int fd) {
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/* check that the guest isn't going to try and map more memory than the
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* the object has allocated return -1 to indicate error */
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struct stat buf;
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fstat(fd, &buf);
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if (s->ivshmem_size > buf.st_size) {
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fprintf(stderr,
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"IVSHMEM ERROR: Requested memory size greater"
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" than shared object size (%" PRIu64 " > %" PRIu64")\n",
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s->ivshmem_size, (uint64_t)buf.st_size);
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return -1;
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} else {
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return 0;
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}
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}
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/* create the shared memory BAR when we are not using the server, so we can
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* create the BAR and map the memory immediately */
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static void create_shared_memory_BAR(IVShmemState *s, int fd) {
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void * ptr;
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s->shm_fd = fd;
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ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
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s->ivshmem_offset = qemu_ram_alloc_from_ptr(&s->dev.qdev, "ivshmem.bar2",
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s->ivshmem_size, ptr);
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/* region for shared memory */
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pci_register_bar(&s->dev, 2, s->ivshmem_size,
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PCI_BASE_ADDRESS_SPACE_MEMORY, ivshmem_map);
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}
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static void close_guest_eventfds(IVShmemState *s, int posn)
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{
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int i, guest_curr_max;
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guest_curr_max = s->peers[posn].nb_eventfds;
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for (i = 0; i < guest_curr_max; i++) {
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kvm_set_ioeventfd_mmio_long(s->peers[posn].eventfds[i],
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s->mmio_addr + DOORBELL, (posn << 16) | i, 0);
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close(s->peers[posn].eventfds[i]);
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}
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qemu_free(s->peers[posn].eventfds);
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s->peers[posn].nb_eventfds = 0;
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}
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static void setup_ioeventfds(IVShmemState *s) {
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int i, j;
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for (i = 0; i <= s->max_peer; i++) {
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for (j = 0; j < s->peers[i].nb_eventfds; j++) {
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kvm_set_ioeventfd_mmio_long(s->peers[i].eventfds[j],
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s->mmio_addr + DOORBELL, (i << 16) | j, 1);
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}
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}
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}
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/* this function increase the dynamic storage need to store data about other
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* guests */
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static void increase_dynamic_storage(IVShmemState *s, int new_min_size) {
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int j, old_nb_alloc;
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old_nb_alloc = s->nb_peers;
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while (new_min_size >= s->nb_peers)
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s->nb_peers = s->nb_peers * 2;
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IVSHMEM_DPRINTF("bumping storage to %d guests\n", s->nb_peers);
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s->peers = qemu_realloc(s->peers, s->nb_peers * sizeof(Peer));
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/* zero out new pointers */
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for (j = old_nb_alloc; j < s->nb_peers; j++) {
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s->peers[j].eventfds = NULL;
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s->peers[j].nb_eventfds = 0;
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}
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}
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static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
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{
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IVShmemState *s = opaque;
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int incoming_fd, tmp_fd;
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int guest_max_eventfd;
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long incoming_posn;
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memcpy(&incoming_posn, buf, sizeof(long));
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/* pick off s->server_chr->msgfd and store it, posn should accompany msg */
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tmp_fd = qemu_chr_get_msgfd(s->server_chr);
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IVSHMEM_DPRINTF("posn is %ld, fd is %d\n", incoming_posn, tmp_fd);
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/* make sure we have enough space for this guest */
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if (incoming_posn >= s->nb_peers) {
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increase_dynamic_storage(s, incoming_posn);
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}
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if (tmp_fd == -1) {
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/* if posn is positive and unseen before then this is our posn*/
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if ((incoming_posn >= 0) &&
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(s->peers[incoming_posn].eventfds == NULL)) {
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/* receive our posn */
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s->vm_id = incoming_posn;
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return;
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} else {
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/* otherwise an fd == -1 means an existing guest has gone away */
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IVSHMEM_DPRINTF("posn %ld has gone away\n", incoming_posn);
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close_guest_eventfds(s, incoming_posn);
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return;
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}
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}
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/* because of the implementation of get_msgfd, we need a dup */
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incoming_fd = dup(tmp_fd);
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if (incoming_fd == -1) {
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fprintf(stderr, "could not allocate file descriptor %s\n",
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strerror(errno));
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return;
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}
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/* if the position is -1, then it's shared memory region fd */
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if (incoming_posn == -1) {
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void * map_ptr;
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s->max_peer = 0;
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if (check_shm_size(s, incoming_fd) == -1) {
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exit(-1);
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}
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/* mmap the region and map into the BAR2 */
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map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
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incoming_fd, 0);
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s->ivshmem_offset = qemu_ram_alloc_from_ptr(&s->dev.qdev,
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"ivshmem.bar2", s->ivshmem_size, map_ptr);
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IVSHMEM_DPRINTF("guest pci addr = %" FMT_PCIBUS ", guest h/w addr = %"
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PRIu64 ", size = %" PRIu64 "\n", s->shm_pci_addr,
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s->ivshmem_offset, s->ivshmem_size);
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if (s->shm_pci_addr > 0) {
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/* map memory into BAR2 */
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cpu_register_physical_memory(s->shm_pci_addr, s->ivshmem_size,
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s->ivshmem_offset);
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}
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/* only store the fd if it is successfully mapped */
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s->shm_fd = incoming_fd;
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return;
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}
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/* each guest has an array of eventfds, and we keep track of how many
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* guests for each VM */
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guest_max_eventfd = s->peers[incoming_posn].nb_eventfds;
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if (guest_max_eventfd == 0) {
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/* one eventfd per MSI vector */
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s->peers[incoming_posn].eventfds = (int *) qemu_malloc(s->vectors *
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sizeof(int));
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}
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/* this is an eventfd for a particular guest VM */
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IVSHMEM_DPRINTF("eventfds[%ld][%d] = %d\n", incoming_posn,
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guest_max_eventfd, incoming_fd);
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s->peers[incoming_posn].eventfds[guest_max_eventfd] = incoming_fd;
|
|
|
|
/* increment count for particular guest */
|
|
s->peers[incoming_posn].nb_eventfds++;
|
|
|
|
/* keep track of the maximum VM ID */
|
|
if (incoming_posn > s->max_peer) {
|
|
s->max_peer = incoming_posn;
|
|
}
|
|
|
|
if (incoming_posn == s->vm_id) {
|
|
s->eventfd_chr[guest_max_eventfd] = create_eventfd_chr_device(s,
|
|
s->peers[s->vm_id].eventfds[guest_max_eventfd],
|
|
guest_max_eventfd);
|
|
}
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
|
|
if (kvm_set_ioeventfd_mmio_long(incoming_fd, s->mmio_addr + DOORBELL,
|
|
(incoming_posn << 16) | guest_max_eventfd, 1) < 0) {
|
|
fprintf(stderr, "ivshmem: ioeventfd not available\n");
|
|
}
|
|
}
|
|
|
|
return;
|
|
}
|
|
|
|
static void ivshmem_reset(DeviceState *d)
|
|
{
|
|
IVShmemState *s = DO_UPCAST(IVShmemState, dev.qdev, d);
|
|
|
|
s->intrstatus = 0;
|
|
return;
|
|
}
|
|
|
|
static void ivshmem_mmio_map(PCIDevice *pci_dev, int region_num,
|
|
pcibus_t addr, pcibus_t size, int type)
|
|
{
|
|
IVShmemState *s = DO_UPCAST(IVShmemState, dev, pci_dev);
|
|
|
|
s->mmio_addr = addr;
|
|
cpu_register_physical_memory(addr + 0, IVSHMEM_REG_BAR_SIZE,
|
|
s->ivshmem_mmio_io_addr);
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
|
|
setup_ioeventfds(s);
|
|
}
|
|
}
|
|
|
|
static uint64_t ivshmem_get_size(IVShmemState * s) {
|
|
|
|
uint64_t value;
|
|
char *ptr;
|
|
|
|
value = strtoull(s->sizearg, &ptr, 10);
|
|
switch (*ptr) {
|
|
case 0: case 'M': case 'm':
|
|
value <<= 20;
|
|
break;
|
|
case 'G': case 'g':
|
|
value <<= 30;
|
|
break;
|
|
default:
|
|
fprintf(stderr, "qemu: invalid ram size: %s\n", s->sizearg);
|
|
exit(1);
|
|
}
|
|
|
|
/* BARs must be a power of 2 */
|
|
if (!is_power_of_two(value)) {
|
|
fprintf(stderr, "ivshmem: size must be power of 2\n");
|
|
exit(1);
|
|
}
|
|
|
|
return value;
|
|
}
|
|
|
|
static void ivshmem_setup_msi(IVShmemState * s) {
|
|
|
|
int i;
|
|
|
|
/* allocate the MSI-X vectors */
|
|
|
|
if (!msix_init(&s->dev, s->vectors, 1, 0)) {
|
|
pci_register_bar(&s->dev, 1,
|
|
msix_bar_size(&s->dev),
|
|
PCI_BASE_ADDRESS_SPACE_MEMORY,
|
|
msix_mmio_map);
|
|
IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
|
|
} else {
|
|
IVSHMEM_DPRINTF("msix initialization failed\n");
|
|
exit(1);
|
|
}
|
|
|
|
/* 'activate' the vectors */
|
|
for (i = 0; i < s->vectors; i++) {
|
|
msix_vector_use(&s->dev, i);
|
|
}
|
|
|
|
/* allocate Qemu char devices for receiving interrupts */
|
|
s->eventfd_table = qemu_mallocz(s->vectors * sizeof(EventfdEntry));
|
|
}
|
|
|
|
static void ivshmem_save(QEMUFile* f, void *opaque)
|
|
{
|
|
IVShmemState *proxy = opaque;
|
|
|
|
IVSHMEM_DPRINTF("ivshmem_save\n");
|
|
pci_device_save(&proxy->dev, f);
|
|
|
|
if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
|
|
msix_save(&proxy->dev, f);
|
|
} else {
|
|
qemu_put_be32(f, proxy->intrstatus);
|
|
qemu_put_be32(f, proxy->intrmask);
|
|
}
|
|
|
|
}
|
|
|
|
static int ivshmem_load(QEMUFile* f, void *opaque, int version_id)
|
|
{
|
|
IVSHMEM_DPRINTF("ivshmem_load\n");
|
|
|
|
IVShmemState *proxy = opaque;
|
|
int ret, i;
|
|
|
|
if (version_id > 0) {
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (proxy->role_val == IVSHMEM_PEER) {
|
|
fprintf(stderr, "ivshmem: 'peer' devices are not migratable\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = pci_device_load(&proxy->dev, f);
|
|
if (ret) {
|
|
return ret;
|
|
}
|
|
|
|
if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
|
|
msix_load(&proxy->dev, f);
|
|
for (i = 0; i < proxy->vectors; i++) {
|
|
msix_vector_use(&proxy->dev, i);
|
|
}
|
|
} else {
|
|
proxy->intrstatus = qemu_get_be32(f);
|
|
proxy->intrmask = qemu_get_be32(f);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pci_ivshmem_init(PCIDevice *dev)
|
|
{
|
|
IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev);
|
|
uint8_t *pci_conf;
|
|
|
|
if (s->sizearg == NULL)
|
|
s->ivshmem_size = 4 << 20; /* 4 MB default */
|
|
else {
|
|
s->ivshmem_size = ivshmem_get_size(s);
|
|
}
|
|
|
|
register_savevm(&s->dev.qdev, "ivshmem", 0, 0, ivshmem_save, ivshmem_load,
|
|
dev);
|
|
|
|
/* IRQFD requires MSI */
|
|
if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
|
|
!ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
fprintf(stderr, "ivshmem: ioeventfd/irqfd requires MSI\n");
|
|
exit(1);
|
|
}
|
|
|
|
/* check that role is reasonable */
|
|
if (s->role) {
|
|
if (strncmp(s->role, "peer", 5) == 0) {
|
|
s->role_val = IVSHMEM_PEER;
|
|
} else if (strncmp(s->role, "master", 7) == 0) {
|
|
s->role_val = IVSHMEM_MASTER;
|
|
} else {
|
|
fprintf(stderr, "ivshmem: 'role' must be 'peer' or 'master'\n");
|
|
exit(1);
|
|
}
|
|
} else {
|
|
s->role_val = IVSHMEM_MASTER; /* default */
|
|
}
|
|
|
|
if (s->role_val == IVSHMEM_PEER) {
|
|
register_device_unmigratable(&s->dev.qdev, "ivshmem", s);
|
|
}
|
|
|
|
pci_conf = s->dev.config;
|
|
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT_QUMRANET);
|
|
pci_conf[0x02] = 0x10;
|
|
pci_conf[0x03] = 0x11;
|
|
pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
|
|
pci_config_set_class(pci_conf, PCI_CLASS_MEMORY_RAM);
|
|
pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
|
|
|
|
pci_config_set_interrupt_pin(pci_conf, 1);
|
|
|
|
s->shm_pci_addr = 0;
|
|
s->ivshmem_offset = 0;
|
|
s->shm_fd = 0;
|
|
|
|
s->ivshmem_mmio_io_addr = cpu_register_io_memory(ivshmem_mmio_read,
|
|
ivshmem_mmio_write, s);
|
|
/* region for registers*/
|
|
pci_register_bar(&s->dev, 0, IVSHMEM_REG_BAR_SIZE,
|
|
PCI_BASE_ADDRESS_SPACE_MEMORY, ivshmem_mmio_map);
|
|
|
|
if ((s->server_chr != NULL) &&
|
|
(strncmp(s->server_chr->filename, "unix:", 5) == 0)) {
|
|
/* if we get a UNIX socket as the parameter we will talk
|
|
* to the ivshmem server to receive the memory region */
|
|
|
|
if (s->shmobj != NULL) {
|
|
fprintf(stderr, "WARNING: do not specify both 'chardev' "
|
|
"and 'shm' with ivshmem\n");
|
|
}
|
|
|
|
IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
|
|
s->server_chr->filename);
|
|
|
|
if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
|
|
ivshmem_setup_msi(s);
|
|
}
|
|
|
|
/* we allocate enough space for 16 guests and grow as needed */
|
|
s->nb_peers = 16;
|
|
s->vm_id = -1;
|
|
|
|
/* allocate/initialize space for interrupt handling */
|
|
s->peers = qemu_mallocz(s->nb_peers * sizeof(Peer));
|
|
|
|
pci_register_bar(&s->dev, 2, s->ivshmem_size,
|
|
PCI_BASE_ADDRESS_SPACE_MEMORY, ivshmem_map);
|
|
|
|
s->eventfd_chr = qemu_mallocz(s->vectors * sizeof(CharDriverState *));
|
|
|
|
qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
|
|
ivshmem_event, s);
|
|
} else {
|
|
/* just map the file immediately, we're not using a server */
|
|
int fd;
|
|
|
|
if (s->shmobj == NULL) {
|
|
fprintf(stderr, "Must specify 'chardev' or 'shm' to ivshmem\n");
|
|
}
|
|
|
|
IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
|
|
|
|
/* try opening with O_EXCL and if it succeeds zero the memory
|
|
* by truncating to 0 */
|
|
if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
|
|
S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
|
|
/* truncate file to length PCI device's memory */
|
|
if (ftruncate(fd, s->ivshmem_size) != 0) {
|
|
fprintf(stderr, "ivshmem: could not truncate shared file\n");
|
|
}
|
|
|
|
} else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
|
|
S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
|
|
fprintf(stderr, "ivshmem: could not open shared file\n");
|
|
exit(-1);
|
|
|
|
}
|
|
|
|
if (check_shm_size(s, fd) == -1) {
|
|
exit(-1);
|
|
}
|
|
|
|
create_shared_memory_BAR(s, fd);
|
|
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pci_ivshmem_uninit(PCIDevice *dev)
|
|
{
|
|
IVShmemState *s = DO_UPCAST(IVShmemState, dev, dev);
|
|
|
|
cpu_unregister_io_memory(s->ivshmem_mmio_io_addr);
|
|
unregister_savevm(&dev->qdev, "ivshmem", s);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static PCIDeviceInfo ivshmem_info = {
|
|
.qdev.name = "ivshmem",
|
|
.qdev.size = sizeof(IVShmemState),
|
|
.qdev.reset = ivshmem_reset,
|
|
.init = pci_ivshmem_init,
|
|
.exit = pci_ivshmem_uninit,
|
|
.qdev.props = (Property[]) {
|
|
DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
|
|
DEFINE_PROP_STRING("size", IVShmemState, sizearg),
|
|
DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
|
|
DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
|
|
DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
|
|
DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
|
|
DEFINE_PROP_STRING("role", IVShmemState, role),
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
}
|
|
};
|
|
|
|
static void ivshmem_register_devices(void)
|
|
{
|
|
pci_qdev_register(&ivshmem_info);
|
|
}
|
|
|
|
device_init(ivshmem_register_devices)
|