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Author SHA1 Message Date
Blue Swirl f0c4d3ebc3 Merge branch 'for-upstream' of git://repo.or.cz/qemu/agraf
* 'for-upstream' of git://repo.or.cz/qemu/agraf: (21 commits)
  PPC: E500: Populate L1CFG0 SPR
  PPC: e500mc: Enable processor control
  PPC: E500: Implement msgsnd
  PPC: E500: Implement msgclr
  PPC: Enable doorbell excp handlers
  PPC: Add CPU feature for processor control
  PPC: E500: Add doorbell defines
  PPC: E500: Add some more excp vectors
  KVM: Fix compilation on non-x86
  PPC: booke206: move avail check to tlbwe
  PPC: booke206: Check for TLB overrun
  PPC: booke206: Implement tlbilx
  PPC: booke206: Check for min/max TLB entry size
  PPC: booke: add tlbnps handling
  PPC: booke206: allow NULL raddr in ppcmas_tlb_check
  PPC: rename msync to msync_4xx
  PPC: e500: msync is 440 only, e500 has real sync
  PPC: e500mc: add missing IVORs to bitmap
  PPC: Add IVOR 38-42
  PPC: KVM: Update HIOR code to new interface
  ...
2012-02-04 09:37:55 +00:00
Anthony Liguori c9344f2220 Fix build breakage from last commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 11:22:35 -06:00
Anthony Liguori eeb9c1b552 s390x: fix -drive in the absence of aliases
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 11:13:30 -06:00
Anthony Liguori 8b45d447ce container: make a decendent of Object
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
---
v1 -> v2
 - Add license (Paolo)
2012-02-03 10:41:08 -06:00
Anthony Liguori db85b575b9 object: sure up reference counting
Now we have the following behavior:

1) object_new() returns an object with ref = 1
2) object_initialize() does not increase the reference count (ref may be 0).
3) object_deref() will finalize the object when ref = 0.  it does not free the
   memory associated with the object.
4) both link and child properties correctly set the reference count.

The expected usage is the following:

1) child devices should generally be created via object_initialize() using
   memory from the parent device.  Adding the object as a child property will
   take ownership of the object and tie the child's life cycle to the parent.

2) If a child device is created via qdev_create() or some other form of
   object_new(), there must be an object_delete() call in the parent device's
   finalize function.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori d03d6b4e5c info qdm: do not require a parent_bus to be set
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori 60adba3769 qdev: implement cleanup logic in finalize
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori fe40e627c5 qom: accept any compatible type when setting a link property
Links had limited utility before as they only allowed a concrete type to be
specified.  Now we can support abstract types and interfaces which means it's
now possible to have a link<PCIDevice>.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori 57c9fafe0f qom: move properties from qdev to object
This is mostly code movement although not entirely.  This makes properties part
of the Object base class which means that we can now start using Object in a
meaningful way outside of qdev.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori 0beb494207 qdev: nuke qdev_init_chardev()
I'm sure the intentions were good here, but there's no reason this should be in
qdev.  Move it to qemu-char where it belongs.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori ee46d8a503 qdev: split out UI portions into a new function
qdev-monitor.c deals with the -device, device_add, and info qdm/qtree
interfaces.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori 9fbe61277f qdev: refactor away qdev_create_from_info
Note that the FIXME gets fixed in series 4/4.  We need to convert BusState to
QOM before we can make parent_bus a link.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori 9674bfe420 qdev: split out common init to instance_init
This gets us closer to being able to object_new() a qdev type and have a
functioning object verses having to call qdev_create().

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:08 -06:00
Anthony Liguori 5eeee3fa2e qom: add new command to search for types
This adds a command that allows searching for types that implement a property.
This allows you to do things like search for all available PCIDevices.  In the
future, we'll also have a standard interface for things with a BlockDriverState
property that a PCIDevice could implement.

This will enable search queries like, "any type that implements the BlockDevice
interface" which would allow management tools to present available block devices
without having to hard code device names.  Since an object can implement
multiple interfaces, one device could act both as a BlockDevice and a
NetworkDevice.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:07 -06:00
Anthony Liguori 6acbe4c6f1 qdev: remove baked in notion of aliases (v2)
Limit them to the device_add functionality.  Device aliases were a hack based
on the fact that virtio was modeled the wrong way.  The mechanism for aliasing
is very limited in that only one alias can exist for any device.

We have to support it for the purposes of compatibility but we only need to
support it in device_add so restrict it to that piece of code.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
---
v1 -> v2
 - Use a table for aliases (Paolo)
2012-02-03 10:41:07 -06:00
Anthony Liguori d307af795d qdev: kill off DeviceInfo
It is no longer used in the tree since everything is done natively through
QEMU Object Model.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:06 -06:00
Anthony Liguori 39bffca203 qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion.  I did it in three steps and then
rebased it into a single step which avoids repeatedly touching every file in
the tree.

The first step was a sed-based addition of the parent type to the subclass
registration functions.

The second step was another sed-based removal of subclass registration functions
while also adding virtual functions from the base class into a class_init
function as appropriate.

Finally, a python script was used to convert the DeviceInfo structures and
qdev_register_subclass functions to TypeInfo structures, class_init functions,
and type_register_static calls.

We are almost fully converted to QOM after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:06 -06:00
Anthony Liguori 212ad11168 qdev: kill off DeviceInfo list
Teach the various bits of code that need to walk through available devices to
do so via QOM.

Signed-off-by: Anthony Liguori
2012-02-03 10:41:06 -06:00
Anthony Liguori 93c511a1ad qom: allow object_class_foreach to take additional parameters to refine search
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:05 -06:00
Anthony Liguori 18b6dade8c qdev: refactor device creation to allow bus_info to be set only in class
As we use class_init to set class members, DeviceInfo no longer holds this
information.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:05 -06:00
Anthony Liguori d253e09619 qdev: allow classes to overload qdev functions
This allows us to drop per-Device registration functions by allowing the
class_init functions to overload qdev methods.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:05 -06:00
Anthony Liguori 6e008585eb qdev: remove info from class
Now DeviceInfo is no longer used after object construction.  All of the
relevant members have been moved to DeviceClass.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:05 -06:00
Anthony Liguori 4be9f0d11c qdev: make DeviceInfo private
Introduce accessors and remove any code that directly accesses DeviceInfo
members.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:04 -06:00
Anthony Liguori ba02430f1a usb: separate out legacy usb registration from type registration
Type registeration is going to get turned into a QOM call so decouple the
legacy support.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:03 -06:00
Anthony Liguori 7f595609b4 usb-hid: simplify class initialization a bit
We can probably model USBHidDevice as a base class to get even better code
sharing but for now, just use a common function to initialize the common class
members.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:03 -06:00
Alexander Graf a496e8eeba PPC: E500: Populate L1CFG0 SPR
When running Linux on e500 with powersave-nap enabled, Linux tries to
read out the L1CFG0 register and calculates some things from it. Passing
0 there ends up in a division by 0, resulting in -1, resulting in badness.

So let's populate the L1CFG0 register with reasonable defaults. That way
guests aren't completely confused.

Reported-by: Shrijeet Mukherjee <shm@cumulusnetworks.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:49 +01:00
Alexander Graf 8917f4dc62 PPC: e500mc: Enable processor control
The e500mc implements Embedded.Processor Control, so enable it and
thus enable guests to IPI each other. This makes -smp work with -cpu
e500mc.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:47 +01:00
Alexander Graf d5d11a39a8 PPC: E500: Implement msgsnd
This patch implements the msgsnd instruction. It is part of the
Embedded.Processor Control specification and allows one CPU to
IPI another CPU without going through an interrupt controller.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:47 +01:00
Alexander Graf 9e0b5cb1ec PPC: E500: Implement msgclr
This patch implements the msgclr instruction. It is part of the
Embedded.Processor Control specification and clears pending doorbell
interrupts on the current CPU.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:47 +01:00
Alexander Graf a9abd71770 PPC: Enable doorbell excp handlers
We already had all the code available to have doorbell exceptions
be handled properly. It was just disabled.

Enable it, so we can rely on it.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:47 +01:00
Alexander Graf 3f9f6a5082 PPC: Add CPU feature for processor control
We're soon going to implement processor control features. Add the
feature flag, so we're well prepared.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:47 +01:00
Alexander Graf 58e00a2432 PPC: E500: Add doorbell defines
We're going to introduce doorbell instructions (called processor
control in the spec) soon. Add some defines for easier patch
readability later.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:47 +01:00
Alexander Graf 0ef654e3fc PPC: E500: Add some more excp vectors
Our EXCP list is getting outdated. By now, 3 new exception vectors have
been introduced. Update the list so we have everything at one place.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:46 +01:00
Alexander Graf a9c5eb0db1 KVM: Fix compilation on non-x86
Commit 84b058d broke compilation for KVM on non-x86 targets, which
don't have KVM_CAP_IRQ_ROUTING defined.

Fix by not using the unavailable constant when it's not around.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:46 +01:00
Alexander Graf 21a0b6ed1d PPC: booke206: move avail check to tlbwe
We can have TLBs that only support a single page size. This is defined
by the absence of the AVAIL flag in TLBnCFG. If this is the case, we
currently write invalid size info into the TLB, but override it on
internal fault.

Let's move the check over to tlbwe, so we don't have the AVAIL check in
the hotter fault path.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:46 +01:00
Alexander Graf 3f162d119e PPC: booke206: Check for TLB overrun
Our internal helpers to fetch TLB entries were not able to tell us
that an entry doesn't even exist. Pass an error out if we hit such
a case to not accidently pass beyond the TLB array.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:46 +01:00
Alexander Graf 6d3db821c1 PPC: booke206: Implement tlbilx
The PowerPC 2.06 BookE ISA defines an opcode called "tlbilx" which is used
to flush TLB entries. It's the recommended way of flushing in virtualized
environments.

So far we got away without implementing it, but Linux for e500mc uses this
instruction, so we better add it :).

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:46 +01:00
Alexander Graf 5935ee072d PPC: booke206: Check for min/max TLB entry size
When setting a TLB entry, we need to check if the TLB we're putting it in
actually supports the given size. According to the 2.06 PowerPC ISA, a
value that's out of range can either be redefined to something implementation
dependent or we can raise an illegal opcode exception. We do the latter.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:46 +01:00
Alexander Graf a1ef618a37 PPC: booke: add tlbnps handling
When using MAV 2.0 TLB registers, we have another range of TLB registers
available to read the supported page sizes from.

Add SPR definitions for those and add a helper function that we can use
to receive such a bitmap even when using MAV 1.0.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:46 +01:00
Alexander Graf ffba87862b PPC: booke206: allow NULL raddr in ppcmas_tlb_check
We might want to call the tlb check function without actually caring about
the real address resolution. Check if we really should write the value
back.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:45 +01:00
Alexander Graf dcb2b9e100 PPC: rename msync to msync_4xx
The msync instruction as defined today is only valid on 4xx cores, not
on e500 which also supports msync, but treats it the same way as sync.

Rename it to reflect that it's 4xx only.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:45 +01:00
Alexander Graf 5331916631 PPC: e500: msync is 440 only, e500 has real sync
The e500 CPUs don't use 440's msync which falls on the same opcode IDs,
but instead use the real powerpc sync instruction. This is important,
since the invalid mask differs between the two.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:45 +01:00
Alexander Graf 2c9732dbc0 PPC: e500mc: add missing IVORs to bitmap
E500mc supports IVORs 36-41. Add them to the support mask. Drop SPE
support too.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:45 +01:00
Alexander Graf e9205258ac PPC: Add IVOR 38-42
Our code only knows IVORs up to 37. Add the new ones defined in ISA 2.06
from 38 - 42.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-02-02 02:47:45 +01:00
Alexander Graf a31be480a0 PPC: KVM: Update HIOR code to new interface
Unfortunately the HIOR setting code slipped into upstream QEMU
before it was pulled into upstream KVM. And since Murphy is always
right, comments on the patches only emerged on the pull request
leading to changes in the interface.

So here's an update to the HIOR setting. While at it, I also relaxed
it a bit since for HV KVM we can already run fine without and 3.2
works just fine with HV KVM but when not setting HIOR. We will only
need this when running PAPR in PR KVM.

Since we accidently changed the ABI and API along the way, we have
to update the underlying kernel headers together with the code that
uses it to not break bisectability.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:45 +01:00
Alexander Graf 1529ae1bc6 KVM: Update headers (except HIOR mess)
This patch is basically what ./scripts/update-linux-headers.sh against
upstream KVM's next branch outputs except that all the HIOR bits are
removed. These we have to update with the code that uses them.

Signed-off-by: Alexander Graf <agraf@suse.de>
2012-02-02 02:47:42 +01:00
Stefan Weil 4c32fe66b9 Change license from GPLv2 to GPLv2+
This file only contains code from Red Hat, so it can use GPLv2+.
Tested with `git blame -M -C net/checksum.c`.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-01 16:24:54 -06:00
Corey Bryant a7c36ee492 Add support for net bridge
The most common use of -net tap is to connect a tap device to a bridge.  This
requires the use of a script and running qemu as root in order to allocate a
tap device to pass to the script.

This model is great for portability and flexibility but it's incredibly
difficult to eliminate the need to run qemu as root.  The only really viable
mechanism is to use tunctl to create a tap device, attach it to a bridge as
root, and then hand that tap device to qemu.  The problem with this mechanism
is that it requires administrator intervention whenever a user wants to create
a guest.

By essentially writing a helper that implements the most common qemu-ifup
script that can be safely given cap_net_admin, we can dramatically simplify
things for non-privileged users.  We still support existing -net tap options
as a mechanism for advanced users and backwards compatibility.

Currently, this is very Linux centric but there's really no reason why it
couldn't be extended for other Unixes.

A typical invocation would be similar to one of the following:

  qemu linux.img -net bridge -net nic,model=virtio

  qemu linux.img -net tap,helper="/usr/local/libexec/qemu-bridge-helper"
                 -net nic,model=virtio

  qemu linux.img -netdev bridge,id=hn0
                 -device virtio-net-pci,netdev=hn0,id=nic1

  qemu linux.img -netdev tap,helper="/usr/local/libexec/qemu-bridge-helper",id=hn0
                 -device virtio-net-pci,netdev=hn0,id=nic1

The default bridge that we attach to is br0.  The thinking is that a distro
could preconfigure such an interface to allow out-of-the-box bridged networking.

Alternatively, if a user wants to use a different bridge, a typical invocation
would be simliar to one of the following:

  qemu linux.img -net bridge,br=qemubr0 -net nic,model=virtio

  qemu linux.img -net tap,helper="/usr/local/libexec/qemu-bridge-helper --br=qemubr0"
                 -net nic,model=virtio

  qemu linux.img -netdev bridge,br=qemubr0,id=hn0
                 -device virtio-net-pci,netdev=hn0,id=nic1

  qemu linux.img -netdev tap,helper="/usr/local/libexec/qemu-bridge-helper --br=qemubr0",id=hn0
                 -device virtio-net-pci,netdev=hn0,id=nic1

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Richa Marwaha <rmarwah@linux.vnet.ibm.com>
Signed-off-by: Corey Bryant <coreyb@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-01 16:24:40 -06:00
Corey Bryant 47e98658f5 Add cap reduction support to enable use as SUID
The ideal way to use qemu-bridge-helper is to give it an fscap of using:

 setcap cap_net_admin=ep qemu-bridge-helper

Unfortunately, most distros still do not have a mechanism to package files
with fscaps applied.  This means they'll have to SUID the qemu-bridge-helper
binary.

To improve security, use libcap to reduce our capability set to just
cap_net_admin, then reduce privileges down to the calling user.  This is
hopefully close to equivalent to fscap support from a security perspective.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Richa Marwaha <rmarwah@linux.vnet.ibm.com>
Signed-off-by: Corey Bryant <coreyb@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-01 16:24:39 -06:00
Corey Bryant bdef79a299 Add access control support to qemu bridge helper
We go to great lengths to restrict ourselves to just cap_net_admin as an OS
enforced security mechanism.  However, we further restrict what we allow users
to do to simply adding a tap device to a bridge interface by virtue of the fact
that this is the only functionality we expose.

This is not good enough though.  An administrator is likely to want to restrict
the bridges that an unprivileged user can access, in particular, to restrict
an unprivileged user from putting a guest on what should be isolated networks.

This patch implements an ACL mechanism that is enforced by qemu-bridge-helper.
The ACLs are fairly simple whitelist/blacklist mechanisms with a wildcard of
'all'.  All users are blacklisted by default, and deny takes precedence over
allow.

An interesting feature of this ACL mechanism is that you can include external
ACL files.  The main reason to support this is so that you can set different
file system permissions on those external ACL files.  This allows an
administrator to implement rather sophisticated ACL policies based on
user/group policies via the file system.

As an example:

/etc/qemu/bridge.conf root:qemu 0640

 allow br0
 include /etc/qemu/alice.conf
 include /etc/qemu/bob.conf
 include /etc/qemu/charlie.conf

/etc/qemu/alice.conf root:alice 0640
 allow br1

/etc/qemu/bob.conf root:bob 0640
 allow br2

/etc/qemu/charlie.conf root:charlie 0640
 deny all

This ACL pattern allows any user in the qemu group to get a tap device
connected to br0 (which is bridged to the physical network).

Users in the alice group can additionally get a tap device connected to br1.
This allows br1 to act as a private bridge for the alice group.

Users in the bob group can additionally get a tap device connected to br2.
This allows br2 to act as a private bridge for the bob group.

Users in the charlie group cannot get a tap device connected to any bridge.

Under no circumstance can the bob group get access to br1 or can the alice
group get access to br2.  And under no cicumstance can the charlie group
get access to any bridge.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Richa Marwaha <rmarwah@linux.vnet.ibm.com>
Signed-off-by: Corey Bryant <coreyb@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-01 16:24:39 -06:00