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target-ppc: fixes for gen_op_neg() 

- Rename to gen_op_arith_neg for consistency with other functions.
- Correctly free TCG temp variable.
- Fix the return value in 64-bit mode in case of overflow.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5659 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-11-09 17:27:27 +00:00
parent 2ef1b120d1
commit ec6469a3b1
1 changed files with 14 additions and 15 deletions
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29
target-ppc/translate.c
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@ -1288,44 +1288,43 @@ GEN_INT_ARITH_MUL_HELPER(mulldo, 0x17);
#endif
/* neg neg. nego nego. */
static always_inline void gen_op_neg (DisasContext *ctx, TCGv ret, TCGv arg1, int ov_check)
static always_inline void gen_op_arith_neg (DisasContext *ctx, TCGv ret, TCGv arg1, int ov_check)
{
int l1, l2;
l1 = gen_new_label();
l2 = gen_new_label();
int l1 = gen_new_label();
int l2 = gen_new_label();
TCGv t0 = tcg_temp_local_new(TCG_TYPE_TL);
#if defined(TARGET_PPC64)
if (ctx->sf_mode) {
tcg_gen_brcondi_tl(TCG_COND_EQ, arg1, INT64_MIN, l1);
} else {
TCGv t0 = tcg_temp_new(TCG_TYPE_TL);
tcg_gen_ext32s_tl(t0, arg1);
tcg_gen_movi_tl(t0, arg1);
tcg_gen_brcondi_tl(TCG_COND_EQ, t0, INT64_MIN, l1);
} else
#endif
{
tcg_gen_ext32s_tl(t0, arg1);
tcg_gen_brcondi_tl(TCG_COND_EQ, t0, INT32_MIN, l1);
}
#else
tcg_gen_brcondi_tl(TCG_COND_EQ, arg1, INT32_MIN, l1);
#endif
tcg_gen_neg_tl(ret, arg1);
if (ov_check) {
tcg_gen_andi_tl(cpu_xer, cpu_xer, ~(1 << XER_OV));
}
tcg_gen_br(l2);
gen_set_label(l1);
tcg_gen_mov_tl(ret, arg1);
tcg_gen_mov_tl(ret, t0);
if (ov_check) {
tcg_gen_ori_tl(cpu_xer, cpu_xer, (1 << XER_OV) | (1 << XER_SO));
}
gen_set_label(l2);
tcg_temp_free(t0);
if (unlikely(Rc(ctx->opcode) != 0))
gen_set_Rc0(ctx, ret);
}
GEN_HANDLER(neg, 0x1F, 0x08, 0x03, 0x0000F800, PPC_INTEGER)
{
gen_op_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0);
gen_op_arith_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0);
}
GEN_HANDLER(nego, 0x1F, 0x08, 0x13, 0x0000F800, PPC_INTEGER)
{
gen_op_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 1);
gen_op_arith_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 1);
}
/* Common subf function */