PPC: Fix via-cuda memory registration
Commit 23c5e4ca
(convert to memory API) broke the VIA Cuda emulation layer
by not registering the IO structs.
This patch registers them properly and thus makes -M g3beige and -M mac99
work again.
Tested-by: Andreas Färber <andreas.faerber@web.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
parent
7a880d9352
commit
ea0a7eb460
28
hw/cuda.c
28
hw/cuda.c
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@ -634,16 +634,20 @@ static uint32_t cuda_readl (void *opaque, target_phys_addr_t addr)
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return 0;
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return 0;
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}
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}
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static CPUWriteMemoryFunc * const cuda_write[] = {
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static MemoryRegionOps cuda_ops = {
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&cuda_writeb,
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.old_mmio = {
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&cuda_writew,
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.write = {
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&cuda_writel,
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cuda_writeb,
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};
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cuda_writew,
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cuda_writel,
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static CPUReadMemoryFunc * const cuda_read[] = {
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},
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&cuda_readb,
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.read = {
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&cuda_readw,
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cuda_readb,
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&cuda_readl,
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cuda_readw,
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cuda_readl,
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},
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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};
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static bool cuda_timer_exist(void *opaque, int version_id)
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static bool cuda_timer_exist(void *opaque, int version_id)
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@ -740,8 +744,8 @@ void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq)
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s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
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s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
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s->adb_poll_timer = qemu_new_timer_ns(vm_clock, cuda_adb_poll, s);
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s->adb_poll_timer = qemu_new_timer_ns(vm_clock, cuda_adb_poll, s);
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cpu_register_io_memory(cuda_read, cuda_write, s,
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memory_region_init_io(&s->mem, &cuda_ops, s, "cuda", 0x2000);
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DEVICE_NATIVE_ENDIAN);
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*cuda_mem = &s->mem;
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*cuda_mem = &s->mem;
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vmstate_register(NULL, -1, &vmstate_cuda, s);
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vmstate_register(NULL, -1, &vmstate_cuda, s);
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qemu_register_reset(cuda_reset, s);
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qemu_register_reset(cuda_reset, s);
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