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target-mips: optimize some gpr accesses 

Optimize gpr accesses when it is known at translation time that gpr != 0.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6307 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2009-01-14 19:40:46 +00:00
parent 6958549d4f
commit e9203484cb
1 changed files with 6 additions and 12 deletions
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18
target-mips/translate.c
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@ -988,9 +988,8 @@ static void gen_ldst (DisasContext *ctx, uint32_t opc, int rt,
} else if (offset == 0) {
gen_load_gpr(t0, base);
} else {
gen_load_gpr(t0, base);
tcg_gen_movi_tl(t1, offset);
gen_op_addr_add(ctx, t0, t1);
tcg_gen_movi_tl(t0, offset);
gen_op_addr_add(ctx, t0, cpu_gpr[base]);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@ -1151,12 +1150,8 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft,
} else if (offset == 0) {
gen_load_gpr(t0, base);
} else {
TCGv t1 = tcg_temp_local_new();
gen_load_gpr(t0, base);
tcg_gen_movi_tl(t1, offset);
gen_op_addr_add(ctx, t0, t1);
tcg_temp_free(t1);
tcg_gen_movi_tl(t0, offset);
gen_op_addr_add(ctx, t0, cpu_gpr[base]);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */
@ -7259,9 +7254,8 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc,
} else if (index == 0) {
gen_load_gpr(t0, base);
} else {
gen_load_gpr(t0, base);
gen_load_gpr(t1, index);
gen_op_addr_add(ctx, t0, t1);
gen_load_gpr(t0, index);
gen_op_addr_add(ctx, t0, cpu_gpr[base]);
}
/* Don't do NOP if destination is zero: we must perform the actual
memory access. */