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mips: Correct VInt vector generation 

1. The pending need to pass the Status IM gating.
2. The priority is from seven (highest prio) down to zero.
   QEMU was doing the opposite.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
This commit is contained in:
Edgar E. Iglesias 2011-08-29 23:07:36 +02:00
parent bc45a67a22
commit e428097341
1 changed files with 3 additions and 3 deletions
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6
target-mips/helper.c
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@ -482,18 +482,18 @@ void do_interrupt (CPUState *env)
unsigned int vector;
unsigned int pending = (env->CP0_Cause & CP0Ca_IP_mask) >> 8;
pending &= env->CP0_Status >> 8;
/* Compute the Vector Spacing. */
spacing = (env->CP0_IntCtl >> CP0IntCtl_VS) & ((1 << 6) - 1);
spacing <<= 5;
if (env->CP0_Config3 & (1 << CP0C3_VInt)) {
/* For VInt mode, the MIPS computes the vector internally. */
for (vector = 0; vector < 8; vector++) {
if (pending & 1) {
for (vector = 7; vector > 0; vector--) {
if (pending & (1 << vector)) {
/* Found it. */
break;
}
pending >>= 1;
}
} else {
/* For VEIC mode, the external interrupt controller feeds the