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PPC: rename cpu_ppc_reset to cpu_reset for consistency

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-11-07 10:36:04 +00:00
parent 44a9935465
commit d84bda46de
9 changed files with 11 additions and 14 deletions

View File

@ -416,7 +416,7 @@ int cpu_exec(CPUState *env1)
#elif defined(TARGET_PPC)
#if 0
if ((interrupt_request & CPU_INTERRUPT_RESET)) {
cpu_ppc_reset(env);
cpu_reset(env);
}
#endif
if (interrupt_request & CPU_INTERRUPT_HARD) {

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@ -123,7 +123,7 @@ static void ppc6xx_set_irq (void *opaque, int pin, int level)
env->interrupt_request |= CPU_INTERRUPT_EXITTB;
/* XXX: TOFIX */
#if 0
cpu_ppc_reset(env);
cpu_reset(env);
#else
qemu_system_reset_request();
#endif
@ -1088,7 +1088,7 @@ int ppc_dcr_init (CPUState *env, int (*read_error)(int dcrn),
#if 0
/*****************************************************************************/
/* Handle system reset (for now, just stop emulation) */
void cpu_ppc_reset (CPUState *env)
void cpu_reset(CPUState *env)
{
printf("Reset asked... Stop emulation\n");
abort();

View File

@ -1805,7 +1805,7 @@ void ppc40x_core_reset (CPUState *env)
env->interrupt_request |= CPU_INTERRUPT_EXITTB;
/* XXX: TOFIX */
#if 0
cpu_ppc_reset(env);
cpu_reset(env);
#else
qemu_system_reset_request();
#endif
@ -1823,7 +1823,7 @@ void ppc40x_chip_reset (CPUState *env)
env->interrupt_request |= CPU_INTERRUPT_EXITTB;
/* XXX: TOFIX */
#if 0
cpu_ppc_reset(env);
cpu_reset(env);
#else
qemu_system_reset_request();
#endif

View File

@ -60,7 +60,7 @@ CPUState *ppc4xx_init (const char *cpu_model,
tb_clk->opaque = env;
ppc_dcr_init(env, NULL, NULL);
/* Register qemu callbacks */
qemu_register_reset(&cpu_ppc_reset, env);
qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
return env;
}

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@ -130,7 +130,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
#if 0
env->osi_call = vga_osi_call;
#endif
qemu_register_reset(&cpu_ppc_reset, env);
qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
envs[i] = env;
}

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@ -158,7 +158,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
/* Set time-base frequency to 16.6 Mhz */
cpu_ppc_tb_init(env, 16600000UL);
env->osi_call = vga_osi_call;
qemu_register_reset(&cpu_ppc_reset, env);
qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
envs[i] = env;
}

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@ -586,7 +586,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
/* Set time-base frequency to 100 Mhz */
cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
}
qemu_register_reset(&cpu_ppc_reset, env);
qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
envs[i] = env;
}

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@ -734,8 +734,6 @@ void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value);
#endif /* !defined(CONFIG_USER_ONLY) */
void ppc_store_msr (CPUPPCState *env, target_ulong value);
void cpu_ppc_reset (void *opaque);
void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
const ppc_def_t *cpu_ppc_find_by_name (const char *name);

View File

@ -2748,9 +2748,8 @@ void cpu_dump_rfi (target_ulong RA, target_ulong msr)
TARGET_FMT_lx "\n", RA, msr);
}
void cpu_ppc_reset (void *opaque)
void cpu_reset(CPUPPCState *env)
{
CPUPPCState *env = opaque;
target_ulong msr;
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
@ -2812,7 +2811,7 @@ CPUPPCState *cpu_ppc_init (const char *cpu_model)
env->cpu_model_str = cpu_model;
cpu_ppc_register_internal(env, def);
#if defined(CONFIG_USER_ONLY)
cpu_ppc_reset(env);
cpu_reset(env);
#endif
qemu_init_vcpu(env);