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Fix OMAP1 MPUI/O keyboard interrupt masking. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3796 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog 2007-12-10 01:07:47 +00:00
parent 2e8c191795
commit cf6d911814
3 changed files with 5 additions and 5 deletions
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2
hw/flash.h
View File

@ -10,7 +10,7 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
/* pflash_cfi02.c */
pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
BlockDriverState *bs, target_ulong sector_len,
BlockDriverState *bs, uint32_t sector_len,
int nb_blocs, int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3);

6
hw/omap.c
View File

@ -3576,8 +3576,8 @@ static void omap_mpuio_kbd_update(struct omap_mpuio_s *s)
if (*row & cols)
rows |= i;
qemu_set_irq(s->kbd_irq, rows && ~s->kbd_mask && s->clk);
s->row_latch = rows ^ 0x1f;
qemu_set_irq(s->kbd_irq, rows && !s->kbd_mask && s->clk);
s->row_latch = ~rows;
}
static uint32_t omap_mpuio_read(void *opaque, target_phys_addr_t addr)
@ -3609,7 +3609,7 @@ static uint32_t omap_mpuio_read(void *opaque, target_phys_addr_t addr)
return s->edge;
case 0x20: /* KBD_INT */
return (s->row_latch != 0x1f) && !s->kbd_mask;
return (~s->row_latch & 0x1f) && !s->kbd_mask;
case 0x24: /* GPIO_INT */
ret = s->ints;

2
hw/pflash_cfi02.c
View File

@ -525,7 +525,7 @@ static int ctz32 (uint32_t n)
}
pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
BlockDriverState *bs, target_ulong sector_len,
BlockDriverState *bs, uint32_t sector_len,
int nb_blocs, int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3)