SH4: Convert immediate loads to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5098 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files with 4 additions and 16 deletions
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@ -37,18 +37,6 @@ static inline void cond_t(int cond)
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clr_t();
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}
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void OPPROTO op_movl_imm_T0(void)
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{
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T0 = (uint32_t) PARAM1;
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RETURN();
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}
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void OPPROTO op_movl_imm_T1(void)
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{
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T1 = (uint32_t) PARAM1;
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RETURN();
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}
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void OPPROTO op_cmp_eq_imm_T0(void)
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{
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cond_t((int32_t) T0 == (int32_t) PARAM1);
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@ -337,12 +337,12 @@ void _decode_opc(DisasContext * ctx)
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gen_op_movl_imm_rN(B7_0s, REG(B11_8));
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return;
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case 0x9000: /* mov.w @(disp,PC),Rn */
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gen_op_movl_imm_T0(ctx->pc + 4 + B7_0 * 2);
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tcg_gen_movi_tl(cpu_T[0], ctx->pc + 4 + B7_0 * 2);
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gen_op_ldw_T0_T0(ctx);
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gen_op_movl_T0_rN(REG(B11_8));
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return;
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case 0xd000: /* mov.l @(disp,PC),Rn */
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gen_op_movl_imm_T0((ctx->pc + 4 + B7_0 * 4) & ~3);
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tcg_gen_movi_tl(cpu_T[0], (ctx->pc + 4 + B7_0 * 4) & ~3);
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gen_op_ldl_T0_T0(ctx);
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gen_op_movl_T0_rN(REG(B11_8));
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return;
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@ -1181,14 +1181,14 @@ void _decode_opc(DisasContext * ctx)
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break;
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case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */
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if (!(ctx->fpscr & FPSCR_PR)) {
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gen_op_movl_imm_T0(0);
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tcg_gen_movi_tl(cpu_T[0], 0);
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gen_op_fmov_T0_frN(FREG(B11_8));
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return;
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}
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break;
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case 0xf09d: /* fldi1 FRn - FPSCR: R[PR] */
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if (!(ctx->fpscr & FPSCR_PR)) {
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gen_op_movl_imm_T0(0x3f800000);
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tcg_gen_movi_tl(cpu_T[0], 0x3f800000);
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gen_op_fmov_T0_frN(FREG(B11_8));
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return;
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}
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