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tcg-sparc: Implement ext32[su]_i64 

The 32-bit right-shift instructions is defined to extend the shifted
output to 64-bits.  A shift count of zero therefore is a simple
extension without actually shifting.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Richard Henderson 2010-01-12 19:59:34 +00:00 committed by Blue Swirl
parent 583d121520
commit cc6dfecf02
2 changed files with 21 additions and 0 deletions
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16
tcg/sparc/tcg-target.c
View File

@ -1238,6 +1238,20 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
ARITH_MULX);
tcg_out_arith(s, args[0], args[1], TCG_REG_I5, ARITH_SUB);
break;
case INDEX_op_ext32s_i64:
if (const_args[1]) {
tcg_out_movi(s, TCG_TYPE_I64, args[0], (int32_t)args[1]);
} else {
tcg_out_arithi(s, args[0], args[1], 0, SHIFT_SRA);
}
break;
case INDEX_op_ext32u_i64:
if (const_args[1]) {
tcg_out_movi_imm32(s, args[0], args[1]);
} else {
tcg_out_arithi(s, args[0], args[1], 0, SHIFT_SRL);
}
break;
case INDEX_op_brcond_i64:
tcg_out_brcond_i64(s, args[2], args[0], args[1], const_args[1],
@ -1344,6 +1358,8 @@ static const TCGTargetOpDef sparc_op_defs[] = {
{ INDEX_op_shl_i64, { "r", "r", "rJ" } },
{ INDEX_op_shr_i64, { "r", "r", "rJ" } },
{ INDEX_op_sar_i64, { "r", "r", "rJ" } },
{ INDEX_op_ext32s_i64, { "r", "ri" } },
{ INDEX_op_ext32u_i64, { "r", "ri" } },
{ INDEX_op_brcond_i64, { "r", "rJ" } },
#endif

5
tcg/sparc/tcg-target.h
View File

@ -91,6 +91,11 @@ enum {
#define TCG_TARGET_HAS_div_i32
#define TCG_TARGET_HAS_div_i64
#if TCG_TARGET_REG_BITS == 64
#define TCG_TARGET_HAS_ext32s_i64
#define TCG_TARGET_HAS_ext32u_i64
#endif
//#define TCG_TARGET_HAS_bswap32_i32
//#define TCG_TARGET_HAS_bswap64_i64
//#define TCG_TARGET_HAS_neg_i32