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Implement TCG sign extension ops for x86-64. 

Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2008-09-07 17:45:15 +00:00
parent 4a7f0e0655
commit b6d17150af
2 changed files with 27 additions and 0 deletions
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22
tcg/x86_64/tcg-target.c
View File

@ -1070,6 +1070,22 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]);
break;
case INDEX_op_ext8s_i32:
tcg_out_modrm(s, 0xbe | P_EXT | P_REXB, args[0], args[1]);
break;
case INDEX_op_ext16s_i32:
tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]);
break;
case INDEX_op_ext8s_i64:
tcg_out_modrm(s, 0xbe | P_EXT | P_REXW, args[0], args[1]);
break;
case INDEX_op_ext16s_i64:
tcg_out_modrm(s, 0xbf | P_EXT | P_REXW, args[0], args[1]);
break;
case INDEX_op_ext32s_i64:
tcg_out_modrm(s, 0x63 | P_REXW, args[0], args[1]);
break;
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
break;
@ -1228,6 +1244,12 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
{ INDEX_op_neg_i32, { "r", "0" } },
{ INDEX_op_neg_i64, { "r", "0" } },
{ INDEX_op_ext8s_i32, { "r", "r"} },
{ INDEX_op_ext16s_i32, { "r", "r"} },
{ INDEX_op_ext8s_i64, { "r", "r"} },
{ INDEX_op_ext16s_i64, { "r", "r"} },
{ INDEX_op_ext32s_i64, { "r", "r"} },
{ INDEX_op_qemu_ld8u, { "r", "L" } },
{ INDEX_op_qemu_ld8s, { "r", "L" } },
{ INDEX_op_qemu_ld16u, { "r", "L" } },

5
tcg/x86_64/tcg-target.h
View File

@ -60,6 +60,11 @@ enum {
#define TCG_TARGET_HAS_bswap_i64
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_neg_i64
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
#define TCG_TARGET_HAS_ext8s_i64
#define TCG_TARGET_HAS_ext16s_i64
#define TCG_TARGET_HAS_ext32s_i64
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_R14