diff --git a/exec.c b/exec.c index 06d92538f..a664b6fab 100644 --- a/exec.c +++ b/exec.c @@ -37,6 +37,7 @@ #include "exec-all.h" #include "qemu-common.h" #include "tcg.h" +#include "hw/hw.h" #if defined(CONFIG_USER_ONLY) #include #endif @@ -457,6 +458,10 @@ void cpu_exec_init(CPUState *env) env->cpu_index = cpu_index; env->nb_watchpoints = 0; *penv = env; +#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY) + register_savevm("cpu", cpu_index, CPU_SAVE_VERSION, + cpu_save, cpu_load, env); +#endif } static inline void invalidate_page_bitmap(PageDesc *p) diff --git a/hw/etraxfs.c b/hw/etraxfs.c index 0efcd831f..276f1fd09 100644 --- a/hw/etraxfs.c +++ b/hw/etraxfs.c @@ -67,7 +67,6 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size, cpu_model = "crisv32"; } env = cpu_init(cpu_model); - register_savevm("cpu", 0, 1, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); /* allocate RAM */ diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c index bfd8b53bc..52cf47b84 100644 --- a/hw/mips_jazz.c +++ b/hw/mips_jazz.c @@ -146,7 +146,6 @@ void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); /* allocate RAM */ diff --git a/hw/mips_malta.c b/hw/mips_malta.c index cc31082e2..a19a69f56 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -802,7 +802,6 @@ void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); /* allocate RAM */ diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c index af09d9599..d04c660b4 100644 --- a/hw/mips_mipssim.c +++ b/hw/mips_mipssim.c @@ -129,7 +129,6 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size, fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); /* Allocate RAM. */ diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index 4540cbf45..a9d42eadc 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -175,7 +175,6 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); /* allocate RAM */ diff --git a/hw/pc.c b/hw/pc.c index 4c5e1c343..99df09d9a 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -764,7 +764,6 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size, /* XXX: enable it in all cases */ env->cpuid_features |= CPUID_APIC; } - register_savevm("cpu", i, 5, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); if (pci_enabled) { apic_init(env); diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c index 125f2d43e..f9143dd4f 100644 --- a/hw/ppc4xx_devs.c +++ b/hw/ppc4xx_devs.c @@ -56,7 +56,6 @@ CPUState *ppc4xx_init (const unsigned char *cpu_model, ppc_dcr_init(env, NULL, NULL); /* Register qemu callbacks */ qemu_register_reset(&cpu_ppc_reset, env); - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); return env; } diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c index deb97611b..a100896c2 100644 --- a/hw/ppc_chrp.c +++ b/hw/ppc_chrp.c @@ -103,7 +103,6 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, env->osi_call = vga_osi_call; #endif qemu_register_reset(&cpu_ppc_reset, env); - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); envs[i] = env; } if (env->nip < 0xFFF80000) { diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c index be5ee6710..85d3b2ce8 100644 --- a/hw/ppc_oldworld.c +++ b/hw/ppc_oldworld.c @@ -143,7 +143,6 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); env->osi_call = vga_osi_call; qemu_register_reset(&cpu_ppc_reset, env); - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); envs[i] = env; } if (env->nip < 0xFFF80000) { diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c index 9238e6d43..88ba6b03d 100644 --- a/hw/ppc_prep.c +++ b/hw/ppc_prep.c @@ -580,7 +580,6 @@ static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size, cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); } qemu_register_reset(&cpu_ppc_reset, env); - register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); envs[i] = env; } diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index 6e06baada..cb6670c35 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -2046,9 +2046,6 @@ struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size, fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - register_savevm("cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load, - s->env); - s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0]; /* SDRAM & Internal Memory Storage */ @@ -2173,9 +2170,6 @@ struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - register_savevm("cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load, - s->env); - s->reset = qemu_allocate_irqs(pxa2xx_reset, s, 1)[0]; /* SDRAM & Internal Memory Storage */ diff --git a/hw/sun4m.c b/hw/sun4m.c index e1ff225e3..899e2d506 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -426,7 +426,6 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, qemu_register_reset(secondary_cpu_reset, env); env->halted = 1; } - register_savevm("cpu", i, 4, cpu_save, cpu_load, env); cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); env->prom_addr = hwdef->slavio_base; } @@ -601,7 +600,6 @@ static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size, cpu_sparc_set_id(env, 0); qemu_register_reset(main_cpu_reset, env); - register_savevm("cpu", 0, 4, cpu_save, cpu_load, env); cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS); env->prom_addr = hwdef->slavio_base; @@ -1413,7 +1411,6 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size, qemu_register_reset(secondary_cpu_reset, env); env->halted = 1; } - register_savevm("cpu", i, 4, cpu_save, cpu_load, env); cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS); env->prom_addr = hwdef->slavio_base; } diff --git a/hw/sun4u.c b/hw/sun4u.c index f97c7a05b..c648314a6 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -282,7 +282,6 @@ static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size, bh = qemu_bh_new(hstick_irq, env); env->hstick = ptimer_init(bh); ptimer_set_period(env->hstick, 1ULL); - register_savevm("cpu", 0, 4, cpu_save, cpu_load, env); qemu_register_reset(main_cpu_reset, env); main_cpu_reset(env); diff --git a/qemu-common.h b/qemu-common.h index a24614467..0512d4963 100644 --- a/qemu-common.h +++ b/qemu-common.h @@ -132,4 +132,8 @@ typedef struct SerialState SerialState; typedef struct IRQState *qemu_irq; struct pcmcia_card_s; +/* CPU save/load. */ +void cpu_save(QEMUFile *f, void *opaque); +int cpu_load(QEMUFile *f, void *opaque, int version_id); + #endif diff --git a/sysemu.h b/sysemu.h index f666f73fa..b12fae0a9 100644 --- a/sysemu.h +++ b/sysemu.h @@ -41,9 +41,6 @@ void qemu_system_powerdown(void); #endif void qemu_system_reset(void); -void cpu_save(QEMUFile *f, void *opaque); -int cpu_load(QEMUFile *f, void *opaque, int version_id); - void do_savevm(const char *name); void do_loadvm(const char *name); void do_delvm(const char *name); diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 6b16e5d04..1d7333264 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -397,7 +397,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list -#define ARM_CPU_SAVE_VERSION 1 +#define CPU_SAVE_VERSION 1 /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel diff --git a/target-arm/machine.c b/target-arm/machine.c index 6637e72ed..42ff5844c 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -120,7 +120,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) CPUARMState *env = (CPUARMState *)opaque; int i; - if (version_id != ARM_CPU_SAVE_VERSION) + if (version_id != CPU_SAVE_VERSION) return -EINVAL; for (i = 0; i < 16; i++) { diff --git a/target-cris/cpu.h b/target-cris/cpu.h index d086221d3..e45456858 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -210,6 +210,8 @@ enum { #define cpu_gen_code cpu_cris_gen_code #define cpu_signal_handler cpu_cris_signal_handler +#define CPU_SAVE_VERSION 1 + /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel #define MMU_MODE1_SUFFIX _user diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 285b5a750..098d5e48e 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -726,6 +726,8 @@ static inline int cpu_get_time_fast(void) #define cpu_signal_handler cpu_x86_signal_handler #define cpu_list x86_cpu_list +#define CPU_SAVE_VERSION 5 + /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel #define MMU_MODE1_SUFFIX _user diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 8e21f6b4a..93c1610f1 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -489,6 +489,8 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, #define cpu_signal_handler cpu_mips_signal_handler #define cpu_list mips_cpu_list +#define CPU_SAVE_VERSION 3 + /* MMU modes definitions. We carefully match the indices with our hflags layout. */ #define MMU_MODE0_SUFFIX _kernel diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index d9dcf58ef..4e1f2f14f 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -813,6 +813,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list +#define CPU_SAVE_VERSION 3 + /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _user #define MMU_MODE1_SUFFIX _kernel diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 03bc2dfd0..34a20cd2a 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -388,6 +388,8 @@ void cpu_check_irqs(CPUSPARCState *env); #define cpu_signal_handler cpu_sparc_signal_handler #define cpu_list sparc_cpu_list +#define CPU_SAVE_VERSION 4 + /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _user #define MMU_MODE1_SUFFIX _kernel