From 9f5a1fae7ee1a7c66462e5b8e9d21552d4dc5027 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Mon, 5 Jul 2010 11:39:04 +0200 Subject: [PATCH] cris: Avoid debug clobbering for both I & D MMU state. Signed-off-by: Edgar E. Iglesias --- target-cris/helper.c | 17 +++-------------- target-cris/mmu.c | 11 ++++++----- target-cris/mmu.h | 2 +- 3 files changed, 10 insertions(+), 20 deletions(-) diff --git a/target-cris/helper.c b/target-cris/helper.c index 19c375581..053ed4ab2 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -78,7 +78,7 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw, D(printf ("%s addr=%x pc=%x rw=%x\n", __func__, address, env->pc, rw)); miss = cris_mmu_translate(&res, env, address & TARGET_PAGE_MASK, - rw, mmu_idx); + rw, mmu_idx, 0); if (miss) { if (env->exception_index == EXCP_BUSFAULT) @@ -248,26 +248,15 @@ void do_interrupt(CPUState *env) target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) { uint32_t phy = addr; - uint32_t r_cause, r_tlb_sel, rand_lfsr; struct cris_mmu_result res; int miss; - /* Save MMU state. */ - r_tlb_sel = env->sregs[SFR_RW_MM_TLB_SEL]; - r_cause = env->sregs[SFR_R_MM_CAUSE]; - rand_lfsr = env->mmu_rand_lfsr; - - miss = cris_mmu_translate(&res, env, addr, 0, 0); + miss = cris_mmu_translate(&res, env, addr, 0, 0, 1); /* If D TLB misses, try I TLB. */ if (miss) { - miss = cris_mmu_translate(&res, env, addr, 2, 0); + miss = cris_mmu_translate(&res, env, addr, 2, 0, 1); } - /* Restore MMU state. */ - env->sregs[SFR_RW_MM_TLB_SEL] = r_tlb_sel; - env->sregs[SFR_R_MM_CAUSE] = r_cause; - env->mmu_rand_lfsr = rand_lfsr; - if (!miss) phy = res.phy; D(fprintf(stderr, "%s %x -> %x\n", __func__, addr, phy)); diff --git a/target-cris/mmu.c b/target-cris/mmu.c index 07967dddb..773438e9f 100644 --- a/target-cris/mmu.c +++ b/target-cris/mmu.c @@ -135,7 +135,7 @@ static void dump_tlb(CPUState *env, int mmu) /* rw 0 = read, 1 = write, 2 = exec. */ static int cris_mmu_translate_page(struct cris_mmu_result *res, CPUState *env, uint32_t vaddr, - int rw, int usermode) + int rw, int usermode, int debug) { unsigned int vpage; unsigned int idx; @@ -261,7 +261,7 @@ static int cris_mmu_translate_page(struct cris_mmu_result *res, set = env->mmu_rand_lfsr & 3; } - if (!match) { + if (!match && !debug) { cris_mmu_update_rand_lfsr(env); /* Compute index. */ @@ -330,7 +330,7 @@ void cris_mmu_flush_pid(CPUState *env, uint32_t pid) int cris_mmu_translate(struct cris_mmu_result *res, CPUState *env, uint32_t vaddr, - int rw, int mmu_idx) + int rw, int mmu_idx, int debug) { int seg; int miss = 0; @@ -357,9 +357,10 @@ int cris_mmu_translate(struct cris_mmu_result *res, base = cris_mmu_translate_seg(env, seg); res->phy = base | (0x0fffffff & vaddr); res->prot = PAGE_BITS; + } else { + miss = cris_mmu_translate_page(res, env, vaddr, rw, + is_user, debug); } - else - miss = cris_mmu_translate_page(res, env, vaddr, rw, is_user); done: env->pregs[PR_SRS] = old_srs; return miss; diff --git a/target-cris/mmu.h b/target-cris/mmu.h index d753b3834..459d809f7 100644 --- a/target-cris/mmu.h +++ b/target-cris/mmu.h @@ -14,4 +14,4 @@ void cris_mmu_init(CPUState *env); void cris_mmu_flush_pid(CPUState *env, uint32_t pid); int cris_mmu_translate(struct cris_mmu_result *res, CPUState *env, uint32_t vaddr, - int rw, int mmu_idx); + int rw, int mmu_idx, int debug);