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target-mips: fix translation of MT instructions 

The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of:

  int x;
  ...		/* no initialization of x */
  x = f (x);

which confused later bits of TCG rather badly, leading to crashes.

Fix the helpers to only return results (those instructions have no
inputs), and fix the translation code accordingly.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Nathan Froyd 2010-10-29 07:48:46 -07:00 committed by Aurelien Jarno
parent cbb608a5c8
commit 9ed5726c04
3 changed files with 16 additions and 28 deletions
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8
target-mips/helper.h
View File

@ -154,10 +154,10 @@ DEF_HELPER_2(mttlo, void, tl, i32)
DEF_HELPER_2(mtthi, void, tl, i32)
DEF_HELPER_2(mttacx, void, tl, i32)
DEF_HELPER_1(mttdsp, void, tl)
DEF_HELPER_1(dmt, tl, tl)
DEF_HELPER_1(emt, tl, tl)
DEF_HELPER_1(dvpe, tl, tl)
DEF_HELPER_1(evpe, tl, tl)
DEF_HELPER_0(dmt, tl)
DEF_HELPER_0(emt, tl)
DEF_HELPER_0(dvpe, tl)
DEF_HELPER_0(evpe, tl)
#endif /* !CONFIG_USER_ONLY */
/* microMIPS functions */

28
target-mips/op_helper.c
View File

@ -1554,40 +1554,28 @@ void helper_mttdsp(target_ulong arg1)
}
/* MIPS MT functions */
target_ulong helper_dmt(target_ulong arg1)
target_ulong helper_dmt(void)
{
// TODO
arg1 = 0;
// rt = arg1
return arg1;
return 0;
}
target_ulong helper_emt(target_ulong arg1)
target_ulong helper_emt(void)
{
// TODO
arg1 = 0;
// rt = arg1
return arg1;
return 0;
}
target_ulong helper_dvpe(target_ulong arg1)
target_ulong helper_dvpe(void)
{
// TODO
arg1 = 0;
// rt = arg1
return arg1;
return 0;
}
target_ulong helper_evpe(target_ulong arg1)
target_ulong helper_evpe(void)
{
// TODO
arg1 = 0;
// rt = arg1
return arg1;
return 0;
}
#endif /* !CONFIG_USER_ONLY */

8
target-mips/translate.c
View File

@ -12033,22 +12033,22 @@ static void decode_opc (CPUState *env, DisasContext *ctx, int *is_branch)
switch (op2) {
case OPC_DMT:
check_insn(env, ctx, ASE_MT);
gen_helper_dmt(t0, t0);
gen_helper_dmt(t0);
gen_store_gpr(t0, rt);
break;
case OPC_EMT:
check_insn(env, ctx, ASE_MT);
gen_helper_emt(t0, t0);
gen_helper_emt(t0);
gen_store_gpr(t0, rt);
break;
case OPC_DVPE:
check_insn(env, ctx, ASE_MT);
gen_helper_dvpe(t0, t0);
gen_helper_dvpe(t0);
gen_store_gpr(t0, rt);
break;
case OPC_EVPE:
check_insn(env, ctx, ASE_MT);
gen_helper_evpe(t0, t0);
gen_helper_evpe(t0);
gen_store_gpr(t0, rt);
break;
case OPC_DI: