RAM usage information in machine definition.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4246 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
c73f96fddc
commit
7fb4fdcffe
2
exec.c
2
exec.c
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@ -2093,7 +2093,7 @@ uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr)
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ram_addr_t qemu_ram_alloc(unsigned int size)
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ram_addr_t qemu_ram_alloc(unsigned int size)
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{
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{
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ram_addr_t addr;
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ram_addr_t addr;
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if ((phys_ram_alloc_offset + size) >= phys_ram_size) {
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if ((phys_ram_alloc_offset + size) > phys_ram_size) {
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fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n",
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fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n",
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size, phys_ram_size);
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size, phys_ram_size);
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abort();
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abort();
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@ -91,4 +91,5 @@ QEMUMachine an5206_machine = {
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"an5206",
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"an5206",
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"Arnewsh 5206",
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"Arnewsh 5206",
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an5206_init,
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an5206_init,
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512,
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};
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};
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@ -14,6 +14,8 @@ typedef struct QEMUMachine {
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const char *name;
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const char *name;
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const char *desc;
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const char *desc;
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QEMUMachineInitFunc *init;
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QEMUMachineInitFunc *init;
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#define RAMSIZE_FIXED (1 << 0)
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size_t ram_require;
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struct QEMUMachine *next;
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struct QEMUMachine *next;
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} QEMUMachine;
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} QEMUMachine;
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@ -124,4 +124,5 @@ QEMUMachine bareetraxfs_machine = {
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"bareetraxfs",
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"bareetraxfs",
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"Bare ETRAX FS board",
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"Bare ETRAX FS board",
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bareetraxfs_init,
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bareetraxfs_init,
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0x800000,
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};
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};
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@ -125,10 +125,12 @@ QEMUMachine connex_machine = {
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"connex",
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"connex",
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"Gumstix Connex (PXA255)",
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"Gumstix Connex (PXA255)",
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connex_init,
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connex_init,
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(0x05000000 + PXA2XX_INTERNAL_SIZE) | RAMSIZE_FIXED,
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};
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};
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QEMUMachine verdex_machine = {
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QEMUMachine verdex_machine = {
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"verdex",
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"verdex",
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"Gumstix Verdex (PXA270)",
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"Gumstix Verdex (PXA270)",
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verdex_init,
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verdex_init,
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(0x12000000 + PXA2XX_INTERNAL_SIZE) | RAMSIZE_FIXED,
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};
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};
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@ -231,7 +231,7 @@ static CPUWriteMemoryFunc *integratorcm_writefn[] = {
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integratorcm_write
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integratorcm_write
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};
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};
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static void integratorcm_init(int memsz, uint32_t flash_offset)
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static void integratorcm_init(int memsz)
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{
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{
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int iomemtype;
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int iomemtype;
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integratorcm_state *s;
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integratorcm_state *s;
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@ -258,7 +258,7 @@ static void integratorcm_init(int memsz, uint32_t flash_offset)
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}
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}
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memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
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memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
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s->cm_init = 0x00000112;
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s->cm_init = 0x00000112;
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s->flash_offset = flash_offset;
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s->flash_offset = qemu_ram_alloc(0x100000);
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iomemtype = cpu_register_io_memory(0, integratorcm_readfn,
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iomemtype = cpu_register_io_memory(0, integratorcm_readfn,
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integratorcm_writefn, s);
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integratorcm_writefn, s);
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@ -480,7 +480,7 @@ static void integratorcp_init(int ram_size, int vga_ram_size,
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const char *initrd_filename, const char *cpu_model)
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const char *initrd_filename, const char *cpu_model)
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{
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{
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CPUState *env;
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CPUState *env;
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uint32_t bios_offset;
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uint32_t ram_offset;
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qemu_irq *pic;
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qemu_irq *pic;
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qemu_irq *cpu_pic;
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qemu_irq *cpu_pic;
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int sd;
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int sd;
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@ -492,15 +492,15 @@ static void integratorcp_init(int ram_size, int vga_ram_size,
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fprintf(stderr, "Unable to find CPU definition\n");
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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exit(1);
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}
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}
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bios_offset = ram_size + vga_ram_size;
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ram_offset = qemu_ram_alloc(ram_size);
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/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
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/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
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/* ??? RAM shoud repeat to fill physical memory space. */
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/* ??? RAM shoud repeat to fill physical memory space. */
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/* SDRAM at address zero*/
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/* SDRAM at address zero*/
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cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
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cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
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/* And again at address 0x80000000 */
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/* And again at address 0x80000000 */
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cpu_register_physical_memory(0x80000000, ram_size, IO_MEM_RAM);
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cpu_register_physical_memory(0x80000000, ram_size, ram_offset | IO_MEM_RAM);
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integratorcm_init(ram_size >> 20, bios_offset);
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integratorcm_init(ram_size >> 20);
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cpu_pic = arm_pic_init_cpu(env);
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cpu_pic = arm_pic_init_cpu(env);
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pic = icp_pic_init(0x14000000, cpu_pic[ARM_PIC_CPU_IRQ],
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pic = icp_pic_init(0x14000000, cpu_pic[ARM_PIC_CPU_IRQ],
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cpu_pic[ARM_PIC_CPU_FIQ]);
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cpu_pic[ARM_PIC_CPU_FIQ]);
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@ -543,4 +543,5 @@ QEMUMachine integratorcp_machine = {
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"integratorcp",
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"integratorcp",
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"ARM Integrator/CP (ARM926EJ-S)",
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"ARM Integrator/CP (ARM926EJ-S)",
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integratorcp_init,
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integratorcp_init,
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0x100000,
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};
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};
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@ -59,6 +59,10 @@ static struct keymap map[0xE0] = {
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enum mainstone_model_e { mainstone };
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enum mainstone_model_e { mainstone };
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#define MAINSTONE_RAM 0x04000000
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#define MAINSTONE_ROM 0x00800000
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#define MAINSTONE_FLASH 0x02000000
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static struct arm_boot_info mainstone_binfo = {
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static struct arm_boot_info mainstone_binfo = {
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.loader_start = PXA2XX_SDRAM_BASE,
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.loader_start = PXA2XX_SDRAM_BASE,
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.ram_size = 0x04000000,
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.ram_size = 0x04000000,
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@ -69,9 +73,6 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
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const char *kernel_cmdline, const char *initrd_filename,
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const char *kernel_cmdline, const char *initrd_filename,
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const char *cpu_model, enum mainstone_model_e model, int arm_id)
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const char *cpu_model, enum mainstone_model_e model, int arm_id)
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{
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{
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uint32_t mainstone_ram = mainstone_binfo.ram_size;
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uint32_t mainstone_rom = 0x00800000;
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uint32_t mainstone_flash = 0x02000000;
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uint32_t sector_len = 256 * 1024;
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uint32_t sector_len = 256 * 1024;
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target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
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target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
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struct pxa2xx_state_s *cpu;
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struct pxa2xx_state_s *cpu;
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@ -82,17 +83,17 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
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cpu_model = "pxa270-c5";
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cpu_model = "pxa270-c5";
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/* Setup CPU & memory */
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/* Setup CPU & memory */
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if (ram_size < mainstone_ram + mainstone_rom + 2 * mainstone_flash +
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if (ram_size < MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH +
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PXA2XX_INTERNAL_SIZE) {
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PXA2XX_INTERNAL_SIZE) {
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fprintf(stderr, "This platform requires %i bytes of memory\n",
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fprintf(stderr, "This platform requires %i bytes of memory\n",
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mainstone_ram + mainstone_rom + 2 * mainstone_flash +
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MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH +
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PXA2XX_INTERNAL_SIZE);
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PXA2XX_INTERNAL_SIZE);
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exit(1);
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exit(1);
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}
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}
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cpu = pxa270_init(mainstone_ram, ds, cpu_model);
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cpu = pxa270_init(mainstone_binfo.ram_size, ds, cpu_model);
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cpu_register_physical_memory(0, mainstone_rom,
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cpu_register_physical_memory(0, MAINSTONE_ROM,
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qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM);
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qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM);
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/* Setup initial (reset) machine state */
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/* Setup initial (reset) machine state */
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cpu->env->regs[15] = mainstone_binfo.loader_start;
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cpu->env->regs[15] = mainstone_binfo.loader_start;
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@ -107,9 +108,9 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
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}
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}
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if (!pflash_cfi01_register(mainstone_flash_base[i],
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if (!pflash_cfi01_register(mainstone_flash_base[i],
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qemu_ram_alloc(mainstone_flash),
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qemu_ram_alloc(MAINSTONE_FLASH),
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drives_table[index].bdrv, sector_len,
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drives_table[index].bdrv, sector_len,
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mainstone_flash / sector_len, 4, 0, 0, 0, 0)) {
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MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0)) {
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fprintf(stderr, "qemu: Error registering flash memory.\n");
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fprintf(stderr, "qemu: Error registering flash memory.\n");
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exit(1);
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exit(1);
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}
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}
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@ -146,4 +147,6 @@ QEMUMachine mainstone2_machine = {
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"mainstone",
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"mainstone",
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"Mainstone II (PXA27x)",
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"Mainstone II (PXA27x)",
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mainstone_init,
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mainstone_init,
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(MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH +
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PXA2XX_INTERNAL_SIZE) | RAMSIZE_FIXED,
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};
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};
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@ -308,4 +308,5 @@ QEMUMachine mcf5208evb_machine = {
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"mcf5208evb",
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"mcf5208evb",
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"MCF5206EVB",
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"MCF5206EVB",
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mcf5208evb_init,
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mcf5208evb_init,
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16384,
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};
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};
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@ -277,10 +277,12 @@ QEMUMachine mips_magnum_machine = {
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"magnum",
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"magnum",
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"MIPS Magnum",
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"MIPS Magnum",
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mips_magnum_init,
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mips_magnum_init,
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MAGNUM_BIOS_SIZE + VGA_RAM_SIZE,
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};
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};
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QEMUMachine mips_pica61_machine = {
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QEMUMachine mips_pica61_machine = {
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"pica61",
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"pica61",
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"Acer Pica 61",
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"Acer Pica 61",
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mips_pica61_init,
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mips_pica61_init,
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MAGNUM_BIOS_SIZE + VGA_RAM_SIZE,
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};
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};
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@ -949,4 +949,5 @@ QEMUMachine mips_malta_machine = {
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"malta",
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"malta",
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"MIPS Malta Core LV",
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"MIPS Malta Core LV",
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mips_malta_init,
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mips_malta_init,
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VGA_RAM_SIZE + BIOS_SIZE,
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};
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};
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@ -195,4 +195,5 @@ QEMUMachine mips_mipssim_machine = {
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"mipssim",
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"mipssim",
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"MIPS MIPSsim platform",
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"MIPS MIPSsim platform",
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mips_mipssim_init,
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mips_mipssim_init,
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BIOS_SIZE + VGA_RAM_SIZE /* unused */,
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};
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};
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@ -286,4 +286,5 @@ QEMUMachine mips_machine = {
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"mips",
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"mips",
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"mips r4k platform",
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"mips r4k platform",
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mips_r4k_init,
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mips_r4k_init,
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VGA_RAM_SIZE + BIOS_SIZE,
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};
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};
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@ -941,4 +941,5 @@ QEMUMachine n800_machine = {
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"n800",
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"n800",
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"Nokia N800 aka. RX-34 tablet (OMAP2420)",
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"Nokia N800 aka. RX-34 tablet (OMAP2420)",
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n800_init,
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n800_init,
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(0x08000000 + 0x00010000 + OMAP242X_SRAM_SIZE) | RAMSIZE_FIXED,
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};
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};
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@ -274,4 +274,5 @@ QEMUMachine palmte_machine = {
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"cheetah",
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"cheetah",
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"Palm Tungsten|E aka. Cheetah PDA (OMAP310)",
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"Palm Tungsten|E aka. Cheetah PDA (OMAP310)",
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palmte_init,
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palmte_init,
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(0x02000000 + 0x00800000 + OMAP15XX_SRAM_SIZE) | RAMSIZE_FIXED,
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};
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};
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4
hw/pc.c
4
hw/pc.c
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@ -39,6 +39,8 @@
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#define VGABIOS_FILENAME "vgabios.bin"
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#define VGABIOS_FILENAME "vgabios.bin"
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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#define ACPI_DATA_SIZE 0x10000
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#define ACPI_DATA_SIZE 0x10000
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@ -1018,10 +1020,12 @@ QEMUMachine pc_machine = {
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"pc",
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"pc",
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"Standard PC",
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"Standard PC",
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pc_init_pci,
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pc_init_pci,
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VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
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};
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};
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QEMUMachine isapc_machine = {
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QEMUMachine isapc_machine = {
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"isapc",
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"isapc",
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"ISA-only PC",
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"ISA-only PC",
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pc_init_isa,
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pc_init_isa,
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VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
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};
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};
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@ -360,6 +360,7 @@ QEMUMachine ref405ep_machine = {
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"ref405ep",
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"ref405ep",
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"ref405ep",
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"ref405ep",
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ref405ep_init,
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ref405ep_init,
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(128 * 1024 * 1024 + 4096 + 512 * 1024 + BIOS_SIZE) | RAMSIZE_FIXED,
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};
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};
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/*****************************************************************************/
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/*****************************************************************************/
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@ -642,4 +643,5 @@ QEMUMachine taihu_machine = {
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"taihu",
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"taihu",
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"taihu",
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"taihu",
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taihu_405ep_init,
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taihu_405ep_init,
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(128 * 1024 * 1024 + 4096 + BIOS_SIZE + 32 * 1024 * 1024) | RAMSIZE_FIXED,
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};
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};
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@ -335,4 +335,5 @@ QEMUMachine core99_machine = {
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"mac99",
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"mac99",
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"Mac99 based PowerMAC",
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"Mac99 based PowerMAC",
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ppc_core99_init,
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ppc_core99_init,
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BIOS_SIZE + VGA_RAM_SIZE,
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};
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};
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@ -370,4 +370,5 @@ QEMUMachine heathrow_machine = {
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"g3bw",
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"g3bw",
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"Heathrow based PowerMAC",
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"Heathrow based PowerMAC",
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ppc_heathrow_init,
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ppc_heathrow_init,
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BIOS_SIZE + VGA_RAM_SIZE,
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};
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};
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@ -764,4 +764,5 @@ QEMUMachine prep_machine = {
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"prep",
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"prep",
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"PowerPC PREP platform",
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"PowerPC PREP platform",
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ppc_prep_init,
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ppc_prep_init,
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BIOS_SIZE + VGA_RAM_SIZE,
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};
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};
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3
hw/r2d.c
3
hw/r2d.c
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@ -69,5 +69,6 @@ static void r2d_init(int ram_size, int vga_ram_size,
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QEMUMachine r2d_machine = {
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QEMUMachine r2d_machine = {
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"r2d",
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"r2d",
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"r2d-plus board",
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"r2d-plus board",
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r2d_init
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r2d_init,
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SDRAM_SIZE | RAMSIZE_FIXED
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};
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};
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@ -199,5 +199,6 @@ static void realview_init(int ram_size, int vga_ram_size,
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QEMUMachine realview_machine = {
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QEMUMachine realview_machine = {
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"realview",
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"realview",
|
||||||
"ARM RealView Emulation Baseboard (ARM926EJ-S)",
|
"ARM RealView Emulation Baseboard (ARM926EJ-S)",
|
||||||
realview_init
|
realview_init,
|
||||||
|
0x1000
|
||||||
};
|
};
|
||||||
|
|
|
@ -110,5 +110,6 @@ static void shix_init(int ram_size, int vga_ram_size,
|
||||||
QEMUMachine shix_machine = {
|
QEMUMachine shix_machine = {
|
||||||
"shix",
|
"shix",
|
||||||
"shix card",
|
"shix card",
|
||||||
shix_init
|
shix_init,
|
||||||
|
(0x00004000 + 0x01000000 + 0x01000000) | RAMSIZE_FIXED
|
||||||
};
|
};
|
||||||
|
|
19
hw/spitz.c
19
hw/spitz.c
|
@ -1180,6 +1180,9 @@ static void sl_bootparam_write(uint32_t ptr)
|
||||||
/* Board init. */
|
/* Board init. */
|
||||||
enum spitz_model_e { spitz, akita, borzoi, terrier };
|
enum spitz_model_e { spitz, akita, borzoi, terrier };
|
||||||
|
|
||||||
|
#define SPITZ_RAM 0x04000000
|
||||||
|
#define SPITZ_ROM 0x00800000
|
||||||
|
|
||||||
static struct arm_boot_info spitz_binfo = {
|
static struct arm_boot_info spitz_binfo = {
|
||||||
.loader_start = PXA2XX_SDRAM_BASE,
|
.loader_start = PXA2XX_SDRAM_BASE,
|
||||||
.ram_size = 0x04000000,
|
.ram_size = 0x04000000,
|
||||||
|
@ -1190,8 +1193,6 @@ static void spitz_common_init(int ram_size, int vga_ram_size,
|
||||||
const char *kernel_cmdline, const char *initrd_filename,
|
const char *kernel_cmdline, const char *initrd_filename,
|
||||||
const char *cpu_model, enum spitz_model_e model, int arm_id)
|
const char *cpu_model, enum spitz_model_e model, int arm_id)
|
||||||
{
|
{
|
||||||
uint32_t spitz_ram = spitz_binfo.ram_size;
|
|
||||||
uint32_t spitz_rom = 0x00800000;
|
|
||||||
struct pxa2xx_state_s *cpu;
|
struct pxa2xx_state_s *cpu;
|
||||||
struct scoop_info_s *scp;
|
struct scoop_info_s *scp;
|
||||||
|
|
||||||
|
@ -1199,17 +1200,17 @@ static void spitz_common_init(int ram_size, int vga_ram_size,
|
||||||
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
|
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
|
||||||
|
|
||||||
/* Setup CPU & memory */
|
/* Setup CPU & memory */
|
||||||
if (ram_size < spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE) {
|
if (ram_size < SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE) {
|
||||||
fprintf(stderr, "This platform requires %i bytes of memory\n",
|
fprintf(stderr, "This platform requires %i bytes of memory\n",
|
||||||
spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE);
|
SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
cpu = pxa270_init(spitz_ram, ds, cpu_model);
|
cpu = pxa270_init(spitz_binfo.ram_size, ds, cpu_model);
|
||||||
|
|
||||||
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
|
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
|
||||||
|
|
||||||
cpu_register_physical_memory(0, spitz_rom,
|
cpu_register_physical_memory(0, SPITZ_ROM,
|
||||||
qemu_ram_alloc(spitz_rom) | IO_MEM_ROM);
|
qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM);
|
||||||
|
|
||||||
/* Setup peripherals */
|
/* Setup peripherals */
|
||||||
spitz_keyboard_register(cpu);
|
spitz_keyboard_register(cpu);
|
||||||
|
@ -1285,22 +1286,26 @@ QEMUMachine akitapda_machine = {
|
||||||
"akita",
|
"akita",
|
||||||
"Akita PDA (PXA270)",
|
"Akita PDA (PXA270)",
|
||||||
akita_init,
|
akita_init,
|
||||||
|
SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine spitzpda_machine = {
|
QEMUMachine spitzpda_machine = {
|
||||||
"spitz",
|
"spitz",
|
||||||
"Spitz PDA (PXA270)",
|
"Spitz PDA (PXA270)",
|
||||||
spitz_init,
|
spitz_init,
|
||||||
|
SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine borzoipda_machine = {
|
QEMUMachine borzoipda_machine = {
|
||||||
"borzoi",
|
"borzoi",
|
||||||
"Borzoi PDA (PXA270)",
|
"Borzoi PDA (PXA270)",
|
||||||
borzoi_init,
|
borzoi_init,
|
||||||
|
SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine terrierpda_machine = {
|
QEMUMachine terrierpda_machine = {
|
||||||
"terrier",
|
"terrier",
|
||||||
"Terrier PDA (PXA270)",
|
"Terrier PDA (PXA270)",
|
||||||
terrier_init,
|
terrier_init,
|
||||||
|
SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED,
|
||||||
};
|
};
|
||||||
|
|
|
@ -1189,10 +1189,12 @@ QEMUMachine lm3s811evb_machine = {
|
||||||
"lm3s811evb",
|
"lm3s811evb",
|
||||||
"Stellaris LM3S811EVB",
|
"Stellaris LM3S811EVB",
|
||||||
lm3s811evb_init,
|
lm3s811evb_init,
|
||||||
|
(64 * 1024 * 1024 + 8 * 1024 * 1024) | RAMSIZE_FIXED,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine lm3s6965evb_machine = {
|
QEMUMachine lm3s6965evb_machine = {
|
||||||
"lm3s6965evb",
|
"lm3s6965evb",
|
||||||
"Stellaris LM3S6965EVB",
|
"Stellaris LM3S6965EVB",
|
||||||
lm3s6965evb_init,
|
lm3s6965evb_init,
|
||||||
|
(256 * 1024 * 1024 + 64 * 1024 * 1024) | RAMSIZE_FIXED,
|
||||||
};
|
};
|
||||||
|
|
12
hw/sun4m.c
12
hw/sun4m.c
|
@ -1213,60 +1213,70 @@ QEMUMachine ss5_machine = {
|
||||||
"SS-5",
|
"SS-5",
|
||||||
"Sun4m platform, SPARCstation 5",
|
"Sun4m platform, SPARCstation 5",
|
||||||
ss5_init,
|
ss5_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine ss10_machine = {
|
QEMUMachine ss10_machine = {
|
||||||
"SS-10",
|
"SS-10",
|
||||||
"Sun4m platform, SPARCstation 10",
|
"Sun4m platform, SPARCstation 10",
|
||||||
ss10_init,
|
ss10_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine ss600mp_machine = {
|
QEMUMachine ss600mp_machine = {
|
||||||
"SS-600MP",
|
"SS-600MP",
|
||||||
"Sun4m platform, SPARCserver 600MP",
|
"Sun4m platform, SPARCserver 600MP",
|
||||||
ss600mp_init,
|
ss600mp_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine ss20_machine = {
|
QEMUMachine ss20_machine = {
|
||||||
"SS-20",
|
"SS-20",
|
||||||
"Sun4m platform, SPARCstation 20",
|
"Sun4m platform, SPARCstation 20",
|
||||||
ss20_init,
|
ss20_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine ss2_machine = {
|
QEMUMachine ss2_machine = {
|
||||||
"SS-2",
|
"SS-2",
|
||||||
"Sun4c platform, SPARCstation 2",
|
"Sun4c platform, SPARCstation 2",
|
||||||
ss2_init,
|
ss2_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine voyager_machine = {
|
QEMUMachine voyager_machine = {
|
||||||
"Voyager",
|
"Voyager",
|
||||||
"Sun4m platform, SPARCstation Voyager",
|
"Sun4m platform, SPARCstation Voyager",
|
||||||
vger_init,
|
vger_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine ss_lx_machine = {
|
QEMUMachine ss_lx_machine = {
|
||||||
"LX",
|
"LX",
|
||||||
"Sun4m platform, SPARCstation LX",
|
"Sun4m platform, SPARCstation LX",
|
||||||
ss_lx_init,
|
ss_lx_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine ss4_machine = {
|
QEMUMachine ss4_machine = {
|
||||||
"SS-4",
|
"SS-4",
|
||||||
"Sun4m platform, SPARCstation 4",
|
"Sun4m platform, SPARCstation 4",
|
||||||
ss4_init,
|
ss4_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine scls_machine = {
|
QEMUMachine scls_machine = {
|
||||||
"SPARCClassic",
|
"SPARCClassic",
|
||||||
"Sun4m platform, SPARCClassic",
|
"Sun4m platform, SPARCClassic",
|
||||||
scls_init,
|
scls_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine sbook_machine = {
|
QEMUMachine sbook_machine = {
|
||||||
"SPARCbook",
|
"SPARCbook",
|
||||||
"Sun4m platform, SPARCbook",
|
"Sun4m platform, SPARCbook",
|
||||||
sbook_init,
|
sbook_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct sun4d_hwdef sun4d_hwdefs[] = {
|
static const struct sun4d_hwdef sun4d_hwdefs[] = {
|
||||||
|
@ -1503,10 +1513,12 @@ QEMUMachine ss1000_machine = {
|
||||||
"SS-1000",
|
"SS-1000",
|
||||||
"Sun4d platform, SPARCserver 1000",
|
"Sun4d platform, SPARCserver 1000",
|
||||||
ss1000_init,
|
ss1000_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
||||||
QEMUMachine ss2000_machine = {
|
QEMUMachine ss2000_machine = {
|
||||||
"SS-2000",
|
"SS-2000",
|
||||||
"Sun4d platform, SPARCcenter 2000",
|
"Sun4d platform, SPARCcenter 2000",
|
||||||
ss2000_init,
|
ss2000_init,
|
||||||
|
PROM_SIZE_MAX + 0x00100000,
|
||||||
};
|
};
|
||||||
|
|
|
@ -385,4 +385,5 @@ QEMUMachine sun4u_machine = {
|
||||||
"sun4u",
|
"sun4u",
|
||||||
"Sun4u platform",
|
"Sun4u platform",
|
||||||
sun4u_init,
|
sun4u_init,
|
||||||
|
PROM_SIZE_MAX + VGA_RAM_SIZE,
|
||||||
};
|
};
|
||||||
|
|
2
sysemu.h
2
sysemu.h
|
@ -108,8 +108,6 @@ extern const char *prom_envs[MAX_PROM_ENVS];
|
||||||
extern unsigned int nb_prom_envs;
|
extern unsigned int nb_prom_envs;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* XXX: make it dynamic */
|
|
||||||
#define MAX_BIOS_SIZE (4 * 1024 * 1024)
|
|
||||||
#if defined (TARGET_PPC)
|
#if defined (TARGET_PPC)
|
||||||
#define BIOS_SIZE (1024 * 1024)
|
#define BIOS_SIZE (1024 * 1024)
|
||||||
#elif defined (TARGET_SPARC64)
|
#elif defined (TARGET_SPARC64)
|
||||||
|
|
22
vl.c
22
vl.c
|
@ -8277,7 +8277,7 @@ int main(int argc, char **argv)
|
||||||
machine = first_machine;
|
machine = first_machine;
|
||||||
cpu_model = NULL;
|
cpu_model = NULL;
|
||||||
initrd_filename = NULL;
|
initrd_filename = NULL;
|
||||||
ram_size = DEFAULT_RAM_SIZE * 1024 * 1024;
|
ram_size = -1;
|
||||||
vga_ram_size = VGA_RAM_SIZE;
|
vga_ram_size = VGA_RAM_SIZE;
|
||||||
#ifdef CONFIG_GDBSTUB
|
#ifdef CONFIG_GDBSTUB
|
||||||
use_gdbstub = 0;
|
use_gdbstub = 0;
|
||||||
|
@ -8963,7 +8963,25 @@ int main(int argc, char **argv)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* init the memory */
|
/* init the memory */
|
||||||
phys_ram_size = ram_size + vga_ram_size + MAX_BIOS_SIZE;
|
phys_ram_size = machine->ram_require & ~RAMSIZE_FIXED;
|
||||||
|
|
||||||
|
if (machine->ram_require & RAMSIZE_FIXED) {
|
||||||
|
if (ram_size > 0) {
|
||||||
|
if (ram_size < phys_ram_size) {
|
||||||
|
fprintf(stderr, "Machine `%s' requires %i bytes of memory\n",
|
||||||
|
machine->name, phys_ram_size);
|
||||||
|
exit(-1);
|
||||||
|
}
|
||||||
|
|
||||||
|
phys_ram_size = ram_size;
|
||||||
|
} else
|
||||||
|
ram_size = phys_ram_size;
|
||||||
|
} else {
|
||||||
|
if (ram_size < 0)
|
||||||
|
ram_size = DEFAULT_RAM_SIZE * 1024 * 1024;
|
||||||
|
|
||||||
|
phys_ram_size += ram_size;
|
||||||
|
}
|
||||||
|
|
||||||
phys_ram_base = qemu_vmalloc(phys_ram_size);
|
phys_ram_base = qemu_vmalloc(phys_ram_size);
|
||||||
if (!phys_ram_base) {
|
if (!phys_ram_base) {
|
||||||
|
|
Reference in New Issue