diff --git a/hw/i8259.c b/hw/i8259.c index f1d58bacb..de2d5ca05 100644 --- a/hw/i8259.c +++ b/hw/i8259.c @@ -79,32 +79,6 @@ static uint64_t irq_count[16]; #endif PicState2 *isa_pic; -/* set irq level. If an edge is detected, then the IRR is set to 1 */ -static void pic_set_irq1(PicState *s, int irq, int level) -{ - int mask; - mask = 1 << irq; - if (s->elcr & mask) { - /* level triggered */ - if (level) { - s->irr |= mask; - s->last_irr |= mask; - } else { - s->irr &= ~mask; - s->last_irr &= ~mask; - } - } else { - /* edge triggered */ - if (level) { - if ((s->last_irr & mask) == 0) - s->irr |= mask; - s->last_irr |= mask; - } else { - s->last_irr &= ~mask; - } - } -} - /* return the highest priority found in mask (highest = smallest number). Return 8 if no irq */ static int get_priority(PicState *s, int mask) @@ -144,6 +118,8 @@ static int pic_get_irq(PicState *s) } } +static void pic_set_irq1(PicState *s, int irq, int level); + /* raise irq to CPU if necessary. must be called every time the active irq may change */ static void pic_update_irq(PicState2 *s) @@ -178,6 +154,33 @@ static void pic_update_irq(PicState2 *s) } } +/* set irq level. If an edge is detected, then the IRR is set to 1 */ +static void pic_set_irq1(PicState *s, int irq, int level) +{ + int mask; + mask = 1 << irq; + if (s->elcr & mask) { + /* level triggered */ + if (level) { + s->irr |= mask; + s->last_irr |= mask; + } else { + s->irr &= ~mask; + s->last_irr &= ~mask; + } + } else { + /* edge triggered */ + if (level) { + if ((s->last_irr & mask) == 0) { + s->irr |= mask; + } + s->last_irr |= mask; + } else { + s->last_irr &= ~mask; + } + } +} + #ifdef DEBUG_IRQ_LATENCY int64_t irq_time[16]; #endif