sim-card
/
qemu
Archived
10
0
Fork 0

Merge branch 's390-1.0' of git://repo.or.cz/qemu/agraf

* 's390-1.0' of git://repo.or.cz/qemu/agraf:
  s390x: initialize virtio dev region
  tcg: Use TCGReg for standard tcg-target entry points.
  tcg: Standardize on TCGReg as the enum for hard registers
  s390x: Add shutdown for TCG s390-virtio machine
  s390: Fix cpu shutdown for KVM
  s390: fix short kernel command lines
  s390: fix reset hypercall to reset the status
  s390x: implement SIGP restart and shutdown
  s390x: implement rrbe instruction properly
  s390x: update R and C bits in storage key
  s390x: make ipte 31-bit aware
  s390x: add ldeb instruction
This commit is contained in:
Blue Swirl 2011-11-19 11:17:58 +00:00
commit 25cc4a768d
27 changed files with 224 additions and 112 deletions

View File

@ -97,6 +97,7 @@ int s390_virtio_hypercall(CPUState *env, uint64_t mem, uint64_t hypercall)
dev = s390_virtio_bus_find_mem(s390_bus, mem);
virtio_reset(dev->vdev);
stb_phys(dev->dev_offs + VIRTIO_DEV_OFFS_STATUS, 0);
s390_virtio_device_sync(dev);
break;
}
@ -120,6 +121,34 @@ int s390_virtio_hypercall(CPUState *env, uint64_t mem, uint64_t hypercall)
return r;
}
/*
* The number of running CPUs. On s390 a shutdown is the state of all CPUs
* being either stopped or disabled (for interrupts) waiting. We have to
* track this number to call the shutdown sequence accordingly. This
* number is modified either on startup or while holding the big qemu lock.
*/
static unsigned s390_running_cpus;
void s390_add_running_cpu(CPUState *env)
{
if (env->halted) {
s390_running_cpus++;
env->halted = 0;
env->exception_index = -1;
}
}
unsigned s390_del_running_cpu(CPUState *env)
{
if (env->halted == 0) {
assert(s390_running_cpus >= 1);
s390_running_cpus--;
env->halted = 1;
env->exception_index = EXCP_HLT;
}
return s390_running_cpus;
}
/* PC hardware initialisation */
static void s390_init(ram_addr_t my_ram_size,
const char *boot_device,
@ -136,6 +165,9 @@ static void s390_init(ram_addr_t my_ram_size,
ram_addr_t initrd_size = 0;
int shift = 0;
uint8_t *storage_keys;
void *virtio_region;
target_phys_addr_t virtio_region_len;
target_phys_addr_t virtio_region_start;
int i;
/* s390x ram size detection needs a 16bit multiplier + an increment. So
@ -155,6 +187,15 @@ static void s390_init(ram_addr_t my_ram_size,
memory_region_init_ram(ram, NULL, "s390.ram", my_ram_size);
memory_region_add_subregion(sysmem, 0, ram);
/* clear virtio region */
virtio_region_len = my_ram_size - ram_size;
virtio_region_start = ram_size;
virtio_region = cpu_physical_memory_map(virtio_region_start,
&virtio_region_len, true);
memset(virtio_region, 0, virtio_region_len);
cpu_physical_memory_unmap(virtio_region, virtio_region_len, 1,
virtio_region_len);
/* allocate storage keys */
storage_keys = g_malloc0(my_ram_size / TARGET_PAGE_SIZE);
@ -178,8 +219,8 @@ static void s390_init(ram_addr_t my_ram_size,
tmp_env->storage_keys = storage_keys;
}
env->halted = 0;
env->exception_index = 0;
/* One CPU has to run */
s390_add_running_cpu(env);
if (kernel_filename) {
kernel_size = load_image(kernel_filename, qemu_get_ram_ptr(0));
@ -229,7 +270,7 @@ static void s390_init(ram_addr_t my_ram_size,
if (kernel_cmdline) {
cpu_physical_memory_write(KERN_PARM_AREA, kernel_cmdline,
strlen(kernel_cmdline));
strlen(kernel_cmdline) + 1);
}
/* Create VirtIO network adapters */

View File

@ -309,10 +309,21 @@ static inline void kvm_s390_interrupt_internal(CPUState *env, int type,
}
#endif
CPUState *s390_cpu_addr2state(uint16_t cpu_addr);
void s390_add_running_cpu(CPUState *env);
unsigned s390_del_running_cpu(CPUState *env);
/* from s390-virtio-bus */
extern const target_phys_addr_t virtio_size;
#else
static inline void s390_add_running_cpu(CPUState *env)
{
}
static inline unsigned s390_del_running_cpu(CPUState *env)
{
return 0;
}
#endif
void cpu_lock(void);
void cpu_unlock(void);
@ -819,6 +830,10 @@ struct sysib_322 {
#define _PAGE_RO 0x200 /* HW read-only bit */
#define _PAGE_INVALID 0x400 /* HW invalid bit */
#define SK_C (0x1 << 1)
#define SK_R (0x1 << 2)
#define SK_F (0x1 << 3)
#define SK_ACC_MASK (0xf << 4)
/* EBCDIC handling */

View File

@ -26,6 +26,9 @@
#include "gdbstub.h"
#include "qemu-common.h"
#include "qemu-timer.h"
#ifndef CONFIG_USER_ONLY
#include "sysemu.h"
#endif
//#define DEBUG_S390
//#define DEBUG_S390_PTE
@ -131,6 +134,7 @@ void cpu_reset(CPUS390XState *env)
memset(env, 0, offsetof(CPUS390XState, breakpoints));
/* FIXME: reset vector? */
tlb_flush(env, 1);
s390_add_running_cpu(env);
}
#ifndef CONFIG_USER_ONLY
@ -348,6 +352,7 @@ int mmu_translate(CPUState *env, target_ulong vaddr, int rw, uint64_t asc,
target_ulong *raddr, int *flags)
{
int r = -1;
uint8_t *sk;
*flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
vaddr &= TARGET_PAGE_MASK;
@ -390,6 +395,17 @@ out:
*raddr = *raddr + env->psa;
}
if (*raddr <= ram_size) {
sk = &env->storage_keys[*raddr / TARGET_PAGE_SIZE];
if (*flags & PAGE_READ) {
*sk |= SK_R;
}
if (*flags & PAGE_WRITE) {
*sk |= SK_C;
}
}
return r;
}
@ -454,11 +470,15 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong vaddr)
void load_psw(CPUState *env, uint64_t mask, uint64_t addr)
{
if (mask & PSW_MASK_WAIT) {
if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
if (s390_del_running_cpu(env) == 0) {
#ifndef CONFIG_USER_ONLY
qemu_system_shutdown_request();
#endif
}
}
env->halted = 1;
env->exception_index = EXCP_HLT;
if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
/* XXX disabled wait state - CPU is dead */
}
}
env->psw.addr = addr;
@ -587,6 +607,7 @@ void do_interrupt (CPUState *env)
qemu_log("%s: %d at pc=%" PRIx64 "\n", __FUNCTION__, env->exception_index,
env->psw.addr);
s390_add_running_cpu(env);
/* handle external interrupts */
if ((env->psw.mask & PSW_MASK_EXT) &&
env->exception_index == -1) {

View File

@ -102,6 +102,7 @@ DEF_HELPER_3(madb, void, i32, i64, i32)
DEF_HELPER_3(maebr, void, i32, i32, i32)
DEF_HELPER_3(madbr, void, i32, i32, i32)
DEF_HELPER_3(msdbr, void, i32, i32, i32)
DEF_HELPER_2(ldeb, void, i32, i64)
DEF_HELPER_2(lxdb, void, i32, i64)
DEF_HELPER_FLAGS_2(tceb, TCG_CALL_PURE, i32, i32, i64)
DEF_HELPER_FLAGS_2(tcdb, TCG_CALL_PURE, i32, i32, i64)

View File

@ -185,8 +185,7 @@ void kvm_s390_interrupt_internal(CPUState *env, int type, uint32_t parm,
return;
}
env->halted = 0;
env->exception_index = -1;
s390_add_running_cpu(env);
qemu_cpu_kick(env);
kvmint.type = type;
@ -299,8 +298,7 @@ static int handle_diag(CPUState *env, struct kvm_run *run, int ipb_code)
static int s390_cpu_restart(CPUState *env)
{
kvm_s390_interrupt(env, KVM_S390_RESTART, 0);
env->halted = 0;
env->exception_index = -1;
s390_add_running_cpu(env);
qemu_cpu_kick(env);
dprintf("DONE: SIGP cpu restart: %p\n", env);
return 0;
@ -425,17 +423,16 @@ static int handle_intercept(CPUState *env)
r = handle_instruction(env, run);
break;
case ICPT_WAITPSW:
/* XXX What to do on system shutdown? */
env->halted = 1;
env->exception_index = EXCP_HLT;
case ICPT_CPU_STOP:
if (s390_del_running_cpu(env) == 0) {
qemu_system_shutdown_request();
}
r = EXCP_HALTED;
break;
case ICPT_SOFT_INTERCEPT:
fprintf(stderr, "KVM unimplemented icpt SOFT\n");
exit(1);
break;
case ICPT_CPU_STOP:
qemu_system_shutdown_request();
break;
case ICPT_IO:
fprintf(stderr, "KVM unimplemented icpt IO\n");
exit(1);
@ -468,8 +465,6 @@ int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run)
if (ret == 0) {
ret = EXCP_INTERRUPT;
} else if (ret > 0) {
ret = 0;
}
return ret;
}

View File

@ -29,6 +29,10 @@
#include <linux/kvm.h>
#endif
#if !defined (CONFIG_USER_ONLY)
#include "sysemu.h"
#endif
/*****************************************************************************/
/* Softmmu support */
#if !defined (CONFIG_USER_ONLY)
@ -1631,6 +1635,15 @@ void HELPER(maebr)(uint32_t f1, uint32_t f3, uint32_t f2)
&env->fpu_status);
}
/* convert 32-bit float to 64-bit float */
void HELPER(ldeb)(uint32_t f1, uint64_t a2)
{
uint32_t v2;
v2 = ldl(a2);
env->fregs[f1].d = float32_to_float64(v2,
&env->fpu_status);
}
/* convert 64-bit float to 128-bit float */
void HELPER(lxdb)(uint32_t f1, uint64_t a2)
{
@ -2752,7 +2765,6 @@ uint64_t HELPER(iske)(uint64_t r2)
return 0;
}
/* XXX maybe use qemu's internal keys? */
return env->storage_keys[addr / TARGET_PAGE_SIZE];
}
@ -2771,14 +2783,15 @@ void HELPER(sske)(uint32_t r1, uint64_t r2)
/* reset reference bit extended */
uint32_t HELPER(rrbe)(uint32_t r1, uint64_t r2)
{
uint8_t re;
uint8_t key;
if (r2 > ram_size) {
return 0;
}
/* XXX implement */
#if 0
env->storage_keys[r2 / TARGET_PAGE_SIZE] &= ~SK_REFERENCED;
#endif
key = env->storage_keys[r2 / TARGET_PAGE_SIZE];
re = key & (SK_R | SK_C);
env->storage_keys[r2 / TARGET_PAGE_SIZE] = (key & ~SK_R);
/*
* cc
@ -2788,7 +2801,8 @@ uint32_t HELPER(rrbe)(uint32_t r1, uint64_t r2)
* 2 Reference bit one; change bit zero
* 3 Reference bit one; change bit one
*/
return 0;
return re >> 1;
}
/* compare and swap and purge */
@ -2891,6 +2905,16 @@ uint32_t HELPER(sigp)(uint64_t order_code, uint32_t r1, uint64_t cpu_addr)
env->regs[r1] &= 0xffffffff00000000ULL;
cc = 1;
break;
#if !defined (CONFIG_USER_ONLY)
case SIGP_RESTART:
qemu_system_reset_request();
cpu_loop_exit(env);
break;
case SIGP_STOP:
qemu_system_shutdown_request();
cpu_loop_exit(env);
break;
#endif
default:
/* unknown sigp */
fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
@ -2941,6 +2965,13 @@ void HELPER(ipte)(uint64_t pte_addr, uint64_t vaddr)
/* XXX we exploit the fact that Linux passes the exact virtual
address here - it's not obliged to! */
tlb_flush_page(env, page);
/* XXX 31-bit hack */
if (page & 0x80000000) {
tlb_flush_page(env, page & ~0x80000000);
} else {
tlb_flush_page(env, page | 0x80000000);
}
}
/* flush local tlb */

View File

@ -2214,6 +2214,10 @@ static void disas_ed(DisasContext *s, int op, int r1, int x2, int b2, int d2,
addr = get_address(s, x2, b2, d2);
tmp_r1 = tcg_const_i32(r1);
switch (op) {
case 0x4: /* LDEB R1,D2(X2,B2) [RXE] */
potential_page_fault(s);
gen_helper_ldeb(tmp_r1, addr);
break;
case 0x5: /* LXDB R1,D2(X2,B2) [RXE] */
potential_page_fault(s);
gen_helper_lxdb(tmp_r1, addr);

View File

@ -1808,25 +1808,26 @@ static void tcg_target_init(TCGContext *s)
CPU_TEMP_BUF_NLONGS * sizeof(long));
}
static inline void tcg_out_ld(TCGContext *s, TCGType type, int arg,
int arg1, tcg_target_long arg2)
static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ld32u(s, COND_AL, arg, arg1, arg2);
}
static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
int arg1, tcg_target_long arg2)
static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
tcg_out_st32(s, COND_AL, arg, arg1, arg2);
}
static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
static inline void tcg_out_mov(TCGContext *s, TCGType type,
TCGReg ret, TCGReg arg)
{
tcg_out_dat_reg(s, COND_AL, ARITH_MOV, ret, 0, arg, SHIFT_IMM_LSL(0));
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
int ret, tcg_target_long arg)
TCGReg ret, tcg_target_long arg)
{
tcg_out_movi32(s, COND_AL, ret, arg);
}

View File

@ -27,7 +27,7 @@
#undef TCG_TARGET_WORDS_BIGENDIAN
#undef TCG_TARGET_STACK_GROWSUP
enum {
typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@ -44,7 +44,7 @@ enum {
TCG_REG_R13,
TCG_REG_R14,
TCG_REG_PC,
};
} TCGReg;
#define TCG_TARGET_NB_REGS 16

View File

@ -338,7 +338,7 @@ static int tcg_target_const_match(tcg_target_long val,
/* supplied by libgcc */
extern void *__canonicalize_funcptr_for_compare(void *);
static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
/* PA1.1 defines COPY as OR r,0,t; PA2.0 defines COPY as LDO 0(r),t
but hppa-dis.c is unaware of this definition */
@ -349,7 +349,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
}
static void tcg_out_movi(TCGContext *s, TCGType type,
int ret, tcg_target_long arg)
TCGReg ret, tcg_target_long arg)
{
if (check_fit_tl(arg, 14)) {
tcg_out32(s, INSN_LDO | INSN_R1(ret)
@ -393,15 +393,15 @@ static void tcg_out_ldst(TCGContext *s, int ret, int addr,
}
/* This function is required by tcg.c. */
static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
int arg1, tcg_target_long arg2)
static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret,
TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, ret, arg1, arg2, INSN_LDW);
}
/* This function is required by tcg.c. */
static inline void tcg_out_st(TCGContext *s, TCGType type, int ret,
int arg1, tcg_target_long arg2)
static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg ret,
TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, ret, arg1, arg2, INSN_STW);
}

View File

@ -32,7 +32,7 @@
#define TCG_TARGET_NB_REGS 32
enum {
typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_RP,
@ -65,7 +65,7 @@ enum {
TCG_REG_RET1,
TCG_REG_SP,
TCG_REG_R31,
};
} TCGReg;
#define TCG_CT_CONST_0 0x0100
#define TCG_CT_CONST_S5 0x0200

View File

@ -518,7 +518,8 @@ static inline void tgen_arithr(TCGContext *s, int subop, int dest, int src)
tcg_out_modrm(s, OPC_ARITH_GvEv + (subop << 3) + ext, dest, src);
}
static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
static inline void tcg_out_mov(TCGContext *s, TCGType type,
TCGReg ret, TCGReg arg)
{
if (arg != ret) {
int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0);
@ -527,7 +528,7 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
}
static void tcg_out_movi(TCGContext *s, TCGType type,
int ret, tcg_target_long arg)
TCGReg ret, tcg_target_long arg)
{
if (arg == 0) {
tgen_arithr(s, ARITH_XOR, ret, ret);
@ -568,15 +569,15 @@ static inline void tcg_out_pop(TCGContext *s, int reg)
tcg_out_opc(s, OPC_POP_r32 + LOWREGMASK(reg), 0, reg, 0);
}
static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
int arg1, tcg_target_long arg2)
static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret,
TCGReg arg1, tcg_target_long arg2)
{
int opc = OPC_MOVL_GvEv + (type == TCG_TYPE_I64 ? P_REXW : 0);
tcg_out_modrm_offset(s, opc, ret, arg1, arg2);
}
static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
int arg1, tcg_target_long arg2)
static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
int opc = OPC_MOVL_EvGv + (type == TCG_TYPE_I64 ? P_REXW : 0);
tcg_out_modrm_offset(s, opc, arg, arg1, arg2);

View File

@ -36,7 +36,7 @@
# define TCG_TARGET_NB_REGS 8
#endif
enum {
typedef enum {
TCG_REG_EAX = 0,
TCG_REG_ECX,
TCG_REG_EDX,
@ -64,7 +64,7 @@ enum {
TCG_REG_RBP = TCG_REG_EBP,
TCG_REG_RSI = TCG_REG_ESI,
TCG_REG_RDI = TCG_REG_EDI,
};
} TCGReg;
#define TCG_CT_CONST_S32 0x100
#define TCG_CT_CONST_U32 0x200

View File

@ -830,7 +830,7 @@ static inline void tcg_out_bundle(TCGContext *s, int template,
}
static inline void tcg_out_mov(TCGContext *s, TCGType type,
TCGArg ret, TCGArg arg)
TCGReg ret, TCGReg arg)
{
tcg_out_bundle(s, mmI,
tcg_opc_m48(TCG_REG_P0, OPC_NOP_M48, 0),
@ -839,7 +839,7 @@ static inline void tcg_out_mov(TCGContext *s, TCGType type,
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
TCGArg reg, tcg_target_long arg)
TCGReg reg, tcg_target_long arg)
{
tcg_out_bundle(s, mLX,
tcg_opc_m48(TCG_REG_P0, OPC_NOP_M48, 0),
@ -972,8 +972,8 @@ static inline void tcg_out_st_rel(TCGContext *s, uint64_t opc_m4, TCGArg arg,
}
}
static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGArg arg,
TCGArg arg1, tcg_target_long arg2)
static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32) {
tcg_out_ld_rel(s, OPC_LD4_M1, arg, arg1, arg2);
@ -982,8 +982,8 @@ static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGArg arg,
}
}
static inline void tcg_out_st(TCGContext *s, TCGType type, TCGArg arg,
TCGArg arg1, tcg_target_long arg2)
static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32) {
tcg_out_st_rel(s, OPC_ST4_M4, arg, arg1, arg2);

View File

@ -26,7 +26,7 @@
/* We only map the first 64 registers */
#define TCG_TARGET_NB_REGS 64
enum {
typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@ -91,7 +91,7 @@ enum {
TCG_REG_R61,
TCG_REG_R62,
TCG_REG_R63,
};
} TCGReg;
#define TCG_CT_CONST_ZERO 0x100
#define TCG_CT_CONST_S22 0x200

View File

@ -379,13 +379,14 @@ static inline void tcg_out_nop(TCGContext *s)
tcg_out32(s, 0);
}
static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
static inline void tcg_out_mov(TCGContext *s, TCGType type,
TCGReg ret, TCGReg arg)
{
tcg_out_opc_reg(s, OPC_ADDU, ret, arg, TCG_REG_ZERO);
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
int reg, int32_t arg)
TCGReg reg, tcg_target_long arg)
{
if (arg == (int16_t)arg) {
tcg_out_opc_imm(s, OPC_ADDIU, reg, TCG_REG_ZERO, arg);
@ -480,14 +481,14 @@ static inline void tcg_out_ldst(TCGContext *s, int opc, int arg,
}
}
static inline void tcg_out_ld(TCGContext *s, TCGType type, int arg,
int arg1, tcg_target_long arg2)
static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, OPC_LW, arg, arg1, arg2);
}
static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
int arg1, tcg_target_long arg2)
static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
tcg_out_ldst(s, OPC_SW, arg, arg1, arg2);
}

View File

@ -31,7 +31,7 @@
#define TCG_TARGET_NB_REGS 32
enum {
typedef enum {
TCG_REG_ZERO = 0,
TCG_REG_AT,
TCG_REG_V0,
@ -64,7 +64,7 @@ enum {
TCG_REG_SP,
TCG_REG_FP,
TCG_REG_RA,
};
} TCGReg;
#define TCG_CT_CONST_ZERO 0x100
#define TCG_CT_CONST_U16 0x200

View File

@ -436,13 +436,13 @@ static const uint32_t tcg_to_bc[10] = {
[TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
};
static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
tcg_out32 (s, OR | SAB (arg, ret, arg));
}
static void tcg_out_movi(TCGContext *s, TCGType type,
int ret, tcg_target_long arg)
TCGReg ret, tcg_target_long arg)
{
if (arg == (int16_t) arg)
tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff));
@ -961,13 +961,13 @@ static void tcg_target_qemu_prologue (TCGContext *s)
tcg_out32 (s, BCLR | BO_ALWAYS);
}
static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1,
static void tcg_out_ld (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2)
{
tcg_out_ldst (s, ret, arg1, arg2, LWZ, LWZX);
}
static void tcg_out_st (TCGContext *s, TCGType type, int arg, int arg1,
static void tcg_out_st (TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2)
{
tcg_out_ldst (s, arg, arg1, arg2, STW, STWX);

View File

@ -26,7 +26,7 @@
#define TCG_TARGET_WORDS_BIGENDIAN
#define TCG_TARGET_NB_REGS 32
enum {
typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@ -59,7 +59,7 @@ enum {
TCG_REG_R29,
TCG_REG_R30,
TCG_REG_R31
};
} TCGReg;
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R1

View File

@ -435,7 +435,7 @@ static const uint32_t tcg_to_bc[10] = {
[TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
};
static void tcg_out_mov (TCGContext *s, TCGType type, int ret, int arg)
static void tcg_out_mov (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
tcg_out32 (s, OR | SAB (arg, ret, arg));
}
@ -459,7 +459,7 @@ static void tcg_out_movi32 (TCGContext *s, int ret, int32_t arg)
}
static void tcg_out_movi (TCGContext *s, TCGType type,
int ret, tcg_target_long arg)
TCGReg ret, tcg_target_long arg)
{
int32_t arg32 = arg;
arg = type == TCG_TYPE_I32 ? arg & 0xffffffff : arg;
@ -932,7 +932,7 @@ static void tcg_target_qemu_prologue (TCGContext *s)
tcg_out32 (s, BCLR | BO_ALWAYS);
}
static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1,
static void tcg_out_ld (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)
@ -941,7 +941,7 @@ static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1,
tcg_out_ldsta (s, ret, arg1, arg2, LD, LDX);
}
static void tcg_out_st (TCGContext *s, TCGType type, int arg, int arg1,
static void tcg_out_st (TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)

View File

@ -26,7 +26,7 @@
#define TCG_TARGET_WORDS_BIGENDIAN
#define TCG_TARGET_NB_REGS 32
enum {
typedef enum {
TCG_REG_R0 = 0,
TCG_REG_R1,
TCG_REG_R2,
@ -59,7 +59,7 @@ enum {
TCG_REG_R29,
TCG_REG_R30,
TCG_REG_R31
};
} TCGReg;
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R1

View File

@ -306,7 +306,8 @@ static void tcg_out_arithc(TCGContext *s, int rd, int rs1,
| (val2const ? INSN_IMM13(val2) : INSN_RS2(val2)));
}
static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
static inline void tcg_out_mov(TCGContext *s, TCGType type,
TCGReg ret, TCGReg arg)
{
tcg_out_arith(s, ret, arg, TCG_REG_G0, ARITH_OR);
}
@ -333,7 +334,7 @@ static inline void tcg_out_movi_imm32(TCGContext *s, int ret, uint32_t arg)
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
int ret, tcg_target_long arg)
TCGReg ret, tcg_target_long arg)
{
/* All 32-bit constants, as well as 64-bit constants with
no high bits set go through movi_imm32. */
@ -398,8 +399,8 @@ static inline void tcg_out_ldst_asi(TCGContext *s, int ret, int addr,
INSN_ASI(asi) | INSN_RS2(addr));
}
static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
int arg1, tcg_target_long arg2)
static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret,
TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)
tcg_out_ldst(s, ret, arg1, arg2, LDUW);
@ -407,8 +408,8 @@ static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
tcg_out_ldst(s, ret, arg1, arg2, LDX);
}
static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
int arg1, tcg_target_long arg2)
static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg,
TCGReg arg1, tcg_target_long arg2)
{
if (type == TCG_TYPE_I32)
tcg_out_ldst(s, arg, arg1, arg2, STW);

View File

@ -27,7 +27,7 @@
#define TCG_TARGET_NB_REGS 32
enum {
typedef enum {
TCG_REG_G0 = 0,
TCG_REG_G1,
TCG_REG_G2,
@ -60,7 +60,7 @@ enum {
TCG_REG_I5,
TCG_REG_I6,
TCG_REG_I7,
};
} TCGReg;
#define TCG_CT_CONST_S11 0x100
#define TCG_CT_CONST_S13 0x200

View File

@ -71,14 +71,14 @@ static void patch_reloc(uint8_t *code_ptr, int type,
/* Forward declarations for functions declared and used in tcg-target.c. */
static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
static void tcg_out_ld(TCGContext *s, TCGType type, int ret, int arg1,
static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2);
static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg);
static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
static void tcg_out_movi(TCGContext *s, TCGType type,
int ret, tcg_target_long arg);
TCGReg ret, tcg_target_long arg);
static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
const int *const_args);
static void tcg_out_st(TCGContext *s, TCGType type, int arg, int arg1,
static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2);
static int tcg_target_const_match(tcg_target_long val,
const TCGArgConstraint *arg_ct);

View File

@ -495,7 +495,7 @@ static void tci_out_label(TCGContext *s, TCGArg arg)
}
}
static void tcg_out_ld(TCGContext *s, TCGType type, int ret, int arg1,
static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
tcg_target_long arg2)
{
uint8_t *old_code_ptr = s->code_ptr;
@ -519,7 +519,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type, int ret, int arg1,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
{
uint8_t *old_code_ptr = s->code_ptr;
assert(ret != arg);
@ -534,7 +534,7 @@ static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
}
static void tcg_out_movi(TCGContext *s, TCGType type,
int t0, tcg_target_long arg)
TCGReg t0, tcg_target_long arg)
{
uint8_t *old_code_ptr = s->code_ptr;
uint32_t arg32 = arg;
@ -834,7 +834,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
old_code_ptr[1] = s->code_ptr - old_code_ptr;
}
static void tcg_out_st(TCGContext *s, TCGType type, int arg, int arg1,
static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
tcg_target_long arg2)
{
uint8_t *old_code_ptr = s->code_ptr;

View File

@ -150,7 +150,7 @@ typedef enum {
#endif
/* Special value UINT8_MAX is used by TCI to encode constant values. */
TCG_CONST = UINT8_MAX
} TCGRegister;
} TCGReg;
void tci_disas(uint8_t opc);

38
tci.c
View File

@ -63,90 +63,90 @@ void *tci_tb_ptr;
static tcg_target_ulong tci_reg[TCG_TARGET_NB_REGS];
static tcg_target_ulong tci_read_reg(TCGRegister index)
static tcg_target_ulong tci_read_reg(TCGReg index)
{
assert(index < ARRAY_SIZE(tci_reg));
return tci_reg[index];
}
#if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64
static int8_t tci_read_reg8s(TCGRegister index)
static int8_t tci_read_reg8s(TCGReg index)
{
return (int8_t)tci_read_reg(index);
}
#endif
#if TCG_TARGET_HAS_ext16s_i32 || TCG_TARGET_HAS_ext16s_i64
static int16_t tci_read_reg16s(TCGRegister index)
static int16_t tci_read_reg16s(TCGReg index)
{
return (int16_t)tci_read_reg(index);
}
#endif
#if TCG_TARGET_REG_BITS == 64
static int32_t tci_read_reg32s(TCGRegister index)
static int32_t tci_read_reg32s(TCGReg index)
{
return (int32_t)tci_read_reg(index);
}
#endif
static uint8_t tci_read_reg8(TCGRegister index)
static uint8_t tci_read_reg8(TCGReg index)
{
return (uint8_t)tci_read_reg(index);
}
static uint16_t tci_read_reg16(TCGRegister index)
static uint16_t tci_read_reg16(TCGReg index)
{
return (uint16_t)tci_read_reg(index);
}
static uint32_t tci_read_reg32(TCGRegister index)
static uint32_t tci_read_reg32(TCGReg index)
{
return (uint32_t)tci_read_reg(index);
}
#if TCG_TARGET_REG_BITS == 64
static uint64_t tci_read_reg64(TCGRegister index)
static uint64_t tci_read_reg64(TCGReg index)
{
return tci_read_reg(index);
}
#endif
static void tci_write_reg(TCGRegister index, tcg_target_ulong value)
static void tci_write_reg(TCGReg index, tcg_target_ulong value)
{
assert(index < ARRAY_SIZE(tci_reg));
assert(index != TCG_AREG0);
tci_reg[index] = value;
}
static void tci_write_reg8s(TCGRegister index, int8_t value)
static void tci_write_reg8s(TCGReg index, int8_t value)
{
tci_write_reg(index, value);
}
static void tci_write_reg16s(TCGRegister index, int16_t value)
static void tci_write_reg16s(TCGReg index, int16_t value)
{
tci_write_reg(index, value);
}
#if TCG_TARGET_REG_BITS == 64
static void tci_write_reg32s(TCGRegister index, int32_t value)
static void tci_write_reg32s(TCGReg index, int32_t value)
{
tci_write_reg(index, value);
}
#endif
static void tci_write_reg8(TCGRegister index, uint8_t value)
static void tci_write_reg8(TCGReg index, uint8_t value)
{
tci_write_reg(index, value);
}
static void tci_write_reg16(TCGRegister index, uint16_t value)
static void tci_write_reg16(TCGReg index, uint16_t value)
{
tci_write_reg(index, value);
}
static void tci_write_reg32(TCGRegister index, uint32_t value)
static void tci_write_reg32(TCGReg index, uint32_t value)
{
tci_write_reg(index, value);
}
@ -159,7 +159,7 @@ static void tci_write_reg64(uint32_t high_index, uint32_t low_index,
tci_write_reg(high_index, value >> 32);
}
#elif TCG_TARGET_REG_BITS == 64
static void tci_write_reg64(TCGRegister index, uint64_t value)
static void tci_write_reg64(TCGReg index, uint64_t value)
{
tci_write_reg(index, value);
}
@ -290,7 +290,7 @@ static target_ulong tci_read_ulong(uint8_t **tb_ptr)
static tcg_target_ulong tci_read_ri(uint8_t **tb_ptr)
{
tcg_target_ulong value;
TCGRegister r = **tb_ptr;
TCGReg r = **tb_ptr;
*tb_ptr += 1;
if (r == TCG_CONST) {
value = tci_read_i(tb_ptr);
@ -304,7 +304,7 @@ static tcg_target_ulong tci_read_ri(uint8_t **tb_ptr)
static uint32_t tci_read_ri32(uint8_t **tb_ptr)
{
uint32_t value;
TCGRegister r = **tb_ptr;
TCGReg r = **tb_ptr;
*tb_ptr += 1;
if (r == TCG_CONST) {
value = tci_read_i32(tb_ptr);
@ -326,7 +326,7 @@ static uint64_t tci_read_ri64(uint8_t **tb_ptr)
static uint64_t tci_read_ri64(uint8_t **tb_ptr)
{
uint64_t value;
TCGRegister r = **tb_ptr;
TCGReg r = **tb_ptr;
*tb_ptr += 1;
if (r == TCG_CONST) {
value = tci_read_i64(tb_ptr);