Going for __ARM__ to distinguish host and firmware builds is not
sufficient here, since we might be building on a ARM host, so there is
now a OCTSIMFWBUILD define.
Change-Id: Ib07a58b6102b1709f295d08a764c6f118a2d0b9e
The general idea is to provide hints to cuart so it can calculate
a reasonable timeout value when receiving multiple bytes instead of
having per-byte timeouts
Change-Id: Ia6ad2d83cea48a8661ed2e4eb50f9bcb85218454
The main loop will now poll for finished/failed transactions and handle
them, this was previously handled during the last rx interrupt of a
transaction, which was bad for timing. This does also fix malloc/free
while handling interrupts.
Change-Id: I055110720089e20e65db592eccc3ce4d618e8c63
See 7816-3 8.2.5, T0 only (maybe implicitly) and no T15 = no TCK.
This could be handled by a timeout instead, but timeouts don't work yet.
Change-Id: Ice7bc4e603bbbbef88258af41f61e14a06727add
There are some cards that state a wrong length of the historical
bytes in their ATR header, resulting in WTIME expiry. Let's dispatch
ISO7816_E_WTIME_EXP into the ATR FSM and treat it as normal ATR_DONE if
it happens during rx of historical bytes or TCK.
Also introdcue an ISO7816_E_ATR_ERR_IND for those situations where
waiting time expiration occurs during reception of TS/T0/TA/TB/TC/TD
bytes.
Change-Id: I62d47cb5e06b480941c67122f3c7d7a462ea2099
Eric Wild
Harald Welte